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[PATCH] serprog: add support for setting the SPI frequency (was: serprog spi support + general cleanup)
by Stefan Tauner 21 Jun '11

21 Jun '11

of course this requires the general spi support in serprog. example output of all 5 patches (+ changing serial to Serial; damnit): ./flashrom -p serprog:dev=/dev/ttyU2flasher:115200,sck=1234 -V -c W25Q32 flashrom v0.9.3-r1349 on Linux 2.6.35-28-generic (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1193M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 997 us, 10000 myus = 9997 us, 4 myus = 4 us, OK. Initializing serprog programmer serprog: connected - attempting to synchronize . serprog: Synchronized serprog: Interface version ok. serprog: Bus support: parallel=off, LPC=off, FWH=off, SPI=on serprog: Maximum write-n length is 16777215 serprog: Maximum read-n length is 16777215 serprog: Requested to set SPI clock frequency to 1234 kHz. It was actually set to 1000 kHz serprog: Programmer name is "atmegaXXu2 " serprog: Serial buffer size is 65535 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Chip status register is 00 Found chip "Winbond W25Q32" (4096 kB, SPI) on serprog. No operations were specified. do we want full stops at all those debug messages? i would say yes, but there are (almost) none. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 3/3] serprog improvements
by Stefan Tauner 21 Jun '11

21 Jun '11

i have forgot a few tiny bits. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH 3/3] serprog improvements
by Stefan Tauner 21 Jun '11

21 Jun '11

- rename serprog_delay parameter to usecs - fix code style, (output) formatting issues and comments - sp_docommand: remove unnecessary malloc+memcpy and fix formatting Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- programmer.h | 5 ++- serprog-protocol.txt | 2 +- serprog.c | 53 +++++++++++++++++++++++-------------------------- 3 files changed, 29 insertions(+), 31 deletions(-) diff --git a/programmer.h b/programmer.h index 7df2120..b6700c0 100644 --- a/programmer.h +++ b/programmer.h @@ -601,9 +601,10 @@ int serprog_init(void); void serprog_chip_writeb(uint8_t val, chipaddr addr); uint8_t serprog_chip_readb(const chipaddr addr); void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -void serprog_delay(int delay); +void serprog_delay(int usecs); int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); + const unsigned char *writearr, + unsigned char *readarr); int serprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); #endif diff --git a/serprog-protocol.txt b/serprog-protocol.txt index 2391aef..9a09287 100644 --- a/serprog-protocol.txt +++ b/serprog-protocol.txt @@ -19,7 +19,7 @@ COMMAND Description Parameters Return Value 0x05 Query supported bustypes none ACK + 8-bit flags (as per flashrom) / NAK 0x06 Query connected address lines none ACK + 8bit line count / NAK 0x07 Query operation buffer size none ACK + 16bit size / NAK -0x08 Query write-n maximum data len none ACK + 24bit maximum length / NAK +0x08 Query maximum write-n length none ACK + 24bit length (0==2^24) / NAK 0x09 Read byte 24-bit addr ACK + BYTE / NAK 0x0A Read n bytes 24-bit addr + 24-bit length ACK + length bytes / NAK 0x0B Initialize operation buffer none ACK / NAK diff --git a/serprog.c b/serprog.c index 5f2c014..7585baf 100644 --- a/serprog.c +++ b/serprog.c @@ -204,7 +204,7 @@ static void sp_synchronize(void) return; } } - msg_perr("Error: cannot synchronize protocol\n" + msg_perr("Error: cannot synchronize protocol " "- check communications and reset device?\n"); exit(1); } @@ -220,32 +220,27 @@ static int sp_check_commandavail(uint8_t command) static int sp_automatic_cmdcheck(uint8_t cmd) { if ((sp_check_avail_automatic) && (sp_check_commandavail(cmd) == 0)) { - msg_pdbg("Warning: Automatic command availability check" - " failed for cmd %d - wont execute cmd\n",cmd); + msg_pdbg("Warning: Automatic command availability check failed " + "for cmd 0x%x - wont execute cmd\n", cmd); return 1; } return 0; } static int sp_docommand(uint8_t command, uint32_t parmlen, - uint8_t * params, uint32_t retlen, void *retparms) + uint8_t *params, uint32_t retlen, void *retparms) { - unsigned char *sendpacket; unsigned char c; if (sp_automatic_cmdcheck(command)) return 1; - sendpacket = malloc(1 + parmlen); - if (!sendpacket) - sp_die("Error: cannot malloc command buffer"); - sendpacket[0] = command; - memcpy(&(sendpacket[1]), params, parmlen); - if (write(sp_fd, sendpacket, 1 + parmlen) != (1 + parmlen)) { - sp_die("Error: cannot write command"); - } - free(sendpacket); + if (write(sp_fd, &command, 1) != 1) + sp_die("Error: cannot write op code"); + if (write(sp_fd, params, parmlen) != (parmlen)) + sp_die("Error: cannot write parameters"); if (read(sp_fd, &c, 1) != 1) sp_die("Error: cannot read from device"); - if (c == S_NAK) return 1; + if (c == S_NAK) + return 1; if (c != S_ACK) { msg_perr("Error: invalid response 0x%02X from device\n",c); exit(1); @@ -256,8 +251,8 @@ static int sp_docommand(uint8_t command, uint32_t parmlen, int r; r = read(sp_fd, retparms + rd_bytes, retlen - rd_bytes); - if (r <= 0) sp_die - ("Error: cannot read return parameters"); + if (r <= 0) + sp_die("Error: cannot read return parameters"); rd_bytes += r; } while (rd_bytes != retlen); } @@ -735,30 +730,32 @@ void serprog_chip_readn(uint8_t * buf, const chipaddr addr, size_t len) { size_t lenm = len; chipaddr addrm = addr; - while ((sp_max_read_n)&&(lenm > sp_max_read_n)) { - sp_do_read_n(&(buf[addrm-addr]),addrm,sp_max_read_n); + while ((sp_max_read_n != 0) && (lenm > sp_max_read_n)) { + sp_do_read_n(&(buf[addrm-addr]), addrm, sp_max_read_n); addrm += sp_max_read_n; lenm -= sp_max_read_n; } - if (lenm) sp_do_read_n(&(buf[addrm-addr]),addrm,lenm); + if (lenm) + sp_do_read_n(&(buf[addrm-addr]), addrm, lenm); } -void serprog_delay(int delay) +void serprog_delay(int usecs) { unsigned char buf[4]; - msg_pspew("%s\n", __func__); + msg_pspew("%s usecs=%d\n", __func__, usecs); if (!sp_check_commandavail(S_CMD_O_DELAY)) { - internal_delay(delay); - msg_pdbg("Note: serprog_delay used, but the programmer doesnt support delay\n"); + msg_pdbg("Note: using internal_delay, because the attached " + "programmer does not support the delay opcode.\n"); + internal_delay(usecs); return; } if ((sp_max_write_n) && (sp_write_n_bytes)) sp_pass_writen(); sp_check_opbuf_usage(5); - buf[0] = ((delay >> 0) & 0xFF); - buf[1] = ((delay >> 8) & 0xFF); - buf[2] = ((delay >> 16) & 0xFF); - buf[3] = ((delay >> 24) & 0xFF); + buf[0] = ((usecs >> 0) & 0xFF); + buf[1] = ((usecs >> 8) & 0xFF); + buf[2] = ((usecs >> 16) & 0xFF); + buf[3] = ((usecs >> 24) & 0xFF); sp_stream_buffer_op(S_CMD_O_DELAY, 4, buf); sp_opbuf_usage += 5; sp_prev_was_write = 0; -- 1.7.1

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[PATCH 2/3] fixup! Add SPI support to serprog protocol.
by Stefan Tauner 21 Jun '11

21 Jun '11

- mostly formatting - drop the 256 B write limit and set max_data_write to 2^24 in case of 0 - add debug output Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- serprog-protocol.txt | 1 + serprog.c | 95 +++++++++++++++++++++++++++++--------------------- 2 files changed, 56 insertions(+), 40 deletions(-) diff --git a/serprog-protocol.txt b/serprog-protocol.txt index cced0dc..2391aef 100644 --- a/serprog-protocol.txt +++ b/serprog-protocol.txt @@ -69,6 +69,7 @@ Additional information of the above commands: Sending a byte with more than 1 bit set will make the programmer decide among them on it's own. Bit values as with Q_BUSTYPE. 0x13 (O_SPIOP): + Send and receive bytes via SPI. Maximum slen is Q_WRNMAXLEN result after Q_BUSTYPE returns only SPI or S_BUSTYPE == SPI is used. Same for rlen and Q_RDNMAXLEN. This operation is immediate, meaning it doesnt use the operation buffer. diff --git a/serprog.c b/serprog.c index d61d0d7..5f2c014 100644 --- a/serprog.c +++ b/serprog.c @@ -425,14 +425,15 @@ int serprog_init(void) if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) { msg_perr("Warning: NAK to query supported buses\n"); - c = CHIP_BUSTYPE_NONSPI; /* A reasonable default for now. */ + c = CHIP_BUSTYPE_NONSPI; /* A reasonable default for now. */ } buses_supported = c; /* Check for the minimum operational set of commands. */ if (buses_supported & CHIP_BUSTYPE_SPI) { uint8_t bt = CHIP_BUSTYPE_SPI; if (sp_check_commandavail(S_CMD_O_SPIOP) == 0) { - msg_perr("Error: SPI operation not supported while the SPI bustype is\n"); + msg_perr("Error: SPI operation not supported while the " + "bustype is SPI\n"); exit(1); } /* Success of any of these commands is optional. We dont need @@ -445,21 +446,20 @@ int serprog_init(void) v = ((unsigned int)(rbuf[0]) << 0); v |= ((unsigned int)(rbuf[1]) << 8); v |= ((unsigned int)(rbuf[2]) << 16); - /* Limit to 256 because we dont need longer writes. */ - if ((v==0)||(v>256)) { - v = 256; - } + if (v == 0) + v = (1 << 24) - 1; /* SPI-op maximum. */ spi_programmer_serprog.max_data_write = v; + msg_pdbg(MSGHEADER "Maximum write-n length is %d\n", v); } if (!sp_docommand(S_CMD_Q_RDNMAXLEN, 0, NULL, 3, rbuf)) { uint32_t v; v = ((unsigned int)(rbuf[0]) << 0); v |= ((unsigned int)(rbuf[1]) << 8); v |= ((unsigned int)(rbuf[2]) << 16); - if (v==0) { - v = (1<<24)-1; /* SPI-op maximum. */ - } + if (v == 0) + v = (1 << 24) - 1; /* SPI-op maximum. */ spi_programmer_serprog.max_data_read = v; + msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", v); } bt = buses_supported; sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL); @@ -468,12 +468,14 @@ int serprog_init(void) if (buses_supported & CHIP_BUSTYPE_NONSPI) { if (sp_check_commandavail(S_CMD_O_INIT) == 0) { - msg_perr("Error: Initialize operation buffer not supported\n"); + msg_perr("Error: Initialize operation buffer " + "not supported\n"); exit(1); } if (sp_check_commandavail(S_CMD_O_DELAY) == 0) { - msg_perr("Error: Write to opbuf: delay not supported\n"); + msg_perr("Error: Write to opbuf: " + "delay not supported\n"); exit(1); } @@ -483,14 +485,15 @@ int serprog_init(void) msg_perr("Error: Single byte read not supported\n"); exit(1); } - /* This could be translated to single byte reads (if missing), * - * but now we dont support that. */ + /* This could be translated to single byte reads (if missing), + * but now we dont support that. */ if (sp_check_commandavail(S_CMD_R_NBYTES) == 0) { msg_perr("Error: Read n bytes not supported\n"); exit(1); } if (sp_check_commandavail(S_CMD_O_WRITEB) == 0) { - msg_perr("Error: Write to opbuf: write byte not supported\n"); + msg_perr("Error: Write to opbuf: " + "write byte not supported\n"); exit(1); } @@ -502,27 +505,29 @@ int serprog_init(void) sp_max_write_n |= ((unsigned int)(rbuf[1]) << 8); sp_max_write_n |= ((unsigned int)(rbuf[2]) << 16); if (!sp_max_write_n) { - sp_max_write_n = (1<<24); + sp_max_write_n = (1 << 24); } - msg_pdbg(MSGHEADER "Maximum write-n length %d\n", - sp_max_write_n); + msg_pdbg(MSGHEADER "Maximum write-n length is %d\n", + sp_max_write_n); sp_write_n_buf = malloc(sp_max_write_n); if (!sp_write_n_buf) { - msg_perr("Error: cannot allocate memory for Write-n buffer\n"); + msg_perr("Error: cannot allocate memory for " + "Write-n buffer\n"); exit(1); } sp_write_n_bytes = 0; } - if ((sp_check_commandavail(S_CMD_Q_RDNMAXLEN)) - &&((sp_docommand(S_CMD_Q_RDNMAXLEN,0,NULL, 3, rbuf) == 0))) { + if (sp_check_commandavail(S_CMD_Q_RDNMAXLEN) && + (sp_docommand(S_CMD_Q_RDNMAXLEN, 0, NULL, 3, rbuf) == 0)) { sp_max_read_n = ((unsigned int)(rbuf[0]) << 0); sp_max_read_n |= ((unsigned int)(rbuf[1]) << 8); sp_max_read_n |= ((unsigned int)(rbuf[2]) << 16); - msg_pdbg(MSGHEADER "Maximum read-n length %d\n", - sp_max_read_n ? sp_max_read_n : (1<<24)); + msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", + sp_max_read_n ? sp_max_read_n : (1 << 24)); } else { - msg_pdbg(MSGHEADER "Maximum read-n length not reported\n"); + msg_pdbg(MSGHEADER "Maximum read-n length " + "not reported\n"); sp_max_read_n = 0; } @@ -544,7 +549,8 @@ int serprog_init(void) if (sp_check_commandavail(S_CMD_O_INIT)) { /* This would be inconsistent. */ if (sp_check_commandavail(S_CMD_O_EXEC) == 0) { - msg_perr("Error: Execute operation buffer not supported\n"); + msg_perr("Error: Execute operation buffer not " + "supported\n"); exit(1); } @@ -553,11 +559,13 @@ int serprog_init(void) exit(1); } - if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2, &sp_device_opbuf_size)) { - msg_perr("Warning: NAK to query operation buffer size\n"); + if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2, + &sp_device_opbuf_size)) { + msg_perr("Warning: NAK to query operation buffer " + "size\n"); } msg_pdbg(MSGHEADER "operation buffer size %d\n", - sp_device_opbuf_size); + sp_device_opbuf_size); } sp_prev_was_write = 0; @@ -757,38 +765,45 @@ void serprog_delay(int delay) } int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) + const unsigned char *writearr, + unsigned char *readarr) { unsigned char *parmbuf; int ret; msg_pspew("%s, writecnt=%i, readcnt=%i\n", __func__, writecnt, readcnt); if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) sp_execute_opbuf(); - parmbuf = malloc(writecnt+6); - if (!parmbuf) sp_die("Error: cannot malloc SPI send param buffer"); + parmbuf = malloc(writecnt + 6); + if (!parmbuf) + sp_die("Error: cannot malloc SPI send param buffer"); parmbuf[0] = (writecnt >> 0) & 0xFF; parmbuf[1] = (writecnt >> 8) & 0xFF; parmbuf[2] = (writecnt >> 16) & 0xFF; parmbuf[3] = (readcnt >> 0) & 0xFF; parmbuf[4] = (readcnt >> 8) & 0xFF; parmbuf[5] = (readcnt >> 16) & 0xFF; - memcpy(parmbuf+6, writearr, writecnt); - ret = sp_docommand(S_CMD_O_SPIOP, writecnt+6, parmbuf, readcnt, readarr); + memcpy(parmbuf + 6, writearr, writecnt); + ret = sp_docommand(S_CMD_O_SPIOP, writecnt + 6, parmbuf, readcnt, + readarr); free(parmbuf); return ret; } +/* FIXME: This function is optimized so that it does not split each + * transaction into chip page_size long blocks unnecessarily like + * spi_read_chunked. When spi_read_chunked is fixed this method can be + * removed. */ int serprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int i; - int max_read = spi_programmer_serprog.max_data_read; - /* This function is optimized in that it doesnt split the read into - chip page_size length blocks unnecessarily. */ - for(i=0;i<len;) { - int rv; - int len_left = ((len-i)>max_read) ? max_read : (len-i); - if ((rv=spi_nbyte_read(start+i, buf+i, len_left))) return rv; - i += len_left; + const int max_read = spi_programmer_serprog.max_data_read; + for(i = 0; i < len; ) { + int ret; + int cur_len = min(max_read, (len - i)); + ret = spi_nbyte_read(start + i, buf + i, cur_len); + if (ret) + return ret; + i += cur_len; } return 0; } -- 1.7.1

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[PATCH 1/3] Add SPI support to serprog protocol.
by Stefan Tauner 21 Jun '11

21 Jun '11

Signed-off-by: Urja Rannikko <urjaman(a)gmail.com> --- programmer.h | 6 ++ serprog-protocol.txt | 9 ++- serprog.c | 246 +++++++++++++++++++++++++++++++++++--------------- 3 files changed, 188 insertions(+), 73 deletions(-) diff --git a/programmer.h b/programmer.h index ce0ffa1..7df2120 100644 --- a/programmer.h +++ b/programmer.h @@ -539,6 +539,9 @@ enum spi_controller { #if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) SPI_CONTROLLER_BITBANG, #endif +#if CONFIG_SERPROG == 1 + SPI_CONTROLLER_SERPROG, +#endif }; extern const int spi_programmer_count; @@ -599,6 +602,9 @@ void serprog_chip_writeb(uint8_t val, chipaddr addr); uint8_t serprog_chip_readb(const chipaddr addr); void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void serprog_delay(int delay); +int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); +int serprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); #endif /* serial.c */ diff --git a/serprog-protocol.txt b/serprog-protocol.txt index c5464a4..cced0dc 100644 --- a/serprog-protocol.txt +++ b/serprog-protocol.txt @@ -31,6 +31,8 @@ COMMAND Description Parameters Return Value 0x10 Sync NOP none NAK + ACK (for synchronization) 0x11 Query maximum read-n length none ACK + 24-bit length (0==2^24) / NAK 0x12 Set used bustype 8-bit flags (as with 0x05) ACK / NAK +0x13 Perform SPI operation 24-bit slen + 24-bit rlen ACK + rlen bytes of data / NAK + + slen bytes of data 0x?? unimplemented command - invalid. @@ -50,7 +52,7 @@ Additional information of the above commands: it should return a big bogus value - eg 0xFFFF. 0x05 (Q_BUSTYPE): The bit's are defined as follows: - bit 0: PARALLEL, bit 1: LPC, bit 2: FWH, bit 3: SPI (if ever supported). + bit 0: PARALLEL, bit 1: LPC, bit 2: FWH, bit 3: SPI. 0x06 (Q_CHIPSIZE): Only applicable to parallel programmers. An LPC/FWH/SPI-programmer can report this as not supported in the command bitmap. @@ -66,6 +68,10 @@ Additional information of the above commands: Set's the used bustype if the programmer can support more than one flash protocol. Sending a byte with more than 1 bit set will make the programmer decide among them on it's own. Bit values as with Q_BUSTYPE. + 0x13 (O_SPIOP): + Maximum slen is Q_WRNMAXLEN result after Q_BUSTYPE returns + only SPI or S_BUSTYPE == SPI is used. Same for rlen and Q_RDNMAXLEN. + This operation is immediate, meaning it doesnt use the operation buffer. About mandatory commands: The only truly mandatory commands for any device are 0x00, 0x01, 0x02 and 0x10, but one can't really do anything with these commands. @@ -99,3 +105,4 @@ This define listing should help C coders - (it's here to be the single source fo #define S_CMD_SYNCNOP 0x10 /* Special no-operation that returns NAK+ACK */ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ +#define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ diff --git a/serprog.c b/serprog.c index b91e376..d61d0d7 100644 --- a/serprog.c +++ b/serprog.c @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2009 Urja Rannikko <urjaman(a)gmail.com> + * Copyright (C) 2009, 2011 Urja Rannikko <urjaman(a)gmail.com> * Copyright (C) 2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify @@ -36,6 +36,7 @@ #include <termios.h> #include "flash.h" #include "programmer.h" +#include "chipdrivers.h" #define MSGHEADER "serprog:" @@ -67,6 +68,7 @@ static int serprog_shutdown(void *data); #define S_CMD_SYNCNOP 0x10 /* Special no-operation that returns NAK+ACK */ #define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ +#define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ static uint16_t sp_device_serbuf_size = 16; static uint16_t sp_device_opbuf_size = 300; @@ -302,6 +304,16 @@ static int sp_stream_buffer_op(uint8_t cmd, uint32_t parmlen, uint8_t * parms) return 0; } +static struct spi_programmer spi_programmer_serprog = { + .type = SPI_CONTROLLER_SERPROG, + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, + .command = serprog_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = serprog_spi_read, + .write_256 = default_spi_write_256, +}; + int serprog_init(void) { uint16_t iface; @@ -325,7 +337,7 @@ int serprog_init(void) msg_perr("Error: No baudrate specified.\n" "Use flashrom -p serprog:dev=/dev/device:baud\n"); free(device); - return 1; + return 1; } if (strlen(device)) { sp_fd = sp_openserport(device, atoi(baudport)); @@ -358,7 +370,7 @@ int serprog_init(void) msg_perr("Error: No port specified.\n" "Use flashrom -p serprog:ip=ipaddr:port\n"); free(device); - return 1; + return 1; } if (strlen(device)) { sp_fd = sp_opensocket(device, atoi(baudport)); @@ -410,35 +422,110 @@ int serprog_init(void) sp_check_avail_automatic = 1; - /* Check for the minimum operational set of commands */ - if (sp_check_commandavail(S_CMD_R_BYTE) == 0) { - msg_perr("Error: Single byte read not supported\n"); - exit(1); - } - /* This could be translated to single byte reads (if missing), * - * but now we dont support that. */ - if (sp_check_commandavail(S_CMD_R_NBYTES) == 0) { - msg_perr("Error: Read n bytes not supported\n"); - exit(1); - } - /* In the future one could switch to read-only mode if these * - * are not available. */ - if (sp_check_commandavail(S_CMD_O_INIT) == 0) { - msg_perr("Error: Initialize operation buffer not supported\n"); - exit(1); - } - if (sp_check_commandavail(S_CMD_O_WRITEB) == 0) { - msg_perr("Error: Write to opbuf: write byte not supported\n"); - exit(1); + + if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) { + msg_perr("Warning: NAK to query supported buses\n"); + c = CHIP_BUSTYPE_NONSPI; /* A reasonable default for now. */ } - if (sp_check_commandavail(S_CMD_O_DELAY) == 0) { - msg_perr("Error: Write to opbuf: delay not supported\n"); - exit(1); + buses_supported = c; + /* Check for the minimum operational set of commands. */ + if (buses_supported & CHIP_BUSTYPE_SPI) { + uint8_t bt = CHIP_BUSTYPE_SPI; + if (sp_check_commandavail(S_CMD_O_SPIOP) == 0) { + msg_perr("Error: SPI operation not supported while the SPI bustype is\n"); + exit(1); + } + /* Success of any of these commands is optional. We dont need + the programmer to tell us it's limits, but if it doesnt, we + will assume stuff, so it's in the programmers best interest + to tell us. */ + sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL); + if (!sp_docommand(S_CMD_Q_WRNMAXLEN, 0, NULL, 3, rbuf)) { + uint32_t v; + v = ((unsigned int)(rbuf[0]) << 0); + v |= ((unsigned int)(rbuf[1]) << 8); + v |= ((unsigned int)(rbuf[2]) << 16); + /* Limit to 256 because we dont need longer writes. */ + if ((v==0)||(v>256)) { + v = 256; + } + spi_programmer_serprog.max_data_write = v; + } + if (!sp_docommand(S_CMD_Q_RDNMAXLEN, 0, NULL, 3, rbuf)) { + uint32_t v; + v = ((unsigned int)(rbuf[0]) << 0); + v |= ((unsigned int)(rbuf[1]) << 8); + v |= ((unsigned int)(rbuf[2]) << 16); + if (v==0) { + v = (1<<24)-1; /* SPI-op maximum. */ + } + spi_programmer_serprog.max_data_read = v; + } + bt = buses_supported; + sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL); + register_spi_programmer(&spi_programmer_serprog); } - if (sp_check_commandavail(S_CMD_O_EXEC) == 0) { - msg_perr( - "Error: Execute operation buffer not supported\n"); - exit(1); + + if (buses_supported & CHIP_BUSTYPE_NONSPI) { + if (sp_check_commandavail(S_CMD_O_INIT) == 0) { + msg_perr("Error: Initialize operation buffer not supported\n"); + exit(1); + } + + if (sp_check_commandavail(S_CMD_O_DELAY) == 0) { + msg_perr("Error: Write to opbuf: delay not supported\n"); + exit(1); + } + + /* S_CMD_O_EXEC availability checked later. */ + + if (sp_check_commandavail(S_CMD_R_BYTE) == 0) { + msg_perr("Error: Single byte read not supported\n"); + exit(1); + } + /* This could be translated to single byte reads (if missing), * + * but now we dont support that. */ + if (sp_check_commandavail(S_CMD_R_NBYTES) == 0) { + msg_perr("Error: Read n bytes not supported\n"); + exit(1); + } + if (sp_check_commandavail(S_CMD_O_WRITEB) == 0) { + msg_perr("Error: Write to opbuf: write byte not supported\n"); + exit(1); + } + + if (sp_docommand(S_CMD_Q_WRNMAXLEN, 0, NULL, 3, rbuf)) { + msg_pdbg(MSGHEADER "Write-n not supported"); + sp_max_write_n = 0; + } else { + sp_max_write_n = ((unsigned int)(rbuf[0]) << 0); + sp_max_write_n |= ((unsigned int)(rbuf[1]) << 8); + sp_max_write_n |= ((unsigned int)(rbuf[2]) << 16); + if (!sp_max_write_n) { + sp_max_write_n = (1<<24); + } + msg_pdbg(MSGHEADER "Maximum write-n length %d\n", + sp_max_write_n); + sp_write_n_buf = malloc(sp_max_write_n); + if (!sp_write_n_buf) { + msg_perr("Error: cannot allocate memory for Write-n buffer\n"); + exit(1); + } + sp_write_n_bytes = 0; + } + + if ((sp_check_commandavail(S_CMD_Q_RDNMAXLEN)) + &&((sp_docommand(S_CMD_Q_RDNMAXLEN,0,NULL, 3, rbuf) == 0))) { + sp_max_read_n = ((unsigned int)(rbuf[0]) << 0); + sp_max_read_n |= ((unsigned int)(rbuf[1]) << 8); + sp_max_read_n |= ((unsigned int)(rbuf[2]) << 16); + msg_pdbg(MSGHEADER "Maximum read-n length %d\n", + sp_max_read_n ? sp_max_read_n : (1<<24)); + } else { + msg_pdbg(MSGHEADER "Maximum read-n length not reported\n"); + sp_max_read_n = 0; + } + } if (sp_docommand(S_CMD_Q_PGMNAME, 0, NULL, 16, pgmname)) { @@ -454,51 +541,24 @@ int serprog_init(void) msg_pdbg(MSGHEADER "serial buffer size %d\n", sp_device_serbuf_size); - if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2, &sp_device_opbuf_size)) { - msg_perr("Warning: NAK to query operation buffer size\n"); - } - msg_pdbg(MSGHEADER "operation buffer size %d\n", - sp_device_opbuf_size); - - if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) { - msg_perr("Warning: NAK to query supported buses\n"); - c = CHIP_BUSTYPE_NONSPI; /* A reasonable default for now. */ - } - buses_supported = c; - - if (sp_docommand(S_CMD_O_INIT, 0, NULL, 0, NULL)) { - msg_perr("Error: NAK to initialize operation buffer\n"); - exit(1); - } + if (sp_check_commandavail(S_CMD_O_INIT)) { + /* This would be inconsistent. */ + if (sp_check_commandavail(S_CMD_O_EXEC) == 0) { + msg_perr("Error: Execute operation buffer not supported\n"); + exit(1); + } - if (sp_docommand(S_CMD_Q_WRNMAXLEN, 0, NULL, 3, rbuf)) { - msg_pdbg(MSGHEADER "Write-n not supported"); - sp_max_write_n = 0; - } else { - sp_max_write_n = ((unsigned int)(rbuf[0]) << 0); - sp_max_write_n |= ((unsigned int)(rbuf[1]) << 8); - sp_max_write_n |= ((unsigned int)(rbuf[2]) << 16); - msg_pdbg(MSGHEADER "Maximum write-n length %d\n", - sp_max_write_n); - sp_write_n_buf = malloc(sp_max_write_n); - if (!sp_write_n_buf) { - msg_perr("Error: cannot allocate memory for Write-n buffer\n"); + if (sp_docommand(S_CMD_O_INIT, 0, NULL, 0, NULL)) { + msg_perr("Error: NAK to initialize operation buffer\n"); exit(1); } - sp_write_n_bytes = 0; - } - - if ((sp_check_commandavail(S_CMD_Q_RDNMAXLEN)) - &&((sp_docommand(S_CMD_Q_RDNMAXLEN,0,NULL, 3, rbuf) == 0))) { - sp_max_read_n = ((unsigned int)(rbuf[0]) << 0); - sp_max_read_n |= ((unsigned int)(rbuf[1]) << 8); - sp_max_read_n |= ((unsigned int)(rbuf[2]) << 16); - msg_pdbg(MSGHEADER "Maximum read-n length %d\n", - sp_max_read_n ? sp_max_read_n : (1<<24)); - } else { - msg_pdbg(MSGHEADER "Maximum read-n length not reported\n"); - sp_max_read_n = 0; - } + + if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2, &sp_device_opbuf_size)) { + msg_perr("Warning: NAK to query operation buffer size\n"); + } + msg_pdbg(MSGHEADER "operation buffer size %d\n", + sp_device_opbuf_size); + } sp_prev_was_write = 0; sp_streamed_transmit_ops = 0; @@ -679,6 +739,11 @@ void serprog_delay(int delay) { unsigned char buf[4]; msg_pspew("%s\n", __func__); + if (!sp_check_commandavail(S_CMD_O_DELAY)) { + internal_delay(delay); + msg_pdbg("Note: serprog_delay used, but the programmer doesnt support delay\n"); + return; + } if ((sp_max_write_n) && (sp_write_n_bytes)) sp_pass_writen(); sp_check_opbuf_usage(5); @@ -690,3 +755,40 @@ void serprog_delay(int delay) sp_opbuf_usage += 5; sp_prev_was_write = 0; } + +int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + unsigned char *parmbuf; + int ret; + msg_pspew("%s, writecnt=%i, readcnt=%i\n", __func__, writecnt, readcnt); + if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) + sp_execute_opbuf(); + parmbuf = malloc(writecnt+6); + if (!parmbuf) sp_die("Error: cannot malloc SPI send param buffer"); + parmbuf[0] = (writecnt >> 0) & 0xFF; + parmbuf[1] = (writecnt >> 8) & 0xFF; + parmbuf[2] = (writecnt >> 16) & 0xFF; + parmbuf[3] = (readcnt >> 0) & 0xFF; + parmbuf[4] = (readcnt >> 8) & 0xFF; + parmbuf[5] = (readcnt >> 16) & 0xFF; + memcpy(parmbuf+6, writearr, writecnt); + ret = sp_docommand(S_CMD_O_SPIOP, writecnt+6, parmbuf, readcnt, readarr); + free(parmbuf); + return ret; +} + +int serprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + int i; + int max_read = spi_programmer_serprog.max_data_read; + /* This function is optimized in that it doesnt split the read into + chip page_size length blocks unnecessarily. */ + for(i=0;i<len;) { + int rv; + int len_left = ((len-i)>max_read) ? max_read : (len-i); + if ((rv=spi_nbyte_read(start+i, buf+i, len_left))) return rv; + i += len_left; + } + return 0; +} -- 1.7.1

1 0

[PATCH] serprog SPI support
by Urja Rannikko 21 Jun '11

21 Jun '11

Add SPI support to serprog protocol. Signed-off-by: Urja Rannikko <urjaman(a)gmail.com> -- Urja Rannikko

2 8

Manufacturer: FUJITSU SIEMENS Product Name: D2817-A1 Version: S26361-D2817-A1
by Jan von Wiarda 21 Jun '11

21 Jun '11

root@PC1728:~# flashrom -V -r backup.bin flashrom v0.9.3-r1349 on Linux 2.6.38-8-generic-pae (i686), built with libpci 3.1.7, GCC 4.5.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2329M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1013 us, 10000 myus = 10007 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "FUJITSU SIEMENS" DMI string system-product-name: "CELSIUS W370 " DMI string system-version: " " DMI string baseboard-manufacturer: "FUJITSU SIEMENS" DMI string baseboard-product-name: "D2817-A1" DMI string baseboard-version: "S26361-D2817-A1" DMI string chassis-type: "Tower" Found chipset "Intel ICH10DO", enabling flash write... chipset PCI ID is 8086:3a14, 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x6008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x50: 0x00001a1b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b 0x54: 0x00000000 (FREG0: Flash Descriptor) 0x00000000-0x00000fff is read-only 0x58: 0x03ff0300 (FREG1: BIOS) 0x00300000-0x003fffff is read-write 0x5C: 0x02f70003 (FREG2: Management Engine) 0x00003000-0x002f7fff is locked 0x60: 0x00020001 (FREG3: Gigabit Ethernet) 0x00001000-0x00002fff is read-write 0x64: 0x02ff02f8 (FREG4: Platform Data) 0x002f8000-0x002fffff is read-write 0x74: 0x00000000 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x04 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0x000000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 0x94: 0x0600 (PREOP) 0x96: 0x0f02 (OPTYPE) 0x98: 0x06059f03 (OPMENU) 0x9C: 0x00000220 (OPMENU+4) 0xA0: 0x00000000 (BBAR) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done preop0=0x06, preop1=0x50 op[0]=0x02, 3, 0 op[1]=0x03, 2, 0 op[2]=0xd8, 3, 0 op[3]=0x05, 0, 0 op[4]=0x90, 2, 0 op[5]=0x01, 1, 0 op[6]=0x9f, 0, 0 op[7]=0xc7, 1, 0 SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25D16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x63, id2 0x3b, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for SST SST25LF040A.RES, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0x15, id2 0x15 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x63, id2 0x3b, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xcd, id2 0xa3, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x63, id2 0x3b, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25x10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25x20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25x40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25x80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25x16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W25x32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Chip status register is 00 Found chip "Winbond W25x32" (4096 kB, SPI) at physical address 0xffc00000. Probing for Winbond W25x64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x63, id2 0x3b, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x79, id2 0xf6, id1 is normal flash content, id2 is normal flash content Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3016 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x15 === This flash part has status UNTESTED for operations: READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading flash... Transaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 Running OPCODE 0x03 failed at address 0x003000 (payload length was 64). Read operation failed! FAILED. Restoring MMIO space at 0xb78398a0 Restoring MMIO space at 0xb783989c Restoring MMIO space at 0xb7839898 Restoring MMIO space at 0xb7839896 Restoring MMIO space at 0xb7839894 Restoring PCI config space for 00:1f:0 reg 0xdc

2 1

Yet another working board - Gigabyte MA770-UD3
by Bernhard Schuster 20 Jun '11

20 Jun '11

I successfully flashed the latest firmware availiable here http://www.gigabyte.de/products/product-page.aspx?pid=3302#bios. The boardname is Gigabyte MA770-UD3 Regards drahnr

2 3

Re: [flashrom] [PATCH 11/12] add support for Intel Hardware Sequencing
by David Hendricks 20 Jun '11

20 Jun '11

On Tue, Jun 7, 2011 at 7:55 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > +static uint32_t ich_hwseq_get_erase_block_size(unsigned int addr) > +{ > + REGWRITE32(ICH9_REG_FADDR, (addr & 0x00FFFFFF)); > + uint8_t enc_berase = (REGREAD16(ICH9_REG_HSFS) & HSFS_BERASE) >> > + HSFS_BERASE_OFF; > + const uint32_t dec_berase[4] = { > + 256, > + 4 * 1024, > + 8 * 1024, > + 64 * 1024 > + }; > + return dec_berase[enc_berase]; > Others might want to comment, but I think you should avoid doing all that work in the variable declaration area. > +} > + > +int ich_hwseq_probe(struct flashchip *flash) > +{ > + uint32_t total_size, boundary; > + uint32_t erase_size_low, size_low, erase_size_high, size_high; > + struct block_eraser eraser; > This should be a pointer, right? I am assuming you intended to directly update the flash->block_erasers[0] member later in this function. -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

1 0

#6: flashrom trac test entry blabla
by flashrom 20 Jun '11

20 Jun '11

#6: flashrom trac test entry blabla ----------------------------------+--------------------------- Reporter: stefan.tauner@… | Owner: hailfinger Type: defect | Status: new Priority: major | Milestone: Component: flashrom | Version: Keywords: | Dependencies: Patch Status: there is no patch | ----------------------------------+--------------------------- the bug entries on the flashrom trac (http://flashrom.org/trac/flashrom/newticket) get lost immediately upon entering due to spam misdetection. -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/6> flashrom <http://www.flashrom.org/>

1 0

It is hard to report a bug....
by Sven Anders 20 Jun '11

20 Jun '11

Hi, first I want to thank you for your great work. I would like to use flashrom, to try coreboot. But I have trouble to use flashrom with a "Dell Optiplex" mainboard: -- snip -- flashrom -r flash-file flashrom v0.9.2-r1141 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH8/ICH8R", enabling flash write... tried to set 0xdc to 0x3 on ICH8/ICH8R failed (WARNING ONLY) WARNING: SPI Configuration Lockdown activated. FAILED! This chipset supports the following protocols: FWH,SPI. Found chip "Spansion S25FL008A" (1024 KB, SPI) at physical address 0xfff00000. ich_spi_send_command: Internal command size error for opcode 0xab, got writecnt=4, want =1 Reading flash... Read operation failed! FAILED. -- snap -- I have used the flashrom version from debian squeeze. So I thought: "I should use a newer version" . But when I try to download it from: http://www.flashrom.org/Downloads I have got a page with an error: "Status Code: 404" So I try to open a bug on: http://www.flashrom.org/trac/flashrom/newticket I have spend realy time to put in the right text, but when I pressed "Create Ticket" the Web Page said somethink like, it would be junk and will be discarded, so I have done this work for nothing. So I hope, someone will fix this 3 reported bugs: * Problem with flashrom on a Dell Optiplex * Not working download link. * Not working Issue Tracker (if it should not be used by users, the link to report bugs should be hidden for them) Best Regards Sven Anders

3 8

[PATCH] revamp the warning of failing to set BIOS write enable in enable_flash_ich
by Stefan Tauner 20 Jun '11

20 Jun '11

- introduce a new variable 'wanted' that is used instead of 'new' - use 'new' for the actual value contained in BIOS_CNTL after we tried to write it - rephrase the warning which now also includes the old and new values besides the wanted one Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 14 ++++++++------ 1 files changed, 8 insertions(+), 6 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 0c77f07..c36da4f 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -250,7 +250,7 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name) static int enable_flash_ich(struct pci_dev *dev, const char *name, int bios_cntl) { - uint8_t old, new; + uint8_t old, new, wanted; /* * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, but @@ -274,14 +274,16 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); } - new = old | 1; - if (new == old) + wanted = old | 1; + if (wanted == old) return 0; - rpci_write_byte(dev, bios_cntl, new); + rpci_write_byte(dev, bios_cntl, wanted); - if (pci_read_byte(dev, bios_cntl) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", bios_cntl, new, name); + if ((new = pci_read_byte(dev, bios_cntl)) != wanted) { + msg_pinfo("WARNING: Setting 0x%x from 0x%x to 0x%x on %s " + "failed. New value is 0x%x.\n", + bios_cntl, old, wanted, name, new); return -1; } -- 1.7.1

1 0

Success report : WRITE for W29C020
by Pete Batard 20 Jun '11

20 Jun '11

Hi, Was advised to send a write report for this chip, so I tested all possible operations, using a W29C020-12 on a Freetech P6F91i motherboard, and everything works brilliantly. Logs attached. By the way, even if this is a very old board, I'll just point out that if you ever want to convert a 1Mb BIOS P6F91i to a 2Mb BIOS one, you just need to place a jumper between pins 2 and 3 of JP1 to have the extra address line (being mindful that pin 1 of that jumper is 12V and must be left alone). Regards, /Pete

2 3

[PATCH] Remove sharplhf00l04.c
by Michael Karcher 20 Jun '11

20 Jun '11

The currently unreferenced function in sharplhf00l04.c does a standard FWH block protection reset (writes 0 to the protection register) and a standard FWH block erase. The locking blocks of the FWH block lock cover 128KB areas, and thats the only thing page_size is used for in the functions referenced in the LHF00L04 entry. Finally, this adds a comment that there are non-volatile (flash memory) lock bits for 8 sectors in the last 64KB. They are write-only and clearable at once. Readback seems unsupported. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- Makefile | 2 +- flashchips.c | 5 ++- sharplhf00l04.c | 58 ------------------------------------------------------- 3 files changed, 4 insertions(+), 61 deletions(-) delete mode 100644 sharplhf00l04.c diff --git a/Makefile b/Makefile index 6e6e2de..470d944 100644 --- a/Makefile +++ b/Makefile @@ -119,7 +119,7 @@ endif CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ - sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \ + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o \ a25.o at25.o LIB_OBJS = layout.o diff --git a/flashchips.c b/flashchips.c index 865ba2f..4514985 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5151,7 +5151,7 @@ const struct flashchip flashchips[] = { .manufacture_id = SHARP_ID, .model_id = SHARP_LHF00L04, .total_size = 1024, - .page_size = 64 * 1024, + .page_size = 128 * 1024, .feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, @@ -5171,7 +5171,8 @@ const struct flashchip flashchips[] = { .block_erase = NULL, /* 30 D0, only in A/A mux mode */ }, }, - .unlock = unlock_82802ab, + .unlock = unlock_82802ab, /* additionally, there are write-only non-volatile + boot block protection bits per 8K sector*/ .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, diff --git a/sharplhf00l04.c b/sharplhf00l04.c deleted file mode 100644 index f21950a..0000000 --- a/sharplhf00l04.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2000 Silicon Integrated System Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "flash.h" -#include "chipdrivers.h" - -/* FIXME: The datasheet is unclear whether we should use toggle_ready_jedec - * or wait_82802ab. - * FIXME: This file is unused. - */ - -int erase_lhf00l04_block(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen) -{ - chipaddr bios = flash->virtual_memory + blockaddr; - chipaddr wrprotect = flash->virtual_registers + blockaddr + 2; - uint8_t status; - - // clear status register - chip_writeb(0x50, bios); - status = wait_82802ab(flash); - print_status_82802ab(status); - // clear write protect - msg_cspew("write protect is at 0x%lx\n", (wrprotect)); - msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect)); - chip_writeb(0, wrprotect); - msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect)); - - // now start it - chip_writeb(0x20, bios); - chip_writeb(0xd0, bios); - programmer_delay(10); - // now let's see what the register is - status = wait_82802ab(flash); - print_status_82802ab(status); - - if (check_erased_range(flash, blockaddr, blocklen)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - return 0; -} -- 1.7.5.3

1 0

[PATCH] Flush stdout after each message
by Ed Swierk 19 Jun '11

19 Jun '11

Currently messages like "Writing flash chip..." that don't end with a newline are buffered until the operation is complete, unless the particular write function generates status output in the meantime. Flushing stdout after each message ensures that the message appears immediately. Signed-off-by: Ed Swierk <eswierk(a)aristanetworks.com> --- Index: flashrom-0.9.2-r1057/cli_output.c =================================================================== --- flashrom-0.9.2-r1057.orig/cli_output.c +++ flashrom-0.9.2-r1057/cli_output.c @@ -47,5 +47,6 @@ int print(int type, const char *fmt, ... va_start(ap, fmt); ret = vfprintf(output_type, fmt, ap); va_end(ap); + fflush(output_type); return ret; }

4 4

[PATCH] Support for K7S41GX.
by Paweł Różański 19 Jun '11

19 Jun '11

Hello. During discussion on IRC channel found out, that K7S41GX uses the same bios chip and the same super I/O chip as K7S41. Tested reading, writing and verification, all worked fine. Signed-off-by: Pawel Rozanski <rozie(a)poczta.onet.pl> BTW for K7S41 match string is "^K7S41 $", probably should be "^K7S41$", but cannot test it. Regards, Pawel Rozanski

2 2

Re: [flashrom] [PATCH] Print FWH chip status only if something is wrong
by Stefan Tauner 19 Jun '11

19 Jun '11

On Sun, 19 Jun 2011 22:49:15 +0200 Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> wrote: > This is especially important for the SST FWH compatible chips with 4K sector > size, where status printing for that small size was omitted up to r1347. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > - print_status_82802ab(status); > + if (status != 0x80) /* Ready, no error bits */ > + print_status_82802ab(status); for my mind the comments are inverted. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[PATCH 1/2] Various fixes for building as a payload.
by Tadas Slotkus 19 Jun '11

19 Jun '11

Signed-off-by: Tadas Slotkus <devtadas(a)gmail.com> --- Makefile | 7 ++++++- cli_classic.c | 6 +++++- flash.h | 6 +++++- flashrom.c | 6 ++++++ layout.c | 6 ++++-- nicintel.c | 2 ++ sst49lfxxxc.c | 3 +-- 7 files changed, 29 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index 6e6e2de..fbfbd2f 100644 --- a/Makefile +++ b/Makefile @@ -37,6 +37,9 @@ ifeq ($(WARNERROR), yes) CFLAGS += -Werror endif +# Uncomment this if you want to build for libpayload +# OS_ARCH = libpayload + # FIXME We have to differentiate between host and target arch. OS_ARCH ?= $(shell uname) ifneq ($(OS_ARCH), SunOS) @@ -85,7 +88,7 @@ endif endif ifeq ($(OS_ARCH), libpayload) -CC:=CC=i386-elf-gcc lpgcc +CC:=../libpayload/install/libpayload/bin/lpgcc AR:=i386-elf-ar RANLIB:=i386-elf-ranlib CPPFLAGS += -DSTANDALONE @@ -361,7 +364,9 @@ ifeq ($(OS_ARCH), DOS) # FIXME There needs to be a better way to do this LIBS += ../libpci/lib/libpci.a else +ifneq ($(OS_ARCH), libpayload) LIBS += -lpci +endif ifeq ($(OS_ARCH), OpenBSD) # For (i386|amd64)_iopl(2). LIBS += -l$(shell uname -m) diff --git a/cli_classic.c b/cli_classic.c index d1b4686..f102433 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -22,8 +22,10 @@ */ #include <stdio.h> +#ifndef __LIBPAYLOAD__ #include <fcntl.h> #include <sys/stat.h> +#endif #include <string.h> #include <stdlib.h> #include <getopt.h> @@ -150,12 +152,14 @@ int cli_classic(int argc, char *argv[]) if (selfcheck()) exit(1); +#ifndef __LIBPAYLOAD__ setbuf(stdout, NULL); +#endif /* FIXME: Delay all operation_specified checks until after command * line parsing to allow --help overriding everything else. */ while ((opt = getopt_long(argc, argv, optstring, - long_options, &option_index)) != EOF) { + long_options, &option_index)) != -1) { switch (opt) { case 'r': if (++operation_specified > 1) { diff --git a/flash.h b/flash.h index 3247700..2d7457e 100644 --- a/flash.h +++ b/flash.h @@ -32,7 +32,11 @@ #undef min #undef max #endif - +#ifdef __LIBPAYLOAD__ +#undef __linux__ +#define fprintf(stream, ...) printf(__VA_ARGS__) +#define vfprintf(output_type, fmt, ap) vprintf(fmt, ap) +#endif #define ERROR_PTR ((void*)-1) /* Error codes */ diff --git a/flashrom.c b/flashrom.c index e9e6a77..b145037 100644 --- a/flashrom.c +++ b/flashrom.c @@ -26,6 +26,8 @@ #ifndef __LIBPAYLOAD__ #include <fcntl.h> #include <sys/stat.h> +#else +#include <libpayload.h> #endif #include <string.h> #include <stdlib.h> @@ -1234,6 +1236,7 @@ int verify_flash(struct flashchip *flash, uint8_t *buf) int read_buf_from_file(unsigned char *buf, unsigned long size, char *filename) { +#ifndef __LIBPAYLOAD__ unsigned long numbytes; FILE *image; struct stat image_stat; @@ -1262,11 +1265,13 @@ int read_buf_from_file(unsigned char *buf, unsigned long size, char *filename) "wanted %ld!\n", numbytes, size); return 1; } +#endif return 0; } int write_buf_to_file(unsigned char *buf, unsigned long size, char *filename) { +#ifndef __LIBPAYLOAD__ unsigned long numbytes; FILE *image; @@ -1286,6 +1291,7 @@ int write_buf_to_file(unsigned char *buf, unsigned long size, char *filename) filename); return 1; } +#endif return 0; } diff --git a/layout.c b/layout.c index d719a05..c5a0245 100644 --- a/layout.c +++ b/layout.c @@ -136,9 +136,9 @@ int show_id(uint8_t *bios, int size, int force) } #endif -#ifndef __LIBPAYLOAD__ int read_romlayout(char *name) { +#ifndef __LIBPAYLOAD__ FILE *romlayout; char tempstr[256]; int i; @@ -191,8 +191,10 @@ int read_romlayout(char *name) fclose(romlayout); return 0; -} +#else + return -1; #endif +} int find_romentry(char *name) { diff --git a/nicintel.c b/nicintel.c index 3d53ec8..b88597a 100644 --- a/nicintel.c +++ b/nicintel.c @@ -23,6 +23,8 @@ #include "flash.h" #include "programmer.h" +#define PCI_VENDOR_ID_INTEL 0x8086 + uint8_t *nicintel_bar; uint8_t *nicintel_control_bar; diff --git a/sst49lfxxxc.c b/sst49lfxxxc.c index 046b9f3..5299c6e 100644 --- a/sst49lfxxxc.c +++ b/sst49lfxxxc.c @@ -61,13 +61,12 @@ int unlock_49lfxxxc(struct flashchip *flash) int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size) { - uint8_t status; chipaddr bios = flash->virtual_memory; chip_writeb(0x30, bios); chip_writeb(0xD0, bios + address); - status = wait_82802ab(flash); + wait_82802ab(flash); if (check_erased_range(flash, address, sector_size)) { msg_cerr("ERASE FAILED!\n"); -- 1.7.0.4

3 4

Re: [flashrom] [PATCH] Don't ignore wait_82802ab() return value
by Stefan Reinauer 19 Jun '11

19 Jun '11

On 5/14/10 3:06 PM, Michael Karcher wrote: > Am Freitag, den 14.05.2010, 14:48 +0200 schrieb Stefan Reinauer: > >> On 4/16/10 6:21 PM, Stefan Reinauer wrote: >> >>> Look at the return value of wait_82802ab() >>> Index: sst49lfxxxc.c >>> =================================================================== >>> --- sst49lfxxxc.c (revision 993) >>> +++ sst49lfxxxc.c (working copy) >>> @@ -84,6 +84,7 @@ >>> chip_writeb(0xD0, bios + address); >>> >>> status = wait_82802ab(bios); >>> + print_status_82802ab(status); >>> > [...] > basically a good idea, but printing one status dump per erased block > seems a bit excessive, even in verbose mode, as there are some chips > with 4K sector size. Could you limit status printing to "status != > 0x80", as this is "ready, no error bits"? > That's what the 82802ab and sharp lhf00l04 do, too. So if you think the behavior should be changed, you should change it in all three places. Stefan

4 4

[patch] successfully testing ST M25P128
by Cristian Măgherușan-Stanciu 19 Jun '11

19 Jun '11

Hello, I just got this new chip soldered thanks to Peter Stuge, and here's a test run result. Found chip "ST M25P128" (16384 kB, SPI) at physical address 0xff000000. Erasing and writing flash chip... Done. Verifying flash... VERIFIED. The patch to mark it as verified in the flashrom source code is listed below. This is Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan(a)gmail.com> Index: flashchips.c =================================================================== --- flashchips.c (revision 1345) +++ flashchips.c (working copy) @@ -6705,7 +6705,7 @@ .model_id = ST_M25P128, .total_size = 16384, .page_size = 256, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers =

2 1

[PATCH] flashchips.c: Typo. s/don't/doesn't/
by Paul Menzel 19 Jun '11

19 Jun '11

Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- flashchips.c | 52 ++++++++++++++++++++++++++-------------------------- 1 files changed, 26 insertions(+), 26 deletions(-) diff --git a/flashchips.c b/flashchips.c index a82c373..70a4ff1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -155,7 +155,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -181,7 +181,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -233,7 +233,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -259,7 +259,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -1230,7 +1230,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -1261,7 +1261,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRW, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -1292,7 +1292,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -2280,7 +2280,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -2311,7 +2311,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -2931,7 +2931,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -2963,7 +2963,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -2995,7 +2995,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -3026,7 +3026,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRW, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -3057,7 +3057,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -3917,7 +3917,7 @@ struct flashchip flashchips[] = { .feature_bits = 0, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst28sf040.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst28sf040.c) */ .block_erasers = { { @@ -4368,7 +4368,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -4431,7 +4431,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -4463,7 +4463,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -4640,7 +4640,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -5040,7 +5040,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -5067,7 +5067,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -5313,7 +5313,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -5345,7 +5345,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -5372,7 +5372,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -5399,7 +5399,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -6010,7 +6010,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PRW, .probe = probe_w29ee011, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w29ee011.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (w29ee011.c) */ .block_erasers = { { -- 1.7.1

3 3

[commit] r1349 - trunk
by repository service 19 Jun '11

19 Jun '11

Author: uwe Date: Sun Jun 19 19:27:57 2011 New Revision: 1349 URL: http://flashrom.org/trac/flashrom/changeset/1349 Log: Currently messages like "Writing flash chip..." that don't end with a newline are buffered until the operation is complete, unless the particular write function generates status output in the meantime. Flushing stdout after each message ensures that the message appears immediately. Signed-off-by: Ed Swierk <eswierk(a)aristanetworks.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/cli_output.c Modified: trunk/cli_output.c ============================================================================== --- trunk/cli_output.c Sun Jun 19 19:23:55 2011 (r1348) +++ trunk/cli_output.c Sun Jun 19 19:27:57 2011 (r1349) @@ -47,5 +47,6 @@ va_start(ap, fmt); ret = vfprintf(output_type, fmt, ap); va_end(ap); + fflush(output_type); return ret; }

1 0

[commit] r1348 - trunk
by repository service 19 Jun '11

19 Jun '11

Author: uwe Date: Sun Jun 19 19:23:55 2011 New Revision: 1348 URL: http://flashrom.org/trac/flashrom/changeset/1348 Log: flashchips.c: Fix typo: s/don't/doesn't/. Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Jun 19 19:09:49 2011 (r1347) +++ trunk/flashchips.c Sun Jun 19 19:23:55 2011 (r1348) @@ -3360,7 +3360,7 @@ .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -3392,7 +3392,7 @@ .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -5622,7 +5622,7 @@ .feature_bits = 0, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst28sf040.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst28sf040.c) */ .block_erasers = { { @@ -6091,7 +6091,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -6156,7 +6156,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -6189,7 +6189,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -6373,7 +6373,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRE, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -6946,7 +6946,7 @@ .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -7188,7 +7188,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -7218,7 +7218,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -7243,7 +7243,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -7268,7 +7268,7 @@ .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -8091,7 +8091,7 @@ .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PRE, .probe = probe_w29ee011, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w29ee011.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (w29ee011.c) */ .block_erasers = { {

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[commit] r1347 - trunk
by repository service 19 Jun '11

19 Jun '11

Author: uwe Date: Sun Jun 19 19:09:49 2011 New Revision: 1347 URL: http://flashrom.org/trac/flashrom/changeset/1347 Log: Look at the return value of wait_82802ab(). Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/sst49lfxxxc.c Modified: trunk/sst49lfxxxc.c ============================================================================== --- trunk/sst49lfxxxc.c Sun Jun 19 18:52:48 2011 (r1346) +++ trunk/sst49lfxxxc.c Sun Jun 19 19:09:49 2011 (r1347) @@ -68,6 +68,7 @@ chip_writeb(0xD0, bios + address); status = wait_82802ab(flash); + print_status_82802ab(status); if (check_erased_range(flash, address, sector_size)) { msg_cerr("ERASE FAILED!\n");

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[commit] r1346 - trunk
by repository service 19 Jun '11

19 Jun '11

Author: uwe Date: Sun Jun 19 18:52:48 2011 New Revision: 1346 URL: http://flashrom.org/trac/flashrom/changeset/1346 Log: Add ASRock K7S41GX board-enable. Tested reading, writing and verification, all worked fine. Signed-off-by: Pawel Rozanski <rozie(a)poczta.onet.pl> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Jun 19 00:56:14 2011 (r1345) +++ trunk/board_enable.c Sun Jun 19 18:52:48 2011 (r1346) @@ -391,6 +391,7 @@ * - MSI MS-6561 (745 Ultra): SiS 745 + W83697HF * - MSI MS-6787 (P4MAM-V/P4MAM-L): VIA P4M266 + VT8235 * - ASRock K7S41: SiS 741 + SiS 963 + W83697HF + * - ASRock K7S41GX: SiS 741GX + SiS 963L + W83697HF */ static int w836xx_memw_enable_2e(void) { @@ -1980,6 +1981,7 @@ {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", P3, "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x8086, 0x277c, 0xa0a0, 0x060b, 0x8086, 0x27da, 0xa0a0, 0x060b, NULL, NULL, NULL, P3, "AOpen", "i975Xa-YDG", 0, OK, board_aopen_i975xa_ydg}, {0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41 $", NULL, NULL, P3, "ASRock", "K7S41", 0, OK, w836xx_memw_enable_2e}, + {0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41GX$", NULL, NULL, P3, "ASRock", "K7S41GX", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, P3, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x8086, 0x2570, 0x1849, 0x2570, 0x8086, 0x24d3, 0x1849, 0x24d0, NULL, NULL, NULL, P3, "ASRock", "775i65G", 0, OK, intel_ich_gpio23_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, P3, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Jun 19 00:56:14 2011 (r1345) +++ trunk/print.c Sun Jun 19 18:52:48 2011 (r1346) @@ -400,6 +400,7 @@ B("ASRock", "A770CrossFire", 1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire&s=AM2%%2b", NULL), B("ASRock", "ALiveNF6G-DVI", 1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL), B("ASRock", "K7S41", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL), + B("ASRock", "K7S41GX", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL), B("ASRock", "K7VT4A+", 0, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%%2b&s=", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"), B("ASRock", "K8S8X", 1, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL), B("ASRock", "M3A790GXH/128M", 1, "http://www.asrock.com/MB/overview.asp?Model=M3A790GXH/128M", NULL),

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Success flashing Supermicro X7SPA-HF
by Jochen Schulz 19 Jun '11

19 Jun '11

Hi, I just wanted to say thanks and report that I just successfully flashed the BIOS of my brand-new mainboard Supermicro X7SPA-HF¹ using flashrom. After wasting a whole evening trying to make a 4MB BIOS image fit onto a (virtual) floppy, I stumbled upon flashrom again and, without much thought, decided to give it a try. I tried reading the current BIOS first and after that worked I flashed the file X7SPA0.526 from the current zip download. I ignored the message that erasing is untested and another one that suggested that a single block or something like that couldn't be eraed. After five minutes of waiting I became a little bit nervous, but two or three minutes later flashrom was finished and I could reboot successfully. So, thanks again, flashrom saved my day. If you need any further information for your documentation, please Cc me as I am not subscribed. J. ¹ http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IP… -- When I am doing sex I wonder if my emotions can be detected by alien civilisations. [Agree] [Disagree] <http://www.slowlydownward.com/NODATA/data_enter2.html>

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Write on an ASUS M4A78-EM
by Jani Uusitalo 19 Jun '11

19 Jun '11

Hi list. Just flashed my ASUS M4A78-EM using flashrom (Ubuntu packed version 0.9.1+r946-1ubuntu1, with latest rev. 2101 ROM from ASUS), and everything went fine. Just thought I'd send this note since the motherboard isn't listed in the wiki yet. Reading the old image from chip also worked fine. -- Jani

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"ST M25P80" (1024 KB, SPI) - Tested - WORKS
by Harald Gutmann 19 Jun '11

19 Jun '11

hargut@benchvice:~/flashrom$ sudo ./flashrom -w ../coreboot.svn/build/coreboot.rom flashrom v0.9.3-r1223 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100913 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. coreboot table found at 0x7fffe000. Found ITE Super I/O, ID 0x8716. Found chipset "NVIDIA MCP55", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller Found chip "ST M25P80" (1024 KB, SPI) at physical address 0xfff00000. 4 byte RDID not supported on this SPI controller === This flash part has status UNTESTED for operations: ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Erasing flash chip... SUCCESS. Writing flash chip... COMPLETE. Verifying flash... VERIFIED. hargut@benchvice:~/flashrom$

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GA-6VXE7
by Justin Doiel 19 Jun '11

19 Jun '11

The attached is the output of flashrom -EV on the gigabyte GA-6VXE7. Erase worked. we verified all FFs, and wrote the contents back successfully. Juston Doiel

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Asus A8N-VM (Pm49FL004) - Flashed OK
by Dave B 19 Jun '11

19 Jun '11

Hi, Thanks loads to developers past and present for flashrom ! I collected the info from my successful attempt on an Asus A8N-VM m/b which isn't in your list at flashrom.org/Supported_hardware, if you want to add it. ( http://www.asus.com/product.aspx?P_ID=nwcuFMseNd3DhmVA ) Session summary: ===== dave@K-Matrix:~/BIOS/ASUS_AMI/ROMs/q403$ sudo flashrom -V -r 0403_flashrom-r_2010-10-23.ROM flashrom v0.9.2-r1028 on Linux 2.6.35-22-generic (i686), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 790M loops per second, delay more than 10% too short (got 73% of expected delay), recalculating... 944M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 899M loops per second, delay more than 10% too short (got 83% of expected delay), recalculating... 945M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 919M loops per second, delay loop is unreliable, trying to continue 10 myus = 10 us, 100 myus = 85 us, 1000 myus = 834 us, 10000 myus = 18535 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "A8N-VM" DMI string baseboard-version: "Rev 1.xx" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP51", enabling flash write... chipset PCI ID is 10de:0261, OK. This chipset supports the following protocols: Non-SPI. Probing for ... <CUT> Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000. Probing for ... <CUT> Reading flash... done. dave@K-Matrix:~/BIOS/ASUS_AMI/ROMs/q403$ ---------- dave@K-Matrix:/proc/driver$ sudo modprobe nvram [sudo] password for dave: ### backup nvram dave@K-Matrix:/media/SGii/MyData/BIOS$ cd /media/SGii/MyData/BIOS/ASUS_AMI/nvram dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/nvram$ sudo dd if=/dev/nvram of=2010-10-23 0+1 records in 0+1 records out 114 bytes (114 B) copied, 0.000946501 s, 120 kB/s dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/nvram$ # #----------> HERE WE GO ... WISH ME LUCK ;) # dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/ROMs/0702$ sudo flashrom -w 0702.ROM # write new flash ROM image flashrom v0.9.2-r1028 on Linux 2.6.35-22-generic (i686), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP51", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... SUCCESS. Programming page: DONE!ss: 0x0007f000 COMPLETE. Verifying flash... VERIFIED. dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/ROMs/0702$ ===== Really valuable work - thanks again ! Best regards, Dave B

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Report for successful operation: WRITE on Lanner EM-8510C V1.1B (Flash SST49LF004A/B)
by Christian Motz 19 Jun '11

19 Jun '11

To whom it may concern, I just tested the WRITE operation with the SVN r1216 version of flashrom on a Lanner EM-8510C mainboard (V1.1B, chip "SST SST49LF004A/B") with POSITIVE result. Attached find the log of the operation (flashrom -Vw) as requested. Best regards, -- Christian Motz Software Engineer Funkwerk IP-Appliances GmbH Mönchhaldenstr. 28 D-70191 Stuttgart Tel: +49 711 900300 - 66 Fax: +49 711 900300 - 90 E-Mail: christian.motz(a)funkwerk-ec.com Location: GmbH Nuernberg, Local Court Nuernberg, HRB 25481 Managing Directors: Bernd Büttner -------------------------------- The information contained in this e-mail has been carefully researched, but the possibility of it being inapplicable in individual cases cannot be ruled out. We therefore regret that we cannot accept responsibility or liability of any kind whatsoever for the correctness of the information given. Please notify us if you discover that information is inapplicable.

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Asus P5VD1-X: Instant success
by Olle Gross 19 Jun '11

19 Jun '11

Hi, just wanted to tell that i successfully flashed the bios of my old Asus P5VD1-X with flashrom, so i guess it could be added to the supported list. Attaching output of flashrom -V, lspci -nnvvvxxx, superiotool -deV. New bios version 0704 downloaded from asus.com, can't link directly cos they require captcha for download. Everything works just fine, and the bios menu reports the new version. Just one thing that might or might not be of any importance, i noted that lspci reports the board as "ASUSTeK Computer Inc. P4V800D-X Mainboard [1043:8199]". This is wrong, it's a P5VD1-X - at least it says so on the board. You think this could cause any problems, or is it just cosmetic? Regards, Olof

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SST39SF020A write ok, and message question
by Andrew Morgan 19 Jun '11

19 Jun '11

Log attached. When running 'flashrom' on its own I got this message: This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Should the text "Please mention your board in the subject line." in this case say "flash part" or "flash chp" instead of "board"? I'm assuming the board name is important for un-tested boards or board enables, whereas in this case it is the flash chip name which is important? -- Andrew.

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Success report: Tyan S2723
by Uwe Hermann 19 Jun '11

19 Jun '11

Hi, I tested flashrom on the Tyan S2723 board, works fine. Logs attached. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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Test results for flashrom on Asus P5N32-E SLI motherboard
by Paul Brookman 19 Jun '11

19 Jun '11

This is the output from flashing the bios chip on an Asus P5N32-E motherboard. Flashrom worked without a problem backing up and updating the bios. Many thanks, Paul Brookman

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Re: [flashrom] Flashrom Feedback
by Uwe Hermann 19 Jun '11

19 Jun '11

Hi, On Thu, Oct 07, 2010 at 02:00:38PM +0100, Andrew Wierzan wrote: > I have successfully flashed ASUS P7H57-D-EVO using the current trunk at svn://coreboot.org/flashrom/trunk (trunk @ 1199). I used an Ubuntu 9.1 Live USB environment and followed the guide on the downloads page. > > The latest Asus BIOS (1606) for this board disables the ability to roll-back bios version using their own utility EZFlash. Many many thanks for continuing this project, it's saved a lot of hassle :) Thanks, we marked that board as supported. Sorry for the delay. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r1345 - trunk
by repository service 19 Jun '11

19 Jun '11

Author: uwe Date: Sun Jun 19 00:56:14 2011 New Revision: 1345 URL: http://flashrom.org/trac/flashrom/changeset/1345 Log: Various board status updates. Mark the following boards as OK: - ASUS P7H57D-V EVO (reported by Andrew Wierzan <andrew(a)emerginguk.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005042.html - Tyan S2723 (Tiger i7501) (reported by Uwe Hermann <uwe(a)hermann-uwe.de>) http://www.flashrom.org/pipermail/flashrom/2010-October/005156.html - ASUS P5VD1-X (reported by Olle Gross <gusgross(a)student.gu.se>) http://www.flashrom.org/pipermail/flashrom/2010-October/005205.html - Lanner EM-8510C (reported by Christian Motz <christian.motz(a)funkwerk-ec.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005240.html - ASUS A8N-VM (reported by Dave B <flashrom(a)d10.karoo.co.uk>) http://www.flashrom.org/pipermail/flashrom/2010-October/005247.html - GIGABYTE GA-6VXE7+ (reported by Justin Doiel <justin.doiel(a)gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005251.html - Supermicro X7SPA-HF (reported by Jochen Schulz <ml(a)well-adjusted.de>) http://www.flashrom.org/pipermail/flashrom/2010-November/005346.html - ASUS M4A78-EM (reported by Jani Uusitalo <jani(a)mummila.net>) http://www.flashrom.org/pipermail/flashrom/2010-December/005587.html - ASUS P5N32-E SLI (reported by Paul Brookman <paul_brookman(a)sky.com>) http://www.flashrom.org/pipermail/flashrom/2010-December/005559.html Mark the following chips as OK: - SST SST39SF020A (reported by Andrew Morgan <ziltro(a)ziltro.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005107.html - ST M25P80 (reported by Harald Gutmann <harald.gutmann(a)gmx.net>) http://www.flashrom.org/pipermail/flashrom/2010-November/005334.html Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashchips.c trunk/print.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Jun 18 20:45:56 2011 (r1344) +++ trunk/flashchips.c Sun Jun 19 00:56:14 2011 (r1345) @@ -5798,7 +5798,7 @@ .total_size = 256, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = @@ -6597,7 +6597,7 @@ .model_id = ST_M25P80, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Jun 18 20:45:56 2011 (r1344) +++ trunk/print.c Sun Jun 19 00:56:14 2011 (r1345) @@ -420,6 +420,7 @@ B("ASUS", "A8N-LA (Nagami-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&d…", "This is an OEM board from HP, the HP name is Nagami-GL8E."), B("ASUS", "A8N-SLI", 1, "http://www.asus.com/product.aspx?P_ID=J9FKa8z2xVId3pDK", NULL), B("ASUS", "A8N-SLI Premium", 1, "http://www.asus.com/product.aspx?P_ID=nbulqxniNmzf0mH1", NULL), + B("ASUS", "A8N-VM", 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL), B("ASUS", "A8N-VM CSM", 1, "http://www.asus.com/product.aspx?P_ID=JBqqlpj4cspbSa3s", NULL), B("ASUS", "A8NE-FM/S", 1, "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE…", NULL), B("ASUS", "A8V Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=tvpdgPNCPaABZRVU", NULL), @@ -439,6 +440,7 @@ B("ASUS", "M2V-MX", 1, "http://www.asus.com/product.aspx?P_ID=7grf8Ci4yxnqzt3z", NULL), B("ASUS", "M3A76-CM", 1, NULL, NULL), B("ASUS", "M3A78-EM", 1, "http://www.asus.com/product.aspx?P_ID=KjpYqzmAd9vsTM2D", NULL), + B("ASUS", "M4A78-EM", 1, "http://www.asus.com/product.aspx?P_ID=0KyowHKUFAQqH2DO", NULL), B("ASUS", "M4A785TD-M EVO", 1, "http://www.asus.com/product.aspx?P_ID=QHbvGVB1mXmmD8qQ", NULL), B("ASUS", "M4A79T Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=lhJiLTN5huPfCVkW", NULL), B("ASUS", "M4A87TD/USB3", 1, "http://www.asus.com/product.aspx?P_ID=nlWYrI9wlNIYHAaa", NULL), @@ -470,11 +472,14 @@ B("ASUS", "P5KC", 1, "http://www.asus.com/product.aspx?P_ID=fFZ8oUIGmLpwNMjj", NULL), B("ASUS", "P5L-MX", 1, "http://www.asus.com/product.aspx?P_ID=X70d3NCzH2DE9vWH", NULL), B("ASUS", "P5GD1 Pro", 1, "http://www.asus.com/product.aspx?P_ID=50M49xQh71EZOeM1", NULL), + B("ASUS", "P5N32-E SLI", 1, "http://www.asus.com/product.aspx?P_ID=vBZLIBtPzYB2bLcb", NULL), B("ASUS", "P5ND2-SLI Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=WY7XroDuUImVbgp5", NULL), B("ASUS", "P5PE-VM", 1, "http://www.asus.com/product.aspx?P_ID=k3h0ZFVu9Lo1dUvk", NULL), + B("ASUS", "P5VD1-X", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL), B("ASUS", "P6T SE", 1, "http://www.asus.com/product.aspx?P_ID=t4yhK6y9W9o7iQ9E", NULL), B("ASUS", "P6T Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=vXixf82co6Q5v0BZ", NULL), B("ASUS", "P6T Deluxe V2", 1, "http://www.asus.com/product.aspx?P_ID=iRlP8RG9han6saZx", NULL), + B("ASUS", "P7H57D-V EVO", 1, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL), B("ASUS", "Z8NA-D6C", 1, "http://www.asus.com/product.aspx?P_ID=k81cpN8uEB01BpQ6", NULL), B("BCOM", "WinNET100", 1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."), B("Biostar", "M6TBA", 0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), @@ -509,6 +514,7 @@ B("GIGABYTE", "GA-6BXC", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL), B("GIGABYTE", "GA-6BXDU", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL), B("GIGABYTE", "GA-6IEM", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL), + B("GIGABYTE", "GA-6VXE7+", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL), B("GIGABYTE", "GA-6ZMA", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL), B("GIGABYTE", "GA-MA785GMT-UD2H", 1, "http://www.gigabyte.de/Products/Motherboard/Products_Overview.aspx?ProductI…", NULL), B("GIGABYTE", "GA-770TA-UD3", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3272#ov", NULL), @@ -557,6 +563,7 @@ B("IWILL", "DK8-HTX", 1, "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.as…", NULL), B("Jetway", "J7F4K1G5D-PB", 1, "http://www.jetway.com.tw/jetway/system/productshow2.asp?id=389&proname=J7F4…", NULL), B("Kontron", "986LCD-M", 1, "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/…", NULL), + B("Lanner", "EM-8510C", 1, NULL, NULL), B("Lex", "CV700A", 1, "http://www.lex.com.tw/product/CV700A-spec.htm", NULL), B("Mitac", "6513WU", 1, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/produ…", NULL), B("MSI", "MS-6153", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=336", NULL), @@ -622,6 +629,7 @@ B("Sun", "Fire x4600", 0, "http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."), B("Supermicro", "H8QC8", 1, "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL), B("Supermicro", "X5DP8-G2", 1, "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL), + B("Supermicro", "X7SPA-HF", 1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IP…", NULL), B("Supermicro", "X8DT3", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL), B("Supermicro", "X8DTH-6F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL), B("Supermicro", "X8DTT-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL), @@ -637,6 +645,7 @@ B("Tyan", "S1846 (Tsunami ATX)", 1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL), B("Tyan", "S2466 (Tiger MPX)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=461", NULL), B("Tyan", "S2498 (Tomcat K7M)", 1, "http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL), + B("Tyan", "S2723 (Tiger i7501)", 1, "http://www.tyan.com/archive/products/html/tigeri7501.html", NULL), B("Tyan", "S2881 (Thunder K8SR)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=115", NULL), B("Tyan", "S2882 (Thunder K8S Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=121", NULL), B("Tyan", "S2882-D (Thunder K8SD Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),

1 0

[PATCH 4/4] add printing of chip voltage ranges to print_wiki.c
by Stefan Tauner 18 Jun '11

18 Jun '11

- add voltage ranges - center some headers (test values OK, No, ? are centered via wiki templates) - fix style error in header (align:right -> text-align:right) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print_wiki.c | 46 ++++++++++++++++++++++++++++++++-------------- 1 files changed, 32 insertions(+), 14 deletions(-) diff --git a/print_wiki.c b/print_wiki.c index 684c4e0..e2b2eca 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -29,7 +29,8 @@ static const char wiki_header[] = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ -background-color:#eeeeee; align:right; border:1px solid #aabbcc;\"><small>\n\ +background-color:#eeeeee; text-align:right; border:1px solid #aabbcc;\">\ +<small>\n\ Please do '''not''' edit these tables in the wiki directly, they are \ generated by pasting '''flashrom -z''' output.<br />\ '''Last update:''' %s(generated by flashrom %s)\n</small></div>\n"; @@ -37,12 +38,13 @@ generated by pasting '''flashrom -z''' output.<br />\ #if CONFIG_INTERNAL == 1 static const char chipset_th[] = "{| border=\"0\" style=\"font-size: smaller\"\n\ |- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Southbridge\n! align=\"left\" | PCI IDs\n\ -! align=\"left\" | Status\n\n"; +! align=\"left\" | Southbridge\n! align=\"center\" | PCI IDs\n\ +! align=\"center\" | Status\n\n"; static const char board_th[] = "{| border=\"0\" style=\"font-size: smaller\" \ valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Mainboard\n! align=\"left\" | Required option\n! align=\"left\" | Status\n\n"; +! align=\"left\" | Mainboard\n! align=\"left\" | Required option\n\ +! align=\"center\" | Status\n\n"; static const char board_intro[] = "\ \n== Supported mainboards ==\n\n\ @@ -57,20 +59,26 @@ not work (we don't know, someone has to give it a try). Please report any \ further verified mainboards on the [[Mailinglist|mailing list]].\n"; #endif -static const char chip_th[] = "{| border=\"0\" style=\"font-size: smaller\" \ -valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Device\n! align=\"left\" | Size / kB\n\ -! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\ +static const char chip_th[] = "{\ +| border=\"0\" style=\"font-size: smaller\"valign=\"top\"\n\ +|- bgcolor=\"#6699dd\"\n\ +! align=\"left\" | Vendor\n\ +! align=\"left\" | Device\n\ +! align=\"center\" | Size [kB]\n\ +! align=\"center\" | Type\n\ +! align=\"center\" colspan=\"4\" | Status\n\ +! align=\"center\" colspan=\"2\" | Voltage [V]\n\n\ |- bgcolor=\"#6699ff\"\n| colspan=\"4\" |  \n\ -| Probe\n| Read\n| Erase\n| Write\n\n"; +| Probe\n| Read\n| Erase\n| Write\n\ +| align=\"center\" | min \n| align=\"center\" | max\n\n"; static const char programmer_section[] = "\ \n== Supported programmers ==\n\nThis is a list \ of supported PCI devices flashrom can use as programmer:\n\n{| border=\"0\" \ valign=\"top\"\n| valign=\"top\"|\n\n{| border=\"0\" style=\"font-size: \ smaller\" valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Device\n! align=\"left\" | PCI IDs\n\ -! align=\"left\" | Status\n\n"; +! align=\"left\" | Device\n! align=\"center\" | PCI IDs\n\ +! align=\"center\" | Status\n\n"; #if CONFIG_INTERNAL == 1 static const char laptop_intro[] = "\n== Supported laptops/notebooks ==\n\n\ @@ -204,6 +212,9 @@ static void print_supported_chips_wiki(int cols) const struct flashchip *f, *old = NULL; uint32_t t; char *tmp_bus_str; + char tmp_max_str[6]; + char tmp_min_str[6]; + const char *na = "N/A"; for (f = flashchips; f->name != NULL; f++) chipcount++; @@ -223,8 +234,13 @@ static void print_supported_chips_wiki(int cols) t = f->tested; tmp_bus_str = flashbuses_to_text(f->bustype); - printf("|- bgcolor=\"#%s\"\n| %s || %s || %d " - "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}\n", + sprintf(tmp_min_str, "%0.03f", f->voltage.min/(double)1000); + sprintf(tmp_max_str, "%0.03f", f->voltage.max/(double)1000); + /* '{{%s}}' is used in combination with 'OK', 'No' and '?3' to + * select special formatting templates for the bg color. */ + printf("|- bgcolor=\"#%s\"\n| %s || %s || align=\"right\" | %d " + "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}" + "|| %s || %s \n", (c == 1) ? "eeeeee" : "dddddd", f->vendor, f->name, f->total_size, tmp_bus_str, (t & TEST_OK_PROBE) ? "OK" : @@ -234,7 +250,9 @@ static void print_supported_chips_wiki(int cols) (t & TEST_OK_ERASE) ? "OK" : (t & TEST_BAD_ERASE) ? "No" : "?3", (t & TEST_OK_WRITE) ? "OK" : - (t & TEST_BAD_WRITE) ? "No" : "?3"); + (t & TEST_BAD_WRITE) ? "No" : "?3", + f->voltage.min ? tmp_min_str : na, + f->voltage.min ? tmp_max_str : na); free(tmp_bus_str); /* Split table into 'cols' columns. */ -- 1.7.1

1 0

[PATCH 3/4] reformat -L output and add printing of chip voltage ranges to print.c
by Stefan Tauner 18 Jun '11

18 Jun '11

besides adding output for the voltage ranges, this patch also changes various aspects of the -L output: - sizes are right aligned now with a fixed length of 5 - test results are always shown in the same column ("PR" and " R" instead of "PR" and "R ") - get rid of POS_PRINT and digits - wideness reductions on the whole with a remarkable detail: vendor names are split on '/' and spread over mutliple lines while all other columns are printed on the first line. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 149 +++++++++++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 102 insertions(+), 47 deletions(-) diff --git a/print.c b/print.c index 80316cb..b110ff9 100644 --- a/print.c +++ b/print.c @@ -59,27 +59,16 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -#define POS_PRINT(x) do { pos += strlen(x); msg_ginfo(x); } while (0) - -static int digits(int n) -{ - int i; - - if (!n) - return 1; - - for (i = 0; n; ++i) - n /= 10; - - return i; -} - static void print_supported_chips(void) { - int okcol = 0, pos = 0, i, chipcount = 0; + int i, chipcount = 0; int maxvendorlen = strlen("Vendor") + 1; int maxchiplen = strlen("Device") + 1; + int maxtypelen = strlen("Type") + 1; const struct flashchip *f; + const char *delim ="/"; + char *tmp_ven_str; + int tmp_ven_len; char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) { @@ -87,12 +76,22 @@ static void print_supported_chips(void) if (!strncmp(f->name, "unknown", 7)) continue; chipcount++; - maxvendorlen = max(maxvendorlen, strlen(f->vendor)); + tmp_ven_str = (char *)f->vendor; + do { + tmp_ven_len = strcspn(tmp_ven_str, delim); + maxvendorlen = max(maxvendorlen, tmp_ven_len); + tmp_ven_str += tmp_ven_len; + } while (tmp_ven_len != 0); + maxchiplen = max(maxchiplen, strlen(f->name)); + tmp_bus_str = flashbuses_to_text(f->bustype); + maxtypelen = max(maxtypelen, + strlen(flashbuses_to_text(f->bustype))); + free(tmp_bus_str); } - maxvendorlen++; - maxchiplen++; - okcol = maxvendorlen + maxchiplen; + maxvendorlen += 1; + maxchiplen += 1; + maxtypelen += 1; msg_ginfo("Supported flash chips (total: %d):\n\n", chipcount); msg_ginfo("Vendor"); @@ -102,10 +101,21 @@ static void print_supported_chips(void) for (i = strlen("Device"); i < maxchiplen; i++) msg_ginfo(" "); - msg_ginfo("Tested Known Size/kB: Type:\n"); - for (i = 0; i < okcol; i++) + msg_ginfo("Test Known Size "); + + msg_ginfo("Type"); + for (i = strlen("Type"); i < maxtypelen; i++) + msg_ginfo(" "); + msg_gdbg("Voltage"); + msg_ginfo("\n"); + + for (i = 0; i < maxvendorlen + maxchiplen; i++) + msg_ginfo(" "); + msg_ginfo("OK Broken [kB]"); + for (i = 0; i < maxtypelen; i++) msg_ginfo(" "); - msg_ginfo("OK Broken\n\n"); + msg_gdbg("range [V]"); + msg_ginfo("\n\n"); msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { @@ -113,50 +123,95 @@ static void print_supported_chips(void) if (!strncmp(f->name, "unknown", 7)) continue; - msg_ginfo("%s", f->vendor); - for (i = strlen(f->vendor); i < maxvendorlen; i++) + /* support for multiline vendor names: + * - make a copy of the original vendor name + * - use strok to put the next token in tmp_ven_str repeatedly + * - keep track of the last token's length for ' '-padding + */ + tmp_ven_str = malloc(strlen(f->vendor) + 1); + if (tmp_ven_str == NULL) { + msg_gerr("Out of memory!\n"); + exit(1); + } + strcpy(tmp_ven_str, f->vendor); + + tmp_ven_str = strtok(tmp_ven_str, delim); + tmp_ven_len = strlen(tmp_ven_str); + msg_ginfo("%s", tmp_ven_str); + tmp_ven_str = strtok(NULL, delim); + if (tmp_ven_str != NULL) { + msg_ginfo("%s", delim); + tmp_ven_len++; + } + + for (i = tmp_ven_len; i < maxvendorlen; i++) msg_ginfo(" "); + msg_ginfo("%s", f->name); for (i = strlen(f->name); i < maxchiplen; i++) msg_ginfo(" "); - pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { if ((f->tested & TEST_OK_PROBE)) - POS_PRINT("P "); + msg_ginfo("P"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_READ)) - POS_PRINT("R "); + msg_ginfo("R"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_ERASE)) - POS_PRINT("E "); + msg_ginfo("E"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_WRITE)) - POS_PRINT("W "); - } - while (pos < okcol + 9) { - msg_ginfo(" "); - pos++; - } + msg_ginfo("W "); + else + msg_ginfo(" "); + } else + msg_ginfo(" "); + if ((f->tested & TEST_BAD_MASK)) { if ((f->tested & TEST_BAD_PROBE)) - POS_PRINT("P "); + msg_ginfo("P"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_READ)) - POS_PRINT("R "); + msg_ginfo("R"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_ERASE)) - POS_PRINT("E "); + msg_ginfo("E"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_WRITE)) - POS_PRINT("W "); - } + msg_ginfo("W "); + else + msg_ginfo(" "); + } else + msg_ginfo(" "); - while (pos < okcol + 18) { - msg_ginfo(" "); - pos++; - } - msg_ginfo("%d", f->total_size); - for (i = 0; i < 10 - digits(f->total_size); i++) - msg_ginfo(" "); + msg_ginfo("%5d ", f->total_size); tmp_bus_str = flashbuses_to_text(f->bustype); msg_ginfo("%s", tmp_bus_str); + for (i = strlen(tmp_bus_str); + i < maxtypelen; + i++) + msg_ginfo(" "); free(tmp_bus_str); + + if (f->voltage.min == 0 && f->voltage.max == 0) + msg_gdbg("no info"); + else + msg_gdbg("%0.02f;%0.02f", + f->voltage.min/(double)1000, + f->voltage.max/(double)1000); + + while (tmp_ven_str != NULL) { + msg_ginfo("\n%s", tmp_ven_str); + tmp_ven_str = strtok(NULL, delim); + } msg_ginfo("\n"); } } -- 1.7.1

1 0

[PATCH 2/4] fix memleaks due to incorrect usage of flashbuses_to_text
by Stefan Tauner 18 Jun '11

18 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 5 ++++- flashrom.c | 18 ++++++++++-------- print.c | 9 +++++++-- print_wiki.c | 5 ++++- 4 files changed, 25 insertions(+), 12 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 0c77f07..70c9bae 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1206,6 +1206,7 @@ int chipset_flash_enable(void) struct pci_dev *dev = NULL; int ret = -2; /* Nothing! */ int i; + char *tmp_bus_str; /* Now let's try to find the chipset we have... */ for (i = 0; chipset_enables[i].vendor_name != NULL; i++) { @@ -1244,8 +1245,10 @@ int chipset_flash_enable(void) msg_pinfo("PROBLEMS, continuing anyway\n"); } + tmp_bus_str = flashbuses_to_text(buses_supported); msg_pinfo("This chipset supports the following protocols: %s.\n", - flashbuses_to_text(buses_supported)); + tmp_bus_str); + free(tmp_bus_str); return ret; } diff --git a/flashrom.c b/flashrom.c index cfee1a1..3e400d1 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1119,7 +1119,7 @@ int probe_flash(int startchip, struct flashchip *fill_flash, int force) char location[64]; uint32_t size; enum chipbustype buses_common; - char *tmp; + char *tmp_bus_str; for (flash = flashchips + startchip; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) @@ -1128,13 +1128,13 @@ int probe_flash(int startchip, struct flashchip *fill_flash, int force) if (!buses_common) { msg_gspew("Probing for %s %s, %d kB: skipped. ", flash->vendor, flash->name, flash->total_size); - tmp = flashbuses_to_text(buses_supported); - msg_gspew("Host bus type %s ", tmp); - free(tmp); - tmp = flashbuses_to_text(flash->bustype); + tmp_bus_str = flashbuses_to_text(buses_supported); + msg_gspew("Host bus type %s ", tmp_bus_str); + free(tmp_bus_str); + tmp_bus_str = flashbuses_to_text(flash->bustype); msg_gspew("and chip bus type %s are incompatible.", - tmp); - free(tmp); + tmp_bus_str); + free(tmp_bus_str); msg_gspew("\n"); continue; } @@ -1186,10 +1186,12 @@ notfound: #endif snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); + tmp_bus_str = flashbuses_to_text(flash->bustype); msg_cinfo("%s chip \"%s %s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", flash->vendor, flash->name, flash->total_size, - flashbuses_to_text(flash->bustype), location); + tmp_bus_str, location); + free(tmp_bus_str); /* Flash registers will not be mapped if the chip was forced. Lock info * may be stored in registers, so avoid lock info printing. diff --git a/print.c b/print.c index af3edc1..80316cb 100644 --- a/print.c +++ b/print.c @@ -28,7 +28,7 @@ /* * Return a string corresponding to the bustype parameter. - * Memory is obtained with malloc() and can be freed with free(). + * Memory is obtained with malloc() and must be freed with free() by the caller. */ char *flashbuses_to_text(enum chipbustype bustype) { @@ -80,6 +80,7 @@ static void print_supported_chips(void) int maxvendorlen = strlen("Vendor") + 1; int maxchiplen = strlen("Device") + 1; const struct flashchip *f; + char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) { /* Ignore "unknown XXXX SPI chip" entries. */ @@ -152,7 +153,11 @@ static void print_supported_chips(void) msg_ginfo("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) msg_ginfo(" "); - msg_ginfo("%s\n", flashbuses_to_text(f->bustype)); + + tmp_bus_str = flashbuses_to_text(f->bustype); + msg_ginfo("%s", tmp_bus_str); + free(tmp_bus_str); + msg_ginfo("\n"); } } diff --git a/print_wiki.c b/print_wiki.c index e9ccc8b..684c4e0 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -203,6 +203,7 @@ static void print_supported_chips_wiki(int cols) int i = 0, c = 1, chipcount = 0; const struct flashchip *f, *old = NULL; uint32_t t; + char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) chipcount++; @@ -221,10 +222,11 @@ static void print_supported_chips_wiki(int cols) c = !c; t = f->tested; + tmp_bus_str = flashbuses_to_text(f->bustype); printf("|- bgcolor=\"#%s\"\n| %s || %s || %d " "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}\n", (c == 1) ? "eeeeee" : "dddddd", f->vendor, f->name, - f->total_size, flashbuses_to_text(f->bustype), + f->total_size, tmp_bus_str, (t & TEST_OK_PROBE) ? "OK" : (t & TEST_BAD_PROBE) ? "No" : "?3", (t & TEST_OK_READ) ? "OK" : @@ -233,6 +235,7 @@ static void print_supported_chips_wiki(int cols) (t & TEST_BAD_ERASE) ? "No" : "?3", (t & TEST_OK_WRITE) ? "OK" : (t & TEST_BAD_WRITE) ? "No" : "?3"); + free(tmp_bus_str); /* Split table into 'cols' columns. */ if (i >= (chipcount / cols + 1)) { -- 1.7.1

1 0

[PATCH 1/4] change all occurrences of printf to msg_ginfo in print.c
by Stefan Tauner 18 Jun '11

18 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 140 +++++++++++++++++++++++++++++++------------------------------- 1 files changed, 70 insertions(+), 70 deletions(-) diff --git a/print.c b/print.c index 8e6a187..af3edc1 100644 --- a/print.c +++ b/print.c @@ -59,7 +59,7 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -#define POS_PRINT(x) do { pos += strlen(x); printf(x); } while (0) +#define POS_PRINT(x) do { pos += strlen(x); msg_ginfo(x); } while (0) static int digits(int n) { @@ -93,31 +93,31 @@ static void print_supported_chips(void) maxchiplen++; okcol = maxvendorlen + maxchiplen; - printf("Supported flash chips (total: %d):\n\n", chipcount); - printf("Vendor"); + msg_ginfo("Supported flash chips (total: %d):\n\n", chipcount); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); - printf("Device"); + msg_ginfo(" "); + msg_ginfo("Device"); for (i = strlen("Device"); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); - printf("Tested Known Size/kB: Type:\n"); + msg_ginfo("Tested Known Size/kB: Type:\n"); for (i = 0; i < okcol; i++) - printf(" "); - printf("OK Broken\n\n"); - printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); + msg_ginfo(" "); + msg_ginfo("OK Broken\n\n"); + msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { /* Don't print "unknown XXXX SPI chip" entries. */ if (!strncmp(f->name, "unknown", 7)) continue; - printf("%s", f->vendor); + msg_ginfo("%s", f->vendor); for (i = strlen(f->vendor); i < maxvendorlen; i++) - printf(" "); - printf("%s", f->name); + msg_ginfo(" "); + msg_ginfo("%s", f->name); for (i = strlen(f->name); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { @@ -131,7 +131,7 @@ static void print_supported_chips(void) POS_PRINT("W "); } while (pos < okcol + 9) { - printf(" "); + msg_ginfo(" "); pos++; } if ((f->tested & TEST_BAD_MASK)) { @@ -146,13 +146,13 @@ static void print_supported_chips(void) } while (pos < okcol + 18) { - printf(" "); + msg_ginfo(" "); pos++; } - printf("%d", f->total_size); + msg_ginfo("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) - printf(" "); - printf("%s\n", flashbuses_to_text(f->bustype)); + msg_ginfo(" "); + msg_ginfo("%s\n", flashbuses_to_text(f->bustype)); } } @@ -172,26 +172,26 @@ static void print_supported_chipsets(void) maxvendorlen++; maxchipsetlen++; - printf("Supported chipsets (total: %d):\n\n", chipsetcount); + msg_ginfo("Supported chipsets (total: %d):\n\n", chipsetcount); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Chipset"); + msg_ginfo("Chipset"); for (i = strlen("Chipset"); i < maxchipsetlen; i++) - printf(" "); + msg_ginfo(" "); - printf("PCI IDs State\n\n"); + msg_ginfo("PCI IDs State\n\n"); for (c = chipset_enables; c->vendor_name != NULL; c++) { - printf("%s", c->vendor_name); + msg_ginfo("%s", c->vendor_name); for (i = 0; i < maxvendorlen - strlen(c->vendor_name); i++) - printf(" "); - printf("%s", c->device_name); + msg_ginfo(" "); + msg_ginfo("%s", c->device_name); for (i = 0; i < maxchipsetlen - strlen(c->device_name); i++) - printf(" "); - printf("%04x:%04x%s\n", c->vendor_id, c->device_id, + msg_ginfo(" "); + msg_ginfo("%04x:%04x%s\n", c->vendor_id, c->device_id, (c->status == OK) ? "" : " (untested)"); } } @@ -216,39 +216,39 @@ static void print_supported_boards_helper(const struct board_info *boards, maxvendorlen++; maxboardlen++; - printf("Known %s (good: %d, bad: %d):\n\n", + msg_ginfo("Known %s (good: %d, bad: %d):\n\n", devicetype, boardcount_good, boardcount_bad); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Board"); + msg_ginfo("Board"); for (i = strlen("Board"); i < maxboardlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Status Required option\n\n"); + msg_ginfo("Status Required option\n\n"); for (b = boards; b->vendor != NULL; b++) { - printf("%s", b->vendor); + msg_ginfo("%s", b->vendor); for (i = 0; i < maxvendorlen - strlen(b->vendor); i++) - printf(" "); - printf("%s", b->name); + msg_ginfo(" "); + msg_ginfo("%s", b->name); for (i = 0; i < maxboardlen - strlen(b->name); i++) - printf(" "); - printf((b->working) ? "OK " : "BAD "); + msg_ginfo(" "); + msg_ginfo((b->working) ? "OK " : "BAD "); for (e = board_pciid_enables; e->vendor_name != NULL; e++) { if (strcmp(e->vendor_name, b->vendor) || strcmp(e->board_name, b->name)) continue; if (e->lb_vendor == NULL) - printf("(autodetected)"); + msg_ginfo("(autodetected)"); else - printf("-m %s:%s", e->lb_vendor, + msg_ginfo("-m %s:%s", e->lb_vendor, e->lb_part); } - printf("\n"); + msg_ginfo("\n"); } } #endif @@ -257,104 +257,104 @@ void print_supported(void) { print_supported_chips(); - printf("\nSupported programmers:\n"); + msg_ginfo("\nSupported programmers:\n"); list_programmers_linebreak(0, 80, 0); #if CONFIG_INTERNAL == 1 - printf("\nSupported devices for the %s programmer:\n\n", + msg_ginfo("\nSupported devices for the %s programmer:\n\n", programmer_table[PROGRAMMER_INTERNAL].name); print_supported_chipsets(); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(boards_known, "boards"); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(laptops_known, "laptops"); #endif #if CONFIG_DUMMY == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DUMMY].name); /* FIXME */ - printf("Dummy device, does nothing and logs all accesses\n"); + msg_ginfo("Dummy device, does nothing and logs all accesses\n"); #endif #if CONFIG_NIC3COM == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NIC3COM].name); print_supported_pcidevs(nics_3com); #endif #if CONFIG_NICREALTEK == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICREALTEK].name); print_supported_pcidevs(nics_realtek); #endif #if CONFIG_NICNATSEMI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICNATSEMI].name); print_supported_pcidevs(nics_natsemi); #endif #if CONFIG_GFXNVIDIA == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_GFXNVIDIA].name); print_supported_pcidevs(gfx_nvidia); #endif #if CONFIG_DRKAISER == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DRKAISER].name); print_supported_pcidevs(drkaiser_pcidev); #endif #if CONFIG_SATASII == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATASII].name); print_supported_pcidevs(satas_sii); #endif #if CONFIG_ATAHPT == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif #if CONFIG_FT2232_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); print_supported_usbdevs(devs_ft2232spi); #endif #if CONFIG_SERPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SERPROG].name); /* FIXME */ - printf("All programmer devices speaking the serprog protocol\n"); + msg_ginfo("All programmer devices speaking the serprog protocol\n"); #endif #if CONFIG_BUSPIRATE_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_BUSPIRATE_SPI].name); /* FIXME */ - printf("Dangerous Prototypes Bus Pirate\n"); + msg_ginfo("Dangerous Prototypes Bus Pirate\n"); #endif #if CONFIG_DEDIPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DEDIPROG].name); /* FIXME */ - printf("Dediprog SF100\n"); + msg_ginfo("Dediprog SF100\n"); #endif #if CONFIG_RAYER_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_RAYER_SPI].name); /* FIXME */ - printf("RayeR parallel port programmer\n"); + msg_ginfo("RayeR parallel port programmer\n"); #endif #if CONFIG_NICINTEL == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL].name); print_supported_pcidevs(nics_intel); #endif #if CONFIG_NICINTEL_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL_SPI].name); print_supported_pcidevs(nics_intel_spi); #endif #if CONFIG_OGP_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_OGP_SPI].name); print_supported_pcidevs(ogp_spi); #endif #if CONFIG_SATAMV == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATAMV].name); print_supported_pcidevs(satas_mv); #endif -- 1.7.1

1 0

[PATCH 0/4] voltage printing 2.1
by Stefan Tauner 18 Jun '11

18 Jun '11

no real changes since 2.0. i have only rebased to r1344 and squashed the additional commit. i would really like to get this in soon to... well... to get rid of pending patches only, but i think this is a very good reason TBH :) Stefan Tauner (4): change all occurrences of printf to msg_ginfo in print.c fix memleaks due to incorrect usage of flashbuses_to_text reformat -L output and add printing of chip voltage ranges to print.c add printing of chip voltage ranges to print_wiki.c chipset_enable.c | 5 +- flashrom.c | 18 ++-- print.c | 278 +++++++++++++++++++++++++++++++++--------------------- print_wiki.c | 51 +++++++--- 4 files changed, 219 insertions(+), 133 deletions(-)

1 0

Re: [flashrom] [PATCH 3/3] add intel 6 series pci ids to chipset_enables
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:44PM +0200, Stefan Tauner wrote: > as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; > document number 324646-005, April 2011. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 14 ++++++++++++++ > 1 files changed, 14 insertions(+), 0 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 5907b86..a3ce942 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1121,6 +1121,20 @@ const struct penable chipset_enables[] = { > {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, > {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, > {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, > + {0x8086, 0x1C46, NT, "Intel", "P67", enable_flash_ich10}, > + {0x8086, 0x1C47, NT, "Intel", "UM67", enable_flash_ich10}, > + {0x8086, 0x1C49, NT, "Intel", "HM65", enable_flash_ich10}, > + {0x8086, 0x1C4A, NT, "Intel", "H67", enable_flash_ich10}, > + {0x8086, 0x1C4B, NT, "Intel", "HM67", enable_flash_ich10}, > + {0x8086, 0x1C4C, NT, "Intel", "Q65", enable_flash_ich10}, > + {0x8086, 0x1C4D, NT, "Intel", "QS67", enable_flash_ich10}, > + {0x8086, 0x1C4E, NT, "Intel", "Q67", enable_flash_ich10}, > + {0x8086, 0x1C4F, NT, "Intel", "QM67", enable_flash_ich10}, > + {0x8086, 0x1C50, NT, "Intel", "B65", enable_flash_ich10}, > + {0x8086, 0x1C52, NT, "Intel", "C202", enable_flash_ich10}, > + {0x8086, 0x1C54, NT, "Intel", "C204", enable_flash_ich10}, > + {0x8086, 0x1C56, NT, "Intel", "C206", enable_flash_ich10}, > + {0x8086, 0x1C5C, NT, "Intel", "H61", enable_flash_ich10}, All hexnumbers lower-case, please (e.g. 0x1c46, not 0x1C46). The entry for 0x1c44 (Z68) is missing (contained in the May 2011 PDF). With the above changes: Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

2 1

Re: [flashrom] [PATCH 2/3] fix and add a few chipset_enables entries
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:43PM +0200, Stefan Tauner wrote: > Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 12 +++++++++--- > 1 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 3a2febc..5907b86 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1115,8 +1115,8 @@ const struct penable chipset_enables[] = { > {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, > {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, > {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, > - {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, > - {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, > + {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, > + {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, > {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, > {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, > {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, > @@ -1125,14 +1125,17 @@ const struct penable chipset_enables[] = { > {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, > {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, > {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, > +// {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, /* http://download.intel.com/design/chipsets/datashts/27359901.pdf */ Correct, but please drop the comment. You could also uncomment the line (but leave NT) as chances are very high it will work. > {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, > {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, > {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, > {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, > {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, > +// {0x8086, 0x24dc, NT, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, /* http://www.intel.com/assets/pdf/datasheet/252516.pdf */ This is a duplicate entry? I cannot find 0x24dc in the datasheet, 0x24d0 is the correct device ID for ICH5/ICH5R. I'd rather drop this entry for now (and the comment). > {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, > {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, > {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, > +// {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, /* bios_cntl is at 0xdc? http://www3.intel.com/Assets/PDF/datasheet/301473.pdf, pci id: http://cateee.net/lkddb/web-lkddb/ITCO_WDT.html */ PCI ID is correct, 0xdc for BIOS_CTNL is also correct according to the ICH6W/ICH6RW datasheet. Please remove the comments. You could also uncomment this entry, it's very likely to be correct and work (but leave it as NT for now). > {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, > {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, > {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, > @@ -1151,10 +1154,12 @@ const struct penable chipset_enables[] = { > {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, > {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, > {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, > +// {0x8086, 0x3a10, NT, "Intel", "ICH10R", enable_flash_ich10}, /* engineering sample http://pci-ids.ucw.cz/read/PC/8086/3a10 and http://www.radisys.com/files/support_downloads/03292-00_ATCA-4500_CPM_Refer… */ IDs are OK, but please drop the comments. At most "/* ES */" or so, if you want. > {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, > {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, > {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, > {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, > +// {0x8086, 0x3a1e, NT, "Intel", "ICH10", enable_flash_ich10}, /* ICH10 engineering sample. http://pci-ids.ucw.cz/read/PC/8086/3a1e */ /* ES */ or no comment IMHO, see above. > {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, > {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, > {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, > @@ -1176,7 +1181,8 @@ const struct penable chipset_enables[] = { > {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, > {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, > {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, > - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, > + {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, > +// {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo?}, /* document number 324208 */ IDs are correct, comment can be dropped. The "?" from enable_flash_poulsbo can also be dropped I guess, the register bits used in enable_flash_poulsbo() are the same for "Atom E6xx(T)/Tunnel Creek", thus chances are good that it might work. You could also uncomment the line for that reason (but leave NT). With the above changes: Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

2 1

Re: [flashrom] [PATCH 1/3] resort chipset_enables array by pci ids
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:42PM +0200, Stefan Tauner wrote: > Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 210 +++++++++++++++++++++++++++--------------------------- > 1 files changed, 105 insertions(+), 105 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 60d5d4d..3a2febc 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1009,80 +1009,50 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name) > > #endif > > -/* Please keep this list alphabetically sorted by vendor/device. */ > +/* Please keep this list numerically sorted by vendor/device. */ ^^^^^^^^^^^^^ Make this "vendor/device ID" please. Other than that this is Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

2 1

[commit] r1344 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:56 2011 New Revision: 1344 URL: http://flashrom.org/trac/flashrom/changeset/1344 Log: add intel 6 series pci ids to chipset_enables as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; document number 324646-006, May 2011. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 20:45:50 2011 (r1343) +++ trunk/chipset_enable.c Sat Jun 18 20:45:56 2011 (r1344) @@ -1121,6 +1121,21 @@ {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_ich10}, + {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_ich10}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_ich10}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_ich10}, + {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_ich10}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_ich10}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_ich10}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_ich10}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_ich10}, + {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_ich10}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_ich10}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_ich10}, + {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_ich10}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_ich10}, + {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_ich10}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e},

1 0

[commit] r1343 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:50 2011 New Revision: 1343 URL: http://flashrom.org/trac/flashrom/changeset/1343 Log: fix and add a few chipset_enables entries Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 20:45:41 2011 (r1342) +++ trunk/chipset_enable.c Sat Jun 18 20:45:50 2011 (r1343) @@ -1013,7 +1013,7 @@ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, + {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, @@ -1052,7 +1052,7 @@ {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, + {0x10b9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ @@ -1115,8 +1115,8 @@ {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, - {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, + {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, + {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, @@ -1125,6 +1125,7 @@ {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, @@ -1133,6 +1134,7 @@ {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, @@ -1151,10 +1153,12 @@ {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a10, NT, "Intel", "ICH10R Engineering Sample", enable_flash_ich10}, {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, @@ -1176,7 +1180,8 @@ {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo}, #endif {}, };

1 0

[commit] r1342 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:41 2011 New Revision: 1342 URL: http://flashrom.org/trac/flashrom/changeset/1342 Log: resort chipset_enables array by pci ids Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 00:38:53 2011 (r1341) +++ trunk/chipset_enable.c Sat Jun 18 20:45:41 2011 (r1342) @@ -1009,80 +1009,50 @@ #endif -/* Please keep this list alphabetically sorted by vendor/device. */ +/* Please keep this list numerically sorted by vendor/device ID. */ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, - {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, - {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, - {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, - {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, - {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, - {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, - {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, - {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, - {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, - {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, - {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, - {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, - {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, - {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, - {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, - {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, - {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, - {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, - {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, - {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, - {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, - {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, - {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, - {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, - {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, - {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, - {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, - {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, - {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, - {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, - {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, - {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, - {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, - {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, - {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, - {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, - {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, - {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, - {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, - {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, - {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, - {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, - {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, - {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, - {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, - {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, - {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, - {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, - {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, - {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, - {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, + {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, + {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, + {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, + {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, + {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, + {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, + {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, + {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, + {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, + {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, + {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, + {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, + {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, + {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, + {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, + {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, + {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, + {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, + {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, + {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, + {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, + {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, + {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, + {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, + {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, + {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, + {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ @@ -1126,57 +1096,87 @@ {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, - {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, - {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, - {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, - {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, - {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, - {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, - {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, - {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, - {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, - {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, - {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, - {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, - {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, - {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, - {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, - {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, - {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, - {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, - {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, - {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, - {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, - {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, - {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, - {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, - {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, - {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, - {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, - {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, - {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, - {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, /* VIA northbridges */ {0x1106, 0x0585, NT, "VIA", "VT82C585VPX", via_no_byte_merge}, {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, - {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, + {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, /* VIA southbridges */ - {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, + {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, + {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, + {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, - {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, - {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, - {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, + {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, + {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, + {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, + {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, + {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, + {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, + {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, + {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, + {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, + {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, + {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, + {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, + {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, + {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, + {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, + {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, + {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, + {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, + {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, + {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, + {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, + {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, + {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, + {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, + {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, + {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, + {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, + {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, + {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, + {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, + {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, + {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, + {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, + {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, + {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, + {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, + {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, + {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, + {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, + {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, + {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, #endif {}, };

1 0

[PATCH] Update the flashrom udev rules file with new programmers
by Uwe Hermann 18 Jun '11

18 Jun '11

See patch. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

2 2

[PATCH] Shut up skipped probes
by Carl-Daniel Hailfinger 18 Jun '11

18 Jun '11

Now that the bus matching code has been tested extensively, it does not make sense at all to print skipped probes in verbose mode. They are still visible in spew mode (-VV) if anyone cares, but even there the chip size won't be mentioned. Old verbose output: Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A25L05PT, 64 kB: skipped. Probing for AMIC A25L05PU, 64 kB: skipped. [...] Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff New verbose output: Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff New spew output: Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A25L05PT: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for AMIC A25L05PU: skipped. Host bus type Parallel and chip bus type SPI are incompatible. [...] Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-silence_skip/flashrom.c =================================================================== --- flashrom-silence_skip/flashrom.c (Revision 1338) +++ flashrom-silence_skip/flashrom.c (Arbeitskopie) @@ -1124,26 +1124,27 @@ for (flash = flashchips + startchip; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) continue; - msg_gdbg("Probing for %s %s, %d kB: ", - flash->vendor, flash->name, flash->total_size); - if (!flash->probe && !force) { - msg_gdbg("failed! flashrom has no probe function for " - "this flash chip.\n"); - continue; - } buses_common = buses_supported & flash->bustype; if (!buses_common) { + msg_gspew("Probing for %s %s: skipped. ", + flash->vendor, flash->name); tmp = flashbuses_to_text(buses_supported); - msg_gdbg("skipped."); - msg_gspew(" Host bus type %s ", tmp); + msg_gspew("Host bus type %s ", tmp); free(tmp); tmp = flashbuses_to_text(flash->bustype); msg_gspew("and chip bus type %s are incompatible.", tmp); free(tmp); - msg_gdbg("\n"); + msg_gspew("\n"); continue; } + msg_gdbg("Probing for %s %s, %d kB: ", + flash->vendor, flash->name, flash->total_size); + if (!flash->probe && !force) { + msg_gdbg("failed! flashrom has no probe function for " + "this flash chip.\n"); + continue; + } size = flash->total_size * 1024; check_max_decode(buses_common, size); -- http://www.hailfinger.org/

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