- flashrom - mail.coreboot.org

SOIC8 test clip - cant write to BIOS SPI flash chip
by r_brown100r＠aim.com 17 Oct '15

17 Oct '15

Unfortunately I don't have any soldering tools or experience, so if you could give an advice about ISP programming (In-System-Programming/In-Situ-Programming) , it will be super helpful! I teardown a bricked laptop, removed AC power, laptop's power battery, and even a small CMOS battery, and now I am trying to write a working BIOS image to laptop's SPI flash chip using a SOIC8 test clip. But here is a problem: I could read a dump from this BIOS chip without problems, however it fails when I am trying to write - so the contents of BIOS flash chip are remaining unchanged. Luckily I found out this helpful wiki page - http://flashrom.org/ISP , which describes common problems with this ISP method of flashing, as well as gives 3 hints for solution! Sadly this page is currently down, so here is a screenshot: http://i.imgur.com/SJEYHR2.png 1. - tried to make shorter wires, less than 10cm as they recommend - it did not help 2. - soldering is out of possibility, cant do it, and also: wires are already short and they are good quality (pure copper) 3. - This hint looks more promising, but I need help in understanding this piece of information: "disconnect Vcc from the programmer and power it with its normal PSU" If I understand correctly, by Vcc they mean Vcc pin of the BIOS flash chip. But if I disconnect Vcc from the programmer, what is "normal PSU" which should power this Vcc pin? Should I connect to motherboard a laptop's power battery, or small CMOS battery, or AC adapter of laptop, so that this Vcc pin would be powered by them, or it is forbidden to do it while using SPI programmer in the same time? Or its better to try to power Vcc of flash chip from "USB to TTL" adapter - which has this 3V3 (3.3V) voltage pin? Yours faithfully, Robert Brown

1 0

M25P10-A write success confirmed and verified
by Stefan Tauner 16 Oct '15

16 Oct '15

We got a mail by a reporter who does not want to get his email address published, therefore I will quote his email verbatim below. > Hello, > > I can confirm that I have just successfully flashed an ST 25P10VP flash > chip, in circuit, using a Raspberry Pi, its onboard SPI, a Pomona 5250 SOIC > clip and some female jumper wires. > > I updated the Raspberry Pi B+ with rpi-update to the latest firmware and > kernel, and compiled the code from svn://flashrom.org/flashrom/trunk on the > Raspberry device itself. I just used the -p and -w parameters to make this > work, no other magic. Flashrom reported write success and verified status > on the chip. > > According to Micron documentation, the markings 25P10VP correspond to a > M25P10-A, and flashrom recognizes this type indeed. Since the status for > writing this chip is still a question mark, I thought I should report a > success. > > I encountered zero errors during the use of flashrom, everything worked in > one go. Flashrom allowed me to recover a friend's WD HDD with a burnt-out > PCB. So a big thank you is in order! > > Thank you so much! > > P.S. Could you please keep my e-mail address private? > > Kind regards, > Martijn Schiedon I'll add the respective flag for the M25P10-A. Thanks Martijn for the report! Please include a verbose log file next time. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1897 - trunk
by repository service 16 Oct '15

16 Oct '15

Author: stefanct Date: Fri Oct 16 04:16:20 2015 New Revision: 1897 URL: http://flashrom.org/trac/flashrom/changeset/1897 Log: Add support for 128 bytes write granularity. Some chips such as the ENE KB9012 internal flash require a write granularity of 128 bytes. Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr> Acked-by: Nico Huber <nico.h(a)gmx.de> Modified: trunk/flash.h trunk/flashrom.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun Jul 5 18:53:22 2015 (r1896) +++ trunk/flash.h Fri Oct 16 04:16:20 2015 (r1897) @@ -85,6 +85,7 @@ write_gran_1bit, /* Each bit can be cleared individually. */ write_gran_1byte, /* A byte can be written once. Further writes to an already written byte cause * its contents to be either undefined or to stay unchanged. */ + write_gran_128bytes, /* If less than 128 bytes are written, the unwritten bytes are undefined. */ write_gran_264bytes, /* If less than 264 bytes are written, the unwritten bytes are undefined. */ write_gran_512bytes, /* If less than 512 bytes are written, the unwritten bytes are undefined. */ write_gran_528bytes, /* If less than 528 bytes are written, the unwritten bytes are undefined. */ Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Jul 5 18:53:22 2015 (r1896) +++ trunk/flashrom.c Fri Oct 16 04:16:20 2015 (r1897) @@ -781,6 +781,9 @@ break; } break; + case write_gran_128bytes: + result = need_erase_gran_bytes(have, want, len, 128); + break; case write_gran_256bytes: result = need_erase_gran_bytes(have, want, len, 256); break; @@ -847,6 +850,9 @@ case write_gran_1byte_implicit_erase: stride = 1; break; + case write_gran_128bytes: + stride = 128; + break; case write_gran_256bytes: stride = 256; break;

1 0

Re: [flashrom] Report: Intel DH67CF BLH6710H.86A.0160.2012.1204.1156 read
by Leonardo Villarreal Cortez 15 Oct '15

15 Oct '15

hello, i have an intel board series dh67, i need bios dump. can help me facilitating the file of dump ? thanks -- Atentamente, Leonardo Villarreal.

1 0

flashrom output on HP 425 Notebook
by bleoal＠openmailbox.org 12 Oct '15

12 Oct '15

Hello: My name is Bruno, last few days ago I founded information about the coreboot project. My question is: Why flashrom says it doesn't support my motherboard if my chipset is supported on the coreboot project wiki. Northbridge: AMD Fam10h Support:OK Southbridge: AMD SB7x0/SB8x0/SB9x0 1002:439d Support:OK SuperI/O: SMSC® FDC37B72x Support:OK CPU: AMD Athlon II P340 Dual-Core Here is the output: Flashrom 0.9.5.2-r1517 : $ sudo flashrom -p internal -V flashrom v0.9.5.2-r1517 on Linux 3.2.0-29-generic (x86_64), built with libpci 3.1.8, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 731M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 10009 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "HP 425" DMI string system-version: " " DMI string baseboard-manufacturer: "Hewlett-Packard" DMI string baseboard-product-name: "1475" DMI string baseboard-version: "KBC Version 72.13" DMI string chassis-type: "Notebook" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. lspci -nnvvxxx $ sudo lspci -nnvvxxx 00:00.0 Host bridge [0600]: Advanced Micro Devices [AMD] RS880 Host Bridge [1022:9601] Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: [c4] HyperTransport: Slave or Primary Interface Command: BaseUnitID=0 UnitCnt=12 MastHost- DefDir- DUL- Link Control 0: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 3.00 Link Frequency 0: 1.6GHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC- LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 200MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE- OFlE- PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [54] HyperTransport: UnitID Clumping Capabilities: [40] HyperTransport: Retry Mode Capabilities: [9c] HyperTransport: #1a Capabilities: [f8] HyperTransport: #1c 00: 22 10 01 96 06 00 30 22 00 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 c4 00 00 00 00 00 00 00 00 00 00 00 40: 08 9c 00 c0 c1 00 00 00 0b 00 00 00 42 20 05 00 50: 3c 10 75 14 08 40 00 90 08 10 05 00 08 10 05 00 60: 00 00 00 00 8e 00 00 00 00 02 20 00 0f 80 86 81 70: 00 00 00 00 00 00 00 00 a5 00 01 11 00 00 00 20 80: 00 00 00 00 10 00 04 03 20 c8 00 00 13 26 00 10 90: 00 00 00 80 3d 01 00 00 47 00 00 00 08 f8 7c d0 a0: 26 00 66 00 00 00 00 83 00 00 00 00 79 01 c0 07 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 80 08 54 80 01 20 00 11 00 d0 00 00 00 d0: 60 09 75 1e 02 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 ff ff ff ff 0d 02 00 00 64 40 05 00 f0: 00 00 00 00 01 00 00 00 08 00 00 e0 00 00 00 00 00:01.0 PCI bridge [0604]: Hewlett-Packard Company Device [103c:9602] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 00005000-00005fff Memory behind bridge: 94200000-943fffff Prefetchable memory behind bridge: 0000000080000000-000000008fffffff Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [44] HyperTransport: MSI Mapping Enable+ Fixed+ Capabilities: [b0] Subsystem: Hewlett-Packard Company Device [103c:1475] Kernel modules: shpchp 00: 3c 10 02 96 07 00 30 02 00 00 04 06 00 40 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 51 51 20 02 20: 20 94 30 94 01 80 f1 8f 00 00 00 00 00 00 00 00 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 08 00 40: 00 00 00 00 08 b0 03 a8 00 00 00 00 3c 10 75 14 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 0d 00 00 00 3c 10 75 14 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:04.0 PCI bridge [0604]: Advanced Micro Devices [AMD] RS780/RS880 PCI to PCI bridge (PCIE port 0) [1022:9604] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 00003000-00004fff Memory behind bridge: 93200000-941fffff Prefetchable memory behind bridge: 0000000090000000-00000000910fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep+ BwNot+ LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- Slot #4, PowerLimit 0.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4159 Capabilities: [b0] Subsystem: Hewlett-Packard Company Device [103c:1475] Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+ Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Capabilities: [110 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- Kernel driver in use: pcieport Kernel modules: shpchp 00: 22 10 04 96 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 31 41 00 00 20: 20 93 10 94 01 90 01 91 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 03 c8 00 00 00 00 10 a0 42 01 20 80 00 00 60: 10 08 00 00 12 0c 30 01 43 00 11 78 00 00 24 00 70: 00 00 48 01 00 00 01 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 05 b0 01 00 0c 30 e0 fe 59 41 00 00 00 00 00 00 b0: 0d b8 00 00 3c 10 75 14 08 00 03 a8 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 ff ff ff ff 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:07.0 PCI bridge [0604]: Advanced Micro Devices [AMD] RS780 PCI to PCI bridge (PCIE port 3) [1022:9607] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=05, sec-latency=0 I/O behind bridge: 00002000-00002fff Memory behind bridge: 92200000-931fffff Prefetchable memory behind bridge: 0000000091100000-00000000920fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #247, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep+ BwNot+ LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #7, PowerLimit 0.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4161 Capabilities: [b0] Subsystem: Hewlett-Packard Company Device [103c:1475] Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+ Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Capabilities: [110 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- Kernel driver in use: pcieport Kernel modules: shpchp 00: 22 10 07 96 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 05 00 21 21 00 00 20: 20 92 10 93 11 91 01 92 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 03 c8 00 00 00 00 10 a0 42 01 20 80 00 00 60: 10 08 00 00 12 0c 30 f7 00 00 00 11 60 00 3c 00 70: 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 05 b0 01 00 0c 30 e0 fe 61 41 00 00 00 00 00 00 b0: 0d b8 00 00 3c 10 75 14 08 00 03 a8 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 ff ff ff ff 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:09.0 PCI bridge [0604]: Advanced Micro Devices [AMD] RS780/RS880 PCI to PCI bridge (PCIE port 4) [1022:9608] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=06, subordinate=06, sec-latency=0 Memory behind bridge: 92100000-921fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep+ BwNot+ LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- Slot #9, PowerLimit 0.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4169 Capabilities: [b0] Subsystem: Hewlett-Packard Company Device [103c:1475] Capabilities: [b8] HyperTransport: MSI Mapping Enable+ Fixed+ Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Capabilities: [110 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- Kernel driver in use: pcieport Kernel modules: shpchp 00: 22 10 08 96 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 06 06 00 f1 01 00 20 20: 10 92 10 92 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 03 c8 00 00 00 00 10 a0 42 01 20 80 00 00 60: 10 08 00 00 12 0c 30 00 42 00 11 70 00 00 4c 00 70: 00 00 48 01 00 00 01 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 05 b0 01 00 0c 30 e0 fe 69 41 00 00 00 00 00 00 b0: 0d b8 00 00 3c 10 75 14 08 00 03 a8 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 ff ff ff ff 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:11.0 SATA controller [0106]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 SATA Controller [AHCI mode] [1002:4391] (prog-if 01 [AHCI 1.0]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 19 Region 0: I/O ports at 6018 [size=8] Region 1: I/O ports at 6024 [size=4] Region 2: I/O ports at 6010 [size=8] Region 3: I/O ports at 6020 [size=4] Region 4: I/O ports at 6000 [size=16] Region 5: Memory at 9440b000 (32-bit, non-prefetchable) [size=1K] Capabilities: [70] SATA HBA v1.0 InCfgSpace Capabilities: [a4] PCI Advanced Features AFCap: TP+ FLR+ AFCtrl: FLR- AFStatus: TP- Kernel driver in use: ahci 00: 02 10 91 43 07 00 30 02 00 01 06 01 10 40 00 00 10: 19 60 00 00 25 60 00 00 11 60 00 00 21 60 00 00 20: 01 60 00 00 00 b0 40 94 00 00 00 00 3c 10 75 14 30: 00 00 00 00 70 00 00 00 00 00 00 00 0a 01 00 00 40: 14 80 bc 00 01 00 20 00 00 00 80 00 00 00 00 00 50: 05 70 86 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 50 22 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 12 a4 10 00 0f 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 06 14 14 00 ab 01 08 00 f0 00 00 00 90: 27 60 74 c7 00 43 06 00 00 01 00 00 01 58 b1 02 a0: 0c 00 00 00 13 00 06 03 00 00 64 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 20 00 00 e0: 80 00 00 00 00 00 00 00 00 00 00 00 10 00 00 3f f0: 00 00 00 00 00 00 00 00 77 77 77 00 00 00 00 00 00:12.0 USB controller [0c03]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] (prog-if 10 [OHCI]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 18 Region 0: Memory at 9440a000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 97 43 13 00 a0 02 00 10 03 0c 10 40 80 00 10: 00 a0 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 40: 80 01 00 00 11 00 00 00 00 00 00 00 00 00 00 00 50: 40 00 00 f0 00 00 00 00 ff ff ff ff 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 ff 00 00 80 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:12.2 USB controller [0c03]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] (prog-if 20 [EHCI]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 17 Region 0: Memory at 94409000 (32-bit, non-prefetchable) [size=256] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Bridge: PM- B3+ Capabilities: [e4] Debug port: BAR=1 offset=00e0 Kernel driver in use: ehci_hcd 00: 02 10 96 43 17 00 b0 02 00 20 03 0c 10 40 00 00 10: 00 90 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 c0 00 00 00 00 00 00 00 05 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 40 21 80 a0 01 00 00 00 00 00 00 00 00 00 00 00 60: 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 20 00 00 01 00 00 00 00 00 00 00 00 a0: 01 00 00 00 00 00 08 c0 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 e4 02 7e 00 00 40 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 0a 00 e0 20 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:13.0 USB controller [0c03]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] (prog-if 10 [OHCI]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 18 Region 0: Memory at 94408000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 97 43 13 00 a0 02 00 10 03 0c 10 40 80 00 10: 00 80 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 40: 80 01 14 00 11 00 00 00 00 00 00 00 00 00 00 00 50: 40 00 00 f0 00 00 00 00 ff ff ff ff 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 ff 00 00 80 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:13.2 USB controller [0c03]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] (prog-if 20 [EHCI]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 17 Region 0: Memory at 94407000 (32-bit, non-prefetchable) [size=256] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D3 NoSoftRst- PME-Enable+ DSel=0 DScale=0 PME- Bridge: PM- B3+ Capabilities: [e4] Debug port: BAR=1 offset=00e0 Kernel driver in use: ehci_hcd 00: 02 10 96 43 13 00 b0 02 00 20 03 0c 10 40 00 00 10: 00 70 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 c0 00 00 00 00 00 00 00 05 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 40 21 80 a0 01 00 00 00 00 00 00 00 00 00 00 00 60: 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 20 00 00 01 00 00 00 00 00 00 00 00 a0: 01 00 00 00 00 00 08 c0 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 e4 02 7e 03 01 40 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 0a 00 e0 20 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.0 SMBus [0c05]: Advanced Micro Devices [AMD] nee ATI SBx00 SMBus Controller [1002:4385] (rev 42) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Kernel modules: sp5100_tco, i2c-piix4 00: 02 10 85 43 03 04 20 02 42 00 05 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.2 Audio device [0403]: Advanced Micro Devices [AMD] nee ATI SBx00 Azalia (Intel HDA) [1002:4383] (rev 40) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at 94400000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: snd_hda_intel Kernel modules: snd-hda-intel 00: 02 10 83 43 06 00 10 04 40 00 03 04 08 40 00 00 10: 04 00 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 50 00 00 00 00 00 00 00 07 01 00 00 40: 00 00 02 00 01 10 00 00 00 00 00 00 01 00 00 00 50: 01 00 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.3 ISA bridge [0601]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 LPC host controller [1002:439d] (rev 40) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: 02 10 9d 43 0f 00 20 02 40 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 04 00 00 00 41 ff 03 ff 07 ff 20 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 90 0e 00 fe 00 00 0f 00 b8 ff ff ff 70: 67 45 23 00 01 00 00 00 1c 00 00 00 05 0a 00 00 80: 08 00 03 a8 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 01 10 d6 fe a0: 02 00 c1 fe 2f 01 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 09 39 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.4 PCI bridge [0604]: Advanced Micro Devices [AMD] nee ATI SBx00 PCI to PCI Bridge [1002:4384] (rev 40) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 Bus: primary=00, secondary=07, subordinate=07, sec-latency=64 I/O behind bridge: 00001000-00001fff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- 00: 02 10 84 43 07 00 a0 02 40 01 04 06 00 40 81 00 10: 00 00 00 00 00 00 00 00 00 07 07 40 10 10 80 22 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 26 00 3c ff 00 00 00 00 0c 0f 3d d1 00 00 00 00 50: 01 00 00 00 08 00 03 a8 00 00 00 00 85 00 ff ff 60: ca 0e 17 00 ba 98 10 02 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 06 e0: 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.5 USB controller [0c03]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 USB OHCI2 Controller [1002:4399] (prog-if 10 [OHCI]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64, Cache Line Size: 64 bytes Interrupt: pin C routed to IRQ 18 Region 0: Memory at 94406000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 99 43 17 00 a0 02 00 10 03 0c 10 40 00 00 10: 00 60 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 03 00 00 40: 80 01 03 00 11 00 00 00 00 00 00 00 00 00 00 00 50: 40 00 00 f0 00 00 00 00 ff ff ff ff 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 ff 00 00 80 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:16.0 USB controller [0c03]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] (prog-if 10 [OHCI]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at 94405000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 97 43 17 00 a0 02 00 10 03 0c 10 40 80 00 10: 00 50 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 40: 80 01 0f 00 11 00 00 00 00 00 00 00 00 00 00 00 50: 40 00 00 f0 00 00 00 00 ff ff ff ff 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 ff 00 00 80 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:16.2 USB controller [0c03]: Advanced Micro Devices [AMD] nee ATI SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] (prog-if 20 [EHCI]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 17 Region 0: Memory at 94404000 (32-bit, non-prefetchable) [size=256] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D3 NoSoftRst- PME-Enable+ DSel=0 DScale=0 PME- Bridge: PM- B3+ Capabilities: [e4] Debug port: BAR=1 offset=00e0 Kernel driver in use: ehci_hcd 00: 02 10 96 43 13 00 b0 02 00 20 03 0c 10 40 00 00 10: 00 40 40 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 c0 00 00 00 00 00 00 00 05 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 40 21 80 a0 01 00 00 00 00 00 00 00 00 00 00 00 60: 20 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 20 00 00 01 00 00 00 00 00 00 00 00 a0: 01 00 00 00 00 00 00 c0 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 e4 02 7e 03 01 40 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 0a 00 e0 20 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.0 Host bridge [0600]: Advanced Micro Devices [AMD] Family 10h Processor HyperTransport Configuration [1022:1200] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Capabilities: [80] HyperTransport: Host or Secondary Interface Command: WarmRst+ DblEnd- DevNum=0 ChainSide- HostHide+ Slave- <EOCErr- DUL- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b+ Link Config: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 3.00 Link Frequency: 1.6GHz Link Error: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz+ 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA+ UIDRD- ExtRS- UCnfE- 00: 22 10 00 12 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: 01 02 04 00 01 02 04 00 01 02 04 00 01 02 04 00 50: 01 02 04 00 01 02 04 00 01 02 04 00 01 02 04 00 60: 00 00 01 00 e0 00 00 00 20 a8 2e 01 10 fe 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 08 00 01 21 20 a0 11 00 60 09 f5 83 13 00 00 00 90: d0 02 85 80 00 00 00 00 07 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.1 Host bridge [0600]: Advanced Micro Devices [AMD] Family 10h Processor Address Map [1022:1201] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: 22 10 01 12 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 03 00 00 00 00 00 7f 00 00 00 00 00 01 00 00 00 50: 00 00 00 00 02 00 00 00 00 00 00 00 03 00 00 00 60: 00 00 00 00 04 00 00 00 00 00 00 00 05 00 00 00 70: 00 00 00 00 06 00 00 00 00 00 00 00 07 00 00 00 80: 03 00 80 00 80 ff 8f 00 03 00 90 00 00 1f 94 00 90: 03 20 94 00 80 3f 94 00 03 40 94 00 00 ff df 00 a0: 03 00 e0 00 80 ff e0 00 03 00 e1 00 00 bf fe 00 b0: 03 c0 fe 00 80 fe ff 00 03 ff ff 00 00 ff ff 00 c0: 13 00 00 00 00 f0 ff 00 00 00 00 00 16 82 00 00 d0: 00 00 00 00 0a 30 f0 00 00 00 00 00 18 10 60 00 e0: 03 00 00 1f 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00:18.2 Host bridge [0600]: Advanced Micro Devices [AMD] Family 10h Processor DRAM Controller [1022:1202] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Kernel modules: amd64_edac_mod 00: 22 10 02 12 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 04 00 00 0b 00 00 00 00 80: 00 00 00 00 04 00 00 00 00 00 00 ff 00 00 00 00 90: 00 00 01 08 00 41 08 00 0a 00 00 80 e7 88 71 0e a0: 00 02 00 00 00 00 00 00 00 00 01 00 00 00 00 00 b0: 29 62 51 8c 7f 00 00 00 1c 08 3e 04 40 01 e8 1f c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 78 3c 00 f0 01 30 03 01 f9 19 18 0e e7 11 18 20 e0: 44 c2 1d 0e 2f eb 30 00 14 2c 30 1e 00 90 87 c1 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.3 Host bridge [0600]: Advanced Micro Devices [AMD] Family 10h Processor Miscellaneous Control [1022:1203] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Capabilities: [f0] Secure device <?> Kernel driver in use: k10temp Kernel modules: k10temp 00: 22 10 03 12 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 40: ff ff ff 3f 58 00 b0 4a 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 05 00 60 1a 00 00 00 10 51 80 01 60 70: 51 11 32 60 01 01 98 00 14 0c 20 00 11 08 07 00 80: 81 f6 0b e6 e6 41 e6 01 08 00 00 00 00 60 58 02 90: 00 00 00 00 80 00 00 00 90 0f 88 70 00 00 00 00 a0: b9 0a 0d b0 ef 0f 88 2b 28 07 04 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 24 0f 81 c8 14 0b 39 03 43 52 27 70 e0: 00 00 00 00 30 06 40 01 61 5f 07 00 00 00 00 00 f0: 0f 00 10 00 00 00 00 00 00 00 00 00 63 0f 10 00 00:18.4 Host bridge [0600]: Advanced Micro Devices [AMD] Family 10h Processor Link Control [1022:1204] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: 22 10 04 12 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:05.0 VGA compatible controller [0300]: Advanced Micro Devices [AMD] nee ATI RS880M [Mobility Radeon HD 4200 Series] [1002:9712] (prog-if 00 [VGA controller]) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at 80000000 (32-bit, prefetchable) [size=256M] Region 1: I/O ports at 5000 [size=256] Region 2: Memory at 94300000 (32-bit, non-prefetchable) [size=64K] Region 5: Memory at 94200000 (32-bit, non-prefetchable) [size=1M] Expansion ROM at <unassigned> [disabled] Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Kernel driver in use: fglrx_pci Kernel modules: fglrx, radeon 00: 02 10 12 97 07 00 10 00 00 00 00 03 10 00 80 00 10: 08 00 00 80 01 50 00 00 00 00 30 94 00 00 00 00 20: 00 00 00 00 00 00 20 94 00 00 00 00 3c 10 75 14 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 50: 01 a0 03 06 00 00 00 00 10 a0 12 00 a0 8f 00 00 60: 10 08 0a 00 01 0d 00 00 00 00 01 11 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 01 00 01 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:05.1 Audio device [0403]: Advanced Micro Devices [AMD] nee ATI RS880 HDMI Audio [Radeon HD 4200 Series] [1002:970f] Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 19 Region 0: Memory at 94310000 (32-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Kernel driver in use: snd_hda_intel Kernel modules: snd-hda-intel 00: 02 10 0f 97 07 00 10 00 00 00 03 04 10 00 80 00 10: 00 00 31 94 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 75 14 50: 01 a0 03 06 00 00 00 00 10 a0 12 00 a0 8f 00 00 60: 10 08 0a 00 01 0d 00 00 00 00 01 11 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8101E/RTL8102E PCI Express Fast Ethernet controller [10ec:8136] (rev 02) Subsystem: Hewlett-Packard Company Device [103c:1475] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 43 Region 0: I/O ports at 3000 [size=256] Region 2: Memory at 90010000 (64-bit, prefetchable) [size=4K] Region 4: Memory at 90000000 (64-bit, prefetchable) [size=64K] Expansion ROM at 90020000 [disabled] [size=128K] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0300c Data: 4171 Capabilities: [70] Express (v2) Endpoint, MSI 01 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 4096 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us ClockPM+ Surprise- LLActRep- BwNot- LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- DevCap2: Completion Timeout: Not Supported, TimeoutDis+ DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [ac] MSI-X: Enable- Count=2 Masked- Vector table: BAR=4 offset=00000000 PBA: BAR=4 offset=00000800 Capabilities: [cc] Vital Product Data Unknown small resource type 00, will not decode more. Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr+ BadTLP+ BadDLLP- Rollover- Timeout- NonFatalErr+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [140 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- Capabilities: [160 v1] Device Serial Number 01-00-00-00-ff-ff-00-00 Kernel driver in use: r8169 Kernel modules: r8169 00: ec 10 36 81 07 04 10 00 02 00 00 02 10 00 00 00 10: 01 30 00 00 00 00 00 00 0c 00 01 90 00 00 00 00 20: 0c 00 00 90 00 00 00 00 00 00 00 00 3c 10 75 14 30: 00 00 fe ff 40 00 00 00 00 00 00 00 07 01 00 00 40: 01 50 c3 ff 08 00 00 00 00 00 00 00 00 00 00 00 50: 05 70 81 00 0c 30 e0 fe 00 00 00 00 71 41 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 ac 02 02 c1 8c 00 00 10 50 19 00 11 3c 07 00 80: 43 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 11 cc 01 00 b0: 04 00 00 00 04 08 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 80 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 06:00.0 Network controller [0280]: Broadcom Corporation BCM4313 802.11b/g/n Wireless LAN Controller [14e4:4727] (rev 01) Subsystem: Hewlett-Packard Company Device [103c:1483] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at 92100000 (64-bit, non-prefetchable) [size=16K] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=2 PME- Capabilities: [58] Vendor Specific Information: Len=78 <?> Capabilities: [48] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Capabilities: [d0] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <4us, L1 <64us ClockPM+ Surprise- LLActRep+ BwNot- LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [13c v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- Capabilities: [160 v1] Device Serial Number 00-00-af-ff-ff-0d-cc-52 Capabilities: [16c v1] Power Budgeting <?> Kernel driver in use: wl Kernel modules: wl, bcma, brcmsmac 00: e4 14 27 47 06 00 10 00 01 00 80 02 10 00 00 00 10: 04 00 10 92 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 83 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 05 01 00 00 40: 01 58 03 06 08 40 00 00 05 d0 80 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 09 48 78 00 11 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 10 00 18 00 00 00 00 80 00 00 00 03 00 00 00 90: 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 03 00 00 10 10 18 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 10 00 01 00 a0 8f 00 00 00 00 10 00 11 6c 17 00 e0: 42 00 11 30 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Superiotool output: $ sudo superiotool -deV superiotool r6637 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x0400, id=0x014c Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0x4c01, rev=0x0 Probing for ITE Super I/O (init=it8502e) at 0x2e... Failed. Returned data: id=0x4c01, rev=0x0 Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0x4c01, rev=0x0 Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0x4c01, rev=0x0 Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x4c01, rev=0x0 Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x164e... Failed. Returned data: port=0xff, port+1=0xff Probing for Nuvoton Super I/O at 0x164e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x2e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x4e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Found SMSC FDC37B72x (id=0x4c, rev=0x01) at 0x2e Register dump: idx 03 20 21 22 23 24 26 27 28 2b 2c 2d 2e 2f val 00 4c 01 00 00 04 2e 00 00 00 00 00 00 00 def 03 4c 00 00 00 04 MM MM 00 NA NA NA NA NA LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 00 00 00 00 00 00 00 00 00 00 def 00 03 f0 06 02 0e 00 ff 00 00 LDN 0x03 (Parallel port) idx 30 60 61 70 74 f0 f1 val 00 00 00 00 00 00 00 def 00 00 00 00 04 3c 00 LDN 0x04 (COM1) idx 30 60 61 70 f0 val 00 00 00 00 00 def 00 00 00 00 00 LDN 0x05 (COM2) idx 30 60 61 70 f0 f1 f2 val 00 00 00 00 00 00 00 def NA 00 00 00 00 02 03 LDN 0x07 (Keyboard) idx 30 70 72 f0 val 01 01 0c 00 def 00 00 00 00 LDN 0x08 (Aux I/O) idx 30 b0 b1 b2 b3 b8 c0 c1 c2 c3 c4 c5 c6 c8 ca cb cc d0 d1 d2 d3 d4 d5 d6 d7 e0 e1 e2 e3 e4 e5 e6 e7 ef f0 f1 f2 f3 f4 f6 f9 fa val 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 def 00 NA NA NA NA NA 00 01 NA NA NA 00 NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 00 00 00 MM NA NA NA LDN 0x0a (ACPI) idx 30 60 61 70 f0 val 00 00 00 00 00 def 00 00 00 NA NA No extra registers known for this chip. Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found. Probing for Server Engines Super I/O at 0x2e... Failed. Returned data: id=0xffff, rev=0xff

2 1

Re: [flashrom] Flashrom failed on Acer C720P, using Fedora 23
by Jonathan Alfonso 12 Oct '15

12 Oct '15

1 0

Flashrom failed on Acer C720P, using Fedora 23
by Jonathan Alfonso 12 Oct '15

12 Oct '15

Hi, I have this output... http://paste.flashrom.org/view.php?id=2803 I can't reboot right now, so I'm looking for a fix... I don't know what to do though. Help is definitely appreciated...

1 0

Re: [flashrom] trouble flashing EN25S64 on Lenovo N21 chromebook
by Kyle Stanevich 08 Oct '15

08 Oct '15

Hi, This is just a follow up email. I was wondering what the status is of support for the EN25S64 bios chip. I have tried to flash it many times and it always fails. See my message below for more details. I would like to help out with any testing for this chip, however if I don't hear back from you soon, I will probably be returning the laptop I have which contains the EN25S64 chip. Thanks, Kyle Stanevich On Oct 4, 2015 6:22 PM, "Kyle Stanevich" <kstanevich(a)imsa.edu> wrote: > Hi, > > I am still having trouble flashing the EN25S64 chip on my Lenovo N21 > chromebook. I have connected a raspberry pi to the EN25S64 on the Lenovo > N21 motherboard chip via this clip ( > http://www.amazon.com/Qunqi-Soic8-Flash-Clips-Programmer/dp/B014IXR9RG). > On the raspberry pi (which is running raspbian) I run the command "sudo > ./flashrom -VVV -p linux_spi:dev=/dev/spidev0.0 -w ~/Downloads/bios.bin". I > have removed the write protect screw, but I don't think that matters > because I am connecting to the chip directly. > > I have tried to compile google's (chromiumos') version of flashrom, but I > could not get it to compile due to many errors. Therefore, I am using the > latest version of flashrom which compiles fine. > > It seams to me that the problem is there is something not working > correctly writing/erasing/reading to the chip. Erase functions 1 through 3 > all fail when using the command shown above. It hangs up on erase function > 2 for a very long time. I had to run it overnight until erase function 2 > failed. I have tried running the same command again, and it is currently > still stuck at "Trying erase function 2... 0x000000-0x7fffff:E". It has > been stuck at this line for 16 hours, with the raspberry pi at 100% cpu > usage the entire time. > > The line "This flash part has status UNTESTED for operations: PROBE READ > ERASE WRITE" indicates to me that this chip has not yet been tested. I > would like to help out with testing for this chip since I have one and have > the hardware required to flash it. What can I do to help out? > > Thanks, > Kyle Stanevich > > > > On Sat, Oct 3, 2015 at 3:56 PM, Stefan Tauner < > stefan.tauner(a)alumni.tuwien.ac.at> wrote: > >> On Sat, 3 Oct 2015 10:13:36 -0700 >> Kyle Stanevich <kstanevich(a)imsa.edu> wrote: >> >> > Hi, >> > >> > I have attached all the output from my command line. Hopefully it will >> > be useful for you. >> > >> > Do you think that I will ever have a chance to flash this chip, or >> > should I go and buy another laptop? >> >> Hi, >> >> first of all you should not reboot before fixing the issue. >> If you made a backup first, you should try to write that instead. >> If that works you are at least safe... >> >> I am not familiar with the N21 but you probably have to disable a write >> protection. Also, chromebooks work best with google's (chromiumos') >> version of flashrom. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> > >

1 0

Re: [flashrom] MX25L25635E / 4 byte addressing
by Michaël Zweers 05 Oct '15

05 Oct '15

Hello, I have used the same patch set on trunk to flash W25Q256 (WSON version). I still need to build a system to check what was actually written. (I'll try to flash Openwrt to the chip and run in on a MT7620 with modded U-boot). If there is anything I can do to move this along, please let me know. Kind regards, Michaël Zweers On 21-9-2015 14:59, Peter Martini wrote: > On Tue, Sep 15, 2015 at 3:12 AM, Stefan Tauner > <stefan.tauner(a)alumni.tuwien.ac.at > <mailto:stefan.tauner@alumni.tuwien.ac.at>> wrote: > > On Tue, 15 Sep 2015 02:26:39 -0400 > Peter Martini <petercmartini(a)gmail.com > <mailto:petercmartini@gmail.com>> wrote: > > > Hello, > > > > I've checked out master from the flashrom svn repo, compiled, and was able > > to see my chip (MX25L25635E). The id wasn't recognized, but after a quick > > patch to copy a MX25L128... to ..L256.., I got it to successfully read the > > first 16MB of the chip - however, I can't get any further than that, > > because changing the values in the table to the right values moves me from > > 3 byte addressing to 4 byte addressing territory (if I understand this > > correctly), and it looks like there aren't any patches merged for that yet. > > > > Is there a patch set actively in the works? > > Nope, there isn't, at least nothing that I know about or that will hit > vanilla flashrom soon. > > -- > Kind regards/Mit freundlichen Grüßen, Stefan Tauner > > > Thanks for the quick reply. I did some digging, and found a patch set > from January, resurrected and forward ported to the current tip of > flashrom on github.com/petermartini/flashrom > <http://github.com/petermartini/flashrom>, and confirmed it worked well > enough that it worked on my chipset. > > This was Boris' work, and I guess it was incomplete / petered out before > being committed; does it ring any bells? > > It seems the thread petered out around > http://www.flashrom.org/pipermail/flashrom/2015-January/013168.html. > > I'm happy to help, if I can, get that patch set merged in if there's > work to be done on it so I can upstream my chipset's specs. > > Thanks! > Peter > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom >

1 0

Re: [flashrom] trouble flashing EN25S64 on Lenovo N21 chromebook
by Stefan Tauner 05 Oct '15

05 Oct '15

On Sat, 3 Oct 2015 10:13:36 -0700 Kyle Stanevich <kstanevich(a)imsa.edu> wrote: > Hi, > > I have attached all the output from my command line. Hopefully it will > be useful for you. > > Do you think that I will ever have a chance to flash this chip, or > should I go and buy another laptop? Hi, first of all you should not reboot before fixing the issue. If you made a backup first, you should try to write that instead. If that works you are at least safe... I am not familiar with the N21 but you probably have to disable a write protection. Also, chromebooks work best with google's (chromiumos') version of flashrom. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

[PATCH] ft2232: Hack to delay SPI command after CS# assertion
by Nico Huber 04 Oct '15

04 Oct '15

Here's a tiny hack that I use to externally flash my X200s with an FT2232H. It delays the SPI command by repeating the CS# assertion command many times. Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- ft2232_spi.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/ft2232_spi.c b/ft2232_spi.c index 08742ec..a85925c 100644 --- a/ft2232_spi.c +++ b/ft2232_spi.c @@ -419,15 +419,16 @@ static int ft2232_spi_send_command(struct flashctx *flash, struct ftdi_context *ftdic = &ftdic_context; static unsigned char *buf = NULL; /* failed is special. We use bitwise ops, but it is essentially bool. */ - int i = 0, ret = 0, failed = 0; + int i = 0, j, ret = 0, failed = 0; int bufsize; static int oldbufsize = 0; + const int extra_assert_time = 288; if (writecnt > 65536 || readcnt > 65536) return SPI_INVALID_LENGTH; /* buf is not used for the response from the chip. */ - bufsize = max(writecnt + 9, 260 + 9); + bufsize = max(writecnt, 260) + 9 + extra_assert_time * 3; /* Never shrink. realloc() calls are expensive. */ if (bufsize > oldbufsize) { buf = realloc(buf, bufsize); @@ -446,9 +447,11 @@ static int ft2232_spi_send_command(struct flashctx *flash, * operations. */ msg_pspew("Assert CS#\n"); - buf[i++] = SET_BITS_LOW; - buf[i++] = 0 & ~cs_bits; /* assertive */ - buf[i++] = pindir; + for (j = 0; j <= extra_assert_time; ++j) { + buf[i++] = SET_BITS_LOW; + buf[i++] = 0 & ~cs_bits; /* assertive */ + buf[i++] = pindir; + } if (writecnt) { buf[i++] = MPSSE_DO_WRITE | MPSSE_WRITE_NEG; -- 2.4.6

1 0

trouble flashing EN25S64 on Lenovo N21 chromebook
by Kyle Stanevich 03 Oct '15

03 Oct '15

Hi, I have attached all the output from my command line. Hopefully it will be useful for you. Do you think that I will ever have a chance to flash this chip, or should I go and buy another laptop? Thanks, Kyle Stanevich

1 0

A bunch of old parallel chips
by Xavier Bourgeois 30 Sep '15

30 Sep '15

I noticed a few chips that were not listed for all operations on the flashrom supported hardware webpage: - ASD AE29F2008, fake Winbond W29C020C found on a PCChips motherboard full of fake/remarkered chips, it looks like it was reported previously on the list, [0], [1], - AMIC A29002T, [2], - AMD Am27C010, not correctly detected, probe forced for Am29F010A/B (same signals/timings for reading). Electrical erase is impossible (UV-Light needed), programmation wasn't tried (this motherboard doesn't supply the 12.5V needed for Vpp), [3], - Macronix MX29F002T, [4], - SST SST29EE10, [5], Some chips (A29002T, MX29F002T) are already marked as OK on the supported hardware page, but were probably not already tested in the flashrom release I'm using. I also have a Winbond W29EE11 which wasn't detected by flashrom and seems pretty old and rare (I didn't manage to find the datasheet so I assumed the voltages and the pinout were the same...). From the bios sticker, it looks like it was from a socket 7 motherboard from the years 96~97. All these chips were tested on a MSI MS6147 Motherboard (Intel PIIX4 BX chipset with a 32-pin DIL socket), using flashrom v0.9.2-r1141 (Debian Squeeze). Thanks, [0]: http://www.flashrom.org/pipermail/flashrom/2009-August/000423.html [1]: http://monorailc.at/tmp/29F2008.tar.gz [2]: http://monorailc.at/tmp/a29002T.tar.gz [3]: http://monorailc.at/tmp/am27C10.tar.gz [4]: http://monorailc.at/tmp/mx29F002T.tar.gz [5]: http://monorailc.at/tmp/sst29EE10.tar.gz -- Xavier Bourgeois

1 0

Re: [flashrom] CH341 patch request
by Stefan Tauner 30 Sep '15

30 Sep '15

On Wed, 23 Sep 2015 17:24:01 +0200 Ádám Attila Nagy <osiixy(a)gmail.com> wrote: > Hi, > just to avoid oblivion I send this mail as you have asked. > Thanks Hi Ádám, sorry that it took me so long... I have pushed my current patch set for the CH341A to my github repo: https://github.com/stefanct/flashrom/tree/ch341a I have forgotten what does not work yet, and the code itself is definitely not in good shape yet either but feel free to hack away on it :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

SST39VF040 on 3COM 3C905C:
by Xavier Bourgeois 30 Sep '15

30 Sep '15

The SST39VF040 is listed as untested on the flashrom supported hardware page. I tried it on a 3Com 3C905C (which limits to 128kbytes). All operations (probe, read, erase and write were done successfully for the first 128kbytes) [0]. I attached the NIC's bootrom [1], which was resized from 64kbytes to 512kbytes in order to be flashed. I also attached the same image which has been read after the flash. All the first 128kbytes are identical, and the data repeats until the end of the file. The network card is also able to boot from this eeprom. Thanks, [0]: http://monorailc.at/tmp/3c905c.tar.gz [1]: http://monorailc.at/tmp/3c905c_dump.tar.gz -- Xavier Bourgeois

2 1

Supported flash chips: AT45DB321D tested Probe, Read, Erase, Write successfully
by Igor Kubinski 30 Sep '15

30 Sep '15

2 1

Issue Inquiry
by Jingfu Ju 28 Sep '15

28 Sep '15

Hi, There, I failed to update BIOS with commandflashrom -w -p internal xxx.bin and uploaded flashrom -v message for your reference. Please help me take a look. Thanks. Best Regards,Jingfu

1 0

CH341 patch request
by Ádám Attila Nagy 23 Sep '15

23 Sep '15

Hi, just to avoid oblivion I send this mail as you have asked. Thanks -- Nagy, Ádám Attila

1 0

Re: [flashrom] MX25L25635E / 4 byte addressing
by Stefan Tauner 21 Sep '15

21 Sep '15

On Tue, 15 Sep 2015 02:26:39 -0400 Peter Martini <petercmartini(a)gmail.com> wrote: > Hello, > > I've checked out master from the flashrom svn repo, compiled, and was able > to see my chip (MX25L25635E). The id wasn't recognized, but after a quick > patch to copy a MX25L128... to ..L256.., I got it to successfully read the > first 16MB of the chip - however, I can't get any further than that, > because changing the values in the table to the right values moves me from > 3 byte addressing to 4 byte addressing territory (if I understand this > correctly), and it looks like there aren't any patches merged for that yet. > > Is there a patch set actively in the works? Nope, there isn't, at least nothing that I know about or that will hit vanilla flashrom soon. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

sending my verbose log as requested...
by Matthew D. Frederes 18 Sep '15

18 Sep '15

[root@localhost ~]# flashrom -r current.bios -V flashrom v0.9.5.2-r1530 on Linux 2.6.32-573.el6.x86_64 (x86_64), built with libpci 3.1.4, GCC 4.4.6 20110731 (Red Hat 4.4.6-3), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2496M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1009 us, 10000 myus = 10006 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: "Intel Corporation" DMI string baseboard-product-name: "DP35DP" DMI string baseboard-version: "AAD81073-209" DMI string chassis-type: "Desktop" Found chipset "Intel ICH9R" with PCI ID 8086:2916. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0xa WARNING: Setting 0xdc from 0xa to 0xb on ICH9R failed. New value is 0xa. Root Complex Register Block address = 0xfed1c000 GCS = 0x1464: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done 0x06: 0x2f00 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=47, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x00000a0b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b 0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x00ff0035 FREG1: BIOS region (0x00035000-0x000fffff) is read-write. 0x5C: 0x00340003 FREG2: WARNING: Management Engine region (0x00003000-0x00034fff) is locked. 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled. You can enforce write support with the ich_spi_force programmer option, but it will most likely harm your hardware! If you force flashrom you will get no support if something breaks. 0x90: 0x00 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0x004200 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=0 0x94: 0x0006 (PREOP) 0x96: 0x0008 (OPTYPE) 0x98: 0x0000ab9f (OPMENU) 0x9C: 0x00000000 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00002009 (LVSCC) LVSCC: BES=0x1, WG=0, WSR=1, WEWS=0, EO=0x20, VCL=0 0xC8: 0x00002009 (UVSCC) UVSCC: BES=0x1, WG=0, WSR=1, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Enabling hardware sequencing because some important opcode is locked. SPI Read Configuration: prefetching enabled, caching enabled, PROBLEMS, continuing anyway The following protocols are supported: FWH, Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found 1 attached SPI flash chip with a density of 1024 kB. There is only one partition containing the whole address space (0x000000 - 0x0fffff). There are 256 erase blocks with 4096 B each. Found Programmer flash chip "Opaque flash chip" (1024 kB, Programmer-specific) at physical address 0x0. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x67, id2 0x21, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x67, id2 0x21, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x67, id2 0x21, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x38, id2 0x85, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x67, id2 0x21, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x67, id2 0x21, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x1a, id2 0x9e, id1 is normal flash content, id2 is normal flash content Found Programmer flash chip "Opaque flash chip" (1024 kB, Programmer-specific). Reading flash... Reading 1048576 bytes starting at 0x000000. Transaction error between offset 0x00003000 and 0x0000303f (= 0x00003000 + 63)! HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 Read operation failed! FAILED. Restoring MMIO space at 0x7fb2d7a0e8a0 Restoring PCI config space for 00:1f:0 reg 0xdc [root@localhost ~]#

2 1

FS Esprimo E5730: reading rom does not seem to work if BIOS write protection is enabled
by Elmar Stellnberger 15 Sep '15

15 Sep '15

Today I have tried to read the BIOS image of my Fujitsu Siemens Esprimo E5730. flashrom has complained about the write protection as being set in force manually by the BIOS settings although I have just tried to read an image: > flashrom -p internal:ich_spi_mode=auto --read test.rom flashrom v0.9.7-r1711 on Linux 3.14.50-std460-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "Intel ICH10D". Enabling flash write... FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. FREG2: Warning: Management Engine region (0x00003000-0x002f7fff) is locked. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see http://flashrom.org/ME for details. Writes have been disabled for safety reasons. You can enforce write support with the ich_spi_force programmer option, but you will most likely harm your hardware! If you force flashrom you will get no support if something breaks. On a few mainboards it is possible to enable write access by setting a jumper (see its documentation or the board itself). OK. Found Winbond flash chip "W25X32" (4096 kB, SPI) at physical address 0xffc00000. === This flash part has status UNTESTED for operations: READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading flash... Transaction error! Read operation failed! FAILED. More information can be found in the attachements.

2 2

MX25L25635E / 4 byte addressing
by Peter Martini 15 Sep '15

15 Sep '15

Hello, I've checked out master from the flashrom svn repo, compiled, and was able to see my chip (MX25L25635E). The id wasn't recognized, but after a quick patch to copy a MX25L128... to ..L256.., I got it to successfully read the first 16MB of the chip - however, I can't get any further than that, because changing the values in the table to the right values moves me from 3 byte addressing to 4 byte addressing territory (if I understand this correctly), and it looks like there aren't any patches merged for that yet. Is there a patch set actively in the works? (I saw some activity around this from January, from this link http://patchwork.coreboot.org/patch/4272/, but I'm not sure where that ended up). Thanks! Peter

1 0

Re: [flashrom] Contribution: option to disable read_all_first
by Willy Tarreau 14 Sep '15

14 Sep '15

Hi David, On Mon, Sep 14, 2015 at 11:10:31AM -0700, David Hendricks wrote: > Hi Willy, > You might be interested in another approach that is used in the chromium > branch <https://chromium.googlesource.com/chromiumos/third_party/flashrom>. > The "--diff" longopt allows the user to supply a file to diff against the > -w argument. This is useful in cases where the user wishes to skip the > initial read step, and flashrom will figure out which blocks need to be > erased and written thereby eliminating unnecessary erase/write operations > as well. > > There is some documentation for it here: > https://sites.google.com/a/chromium.org/dev/chromium-os/packages/cros-flash… Thank you I'll take a look at it, it can indeed be another solution. The only thing is that it requires the creation of an extra file and I tend to find that it's not always convenient to have to create files for known patterns. However I think that it would be possible based on your approach to provide an option to replace the file with a known pattern for some cases (eg: full of 0xff or full of 0x00, which could be called "assume-clean" or "assume-dirty"), which would achieve the same result and at the same time not change the spirit of your latest work. Best regards, Willy

2 1

Contribution: option to disable read_all_first
by Willy Tarreau 14 Sep '15

14 Sep '15

Hello, I was bothered by having to read all the contents of an empty flash before programming just a boot loader to it. It's particularly long when using a buspirate board. I looked into the code to see how to bypass this and discovered it was already planned but not implemented due to the (presumably) complex API of the doit() function. I took a different route : I'm using 3 different write levels in write_it: - normal write (read first) - trusted write (no need to read but still erase) - fully trusted write (flash assumed to be clean) These ones are set using a new "-t" flag for which I have even updated the man page and indicated that it's not recommended. It worked well for me so I'm sending the patches assuming they'll be useful for someone else. BTW, to give you a bit more context, I was writing a 8MB flash to upgrade a small router from its 4MB one, so I just had to add 4MB of \xff after the existing image before flashing it. Best regards, Willy

2 1

flashrom can successfully read the BIOS image of my Amilo Xi3650 laptop
by Elmar Stellnberger 14 Sep '15

14 Sep '15

Lately I have tried > flashrom -p internal:laptop=force_I_want_a_brick --read Xi3650.rom on my Fujitsu Siemens Amilo Xi 3650 laptop and it has worked quite well. ... Found chipset "Intel ICH9M-E". Found Winbond flash chip "W25X16" (2048 kB, SPI) at physical address 0xffe00000. > sha256sum Xi3650.rom 8c5095d38bffe9b87d481ba8da395e48d9dcfadd43176979fd69e5da249b3763 Xi3650.rom BIOS (according to dmidecode) is Vendor: Phoenix Version: 1.0H-1646-0024 Release Date: 04/15/2010 I would love to see it under 'supported boards' in the future. More information can be found in the attachements.

1 0

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom