- flashrom - mail.coreboot.org

Log Full Flashrom
by Jose Luis León 10 Nov '15

10 Nov '15

Log full: http://chopapp.com/#i794hbux ----------- Other command: flashrom -p serprog:dev=/dev/ttyACM0:115200 -V -c LE25FU406C flashrom v0.9.8-r1888 on Linux 3.19.0-25-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.1, GCC 4.8.4, little endian Command line (5 args): flashrom -p serprog:dev=/dev/ttyACM0:115200 -V -c LE25FU406C Error: Unknown chip 'LE25FU406C' specified. Run flashrom -L to view the hardware supported in this flashrom version. ----------------------------- look this information: zenky@zenky-HP-Mini-110-1000:~/Descargas/flashrom-0.9.8$ flashrom -L | grep LE25FU406CSanyo LE25FU406C/ 512 SPI is it normal the / about last character?

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please, helpme. AMI BIOS SPI FLASH ROM 96 MB
by Alberto Perez 09 Nov '15

09 Nov '15

please, helpme. i want flashear mi notebook ( http://bangho.com.ar/wp-content/uploads/2015/04/Ultrabook-Bangho-ZERO-1430-…) but I do not know how to do it. I do not know what parameter to use in --programmer. my bios is AMI BIOS SPI Flash ROM de 96 M b Por favor, alguien puede ayudarme: Quiero hacer un volcado de la memoria rom de mi notebook pero no sé cómo hacerlo.

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Reporte LE25FU406B and LE25FU406B
by Jose Luis León 09 Nov '15

09 Nov '15

Hi all, I am doing send logs that applied on chips: SANYO LE25FU406B - http://chopapp.com/#7cvgvoav SANYO LE25FU406C - http://chopapp.com/#zw01179t too I attaching conversation of IRC channel. I am using chopapp because pastebin failed :s

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Asus F2A85-M PRO
by Denis 'GNUtoo' Carikli 08 Nov '15

08 Nov '15

Hi, here what I did: 0) The board has an external GPU in it that has an option rom, and the OS is GNU/Linux in BIOS mode. My CPU doesn't have a GPU. That is important, because in some other configuration, flashrom complained that something was accessing the flash. 1) flashrom -p internal -w build/coreboot.rom 2) poweroff (I've systemd, so that powers off the board cleanly) 3) boot and see some coreboot logs (the port is WIP) 4) take off the flash chip, dump it from another computer with an external programmer (openmoko in my case). 5) compare md5sum with build/coreboot.rom => fails, compare both images with vbindiff => some zones are different. Unlike with my Asrock E350M1 (I reported the issue on IRC for that one), this time I didn't bother looking at what the differences were. Denis.

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Re: [flashrom] SFDP has autodetected a flash chip which is not natively supported by flashrom yet
by Stefan Tauner 06 Nov '15

06 Nov '15

On Thu, 5 Nov 2015 03:38:14 +0800 Greg Tippit <greg(a)tippitt.net> wrote: > First off, thank you for your work on such a useful program. I have > used it more times that I can remember, and I have never had a single > problem flashing a motherboard BIOS using your program. If you > accepted PayPal donations, I would buy you all a beverage of your > choice. > > I have a new stick PC from China called the MeeGoPad T02, which uses > an Intel Atom SOC. > > They have a little English support at x86pad.com, where I found a > updated BIOS for this device. > > When I made of backup of the existing BIOS on the device, I got the > message about it not yet having native support. The read seemed to go > okay. I have attached a copy of the verbose output as you requested. > > Assuming all the normal warnings, is it safe to try flashing the new > BIOS using flashrom, or should I wait for you to work your "Native > Magic"? Hi, AFAICT it should work fine. However, full support was already added and is available since commit r1889. So you could also upgrade if you like. I'd appreciate a report afterwards in any case. ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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SFDP has autodetected a flash chip which is not natively supported by flashrom yet
by Greg Tippit 04 Nov '15

04 Nov '15

First off, thank you for your work on such a useful program. I have used it more times that I can remember, and I have never had a single problem flashing a motherboard BIOS using your program. If you accepted PayPal donations, I would buy you all a beverage of your choice. I have a new stick PC from China called the MeeGoPad T02, which uses an Intel Atom SOC. They have a little English support at x86pad.com, where I found a updated BIOS for this device. When I made of backup of the existing BIOS on the device, I got the message about it not yet having native support. The read seemed to go okay. I have attached a copy of the verbose output as you requested. Assuming all the normal warnings, is it safe to try flashing the new BIOS using flashrom, or should I wait for you to work your "Native Magic"? Thank you, Greg Tippitt

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Re: [flashrom] Flash chip/chipset not found
by Carl-Daniel Hailfinger 03 Nov '15

03 Nov '15

Hi Mark, thanks for the log and the explanation. This was indeed helpful. May I suggest you take a look at the nvramtool utility from the coreboot project? It works fine even on normal BIOS (needs to be run as root, though). http://www.coreboot.org/Nvramtool I used nvramtool in the past to dump all 256 bytes of NVRAM. For a hexdump, try this: # nvramtool -x If this gets you the same result as SRCMOS.EXE, you could throw the DOS utility away. The interesting parameters are: -b OUTPUT_FILE: Dump CMOS memory contents to file. -B INPUT_FILE: Write file contents to CMOS memory. -x: Show hex dump of CMOS memory. -X DUMPFILE: Show hex dump of CMOS dumpfile. Regards, Carl-Daniel On 02.11.2015 11:06, Rowlinson Mark wrote: > Hi Carl-Daniel, > I've attached the logfile output as requested. > The SRCMOS .EXE utility that comes on the BIOS update image saves 256 bytes of data. The older versions has 128 bytes of data and the remainder was all 00x. The last version has data within the last 128 bytes and that makes all the difference. > Whether the utility only processed the first 128 bytes initially and was corrected to save/restore the extra 128 bytes I don't know but it certainly does the trick now. > It is a DOS based utility and I've been able to configure a FreeDOS image under GRUB so that it will boot it once to set the BIOS settings I need and then boot back to the Linux OS. > Getting the settings out was a bit of a chore as I had to hex dump them to the screen so I could take a picture (and then type them in) as the image can't be updated and has no access to any other devices. Running the utility from a USB device is no help either as the moment I disable USB in the BIOS I can't access the utility to write the settings to a file. > Best Regards, > Mark Rowlinson, Principal Engineer, Unix Support > MISGB Implementation Distributed > > Fujitsu > > > From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006@gmx.net] > Sent: 29 October 2015 00:37 > To: Rowlinson Mark <Mark.Rowlinson(a)uk.fujitsu.com>; flashrom(a)flashrom.org > Subject: Re: [flashrom] Flash chip/chipset not found > > > Hi Mark, > > would it be possible for you to generate a log file using the additional parameter --output logfile.txt when doing a read of the flash chip, then send that log file to us? > > That would help us to finally merge support for the VT8251 chipset in your point-of-sale IBM/Toshiba AnyPlace Kiosk Model 48xx series. We have a strict rule that flashrom must be 100% reliable and thus we keep log files for any newly supported/tested chipset around for reference. Your log file would be used as reference for VT8251. > > That said, it would be very interesting to know where the settings are actually stored. Have you looked into the top 128 bytes of NVRAM? Maybe there is another flash chip? Is there any way to trace what the save/restore tool does (i.e. does it run on Linux)? > > Regards, > Carl-Daniel > > > > > > On 28.10.2015 23:25, Rowlinson Mark wrote: > >> Hi Carl-Daniel, >> >> That change does allow the chipset to be recognised and it will write out the ROM. It seems to be the BIOS code only (no settings) as it doesn't change if I change any settings within the BIOS. >> >> I've been directed to a save/restore utility that comes on the BIOS update image and it seems the last version actually accesses the data I'm interested in so I'm investigating this route at the moment. >> >> Best Regards, >> Mark Rowlinson >> -----Original Message----- >> >> From: Carl-Daniel Hailfinger >> [mailto:c-d.hailfinger.devel.2006@gmx.net] >> Sent: 24 October 2015 09:22 >> To: Rowlinson Mark <Mark.Rowlinson(a)uk.fujitsu.com<mailto:Mark.Rowlinson@uk.fujitsu.com>>; >> flashrom(a)flashrom.org<mailto:flashrom@flashrom.org> >> >> Subject: Re: [flashrom] Flash chip/chipset not found >> >> Hi Mark, >> >> this is a VIA VT8251 PCI to ISA Bridge you're using. >> >> I think Stefan Tauner (in CC) already was discussing something similar here: >> http://www.flashrom.org/pipermail/flashrom/2012-July/009552.html >> That email even has a patch attached. >> On 22.10.2015 22:24, Rowlinson Mark wrote: >>> Thanks for the swift response, I have attached output from the command requested. >>> >>> The device in question is an IBM (now Toshiba) AnyPlace Kiosk Model 4838-310. The models we have are a mixture of 4838-310 and 4838-330 and support documentation refers to them as 4838-3xx. >> Heh, would be fun to add this to our tests. >> >> Regards, >> Carl-Daniel

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flashrom
by Денис 03 Nov '15

03 Nov '15

flashrom v0.9.2-r1141 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 969M loops per second, 10 myus = 10 us, 100 myus = 98 us, 1000 myus = 1059 us, 10000 myus = 11659 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "M2N-MX SE" DMI string baseboard-version: "Rev x.xx" DMI string chassis-type: "Desktop" Found ITE Super I/O, id 8712 Found chipset "NVIDIA MCP61", enabling flash write... chipset PCI ID is 10de:03e0, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Flash bus type is LPC Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0x00000000 MCP SPI is not used. Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: LPC. Super I/O ID 0x8712 is not on the list of flash capable controllers. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for AMIC A25L05PT, 64 KB: skipped. Probing for AMIC A25L05PU, 64 KB: skipped. Probing for AMIC A25L10PT, 128 KB: skipped. Probing for AMIC A25L10PU, 128 KB: skipped. Probing for AMIC A25L20PT, 256 KB: skipped. Probing for AMIC A25L20PU, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: skipped. Probing for AMIC A25L40PU, 512 KB: skipped. Probing for AMIC A25L80P, 1024 KB: skipped. Probing for AMIC A25L16PT, 2048 KB: skipped. Probing for AMIC A25L16PU, 2048 KB: skipped. Probing for AMIC A25L512, 64 KB: skipped. Probing for AMIC A25L010, 128 KB: skipped. Probing for AMIC A25L020, 256 KB: skipped. Probing for AMIC A25L040, 512 KB: skipped. Probing for AMIC A25L080, 1024 KB: skipped. Probing for AMIC A25L016, 2048 KB: skipped. Probing for AMIC A25L032, 4096 KB: skipped. Probing for AMIC A25LQ032, 4096 KB: skipped. Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ASD AE49F2008, 256 KB: skipped. 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Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Hyundai HY29F002T, 256 KB: skipped. Probing for Hyundai HY29F002B, 256 KB: skipped. Probing for Intel 28F001BX-B, 128 KB: skipped. Probing for Intel 28F001BX-T, 128 KB: skipped. Probing for Intel 28F002BC-T, 256 KB: skipped. Probing for Intel 28F004S5, 512 KB: skipped. Probing for Intel 28F004BV/BE-B, 512 KB: skipped. Probing for Intel 28F004BV/BE-T, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: skipped. Probing for Intel 82802AC, 1024 KB: skipped. Probing for Macronix MX25L512, 64 KB: skipped. Probing for Macronix MX25L1005, 128 KB: skipped. Probing for Macronix MX25L2005, 256 KB: skipped. Probing for Macronix MX25L4005, 512 KB: skipped. Probing for Macronix MX25L8005, 1024 KB: skipped. Probing for Macronix MX25L1605, 2048 KB: skipped. Probing for Macronix MX25L1635D, 2048 KB: skipped. Probing for Macronix MX25L3205, 4096 KB: skipped. Probing for Macronix MX25L3235D, 4096 KB: skipped. Probing for Macronix MX25L6405, 8192 KB: skipped. Probing for Macronix MX25L12805, 16384 KB: skipped. Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for MoselVitelic V29C51000B, 64 KB: skipped. Probing for MoselVitelic V29C51000T, 64 KB: skipped. Probing for MoselVitelic V29C51400B, 512 KB: skipped. Probing for MoselVitelic V29C51400T, 512 KB: skipped. Probing for MoselVitelic V29LC51000, 64 KB: skipped. Probing for MoselVitelic V29LC51001, 128 KB: skipped. Probing for MoselVitelic V29LC51002, 256 KB: skipped. Probing for Numonyx M25PE10, 128 KB: skipped. Probing for Numonyx M25PE20, 256 KB: skipped. Probing for Numonyx M25PE40, 512 KB: skipped. Probing for Numonyx M25PE80, 1024 KB: skipped. Probing for Numonyx M25PE16, 2048 KB: skipped. Probing for PMC Pm25LV010, 128 KB: skipped. Probing for PMC Pm25LV016B, 2048 KB: skipped. Probing for PMC Pm25LV020, 256 KB: skipped. Probing for PMC Pm25LV040, 512 KB: skipped. Probing for PMC Pm25LV080B, 1024 KB: skipped. Probing for PMC Pm25LV512, 64 KB: skipped. Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0x96, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: skipped. Probing for Sharp LHF00L04, 1024 KB: skipped. Probing for Spansion S25FL008A, 1024 KB: skipped. Probing for Spansion S25FL016A, 2048 KB: skipped. Probing for SST SST25VF016B, 2048 KB: skipped. Probing for SST SST25VF032B, 4096 KB: skipped. Probing for SST SST25VF064C, 8192 KB: skipped. Probing for SST SST25VF040.REMS, 512 KB: skipped. Probing for SST SST25VF040B, 512 KB: skipped. Probing for SST SST25LF040A.RES, 512 KB: skipped. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Probing for SST SST25VF080B, 1024 KB: skipped. Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: skipped. Probing for SST SST49LF003A/B, 384 KB: skipped. Probing for SST SST49LF004A/B, 512 KB: skipped. Probing for SST SST49LF004C, 512 KB: skipped. Probing for SST SST49LF008A, 1024 KB: skipped. Probing for SST SST49LF008C, 1024 KB: skipped. Probing for SST SST49LF016C, 2048 KB: skipped. Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0x96, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0x96, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 KB: skipped. Probing for ST M25P05.RES, 64 KB: skipped. Probing for ST M25P10-A, 128 KB: skipped. Probing for ST M25P10.RES, 128 KB: skipped. Probing for ST M25P20, 256 KB: skipped. Probing for ST M25P40, 512 KB: skipped. Probing for ST M25P40-old, 512 KB: skipped. Probing for ST M25P80, 1024 KB: skipped. Probing for ST M25P16, 2048 KB: skipped. Probing for ST M25P32, 4096 KB: skipped. Probing for ST M25P64, 8192 KB: skipped. Probing for ST M25P128, 16384 KB: skipped. Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BB, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: skipped. Probing for ST M50FW016, 2048 KB: skipped. Probing for ST M50FW040, 512 KB: skipped. Probing for ST M50FW080, 1024 KB: skipped. Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: skipped. Probing for Winbond W25Q16, 2048 KB: skipped. Probing for Winbond W25Q32, 4096 KB: skipped. Probing for Winbond W25Q64, 8192 KB: skipped. Probing for Winbond W25x10, 128 KB: skipped. Probing for Winbond W25x20, 256 KB: skipped. Probing for Winbond W25x40, 512 KB: skipped. Probing for Winbond W25x80, 1024 KB: skipped. Probing for Winbond W25x16, 2048 KB: skipped. Probing for Winbond W25x32, 4096 KB: skipped. Probing for Winbond W25x64, 8192 KB: skipped. Probing for Winbond W29C011, 128 KB: skipped. Probing for Winbond W29C020C, 256 KB: skipped. Probing for Winbond W29C040P, 512 KB: skipped. Probing for Winbond W29EE011, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 KB: skipped. Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: skipped. Probing for Winbond W49F020, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0x96, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 KB: skipped. Probing for Winbond W39V080FA, 1024 KB: skipped. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Probing for AMIC unknown AMIC SPI chip, 0 KB: skipped. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Probing for Eon unknown Eon SPI chip, 0 KB: skipped. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Probing for SST unknown SST SPI chip, 0 KB: skipped. Probing for ST unknown ST SPI chip, 0 KB: skipped. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. -- Денис Кораблев

2 1

Winbond flash chip "W39V080FA" (1024 kB, FWH)
by Fabian Hoffmann 03 Nov '15

03 Nov '15

1 0

Re: [flashrom] Flash chip/chipset not found
by Carl-Daniel Hailfinger 02 Nov '15

02 Nov '15

Hi Mark, would it be possible for you to generate a log file using the additional parameter --output logfile.txt when doing a read of the flash chip, then send that log file to us? That would help us to finally merge support for the VT8251 chipset in your point-of-sale IBM/Toshiba AnyPlace Kiosk Model 48xx series. We have a strict rule that flashrom must be 100% reliable and thus we keep log files for any newly supported/tested chipset around for reference. Your log file would be used as reference for VT8251. That said, it would be very interesting to know where the settings are actually stored. Have you looked into the top 128 bytes of NVRAM? Maybe there is another flash chip? Is there any way to trace what the save/restore tool does (i.e. does it run on Linux)? Regards, Carl-Daniel On 28.10.2015 23:25, Rowlinson Mark wrote: > Hi Carl-Daniel, > > That change does allow the chipset to be recognised and it will write out the ROM. It seems to be the BIOS code only (no settings) as it doesn't change if I change any settings within the BIOS. > > I've been directed to a save/restore utility that comes on the BIOS update image and it seems the last version actually accesses the data I'm interested in so I'm investigating this route at the moment. > > Best Regards, > Mark Rowlinson > > -----Original Message----- > From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006@gmx.net] > Sent: 24 October 2015 09:22 > To: Rowlinson Mark <Mark.Rowlinson(a)uk.fujitsu.com>; flashrom(a)flashrom.org > Subject: Re: [flashrom] Flash chip/chipset not found > > Hi Mark, > > this is a VIA VT8251 PCI to ISA Bridge you're using. > > I think Stefan Tauner (in CC) already was discussing something similar here: > http://www.flashrom.org/pipermail/flashrom/2012-July/009552.html > That email even has a patch attached. > > > On 22.10.2015 22:24, Rowlinson Mark wrote: >> Thanks for the swift response, I have attached output from the command requested. >> >> The device in question is an IBM (now Toshiba) AnyPlace Kiosk Model 4838-310. The models we have are a mixture of 4838-310 and 4838-330 and support documentation refers to them as 4838-3xx. > Heh, would be fun to add this to our tests. > > Regards, > Carl-Daniel >

2 1

SOIC8 test clip - cant write to BIOS SPI flash chip
by Robert Brown 01 Nov '15

01 Nov '15

Unfortunately I don't have any soldering tools or experience, so if you could give an advice about ISP programming (In-System-Programming/In-Situ-Programming) , it will be super helpful! I teardown a bricked laptop, removed AC power, laptop's power battery, and even a small CMOS battery, and now I am trying to write a working BIOS image to laptop's SPI flash chip using a SOIC8 test clip. But here is a problem: I could read a dump from this BIOS chip without problems, however it fails when I am trying to write - so the contents of BIOS flash chip are remaining unchanged. Luckily I found out this helpful wiki page - http://flashrom.org/ISP , which describes common problems with this ISP method of flashing, as well as gives 3 hints for solution! Sadly this page is currently down, so here is a screenshot: http://i.imgur.com/SJEYHR2.png 1. - tried to make shorter wires, less than 10cm as they recommend - it did not help 2. - soldering is out of possibility, cant do it, and also: wires are already short and they are good quality (pure copper) 3. - This hint looks more promising, but I need help in understanding this piece of information: "disconnect Vcc from the programmer and power it with its normal PSU" If I understand correctly, by Vcc they mean Vcc pin of the BIOS flash chip. But if I disconnect Vcc from the programmer, what is "normal PSU" which should power this Vcc pin? Should I connect to motherboard a laptop's power battery, or small CMOS battery, or AC adapter of laptop, so that this Vcc pin would be powered by them, or it is forbidden to do it while using SPI programmer in the same time? Or its better to try to power Vcc of flash chip from "USB to TTL" adapter - which has this 3V3 (3.3V) voltage pin? Yours faithfully, Robert Brown _______________________________________________________________ Get the Free email that has everyone talking at <a href=http://www.mail2world.com target=new>http://www.mail2world.com</a> Unlimited Email Storage POP3 Calendar SMS Translator Much More!

3 3

[PATCH] Use nanosleep() instead of usleep() where available.
by Stefan Tauner 01 Nov '15

01 Nov '15

usleep() has been obsolete for quite a while. The only target where it is currently used without alternative is DOS. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- While setting up uClibc on the buildbot in a rather limited configuration I noticed that the only thing that made it fail was the use of usleep(). usleep() has been made obsolete with POSIX.1-2001 and was removed in POSIX.1-2008 hence it would be great to get rid of it completely. However, DJGPP for DOS does not provide an alternative so we are stuck there. Still, we can migrate everything else (but Windows) to nanosleep with this patch. Verified against the buildbot. udelay.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/udelay.c b/udelay.c index c03bcc4..60a8604 100644 --- a/udelay.c +++ b/udelay.c @@ -22,6 +22,7 @@ #ifndef __LIBPAYLOAD__ #include <unistd.h> +#include <time.h> #include <sys/time.h> #include <stdlib.h> #include <limits.h> @@ -174,9 +175,11 @@ void internal_sleep(unsigned int usecs) { #if IS_WINDOWS Sleep((usecs + 999) / 1000); -#else +#elif defined(__DJGPP__) sleep(usecs / 1000000); usleep(usecs % 1000000); +#else + nanosleep(&(struct timespec){usecs / 1000000, (usecs * 1000) % 1000000000}, NULL); #endif } -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] trouble flashing EN25S64 on Lenovo N21 chromebook
by Stefan Tauner 01 Nov '15

01 Nov '15

On Sun, 4 Oct 2015 18:22:35 -0500 Kyle Stanevich <kstanevich(a)imsa.edu> wrote: > Hi, > > I am still having trouble flashing the EN25S64 chip on my Lenovo N21 > chromebook. I have connected a raspberry pi to the EN25S64 on the Lenovo > N21 motherboard chip via this clip ( > http://www.amazon.com/Qunqi-Soic8-Flash-Clips-Programmer/dp/B014IXR9RG). On > the raspberry pi (which is running raspbian) I run the command "sudo > ./flashrom -VVV -p linux_spi:dev=/dev/spidev0.0 -w ~/Downloads/bios.bin". I > have removed the write protect screw, but I don't think that matters > because I am connecting to the chip directly. > > I have tried to compile google's (chromiumos') version of flashrom, but I > could not get it to compile due to many errors. Therefore, I am using the > latest version of flashrom which compiles fine. > > It seams to me that the problem is there is something not working correctly > writing/erasing/reading to the chip. Erase functions 1 through 3 all fail > when using the command shown above. It hangs up on erase function 2 for a > very long time. I had to run it overnight until erase function 2 failed. I > have tried running the same command again, and it is currently still stuck > at "Trying erase function 2... 0x000000-0x7fffff:E". It has been stuck at > this line for 16 hours, with the raspberry pi at 100% cpu usage the entire > time. > > The line "This flash part has status UNTESTED for operations: PROBE READ > ERASE WRITE" indicates to me that this chip has not yet been tested. I > would like to help out with testing for this chip since I have one and have > the hardware required to flash it. What can I do to help out? Hi, usually even untested SPI flash chips work just fine. They are all pretty similar and we use the same source code for them apart from tiny bits like the actual ID. Thus I don't believe there is anything wrong with the code but your hardware setup. Take a look at http://flashrom.org/RaspberryPi especially the note under the pin table. I presume you did not connect all input pins of the flash chip... Also, see http://flashrom.org/ISP if that was not the issue. The long erases could also come from that, but other causes like kernel or flashrom bugs are theoretically possible as well (although unlikely IMO). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[PATCH] Add (implicit) support for musl libc.
by Stefan Tauner 31 Oct '15

31 Oct '15

This is mostly achieved by fixing or refining the inclusion of header files and replacing glibc-specific ifdefs with more generic ones. - <sys/io.h>: Contains iopl(2) and x86 I/O port access functions (inb, outb etc). Generally Linux-specific but also availble on debian/kFreeBSD. Provided by glibc as well as musl and uclibc. Include it if we are running Linux or if glibc is detected. - <sys/fcntl.h>: should be (and is) replaced by <fcntl.h> (without the "sys" prefix). - <linux/spi/spidev.h>: Does not include all necessary headers, namely _IOC_SIZEBITS that is used in the definition of SPI_MSGSIZE is not brought in via <linux/ioctl.h> but instead we relied so far on glibc's including it via <sys/ioctl.h>. Change that to explicitly including <linux/ioctl.h>. - <endian.h>: Would also be available in musl but there is no easy way to detect it so we do not try yet. The bug report and initial patches were Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou(a)trabucayre.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- New version because the sys/io.h change was actually breaking Debian/kFreeBSD! Moved it down where all the IN[BWL]/OUT[BWL] definitions are. hwaccess.h | 14 ++++++++------ linux_spi.c | 5 +++-- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/hwaccess.h b/hwaccess.h index 3e46192..390f0e4 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -26,12 +26,6 @@ #include "platform.h" -#if IS_X86 -#if defined(__GLIBC__) -#include <sys/io.h> -#endif -#endif - #if NEED_PCI == 1 /* * libpci headers use the variable name "index" which triggers shadowing @@ -115,6 +109,7 @@ #if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) /* Nonstandard libc-specific macros for determining endianness. */ +/* musl provides an endian.h as well... but it can not be detected from within C. */ #if defined(__GLIBC__) #include <endian.h> #if BYTE_ORDER == LITTLE_ENDIAN @@ -204,6 +199,13 @@ cpu_to_be(64) #if NEED_PCI == 1 #if IS_X86 +/* sys/io.h provides iopl(2) and x86 I/O port access functions (inb, outb etc). + * It is included in glibc (thus available also on debian/kFreeBSD) but also in other libcs that mimic glibc, + * e.g. musl and uclibc. */ +#if defined(__linux__) || defined(__GLIBC__) +#include <sys/io.h> +#endif + #define __FLASHROM_HAVE_OUTB__ 1 /* for iopl and outb under Solaris */ diff --git a/linux_spi.c b/linux_spi.c index 26725e1..19b4965 100644 --- a/linux_spi.c +++ b/linux_spi.c @@ -22,13 +22,14 @@ #include <stdio.h> #include <string.h> #include <stdlib.h> -#include <sys/fcntl.h> +#include <fcntl.h> #include <errno.h> #include <ctype.h> #include <unistd.h> +#include <sys/ioctl.h> #include <linux/types.h> #include <linux/spi/spidev.h> -#include <sys/ioctl.h> +#include <linux/ioctl.h> #include "flash.h" #include "chipdrivers.h" #include "programmer.h" -- Kind regards, Stefan Tauner

1 0

[PATCH 1/2] Add missing header for musl compatibility
by Gwenhael Goavec-Merou 30 Oct '15

30 Oct '15

From: Gwenhael Goavec-Merou <gwenhael.goavec-merou(a)trabucayre.com> According to : http://autobuild.buildroot.net/results/3de/3de936d9be79e151e66af15193084d82… linux/ioctl.h header must be included in linux_spi.c to obtain missing _IOC_SIZEBITS. Patch based on : http://git.buildroot.net/buildroot/commit/package/c-periphery/0001-Add-miss… Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou(a)trabucayre.com> --- linux_spi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/linux_spi.c b/linux_spi.c index 26725e1..8d72420 100644 --- a/linux_spi.c +++ b/linux_spi.c @@ -28,6 +28,7 @@ #include <unistd.h> #include <linux/types.h> #include <linux/spi/spidev.h> +#include <linux/ioctl.h> #include <sys/ioctl.h> #include "flash.h" #include "chipdrivers.h" -- 2.4.9

3 6

Re: [flashrom] Flash chip/chipset not found
by Carl-Daniel Hailfinger 28 Oct '15

28 Oct '15

Hi Mark, this is a VIA VT8251 PCI to ISA Bridge you're using. I think Stefan Tauner (in CC) already was discussing something similar here: http://www.flashrom.org/pipermail/flashrom/2012-July/009552.html That email even has a patch attached. On 22.10.2015 22:24, Rowlinson Mark wrote: > Thanks for the swift response, I have attached output from the command requested. > > The device in question is an IBM (now Toshiba) AnyPlace Kiosk Model 4838-310. The models we have are a mixture of 4838-310 and 4838-330 and support documentation refers to them as 4838-3xx. Heh, would be fun to add this to our tests. Regards, Carl-Daniel

2 2

CHIPSET: alix 3d3
by John Vacek 27 Oct '15

27 Oct '15

Proceeding anyway because user forced us to. Found chipset "AMD CS5536". Enabling flash write... OK. WARNING: unexpected second chipset match: "AMD CS5536" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. Found AMIC flash chip "A49LF040A" (512 kB, LPC) at physical address 0xfff80000. No operations were specified. http://www.pcengines.ch/alix3d3.htm root@kali-alix:~# lspci -nn 00:01.0 Host bridge [0600]: Advanced Micro Devices [AMD] CS5536 [Geode companion] Host Bridge [1022:2080] (rev 33) 00:01.1 VGA compatible controller [0300]: Advanced Micro Devices [AMD] Geode LX Video [1022:2081] 00:01.2 Entertainment encryption device [1010]: Advanced Micro Devices [AMD] Geode LX AES Security Block [1022:2082] 00:09.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105M [Rhine-III] [1106:3053] (rev 96) 00:0c.0 SATA controller [0106]: Silicon Image, Inc. SiI 3512 [SATALink/SATARaid] Serial ATA Controller [1095:3512] (rev 01) 00:0e.0 Network controller [0280]: Broadcom Corporation BCM4306 802.11a/b/g [14e4:4324] (rev 02) 00:0f.0 ISA bridge [0601]: Advanced Micro Devices [AMD] CS5536 [Geode companion] ISA [1022:2090] (rev 03) 00:0f.2 IDE interface [0101]: Advanced Micro Devices [AMD] CS5536 [Geode companion] IDE [1022:209a] (rev 01) 00:0f.3 Multimedia audio controller [0401]: Advanced Micro Devices [AMD] CS5536 [Geode companion] Audio [1022:2093] (rev 01) 00:0f.4 USB controller [0c03]: Advanced Micro Devices [AMD] CS5536 [Geode companion] OHC [1022:2094] (rev 02) 00:0f.5 USB controller [0c03]: Advanced Micro Devices [AMD] CS5536 [Geode companion] EHC [1022:2095] (rev 02)

1 0

Re: [flashrom] Flash chip/chipset not found
by Carl-Daniel Hailfinger 22 Oct '15

22 Oct '15

Hi Mark, On 21.10.2015 16:18, Rowlinson Mark wrote: > I have a 32bit touch screen device running CentOS 5.2 which has some of its BIOS settings accessible in /dev/nvram and others elsewhere else (that's why I've been loooking at flashrom). > I have tried later distributions (CentOS 6.7 and the System Rescue CD) and they both report the following: > [root@server ~]# /var/tmp/flashrom-0.9.8/flashrom -p internal > flashrom v0.9.8-r1888 on Linux 2.6.32-573.el6.i686 (i686) > [...] > WARNING: No chipset found. Flash detection will most likely fail. > No EEPROM/flash device found. It seems we have to add some PCI IDs to our southbridge table. Do you have an exact name of the machine in question? > What information is needed to identify the chipset in use so support can be added for these devices? (as root) lspci -nnvvvxxx That should be sufficient for us to find out the southbridge and some of its settings. Regards, Carl-Daniel

2 1

[RFC PATCH] add support for N25Q256
by Cédric Le Goater 22 Oct '15

22 Oct '15

I needed to reflash a N25Q256 on a host system and hacked flashrom to make this work. For this, I used the 4-Bytes address support developed by Boris Baykov. This is why the patch is an RFC. The whole patchset is available under github here: https://github.com/legoater/flashrom I can help in getting this patchset merged but do the comments in : http://patchwork.coreboot.org/patch/4272/ need to be all addressed or can we rework a bit the patchset to merge the main changes separately : - 4-bytes addressing - W25Q256.V support - SFDP - Progress visualization - ... Tested under Linux with spidev. Signed-off-by: Cédric Le Goater <clg(a)fr.ibm.com> --- flashchips.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) Index: flashrom.git/flashchips.c =================================================================== --- flashrom.git.orig/flashchips.c +++ flashrom.git/flashchips.c @@ -9330,6 +9330,48 @@ const struct flashchip flashchips[] = { }, { + .vendor = "Micron/Numonyx/ST", + .name = "N25Q256..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__3E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI + | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .enter_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ + .read_nbyte = spi_nbyte_read_4ba_direct, /* read directly from any mode, no need to enter 4ba */ + .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ + .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192 } }, + .block_erase = spi_block_erase_20_4ba, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8_4ba, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "MoselVitelic", .name = "V29C51000B", .bustype = BUS_PARALLEL,

1 0

Flash chip/chipset not found
by Rowlinson Mark 21 Oct '15

21 Oct '15

Hi, I have a 32bit touch screen device running CentOS 5.2 which has some of its BIOS settings accessible in /dev/nvram and others elsewhere else (that's why I've been loooking at flashrom). I have tried later distributions (CentOS 6.7 and the System Rescue CD) and they both report the following: [root@server ~]# /var/tmp/flashrom-0.9.8/flashrom -p internal flashrom v0.9.8-r1888 on Linux 2.6.32-573.el6.i686 (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. WARNING: No chipset found. Flash detection will most likely fail. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. [root@server ~]# What information is needed to identify the chipset in use so support can be added for these devices? Best Regards, Mark Rowlinson Unless otherwise stated, this email has been sent from Fujitsu Services Limited, from Fujitsu (FTS) Limited, or from Fujitsu Telecommunications Europe Limited, together "Fujitsu". This email is only for the use of its intended recipient. Its contents are subject to a duty of confidence and may be privileged. Fujitsu does not guarantee that this email has not been intercepted and amended or that it is virus-free. Fujitsu Services Limited, registered in England No 96056, registered office 22 Baker Street, London W1U 3BW. Fujitsu (FTS) Limited, registered in England No 03808613, registered office 22 Baker Street, London W1U 3BW. PFU Imaging Solutions Europe Limited, registered in England No 1578652, registered office Hayes Park Central, Hayes End Road, Hayes, Middlesex, UB4 8FE. Fujitsu Telecommunications Europe Limited, registered in England No 2548187, registered office Solihull Parkway, Birmingham Business Park, Birmingham, B37 7YU.

1 0

Re: [flashrom] [coreboot] Trying to flash coreboot onto on-board SPI chip of HP Envy H87 haswell chipset.
by David Hendricks 21 Oct '15

21 Oct '15

Cool, glad it worked! To make things slightly easier, you should also try keeping the CMOS battery and DIM (whatever that is) in. On Tue, Oct 20, 2015 at 4:51 PM, Arpita Biswas <arpita.biswas07(a)gmail.com> wrote: > Hi David, > > That did the trick !!! Thanks a bunch ! For anyone else interested, here > is the combination of things I did : > > SOIC config as (1) mentioned earlier + held down the power button for 30 > sec to reset it + removed CMOS battery + removed jumper on SPI header (that > cuts off the processor signal to SPI chip) + plugged in the power cable > (that way enough power was there throughout the board for dediprog to > detect) + removed the DIM (dunno if that made any difference, but did it > since a post mentioned it anyways!). > > Dediprog then detected it sweetly :) :) > > Cheers, > - Arpita > > On Tue, Oct 20, 2015 at 2:05 PM, David Hendricks <dhendrix(a)google.com> > wrote: > >> >> >> On Tue, Oct 20, 2015 at 12:26 PM, Arpita Biswas < >> arpita.biswas07(a)gmail.com> wrote: >> >>> Hi all, >>> >>> I am trying to update BIOS with coreboot onto HP Envy H87 haswell >>> chipset (ipm87_mp) >>> <http://www.newegg.com/Product/Product.aspx?Item=9SIA6392VN4810>. I am >>> using Dediprog + SOIC 8-pin flash clip for flashing the SPI chip (W25Q64). >>> However dediprog doesn't detect the chip when it's soldered on-board. On >>> removing the chip from board, I can detect/read/write onto it without any >>> issues. >>> >>> I've tried (and failed) with the following configurations : >>> (1) SPI pin ------> Dediprog : /CS ---> CS, DO (IO1) ---> MISO, /WP >>> (IO2) ---> 3.3V, GND ---> GND, DI (IO0) ---> MOSI, CLK ---> CLK, /HOLD >>> (IO3) ---> 3.3V, VCC ---> 3.3V with motherboard power ON. >>> >>> (2) Same config as above but I tried to isolate the chip by removing >>> CMOS battery + removing jumper on SPI header + powering OFF the motherboard. >>> >>> (3) Similar as (1) and (2), but let /HOLD, /Vcc and /WP float. >>> >>> (4) I tried using flashrom on the box too as internal programmer, but it >>> did not recognize the SPI chip. Error log says "Found Programmer flash chip >>> "Opaque flash chip" (8192 kB, Programmer-specific)." >>> >>> I've a feeling that something on the motherboard is interfering with the >>> SPI chip since an off-board chip is working fine. Does anybody have any >>> pointers on what could be going wrong ? >>> >> >> I suspect your motherboard does not isolate the SPI ROM's voltage supply >> and thus your Dediprog is effectively powering other components on the >> board. >> >> If you can find a way to hold the PCH and ME in reset while the board is >> powered on, that might work. Or, with the board off, you can try using an >> external power supply (the usual warnings about possibly frying your board >> apply). >> >> >> >>> >>> Thanks in advance, >>> - Arpita >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> http://www.coreboot.org/mailman/listinfo/coreboot >>> >> >> >> >> -- >> David Hendricks (dhendrix) >> Systems Software Engineer, Google Inc. >> > > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Re: [flashrom] [coreboot] Trying to flash coreboot onto on-board SPI chip of HP Envy H87 haswell chipset.
by Arpita Biswas 21 Oct '15

21 Oct '15

Hi David, That did the trick !!! Thanks a bunch ! For anyone else interested, here is the combination of things I did : SOIC config as (1) mentioned earlier + held down the power button for 30 sec to reset it + removed CMOS battery + removed jumper on SPI header (that cuts off the processor signal to SPI chip) + plugged in the power cable (that way enough power was there throughout the board for dediprog to detect) + removed the DIM (dunno if that made any difference, but did it since a post mentioned it anyways!). Dediprog then detected it sweetly :) :) Cheers, - Arpita On Tue, Oct 20, 2015 at 2:05 PM, David Hendricks <dhendrix(a)google.com> wrote: > > > On Tue, Oct 20, 2015 at 12:26 PM, Arpita Biswas <arpita.biswas07(a)gmail.com > > wrote: > >> Hi all, >> >> I am trying to update BIOS with coreboot onto HP Envy H87 haswell >> chipset (ipm87_mp) >> <http://www.newegg.com/Product/Product.aspx?Item=9SIA6392VN4810>. I am >> using Dediprog + SOIC 8-pin flash clip for flashing the SPI chip (W25Q64). >> However dediprog doesn't detect the chip when it's soldered on-board. On >> removing the chip from board, I can detect/read/write onto it without any >> issues. >> >> I've tried (and failed) with the following configurations : >> (1) SPI pin ------> Dediprog : /CS ---> CS, DO (IO1) ---> MISO, /WP (IO2) >> ---> 3.3V, GND ---> GND, DI (IO0) ---> MOSI, CLK ---> CLK, /HOLD (IO3) ---> >> 3.3V, VCC ---> 3.3V with motherboard power ON. >> >> (2) Same config as above but I tried to isolate the chip by removing CMOS >> battery + removing jumper on SPI header + powering OFF the motherboard. >> >> (3) Similar as (1) and (2), but let /HOLD, /Vcc and /WP float. >> >> (4) I tried using flashrom on the box too as internal programmer, but it >> did not recognize the SPI chip. Error log says "Found Programmer flash chip >> "Opaque flash chip" (8192 kB, Programmer-specific)." >> >> I've a feeling that something on the motherboard is interfering with the >> SPI chip since an off-board chip is working fine. Does anybody have any >> pointers on what could be going wrong ? >> > > I suspect your motherboard does not isolate the SPI ROM's voltage supply > and thus your Dediprog is effectively powering other components on the > board. > > If you can find a way to hold the PCH and ME in reset while the board is > powered on, that might work. Or, with the board off, you can try using an > external power supply (the usual warnings about possibly frying your board > apply). > > > >> >> Thanks in advance, >> - Arpita >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot >> > > > > -- > David Hendricks (dhendrix) > Systems Software Engineer, Google Inc. >

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Re: [flashrom] [coreboot] Trying to flash coreboot onto on-board SPI chip of HP Envy H87 haswell chipset.
by David Hendricks 20 Oct '15

20 Oct '15

On Tue, Oct 20, 2015 at 12:26 PM, Arpita Biswas <arpita.biswas07(a)gmail.com> wrote: > Hi all, > > I am trying to update BIOS with coreboot onto HP Envy H87 haswell chipset > (ipm87_mp) > <http://www.newegg.com/Product/Product.aspx?Item=9SIA6392VN4810>. I am > using Dediprog + SOIC 8-pin flash clip for flashing the SPI chip (W25Q64). > However dediprog doesn't detect the chip when it's soldered on-board. On > removing the chip from board, I can detect/read/write onto it without any > issues. > > I've tried (and failed) with the following configurations : > (1) SPI pin ------> Dediprog : /CS ---> CS, DO (IO1) ---> MISO, /WP (IO2) > ---> 3.3V, GND ---> GND, DI (IO0) ---> MOSI, CLK ---> CLK, /HOLD (IO3) ---> > 3.3V, VCC ---> 3.3V with motherboard power ON. > > (2) Same config as above but I tried to isolate the chip by removing CMOS > battery + removing jumper on SPI header + powering OFF the motherboard. > > (3) Similar as (1) and (2), but let /HOLD, /Vcc and /WP float. > > (4) I tried using flashrom on the box too as internal programmer, but it > did not recognize the SPI chip. Error log says "Found Programmer flash chip > "Opaque flash chip" (8192 kB, Programmer-specific)." > > I've a feeling that something on the motherboard is interfering with the > SPI chip since an off-board chip is working fine. Does anybody have any > pointers on what could be going wrong ? > I suspect your motherboard does not isolate the SPI ROM's voltage supply and thus your Dediprog is effectively powering other components on the board. If you can find a way to hold the PCH and ME in reset while the board is powered on, that might work. Or, with the board off, you can try using an external power supply (the usual warnings about possibly frying your board apply). > > Thanks in advance, > - Arpita > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Trying to flash coreboot onto on-board SPI chip of HP Envy H87 haswell chipset.
by Arpita Biswas 20 Oct '15

20 Oct '15

Hi all, I am trying to update BIOS with coreboot onto HP Envy H87 haswell chipset (ipm87_mp) <http://www.newegg.com/Product/Product.aspx?Item=9SIA6392VN4810>. I am using Dediprog + SOIC 8-pin flash clip for flashing the SPI chip (W25Q64). However dediprog doesn't detect the chip when it's soldered on-board. On removing the chip from board, I can detect/read/write onto it without any issues. I've tried (and failed) with the following configurations : (1) SPI pin ------> Dediprog : /CS ---> CS, DO (IO1) ---> MISO, /WP (IO2) ---> 3.3V, GND ---> GND, DI (IO0) ---> MOSI, CLK ---> CLK, /HOLD (IO3) ---> 3.3V, VCC ---> 3.3V with motherboard power ON. (2) Same config as above but I tried to isolate the chip by removing CMOS battery + removing jumper on SPI header + powering OFF the motherboard. (3) Similar as (1) and (2), but let /HOLD, /Vcc and /WP float. (4) I tried using flashrom on the box too as internal programmer, but it did not recognize the SPI chip. Error log says "Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific)." I've a feeling that something on the motherboard is interfering with the SPI chip since an off-board chip is working fine. Does anybody have any pointers on what could be going wrong ? Thanks in advance, - Arpita

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Re: [flashrom] SOIC8 test clip - cant write to BIOS SPI flash chip
by Robert Brown 17 Oct '15

17 Oct '15

Dear Nico, > > It might be easier to help if we knew your Laptop model. Also, please > provide a full log of the failing flashrom run with the -V switch, you > can specify a log file with -o. > Right now I'm away from that laptop and cant remember its model (or provide a flashrom log) However I remember the most important thing: the model of BIOS SPI flash chip is EON EN25QH32 which is supported by flashrom since version 0.9.6 . I got a latest datasheet at official EON website ( here it is - http://www.eonssi.com/upfile/p2013114174725.pdf ) > > Please further define "without problems". Did you try several reads and > compared the contents? > Yes I tried several reads and the contents of flash chip are always the same. Moreover, I was able to successfully write 00s and FFs for a few times, and right now the contents of SPI flash chip: 00's - first 1MB , FF's - last 3MB > > By guessing two possible issues come in mind: 1. Your programmer doesn't provide > enough power for erasure. 2. The write protection pin of your flash chip is asserted. > Because I was able to write at least some stuff, I believe that your 1st theory is true: maybe a part of current that should be going to flash chip for a successfull write, is powering a half of the surrounding circuit instead... > > I'd try with the AC adapter. In that case Vcc must _not_ be connected to > your programmer. GND, OTOH, has to stay connected. > > Not forbidden. It's sometimes even encouraged because there are boards > where the Vcc pin of the flash chip is directly connected to other > chips, which would draw down the power from the programmer. > Thank you very much for advice, Nico! As soon as I get back to equipment I am going to disconnect a Vcc pin from a programmer to avoid the overvoltage (just checked the datasheet above and Vcc is the 8th leg of that flash chip) Hopefully it will be powered good enough by the AC adapter ;-) Just not sure what to do with a CMOS battery, too afraid to connect it back together with AC adapter - if there would be overvoltage I am screwed... > >> >> Or its better to try to power Vcc of flash chip from "USB to TTL" >> adapter - which has this 3V3 (3.3V) voltage pin? >> > > It really depends on your machine. > EN25QH32 datasheet tells that this flash chip supports between 2.7V and 3.6V, 3.3V seems OK and I would probably try taking it to Vcc from "USB to TTL adapter" if the solution with a laptop's AC adapter will not work... AC adapter would also powering EC controller, so what if EC will setup a write protect? Best wishes, Robert Brown <-----Original Message-----> >From: Nico Huber [nico.h at gmx.de] >Subject: Re: [flashrom] SOIC8 test clip - cant write to BIOS SPI flash chip > > >On 17.10.2015 02:07, Robert Brown wrote: >> But here is a problem: I could read a dump from this BIOS chip without >> problems, however > > >> it fails when I am trying to write - so the contents of BIOS flash chip >> are remaining unchanged. >Log please. By guessing two possible issues come in mind: 1. Your pro- >grammer doesn't provide enough power for erasure. 2. The write protec- >tion pin of your flash chip is asserted. > >> Should I connect to motherboard a laptop's power battery, or small CMOS >> battery, or AC adapter of laptop, >I'd try with the AC adapter. In that case Vcc must _not_ be connected to >your programmer. GND, OTOH, has to stay connected. > >> so that this Vcc pin would be powered by them, or it is forbidden to do >> it while using SPI programmer in the same time? >Not forbidden. It's sometimes even encouraged because there are boards >where the Vcc pin of the flash chip is directly connected to other >chips, which would draw down the power from the programmer. > >> Or its better to try to power Vcc of flash chip from "USB to TTL" >> adapter - which has this 3V3 (3.3V) voltage pin? >It really depends on your machine. > >Nico >. > _______________________________________________________________ Get the Free email that has everyone talking at <a href=http://www.mail2world.com target=new>http://www.mail2world.com</a> Unlimited Email Storage POP3 Calendar SMS Translator Much More!

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