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Re: [flashrom] ENE KB9012 patches: new test results
by Paul Kocialkowski 08 Oct '16

08 Oct '16

Hi, Le samedi 01 octobre 2016 à 05:18 +0300, mikeb mikeb a écrit : > Hi Paul, very happy to read your reply! I confirm that: > 1) grounding pin 42 to go into test mode - OK, all the grounds were connected > together: programmer's, mainboard's and KB9012's 42 pin Sounds good then! Note that the proprietary firmware explicitly disables EDI (the protocol used to access the memory), so grounding pin 42 is the only way to access it. > 2) powering the mainboard - OK, but only by power adapter, battery was not > plugged in. if I do not connect a power adapter, KB9012 cannot be detected at > all, which is expected behavior. This is correct. > Maybe you are connecting the battery while doing this; there should be some > reason why your results are different. In any case, this 50% detection issue > is just a minor inconvenience at the moment. What surprising me more is that > reading time difference between BPv4 and CH341A I do not have the battery plugged when flashing the device, and plugging it in doesn't change anything here. How long are your wires? I am using short ones (the likes of 10 cm). For high -speed signals, this can have an influence. Also, you should try to reduce the SPI clock speed: if the "works 1 out of 2 times" issue is caused by a clock speed that is slightly too fast for the KB9012, lowering it could bring the required stability. However, it worked directly with CH341A here. The different read times are likely due to different SPI clock frequencies. I don't know what CH341A uses but it seems to be a good compromise. FTDI programmers tend to use a clock frequency that is too fast for the KB9012, so it has to be divided with divisor=8. However, this makes the read slower than CH341A. > I have some questions for you regarding Origami, but since they are not > directly related to flashrom I separate them into another private message > without CC'ing a list (you will receive it in less than a hour) Indeed, let's keep this discussion about flashrom-related topics only. Origami-EC will get its own infrastructure eventually anyway (I hope soon). Cheers! > On Fri, Sep 30, 2016 at 11:20 PM, Paul Kocialkowski <paulk(a)paulk.fr> wrote: > > Hi, I got your emails just fine, I just didn't have time to sit down and > > write a proper reply but I'm very enthusiasic about working with you ! > > > > Cheers, > > Paul Kocialkowski > > > > Le vendredi 23 septembre 2016 à 03:16 +0300, mikeb mikeb a écrit : > > > Good day! I just tried reading from KB9012 and encountered exactly the > > same > > > problem as Joerg Albert has ( https://www.flashrom.org/pipermail/flashrom/ > > 2016 > > > -May/014653.html ) - chip is detected only every second time. This is not > > > caused by cabling. While it is recommended for SPI that the wires should > > be > > > shorter than 20cm, my wires are 11 cm: 8 cm of which is 12 strands high > > > quality copper and only 3 cm are ordinary aluminium inside the 30 pin > > 0.5mm > > > pitch keyboard-like connector > > > > This is interesting! I still haven't been able to reproduce the issue (but > > haven't tried so hard either). Could you indicate whether you are: > > * grounding pin 42 to go into test mode > > * powering the mainboard > > > > Thanks! > > > > > > > NOTE: it was much easier and safer to solder 1P wires to this connector > > rather > > > than to motherboard, and you could remove/insert it at any time - what a > > great > > > convenience! The only 1P wire I had to solder to motherboard is to > > > motherboard's ground, - to make it possible to unite three grounds > > > (motherboard s, KB9012 s and programmer s) - and that was really easy > > because > > > at least one of these orange circle grounds has a great distance between > > it > > > and motherboard's elements so it is difficult to screw up there :) Going > > to > > > share photos and write some manuals about connectivity, hopefully helpful > > to > > > the people like me who want to participate in Origami EC project - > > creation of > > > open source firmware for KB9012 which in case of success will be a HUGE > > step > > > towards Lenovo G505S liberation (AMD laptop with coreboot support) . > > > Discovered Paul's presentation talk by pure accident - > > > https://www.youtube.com/watch?v=B708jdCiW7o > > > > > > So I tried using two SPI programmers: 1) CH341A . 2) Bus Pirate v4 . The > > only > > > observed difference is a speed: for CH341A read takes 13-14 minutes, while > > for > > > BPv4 - despite the latest 7.0 firmware with level 3 optimizations ( http:/ > > /dan > > > gerousprototypes.com/docs/Bus_Pirate#Download ) and SPI speed is 8 MHz - > > it > > > takes 40 minutes to read! Checksums of the files are the same and the > > files > > > have almost the same contains as KB9012 image for LA-A091P G505S that I > > found > > > online (same except the area 0x1d000 - 0x1e0f0, their image is filled with > > > 0xff there, mine has many 0x00 with a few 0xff and also data - probably > > > encoded serial number and similar stuff) , so I am pretty sure these > > > programmers both are reading without errors in my setup, just at the > > different > > > speeds for some weird reason > > > > > > Patches applied before testing: > > > 1) https://patchwork.coreboot.org/patch/4412/ > > > 2) https://patchwork.coreboot.org/patch/4413/ > > > 3) https://patchwork.coreboot.org/patch/4414/ > > > > > > This problem with 1/2 detection rate is not a blocker, more like a small > > > inconvenience, so I strongly believe that these patches should be merged > > as > > > soon as possible! Paul Kocialkowski has committed them almost a year ago, > > such > > > a major feature and still not merged?? > > > > > > Below you could see some -VVV detection logs. > > > > > > After reading this really inspiring article ( http://code.paulk.fr/article > > 25/a > > > n-incentive-for-liberating-computers-my-own-use-case ) I guess that Paul's > > > motherboard is LA-A092P, very similar to LA-A091P but no extra GPU. Could > > that > > > be a reason he is not getting a detection problem? Just a wild guess... > > > > > > Yours sincerely, > > > Mikeb > > > > > > 1) Common part of "2) and "3)" - CH341A tries to detect: > > > sudo ./flashrom -p ch341a_spi -c "KB9012 (EDI)" -VVV > > > flashrom v0.9.9-r1954 on Linux 4.4.0-36-generic (x86_64) > > > flashrom is free software, get the source code at https://flashrom.org > > > flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian > > > Command line (5 args): ./flashrom -p ch341a_spi -c KB9012 (EDI) -VVV > > > > > > 2) FAIL: > > > Calibrating delay loop... OS timer resolution is 1 usecs, 578M loops per > > > second, 10 myus = 11 us, 100 myus = 92 us, 1000 myus = 914 us, 10000 myus > > = > > > 9661 us, 4 myus = 5 us, OK. > > > Initializing ch341a_spi programmer, Device revision is 3.0.4 > > > Wrote 3 bytes: aa 61 00 > > > Wrote 4 bytes: ab b7 7f 20 > > > The following protocols are supported: SPI. > > > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > > > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > > > Read 7 bytes: ff ff ff ff 00 00 00 > > > programmer_unmap_flash_region: unmapped 0x0000000000000000 > > > No EEPROM/flash device found. > > > Note: flashrom can never write if the flash chip isn't found > > automatically. > > > Wrote 4 bytes: ab b7 40 20 > > > > > > 3) SUCCESS: > > > Calibrating delay loop... OS timer resolution is 1 usecs, 629M loops per > > > second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 994 us, 10000 myus > > = > > > 9974 us, 4 myus = 4 us, OK. > > > Initializing ch341a_spi programmer, Device revision is 3.0.4 > > > Wrote 3 bytes: aa 61 00 > > > Wrote 4 bytes: ab b7 7f 20 > > > The following protocols are supported: SPI. > > > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > > > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a c3 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 24 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a 20 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a 00 > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 80 > > > Read 5 bytes: 00 00 00 00 00 > > > Found ENE flash chip "KB9012 (EDI)" (128 kB, SPI) on ch341a_spi. > > > programmer_unmap_flash_region: unmapped 0x0000000000000000 > > > No operations were specified. > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a 80 > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 00 > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 34 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 cf > > > Read 1 bytes: 00 > > > Wrote 4 bytes: ab b7 40 20 > > > > > > 4) Small part of Bus Pirate v4 reading log: > > > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 > > 0x00 > > > 0xfe 0xab, receiving 0x01 0x5f 0x50 0x90 > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xa8 0xc6, receiving 0x01 > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xac 0x03, receiving 0x01 > > > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 > > 0x00 > > > 0xfe 0xab, receiving 0x01 0x5f 0x50 0xec > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xa8 0xc7, receiving 0x01 > > > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > > > 0x00 0xfe 0xac 0x03, receiving 0x01 > > > > > > 5) Small part of CH341A reading log: > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > > > Read 7 bytes: 00 00 00 00 fa 0a ff > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 15 fb > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 35 c0 > > > Read 5 bytes: 00 00 00 00 00 > > > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 > > 00 00 > > > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > > > > > -- > > Paul Kocialkowski, developer of low-level free software for embedded devices > > > > Website: https://www.paulk.fr/ > > Coding blog: https://code.paulk.fr/ > > Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/ > > _______________________________________________ > > flashrom mailing list > > flashrom(a)flashrom.org > > https://www.flashrom.org/mailman/listinfo/flashrom > > -- Paul Kocialkowski, developer of low-level free software for embedded devices Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/

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Successful READ and WRITE, Asrock P4i65G
by R F 07 Oct '16

07 Oct '16

Using a legacy board as a flasher, flashrom nagged me to submit a report. Nice software, thanks.

1 0

Success flashrom on Wyse C10LE
by Romain MARIADASSOU - Service Informatique 06 Oct '16

06 Oct '16

Machine : Wyse C10LE Should work on Wyse C50LE Command line used : flashrom -w bios2012.img -V -p internal:laptop=this_is_not_a_laptop Log file attached -- Cordialement, CIAS à l'Ouest de Rennes *Romain MARIADASSOU* /Pôle Ressources/ - /Service Informatique/ CIAS à l'Ouest de Rennes Place Toulouse Lautrec - BP 31 - 35310 MORDELLES Tél : 02 23 41 28 00 - Fax : 02 23 41 28 09 Site : http://www.cias-ouest-rennes.fr Mail : informatique(a)cias-ouest-rennes.fr <mailto:informatique@cias-ouest-rennes.fr>

1 0

Jetway NF9G-QM77 test success
by Nick M 04 Oct '16

04 Oct '16

Greetings, Fortune was on my side when I extracted the same spi flash chip from my junk collection that this mini itx uses. A freshly downloaded bios image was flashed with external ft2232h to recycled flash and swapped with original chip. I followed the suggested methodology to test unknown hardware, output of hardware probing was piped to attached text files. Read, write, erase and probe work as intended. Diff returned no file differences and pc booted as expected using A07, A08 and backup binary images. Thanks, -- Nick

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Re: [flashrom] [coreboot] Support for Gigabyte ga-ma78gm-us2h?
by Mike Banon 03 Oct '16

03 Oct '16

Get a hardware programmer for BIOS chips (e.g. cheap CH341A) together with SOIC8 test clip (if your type of BIOS chip is indeed SOIC8, I just looked at some photos of your board online...) and do In-System Programming with a flashrom. Thanks to a test clip you will not need to solder your board in order to flash a BIOS. Nothing can stop a hardware programmer ;) You could backup both of your current BIOSes and replace everything with coreboot to get rid of original BIOS warnings/checksums , and if you would like to restore the original BIOS back it will be really easy. Now, what could be tried if a current revision of coreboot does not work for you? 1) Check what is the date of last successful board status report. At your case, I see that nobody submitted a report for your board, so you probably need to choose this day as the day of support addition ( Aug 17 13:22:40 2010 ) and test if it worked at this time or maybe 1 month after this time (if a full support has been added gradually) 2) You divide the time between current date and "1)" date by 2 - to get a "test date" - then download a coreboot/seabios repositories at this "test date", build and test it. If it works --> you go forward in time, if it does not work --> you go back in time; again, dividing the remaining range by two. You have to go through a long history in your case, 2000 days, but if you are always dividing by two its less than 2048 = 2^11 so you could find the last day it worked in 11 tries 3) So you found the last day, and then the last commit when it worked. Now you see what commit broke a support for your board, and could either live with old coreboot stuff, or figure out what changes need to be made to newer coreboot - so that your board works, while not breaking a support for other boards (IMPORTANT) Best regards, Mike Banon > > Thanks a lot for the help, but now I don't even get to the black screen. > Whenever I flash coreboot and reboot the computer, after a few seconds of > black-screen the backup BIOS complains about a checksum fail from the main > bios chip and resets the contents to the original BIOS. I have a few ideas > to try tonight, so I'll try that. Hopefully I'll be able to achieve > something. > > Cheers, > Alberto > 2016-09-28 15:10 GMT-03:00 Zoran Stojsavljevic < zoran.stojsavljevic at gmail.com>: > *"Приветствую!* > *Если я правильно понял, то у меня была схожая проблема, когда я пытался > запустить coreboot на Asus m4a785-m. Я потратил 2 месяца на ее решение, а > решение оказалось простым.* > *Проблема в вызовах printk() до инициализации консоли. Видимо > переполняется кэш процессора."* > > Translation for the above is the following (maybe this also can help): > > Hello, > > If I correctly understand, I had very similar problem, when I > struggled/tried to bring up Coreboot on Asus m4a785-m. I lost two months > for solution finding, and solution appeared to be simplistic. > Problem is by calling printk() before console init. Apparently CPU cache > is overloading. > > (love Russian language, could not resist)! > > Zoran > > On Wed, Sep 28, 2016 at 5:54 PM, Alexey Borovikov via coreboot < > coreboot at coreboot.org> wrote: > >> Hi! >> May be the problems in call printk() before console_init(). Two way: >> 1. To comment printk in function which call before console_init. >> 2. Call console_init first in function cache_as_ram_main. >> May be this help. >> >> /* >> Приветствую! >> Если я правильно понял, то у меня была схожая проблема, когда я пытался >> запустить coreboot на Asus m4a785-m. Я потратил 2 месяца на ее решение, а >> решение оказалось простым. >> Проблема в вызовах printk() до инициализации консоли. Видимо >> переполняется кэш процессора. >> Для решения два пути: >> 1. Закомментировать все вызовы printk до вызова console_init >> 2. Попробовать вызвать console_init как можно раньше в функции >> cache_as_ram_main (файл romstage.c). >> Возможно это поможет. >> */ >> >> >> *From:* Alberto Simón Francés <alberto at simon.ph> >> *Sent:* Sunday, September 25, 2016 6:07 PM >> *To:* coreboot at coreboot.org >> *Subject:* [coreboot] Support for Gigabyte ga-ma78gm-us2h? >> >> >> Hello, >> >> I've been trying to make this board boot and I haven't had much success. >> Sometimes I've been able to get it to POST, but it's not something that >> happens consistently. Since I can't find much info other than it being >> listed, I'm asking here to see if by any chance there's something that I'm >> missing, because I feel like I'm just trying random things to see what >> sticks. >> >> Thankfully the board has dual bios, so it's easy to go back if I mess >> something up. Please, help. >> >> Best regards, >> Albert >> >> ------------------------------ >> -- >> coreboot mailing list: coreboot at coreboot.org >> https://www.coreboot.org/mailman/listinfo/coreboot >> >> >> -- >> coreboot mailing list: coreboot at coreboot.org >> https://www.coreboot.org/mailman/listinfo/coreboot >> > >

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Upgrade MS-7519 / MSI P45 NEO
by Jelle Martijn Kok 01 Oct '16

01 Oct '16

The bios of this board upgraded perfectly. 2 things to note: * I received several nasty "Trying to unmap a nonexisting mapping!" messages.("-c W25X80" prevented these) * I need to clear the BIOS setup using the jumper Enclosed is the log for the probe (with "-V") Jelle Martijn -- ------------------------------------------------------------------------ You/Com Audiocommunicatie BV Motorenweg 5k 2623CR Delft The Netherlands tel. : (+31)15 262 59 55 fax. : (+31)15 257 15 95 mail : jmkok(a)youcom.nl http : http://www.youcom.nl/ ------------------------------------------------------------------------

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Re: [flashrom] ENE KB9012 patches: new test results
by Paul Kocialkowski 01 Oct '16

01 Oct '16

Hi, I got your emails just fine, I just didn't have time to sit down and write a proper reply but I'm very enthusiasic about working with you ! Cheers, Paul Kocialkowski Le vendredi 23 septembre 2016 à 03:16 +0300, mikeb mikeb a écrit : > Good day! I just tried reading from KB9012 and encountered exactly the same > problem as Joerg Albert has ( https://www.flashrom.org/pipermail/flashrom/2016 > -May/014653.html ) - chip is detected only every second time. This is not > caused by cabling. While it is recommended for SPI that the wires should be > shorter than 20cm, my wires are 11 cm: 8 cm of which is 12 strands high > quality copper and only 3 cm are ordinary aluminium inside the 30 pin 0.5mm > pitch keyboard-like connector This is interesting! I still haven't been able to reproduce the issue (but haven't tried so hard either). Could you indicate whether you are: * grounding pin 42 to go into test mode * powering the mainboard Thanks! > NOTE: it was much easier and safer to solder 1P wires to this connector rather > than to motherboard, and you could remove/insert it at any time - what a great > convenience! The only 1P wire I had to solder to motherboard is to > motherboard's ground, - to make it possible to unite three grounds > (motherboard s, KB9012 s and programmer s) - and that was really easy because > at least one of these orange circle grounds has a great distance between it > and motherboard's elements so it is difficult to screw up there :) Going to > share photos and write some manuals about connectivity, hopefully helpful to > the people like me who want to participate in Origami EC project - creation of > open source firmware for KB9012 which in case of success will be a HUGE step > towards Lenovo G505S liberation (AMD laptop with coreboot support) . > Discovered Paul's presentation talk by pure accident - > https://www.youtube.com/watch?v=B708jdCiW7o > > So I tried using two SPI programmers: 1) CH341A . 2) Bus Pirate v4 . The only > observed difference is a speed: for CH341A read takes 13-14 minutes, while for > BPv4 - despite the latest 7.0 firmware with level 3 optimizations ( http://dan > gerousprototypes.com/docs/Bus_Pirate#Download ) and SPI speed is 8 MHz - it > takes 40 minutes to read! Checksums of the files are the same and the files > have almost the same contains as KB9012 image for LA-A091P G505S that I found > online (same except the area 0x1d000 - 0x1e0f0, their image is filled with > 0xff there, mine has many 0x00 with a few 0xff and also data - probably > encoded serial number and similar stuff) , so I am pretty sure these > programmers both are reading without errors in my setup, just at the different > speeds for some weird reason > > Patches applied before testing: > 1) https://patchwork.coreboot.org/patch/4412/ > 2) https://patchwork.coreboot.org/patch/4413/ > 3) https://patchwork.coreboot.org/patch/4414/ > > This problem with 1/2 detection rate is not a blocker, more like a small > inconvenience, so I strongly believe that these patches should be merged as > soon as possible! Paul Kocialkowski has committed them almost a year ago, such > a major feature and still not merged?? > > Below you could see some -VVV detection logs. > > After reading this really inspiring article ( http://code.paulk.fr/article25/a > n-incentive-for-liberating-computers-my-own-use-case ) I guess that Paul's > motherboard is LA-A092P, very similar to LA-A091P but no extra GPU. Could that > be a reason he is not getting a detection problem? Just a wild guess... > > Yours sincerely, > Mikeb > > 1) Common part of "2) and "3)" - CH341A tries to detect: > sudo ./flashrom -p ch341a_spi -c "KB9012 (EDI)" -VVV > flashrom v0.9.9-r1954 on Linux 4.4.0-36-generic (x86_64) > flashrom is free software, get the source code at https://flashrom.org > flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian > Command line (5 args): ./flashrom -p ch341a_spi -c KB9012 (EDI) -VVV > > 2) FAIL: > Calibrating delay loop... OS timer resolution is 1 usecs, 578M loops per > second, 10 myus = 11 us, 100 myus = 92 us, 1000 myus = 914 us, 10000 myus = > 9661 us, 4 myus = 5 us, OK. > Initializing ch341a_spi programmer, Device revision is 3.0.4 > Wrote 3 bytes: aa 61 00 > Wrote 4 bytes: ab b7 7f 20 > The following protocols are supported: SPI. > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > Read 7 bytes: ff ff ff ff 00 00 00 > programmer_unmap_flash_region: unmapped 0x0000000000000000 > No EEPROM/flash device found. > Note: flashrom can never write if the flash chip isn't found automatically. > Wrote 4 bytes: ab b7 40 20 > > 3) SUCCESS: > Calibrating delay loop... OS timer resolution is 1 usecs, 629M loops per > second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 994 us, 10000 myus = > 9974 us, 4 myus = 4 us, OK. > Initializing ch341a_spi programmer, Device revision is 3.0.4 > Wrote 3 bytes: aa 61 00 > Wrote 4 bytes: ab b7 7f 20 > The following protocols are supported: SPI. > Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping > KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a c3 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 24 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a 20 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a 00 > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 80 > Read 5 bytes: 00 00 00 00 00 > Found ENE flash chip "KB9012 (EDI)" (128 kB, SPI) on ch341a_spi. > programmer_unmap_flash_region: unmapped 0x0000000000000000 > No operations were specified. > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a 80 > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 00 > Read 5 bytes: 00 00 00 00 00 > Wrote 34 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 cf > Read 1 bytes: 00 > Wrote 4 bytes: ab b7 40 20 > > 4) Small part of Bus Pirate v4 reading log: > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 > 0xfe 0xab, receiving 0x01 0x5f 0x50 0x90 > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xa8 0xc6, receiving 0x01 > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xac 0x03, receiving 0x01 > buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 > 0xfe 0xab, receiving 0x01 0x5f 0x50 0xec > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xa8 0xc7, receiving 0x01 > buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 > 0x00 0xfe 0xac 0x03, receiving 0x01 > > 5) Small part of CH341A reading log: > Read 5 bytes: 00 00 00 00 00 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > Read 7 bytes: 00 00 00 00 fa 0a ff > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 15 fb > Read 5 bytes: 00 00 00 00 00 > Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 35 c0 > Read 5 bytes: 00 00 00 00 00 > Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff > -- Paul Kocialkowski, developer of low-level free software for embedded devices Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/ -- Envoyé de mon appareil Android avec K-9 Mail. Veuillez excuser ma brièveté.

2 1

Flashrom error with request to report
by Thomas Köhn 29 Sep '16

29 Sep '16

Calibrating delay loop... OK. Found Spansion flash chip "S25FL164K" (8192 kB, SPI) on ft2232_spi. Reading old flash chip contents... done. Erasing and writing flash chip... FAILED at 0x00000000! Expected=0xff, Found=0xbd, failed byte count from 0x00000000-0x00000fff: 0x2fb ERASE FAILED! Reading current flash chip contents... ftdi_write_data: -110, usb bulk write failed send_buf failed at end: 1 Can't read anymore! Aborting. FAILED! Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... ftdi_write_data: -110, usb bulk write failed send_buf failed at end: 1 Can't even read anymore! Your flash chip is in an unknown state. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks!

1 0

acer aspire 7750g
by Torsten Heins 28 Sep '16

28 Sep '16

At acer aspire 7750g flashrom doesn't function.

2 1

Flashrom try while logged in
by john 25 Sep '16

25 Sep '16

I tried the flashEROm for an older computer A7V266, at the moment it has the 1011 flash installed, I am intending to try the 1015: only to see if there are any features that provide more options, such as boot from USB or set NUMLOCK, which at the moment it does have for either one (USB or NUMLOCK) The last flash offer available from global server, not the USA support site, although the link was provided for other locations..

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ENE KB9012 patches: new test results
by mikeb mikeb 23 Sep '16

23 Sep '16

Good day! I just tried reading from KB9012 and encountered exactly the same problem as Joerg Albert has ( https://www.flashrom.org/pipermail/flashrom/2016-May/014653.html ) - chip is detected only every second time. This is not caused by cabling. While it is recommended for SPI that the wires should be shorter than 20cm, my wires are 11 cm: 8 cm of which is 12 strands high quality copper and only 3 cm are ordinary aluminium inside the 30 pin 0.5mm pitch keyboard-like connector NOTE: it was much easier and safer to solder 1P wires to this connector rather than to motherboard, and you could remove/insert it at any time - what a great convenience! The only 1P wire I had to solder to motherboard is to motherboard's ground, - to make it possible to unite three grounds (motherboard s, KB9012 s and programmer s) - and that was really easy because at least one of these orange circle grounds has a great distance between it and motherboard's elements so it is difficult to screw up there :) Going to share photos and write some manuals about connectivity, hopefully helpful to the people like me who want to participate in Origami EC project - creation of open source firmware for KB9012 which in case of success will be a HUGE step towards Lenovo G505S liberation (AMD laptop with coreboot support) . Discovered Paul's presentation talk by pure accident - https://www.youtube.com/watch?v=B708jdCiW7o So I tried using two SPI programmers: 1) CH341A . 2) Bus Pirate v4 . The only observed difference is a speed: for CH341A read takes 13-14 minutes, while for BPv4 - despite the latest 7.0 firmware with level 3 optimizations ( http://dangerousprototypes.com/docs/Bus_Pirate#Download ) and SPI speed is 8 MHz - it takes 40 minutes to read! Checksums of the files are the same and the files have almost the same contains as KB9012 image for LA-A091P G505S that I found online (same except the area 0x1d000 - 0x1e0f0, their image is filled with 0xff there, mine has many 0x00 with a few 0xff and also data - probably encoded serial number and similar stuff) , so I am pretty sure these programmers both are reading without errors in my setup, just at the different speeds for some weird reason Patches applied before testing: 1) https://patchwork.coreboot.org/patch/4412/ 2) https://patchwork.coreboot.org/patch/4413/ 3) https://patchwork.coreboot.org/patch/4414/ This problem with 1/2 detection rate is not a blocker, more like a small inconvenience, so I strongly believe that these patches should be merged as soon as possible! Paul Kocialkowski has committed them almost a year ago, such a major feature and still not merged?? Below you could see some -VVV detection logs. After reading this really inspiring article ( http://code.paulk.fr/article25/an-incentive-for-liberating-computers-my-own… ) I guess that Paul's motherboard is LA-A092P, very similar to LA-A091P but no extra GPU. Could that be a reason he is not getting a detection problem? Just a wild guess... Yours sincerely, Mikeb 1) Common part of "2) and "3)" - CH341A tries to detect: sudo ./flashrom -p ch341a_spi -c "KB9012 (EDI)" -VVV flashrom v0.9.9-r1954 on Linux 4.4.0-36-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian Command line (5 args): ./flashrom -p ch341a_spi -c KB9012 (EDI) -VVV 2) FAIL: Calibrating delay loop... OS timer resolution is 1 usecs, 578M loops per second, 10 myus = 11 us, 100 myus = 92 us, 1000 myus = 914 us, 10000 myus = 9661 us, 4 myus = 5 us, OK. Initializing ch341a_spi programmer, Device revision is 3.0.4 Wrote 3 bytes: aa 61 00 Wrote 4 bytes: ab b7 7f 20 The following protocols are supported: SPI. Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff Read 7 bytes: ff ff ff ff 00 00 00 programmer_unmap_flash_region: unmapped 0x0000000000000000 No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Wrote 4 bytes: ab b7 40 20 3) SUCCESS: Calibrating delay loop... OS timer resolution is 1 usecs, 629M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 994 us, 10000 myus = 9974 us, 4 myus = 4 us, OK. Initializing ch341a_spi programmer, Device revision is 3.0.4 Wrote 3 bytes: aa 61 00 Wrote 4 bytes: ab b7 7f 20 The following protocols are supported: SPI. Probing for ENE KB9012 (EDI), 128 kB: programmer_map_flash_region: mapping KB9012 (EDI) from 0x00000000fffe0000 to 0x0000000000000000 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 00 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a c3 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 24 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a 20 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a 00 Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 80 Read 5 bytes: 00 00 00 00 00 Found ENE flash chip "KB9012 (EDI)" (128 kB, SPI) on ch341a_spi. programmer_unmap_flash_region: unmapped 0x0000000000000000 No operations were specified. Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 ff 28 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a 80 Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 ff 28 00 Read 5 bytes: 00 00 00 00 00 Wrote 34 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 cf Read 1 bytes: 00 Wrote 4 bytes: ab b7 40 20 4) Small part of Bus Pirate v4 reading log: buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 0xfe 0xab, receiving 0x01 0x5f 0x50 0x90 buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xa8 0xc6, receiving 0x01 buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xac 0x03, receiving 0x01 buspirate_sendrecv: write 9, read 4 Sending 0x04 0x00 0x04 0x00 0x03 0x30 0x00 0xfe 0xab, receiving 0x01 0x5f 0x50 0xec buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xa8 0xc7, receiving 0x01 buspirate_sendrecv: write 10, read 1 Sending 0x04 0x00 0x05 0x00 0x00 0x40 0x00 0xfe 0xac 0x03, receiving 0x01 5) Small part of CH341A reading log: Read 5 bytes: 00 00 00 00 00 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff Read 7 bytes: 00 00 00 00 fa 0a ff Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 15 fb Read 5 bytes: 00 00 00 00 00 Wrote 38 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 02 00 7f 35 c0 Read 5 bytes: 00 00 00 00 00 Wrote 40 bytes: ab b7 b7 b7 b6 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a8 0c 00 7f d5 ff ff ff

1 0

Re: [flashrom] Issue programming SPI flash
by Stefan Tauner 21 Sep '16

21 Sep '16

On Tue, 20 Sep 2016 23:00:15 +0000 Steve Burks <steve.burks(a)us.kontron.com> wrote: > Hi, > I have been flashing Macronix SPI with device ID MX25L12805D. We now have a new Numonyx SPI with device ID N25Q128..3E. However, when I try to flash the device it says that no flash device was found. But when I do the -p internal it clearly shows the device ID N25Q128..3E > > I have attached the verbose output from when I ran the command. I appreciate any assistance that you can provide. > > Thank you. > > Stephen Burks Hi Stephen, you have a Winbond W25Q128 there. All of these three are interchangeable so I guess someone swapped it without telling you :) In any case you should not use the -c parameter unless you have to and really know what chip is on there. Without it flashrom will find the right chip itself if it can. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Issue programming SPI flash
by Steve Burks 21 Sep '16

21 Sep '16

Hi, I have been flashing Macronix SPI with device ID MX25L12805D. We now have a new Numonyx SPI with device ID N25Q128..3E. However, when I try to flash the device it says that no flash device was found. But when I do the -p internal it clearly shows the device ID N25Q128..3E I have attached the verbose output from when I ran the command. I appreciate any assistance that you can provide. Thank you. Stephen Burks Manager, Manufacturing Engineering - USA Manufacturing Engineering and Material Data Management Kontron 14118 Stowe Drive | Poway, CA 92064 | USA P: + 1 (858) 677-0877 x3266 | M: + 1 (858) 699-4690 Steve.Burks(a)us.kontron.com<mailto:Steve.Burks@us.kontron.com> Website<http://www.kontron.com/> | Blog<http://blog.kontron.com/> | Twitter<https://twitter.com/Kontron> | LinkedIn<https://www.linkedin.com/company/kontron> | YouTube<https://www.youtube.com/channel/UCXkp_1gJbG0Um1vzdowlqww> | Facebook<https://www.facebook.com/kontron> Kontron America Please find our mandatory legal statements here<http://www.kontron.com/additional/disclaimer>. By opening this email you are agreeing to Kontron's Electronic Communications Policy<http://www.kontron.com/additional/legal-and-copyright-information>.

1 0

[PATCH] add board enable for apple iMac5,2
by Arthur Heymans 19 Sep '16

19 Sep '16

Hi This patch adds the apple iMac5,2 to board enable. The hardware is very similar to the apple macbook2,1.

2 4

untested chipset intel
by Jan van Roessel 19 Sep '16

19 Sep '16

Marked as untested chipset Intel NUC, see attached log Met vriendelijke groet, Jan van Roessel

1 0

testing my A7V333
by Elmar Stellnberger 17 Sep '16

17 Sep '16

Today I have also tested my A7V333 mainboard with the latest flashrom from svn; and see it could read an image (log in the attachement). It said that write and erase would still need to be tested; however the following message does not raise my confidence: Changing lock bits failed at 0xb7305002! New value: 0xff. Basically I would also be ready to test erase & write on this board though it would likely be a good idea to have the error/log messages checked first.

1 2

Unable to detect SPI-Flash connected to RT5350 using flashrom.
by Pradeep Ch 17 Sep '16

17 Sep '16

We are using flashrom tool to program SPI flash on a RT5350 chipset board. We are able to program if we directly connect Jtag to the SPI -Serial Flash. The RT5350 has a Jtag interface pins. Can we connect a Jtag connector to connect to this interface and program SPI-Serial flash using flashrom. Rgds, Pradeep Ch.

1 0

Re: [flashrom] W836xx: L372N1 / GC Frontman (flashrom: unknown reg 0x20 ID: ea)
by Elmar Stellnberger 14 Sep '16

14 Sep '16

Here come the message files for erase & write: P.S.: re-sent to the mailinglist from 2016-09-11 since I did not get a response by Jim for some days. Am 2016-09-11 um 12:57 schrieb Elmar Stellnberger: > Hi Jim Rowan, > Hi Readers of the Flashrom List, > > Today I have re-tried it with the newest flashrom and the patch at > http://patchwork.coreboot.org/patch/4127 > - and see it worked (attachement). > > board name: Gericom Frontman, L372N1 ( EON EN29F040A ) > > Regards, > Elmar > > > Am 2016-09-02 um 23:04 schrieb Elmar Stellnberger: >> Today I have tried flashrom on a rather old L372N1 computer (PIV 2,8Ghz, >> GC Frontman): >> ------------------------------------------------------------ >> flashrom v0.9.7-r1711 on Linux 3.14.50-std460-i586 (i686) >> flashrom is free software, get the source code at http://www.flashrom.org >> >> Calibrating delay loop... OK. >> Active config mode, unknown reg 0x20 ID: ea. >> Please send the output of "flashrom -V" to >> flashrom(a)flashrom.org with W836xx: your board name: flashrom -V >> as the subject to help us finish support for your Super I/O. Thanks. >> Found chipset "SiS 645DX". Enabling flash write... OK. >> No EEPROM/flash device found. >> Note: flashrom can never write if the flash chip isn't found >> automatically. >> ------------------------------------------------------------ >> >> The BIOS Chip on the mainboard can be accessed easily; it is placed >> inside a special hanger and appears to be replacable. There is a sticker >> on the BIOS Chip saying: >> >> 686 >> AMIBIOS >> NBEC(c)2000 >> BA31 >> 8603 >> >> installed BIOS: Amibios v1.54, 10/15/2003, Version 1.08G >> >> The current BIOS there has some disadvantages like support with old >> style disks up to a maximum of 160GB (manual Cylinder-Head-Sector >> configuration); today I have tried it with a 64GB SSD IDE disk and the >> BIOS can not boot from it ( CD + floppy boot is o.k.). >> >> How do you believe are the chances to get flashrom running on that >> machine or to exchange the BIOS with a newer one? >> >> Elmar >> >> >> P.S.: I have attached some more information about the system as I was >> unsure which one would help you.

1 0

W836xx: L372N1 / GC Frontman (flashrom: unknown reg 0x20 ID: ea)
by Elmar Stellnberger 14 Sep '16

14 Sep '16

Today I have tried flashrom on a rather old L372N1 computer (PIV 2,8Ghz, GC Frontman): ------------------------------------------------------------ flashrom v0.9.7-r1711 on Linux 3.14.50-std460-i586 (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Active config mode, unknown reg 0x20 ID: ea. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "SiS 645DX". Enabling flash write... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. ------------------------------------------------------------ The BIOS Chip on the mainboard can be accessed easily; it is placed inside a special hanger and appears to be replacable. There is a sticker on the BIOS Chip saying: 686 AMIBIOS NBEC(c)2000 BA31 8603 installed BIOS: Amibios v1.54, 10/15/2003, Version 1.08G The current BIOS there has some disadvantages like support with old style disks up to a maximum of 160GB (manual Cylinder-Head-Sector configuration); today I have tried it with a 64GB SSD IDE disk and the BIOS can not boot from it ( CD + floppy boot is o.k.). How do you believe are the chances to get flashrom running on that machine or to exchange the BIOS with a newer one? Elmar P.S.: I have attached some more information about the system as I was unsure which one would help you.

1 1

[Patch]ignore-read-error
by Tommy.Lo 13 Sep '16

13 Sep '16

Dear Maintainers , This patch is for the following description: Transaction is failed and errors are shown when flashrom try to read region that locked by Intel ME. This patch simply disable code to check error (will read 0xff) then flashrom will continue to read the rest. And only ignore the error when read op. It will output a warning message to stderr like: Transaction (READ) error at address 0x001000-0x7fffff, ignored To avoid a lot of similar error messages, it shows error at end of locked region. Thanks! Sign-off-by: Tommy Lo < tommy.lo(a)advantech.com.tw > Index: ichspi.c =================================================================== --- ichspi.c (revision 1955) +++ ichspi.c (working copy) @@ -178,6 +178,9 @@ static void *ich_spibar = NULL; +/* keep last addr of read error */ +static uint32_t last_read_warn_addr = 0xFFFFFFFF; + typedef struct _OPCODE { uint8_t opcode; //This commands spi opcode uint8_t spi_type; //This commands spi type @@ -946,14 +949,38 @@ /* FIXME make sure we do not needlessly cause transaction errors. */ temp32 = REGREAD32(ICH9_REG_SSFS); if (temp32 & SSFS_FCERR) { - msg_perr("Transaction error!\n"); - prettyprint_ich9_reg_ssfs(temp32); - prettyprint_ich9_reg_ssfc(temp32); - /* keep reserved bits */ - temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; - /* Clear the transaction error. */ - REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR); - return 1; + if (ichspi_lock && op.spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS) { + /* keep reserved bits */ + temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; + /* Clear the transaction error. */ + REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR); + if (last_read_warn_addr != 0xFFFFFFFF) { + if (last_read_warn_addr == (offset - 1)) { + /* continuing */ + last_read_warn_addr = offset + datalength - 1; + } else { + msg_pdbg("-0x%06x, ignored\n", last_read_warn_addr); + last_read_warn_addr = 0xFFFFFFFF; + } + } else { + msg_pdbg("Transaction (READ) error at address 0x%06x", offset); + last_read_warn_addr = offset + datalength - 1; + } + } else { + prettyprint_ich9_reg_ssfs(temp32); + prettyprint_ich9_reg_ssfc(temp32); + /* keep reserved bits */ + temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; + /* Clear the transaction error. */ + REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR); + msg_perr("Transaction error!\n"); + return 1; + } + } else { + if (last_read_warn_addr != 0xFFFFFFFF) { + msg_pdbg("-0x%06x, ignored\n", last_read_warn_addr); + last_read_warn_addr = 0xFFFFFFFF; + } } if ((!write_cmd) && (datalength != 0))

1 0

flashrom stops/hangs
by joshj23 07 Sep '16

07 Sep '16

while trying to flash a chip (winbond W25Q32.v), on a arduino uno r3, the TX and RX led's will be on while flashrom is running normally, but will almost always turn off and flashrom in the terminal will stop all activity any suggestions? -- *Josh*

1 0

output of "flashrom -V" / board: ECS MCP73VT-PM
by Paolo Gozzini 06 Sep '16

06 Sep '16

utente@server:~$ sudo flashrom -p internal -V flashrom v0.9.6.1-r1563 on Linux 3.19.0-68-generic (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 1 usecs, 2932M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1002 us, 10000 myus = 10000 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Packard Bell BV" DMI string system-product-name: "MCP73VT-PM" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "Packard Bell BV" DMI string baseboard-product-name: "MCP73VT-PM" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8718 on port 0x2e Found chipset "NVIDIA MCP73" with PCI ID 10de:07d7. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:07d8 at 00:03:1 MCP SPI BAR is at 0xfec80000 Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544. SPI control is 0xc012, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. No IT87* serial flash segment enabled. The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Chip status register is 00 Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x13 Found Winbond flash chip "W25X80" (1024 kB, SPI). No operations were specified.

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Re: [flashrom] GSoC conclusion
by Stefan Tauner 01 Sep '16

01 Sep '16

Hello Hatim, no worries! Life happens, mistakes were made and lessons learned on both sides. David and me where somewhat absent due to our workload, so we didn't check in with you as often as we should have. Ultimately the goal of GSoC is to help students such as yourself become members of the open source community. Your work in the first months and good standing with the community certainly helped making the decision easier for us, and we look forward to working with you in the flashrom community in the future. If it helps I can install znc (the IRC bouncer I am using myself) on a host and create an account for you but it's somewhat different from IRCCloud. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 3/3] ENE Embedded Debug Interface (EDI) and ENE KB9012 EC internal flash support
by David Wren 01 Sep '16

01 Sep '16

https://reservice.pro/upload/Datasheets/kb9012qf.pdf Lenovo g505s full datasheet!

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GSoC conclusion
by Hatim Kanchwala 01 Sep '16

01 Sep '16

Hello! The GSoC results are out and my mentors have let me pass. I sincerely thank my mentors, Stefan and David, for giving me the opportunity to work with flashrom and giving me the benefit of doubt in the final evaluation. In the final 2-3 weeks my communication towards my mentors had fallen. I had been suffering from Typhoid which adversely affected my work, but I had failed to communicate this to my mentor. I had decided then that I could manage to work without letting my illness affect me. In part it was over-estimation of my well being and in part it was the shame of not having worked sufficiently that prevented me from communicating. While I am thankfully fully recovered by now, I accept that it was a grave mistake on my part and I take responsibility for that. I hold immense respect for Stefan and David not only as my mentors but as very nice individuals, and having disappointed them is an utter failure for me. I have promised earlier, and I would like to re-iterate that I am committed to contributing to flashrom. I understand that no matter what I write or promise any further, I cannot regain that trust of my mentors, and of the community, unless I start delivering on those. On this I will finally say that flashrom is an endeavour I will continue to pursue, that I shall communicate better and that I shall regularly work on patches. David, I have received emails for your feedback on GitHub. Thanks for sending them in and I'll soon begin incorporating those as well. In the spirit of full disclosure, I will also add that since I was afflicted with the illness I have also missed several of my classes and labs in college. I have been trying to clear the backlog and midterm college exams are staring at me at a week's distance. I have allocated time for flashrom, but it may fluctuate. I shall be able to devote a bigger chunk of my time and be more consistent in a week or two. For the past few days I have been facing difficulty in connecting to IRC via IRCCloud, which offers persistent connections. So, if there were any messages directed to me, I apologize for having missed them. Once again I'd like to thank my mentors and the community. I have been able to flourish professionally and more importantly to me, I have built friendships (which I will work hard to renew and regain). It is difficult for me to express in words my gratitude and experience. Thanks for your time. Bye, Hatim

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