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[patch] flashchips.c updated with .probe_timing info from datasheets
by Putlinuxonit 27 Aug '09

27 Aug '09

Hi, I've updated the .probe_timing structs in flashchips.c with the correct timing information from the data sheets. find below a diff against flashrom-0.9.0-r701. Note: for chips that specified no timing information ,I've put a TIMING_ZERO with a comment saying /* Datasheet has no timing info specified */ Index: flashchips.c =================================================================== --- flashchips.c (revision 701) +++ flashchips.c (working copy) @@ -58,7 +58,7 @@ .page_size = 16 * 1024, .tested = TEST_OK_PREW, .probe = probe_29f040b, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, .erase = erase_29f040b, .write = write_pm29f002, .read = read_memmapped, @@ -74,7 +74,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -90,7 +90,7 @@ .page_size = 256, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -138,7 +138,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -668,7 +668,7 @@ .page_size = 64, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -684,7 +684,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, /* doc1008.pdf dont says anything about probe timing */ + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -700,7 +700,7 @@ .page_size = 256, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, /* doc1008.pdf dont says anything about probe timing */ + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -780,7 +780,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_49fl00x, - .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ + .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, .read = read_memmapped, @@ -796,7 +796,7 @@ .page_size = 4096, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1068,7 +1068,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -1084,7 +1084,7 @@ .page_size = 256, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -1100,7 +1100,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, .write = NULL, .read = read_memmapped, @@ -1116,7 +1116,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, .write = NULL, .read = read_memmapped, @@ -1164,7 +1164,7 @@ .page_size = 128 * 1024, /* 8k + 2x4k + 112k */ .tested = TEST_BAD_ERASE|TEST_BAD_WRITE, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, .write = NULL, .read = read_memmapped, @@ -1180,7 +1180,7 @@ .page_size = 128 * 1024, /* 112k + 2x4k + 8k */ .tested = TEST_OK_PR|TEST_BAD_ERASE|TEST_BAD_WRITE, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, .write = NULL, .read = read_memmapped, @@ -1692,7 +1692,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1916,7 +1916,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = 10, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2076,7 +2076,7 @@ .page_size = 16 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, - .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -2092,7 +2092,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PROBE, .probe = probe_sst_fwhub, - .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -2108,7 +2108,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, - .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -2140,7 +2140,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, - .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -2236,7 +2236,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, - .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ + .probe_timing = 1, /* 150ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -2482,7 +2482,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_m29f002, .write = write_m29f002b, .read = read_memmapped, @@ -2498,7 +2498,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_m29f002, .write = write_m29f002t, .read = read_memmapped, @@ -2546,7 +2546,7 @@ .page_size = 16 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2562,7 +2562,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2706,7 +2706,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2722,7 +2722,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2738,7 +2738,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2754,7 +2754,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2770,7 +2770,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2786,7 +2786,7 @@ .page_size = 16384, /* Non-uniform sectors */ .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, .write = NULL, .read = read_memmapped, @@ -2802,7 +2802,7 @@ .page_size = 16384, /* Non-uniform sectors */ .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, .write = NULL, .read = read_memmapped, @@ -2898,7 +2898,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = 10, /* used datasheet for the W29C011A */ .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -3042,7 +3042,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = 10, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -3074,7 +3074,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_FIXME, + .probe_timing = 10, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, Signed-off-by: Udu Ogah <putlinuxonit(a)gmail.com>

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Add svn:ignore to trunk/
by Joerg Mayer 24 Aug '09

24 Aug '09

Make it more pleasant to run "svn status" by ignoring generated files. ciao Joerg -- Joerg Mayer <jmayer(a)loplof.de> We are stuck with technology when what we really want is just stuff that works. Some say that should read Microsoft instead of technology.

2 1

[commit] r701 - trunk
by svn＠flashrom.org 24 Aug '09

24 Aug '09

Author: hailfinger Date: 2009-08-24 15:29:25 +0200 (Mon, 24 Aug 2009) New Revision: 701 Modified: trunk/ Log: Update svn:ignore Signed-off-by: Joerg Mayer <jmayer(a)loplof.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Property changes on: trunk ___________________________________________________________________ Added: svn:ignore + flashrom .features .dependencies

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patch: Improve contacting infos in README
by Joerg Mayer 24 Aug '09

24 Aug '09

see attached patch - patch is too small to be copyrightable (if there is such a word). ciao Joerg -- Joerg Mayer <jmayer(a)loplof.de> We are stuck with technology when what we really want is just stuff that works. Some say that should read Microsoft instead of technology.

2 3

[commit] r700 - trunk
by svn＠flashrom.org 24 Aug '09

24 Aug '09

Author: hailfinger Date: 2009-08-24 15:24:52 +0200 (Mon, 24 Aug 2009) New Revision: 700 Modified: trunk/README Log: Update contact info. Signed-off-by: Joerg Mayer <jmayer(a)loplof.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/README =================================================================== --- trunk/README 2009-08-24 01:47:33 UTC (rev 699) +++ trunk/README 2009-08-24 13:24:52 UTC (rev 700) @@ -117,10 +117,17 @@ flash chips, chipsets/southbridges, mainboards, and flash programmers. -Website +Contact ------- The official flashrom website is: http://www.flashrom.org/ +The IRC channel is + + #flashrom at irc.freenode.net + +The Mailing list addess is + + flashrom(a)flashrom.org

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Abit Fatal1ty FI90HD
by Joachim Ernst 24 Aug '09

24 Aug '09

Hi, just reporting, that the Abit Fatal1ty F-I90HD works with flashrom out of the box (scroll down for log, md5sum are identical). What has to be done to get coreboot working with the RS600 chipset, wich might be similar to the RS690 chipset (maybe only the gfx is similar). And how can I help with only little programming skill? Some specs about the board: http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?pMODEL_NA… Northbridge: RS600 Southbridge: SB600 Superiochip: W83627DHG Bioschip: SST49LF080A Networkchip: RTL8111B Soundchip: ALC888 Some other chips onboard with hopefully correct links: RT8802A - PQV - 8L60E power regulator for cpu http://www.richtek.com/download_ds.jsp?s=293 74HCT08D - BG433 16 - Un60712E near the cpu power http://www.nxp.com/acrobat_download/datasheets/74HC_HCT08_3.pdf W83320G - 26270790 - 633GB near the dimmsockets http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83320S_Ga.p… 74LVC14AD - 66576209 - eRGO636C near the dimmsockets http://www.nxp.com/acrobat_download/datasheets/74LVC14A_4.pdf 74LVC14AD - 6G576209 - eRGO636C between dimmsocket and powersocket W83 - 310DG - 707GB control for memory voltage? http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83310DS_DG-… http://www.nuvoton.com/NR/rdonlyres/D0143A70-FDCB-4786-A706-D8F9A7FBA7FF/0/… W83320G - 26270790 - 633GB near PCIe1 slot http://www.nuvoton.com/NR/rdonlyres/C9B362F4-3C96-47DC-AE6E-A028FE95BC60/0/… ICS 6322629 - 0701 - 951461BGLF between battery and PCIe1 slot maybe http://www.idt.com/?partId=951461BGLF W83303AG - 26332130 - 642GBRA near AUXfan connector and powerconnector http://www.nuvoton.com/NR/rdonlyres/92F916C5-8C69-4159-AB18-D7628B63D381/0/… flashrom v0.9.0-r699 No coreboot table found. Found chipset "AMD SB600", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH. Calibrating delay loop... OK. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Programming page: 0000 at address: 0x00000000 0010 at address: 0x0000a000 0020 at address: 0x00014000 0030 at address: 0x0001e000 0040 at address: 0x00028000 0050 at address: 0x00032000 0060 at address: 0x0003c000 0070 at address: 0x00046000 0080 at address: 0x00050000 0090 at address: 0x0005a000 0100 at address: 0x00064000 0110 at address: 0x0006e000 0120 at address: 0x00078000 0130 at address: 0x00082000 0140 at address: 0x0008c000 0150 at address: 0x00096000 0160 at address: 0x000a0000 0170 at address: 0x000aa000 0180 at address: 0x000b4000 0190 at address: 0x000be000 0200 at address: 0x000c8000 0210 at address: 0x000d2000 0220 at address: 0x000dc000 0230 at address: 0x000e6000 0240 at address: 0x000f0000 0250 at address: 0x000fa000 COMPLETE. Verifying flash... VERIFIED. # dmidecode 2.9 SMBIOS 2.5 present. 43 structures occupying 1317 bytes. Table at 0x000F0000. Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: Phoenix Technologies, LTD Version: 6.00 PG Release Date: 05/21/2008 Address: 0xE0000 Runtime Size: 128 kB ROM Size: 1024 kB Characteristics: ISA is supported PCI is supported PNP is supported APM is supported BIOS is upgradeable BIOS shadowing is allowed Boot from CD is supported Selectable boot is supported BIOS ROM is socketed EDD is supported 5.25"/360 KB floppy services are supported (int 13h) 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 KB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported AGP is supported LS-120 boot is supported ATAPI Zip drive boot is supported BIOS boot specification is supported Targeted content distribution is supported Handle 0x0001, DMI type 1, 27 bytes System Information Manufacturer: System Manufacter Product Name: System Product Name Version: System Version Serial Number: System Serial Number UUID: 00000000-0000-0000-0000-00508DB4516C Wake-up Type: Power Switch SKU Number: Family: Handle 0x0002, DMI type 2, 8 bytes Base Board Information Manufacturer: http://www.abit.com.tw/ Product Name: F-I90HD (ATI RS600-SB600) Version: 1.0 Serial Number: Handle 0x0003, DMI type 3, 17 bytes Chassis Information Manufacturer: System Enclosure Manufacter Type: Desktop Lock: Not Present Version: Unknow Serial Number: Asset Tag: Boot-up State: Unknown Power Supply State: Unknown Thermal State: Unknown Security Status: Unknown OEM Information: 0x00000000 Handle 0x0004, DMI type 4, 40 bytes Processor Information Socket Designation: Socket 775 Type: Central Processor Family: Other Manufacturer: Intel ID: F6 06 00 00 FF FB EB BF Version: Intel(R) Core(TM)2 Voltage: 1.2 V External Clock: 266 MHz Max Speed: 4000 MHz Current Speed: 2400 MHz Status: Populated, Enabled Upgrade: ZIF Socket L1 Cache Handle: 0x000A L2 Cache Handle: 0x000B L3 Cache Handle: Not Provided Serial Number: Asset Tag: Part Number: Characteristics: None Handle 0x0005, DMI type 5, 24 bytes Memory Controller Information Error Detecting Method: None Error Correcting Capabilities: None Supported Interleave: One-way Interleave Current Interleave: One-way Interleave Maximum Memory Module Size: 32 MB Maximum Total Memory Size: 128 MB Supported Speeds: 70 ns 60 ns Supported Memory Types: Standard EDO Memory Module Voltage: 3.3 V Associated Memory Slots: 4 0x0006 0x0007 0x0008 0x0009 Enabled Error Correcting Capabilities: None Handle 0x0006, DMI type 6, 12 bytes Memory Module Information Socket Designation: A0 Bank Connections: None Current Speed: 48 ns Type: Unknown Installed Size: Not Installed Enabled Size: Not Installed Error Status: OK Handle 0x0007, DMI type 6, 12 bytes Memory Module Information Socket Designation: A1 Bank Connections: 2 3 Current Speed: 48 ns Type: DIMM SDRAM Installed Size: 1024 MB (Double-bank Connection) Enabled Size: 1024 MB (Double-bank Connection) Error Status: OK Handle 0x0008, DMI type 6, 12 bytes Memory Module Information Socket Designation: A2 Bank Connections: None Current Speed: 48 ns Type: Unknown Installed Size: Not Installed Enabled Size: Not Installed Error Status: OK Handle 0x0009, DMI type 6, 12 bytes Memory Module Information Socket Designation: A3 Bank Connections: 6 7 Current Speed: 48 ns Type: DIMM SDRAM Installed Size: 1024 MB (Double-bank Connection) Enabled Size: 1024 MB (Double-bank Connection) Error Status: OK Handle 0x000A, DMI type 7, 19 bytes Cache Information Socket Designation: Internal Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Write Back Location: Internal Installed Size: 32 KB Maximum Size: 32 KB Supported SRAM Types: Synchronous Installed SRAM Type: Synchronous Speed: Unknown Error Correction Type: Unknown System Type: Unknown Associativity: Unknown Handle 0x000B, DMI type 7, 19 bytes Cache Information Socket Designation: External Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Write Back Location: External Installed Size: 4096 KB Maximum Size: 4096 KB Supported SRAM Types: Synchronous Installed SRAM Type: Synchronous Speed: Unknown Error Correction Type: Unknown System Type: Unknown Associativity: Unknown Handle 0x000C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: PRIMARY IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x000D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: SECONDARY IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x000E, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: FDD Internal Connector Type: On Board Floppy External Reference Designator: Not Specified External Connector Type: None Port Type: 8251 FIFO Compatible Handle 0x000F, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Keyboard Internal Connector Type: PS/2 External Reference Designator: External Connector Type: PS/2 Port Type: Keyboard Port Handle 0x0010, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: PS/2 Mouse Internal Connector Type: PS/2 External Reference Designator: External Connector Type: PS/2 Port Type: Mouse Port Handle 0x0011, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB0 External Connector Type: Other Port Type: USB Handle 0x0012, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB1 External Connector Type: Other Port Type: USB Handle 0x0013, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB2 External Connector Type: Other Port Type: USB Handle 0x0014, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB3 External Connector Type: Other Port Type: USB Handle 0x0015, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB4 External Connector Type: Other Port Type: USB Handle 0x0016, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB5 External Connector Type: Other Port Type: USB Handle 0x0017, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB6 External Connector Type: Other Port Type: USB Handle 0x0018, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB7 External Connector Type: Other Port Type: USB Handle 0x0019, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB8 External Connector Type: Other Port Type: USB Handle 0x001A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Not Specified Internal Connector Type: None External Reference Designator: USB9 External Connector Type: Other Port Type: USB Handle 0x001B, DMI type 9, 13 bytes System Slot Information Designation: PCI1 Type: 32-bit PCI Current Usage: Available Length: Long ID: 1 Characteristics: 5.0 V is provided PME signal is supported Handle 0x001C, DMI type 9, 13 bytes System Slot Information Designation: PCI2 Type: 32-bit PCI Current Usage: Available Length: Long ID: 2 Characteristics: 5.0 V is provided PME signal is supported Handle 0x001D, DMI type 9, 13 bytes System Slot Information Designation: PCI3 Type: 32-bit PCI Express Current Usage: In Use Length: Long ID: 3 Characteristics: 5.0 V is provided PME signal is supported Handle 0x001E, DMI type 13, 22 bytes BIOS Language Information Installable Languages: 3 n|US|iso8859-1 n|US|iso8859-1 r|CA|iso8859-1 Currently Installed Language: n|US|iso8859-1 Handle 0x001F, DMI type 16, 15 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: None Maximum Capacity: 2 GB Error Information Handle: Not Provided Number Of Devices: 4 Handle 0x0020, DMI type 17, 27 bytes Memory Device Array Handle: 0x001F Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: A0 Bank Locator: Bank0/1 Type: Unknown Type Detail: None Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x0021, DMI type 17, 27 bytes Memory Device Array Handle: 0x001F Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: A1 Bank Locator: Bank2/3 Type: Unknown Type Detail: None Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x0022, DMI type 17, 27 bytes Memory Device Array Handle: 0x001F Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: A2 Bank Locator: Bank4/5 Type: Unknown Type Detail: None Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x0023, DMI type 17, 27 bytes Memory Device Array Handle: 0x001F Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: A3 Bank Locator: Bank6/7 Type: Unknown Type Detail: None Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x0024, DMI type 19, 15 bytes Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0007FFFFFFF Range Size: 2 GB Physical Array Handle: 0x001F Partition Width: 0 Handle 0x0025, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000000003FF Range Size: 1 kB Physical Device Handle: 0x0020 Memory Array Mapped Address Handle: 0x0024 Partition Row Position: 1 Handle 0x0026, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0003FFFFFFF Range Size: 1 GB Physical Device Handle: 0x0021 Memory Array Mapped Address Handle: 0x0024 Partition Row Position: 1 Handle 0x0027, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000000003FF Range Size: 1 kB Physical Device Handle: 0x0022 Memory Array Mapped Address Handle: 0x0024 Partition Row Position: 1 Handle 0x0028, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00040000000 Ending Address: 0x0007FFFFFFF Range Size: 1 GB Physical Device Handle: 0x0023 Memory Array Mapped Address Handle: 0x0024 Partition Row Position: 1 Handle 0x0029, DMI type 32, 11 bytes System Boot Information Status: No errors detected Handle 0x002A, DMI type 127, 4 bytes End Of Table flashrom v0.9.0-r667 No coreboot table found. Found chipset "AMD SB600", enabling flash write... SPI base address is at 0x0 ROM strap override is not active OK. This chipset supports the following protocols: LPC,FWH. Calibrating delay loop... 683M loops per second, 100 myus = 201 us. OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F040B, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for ASD AE49F2008, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C020, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMIC A25L40P, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMIC A29002T, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMIC A29040B, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for AMIC A49LF040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for EMST F49B002UA, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Eon EN25B05, 64 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xaa, id2 0xbb Probing for Macronix MX25L512, 64 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for PMC Pm29F0002B, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for PMC Pm49FL002, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for PMC Pm49FL004, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xaa, id2 0xbb Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST29EE010, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST29LE010, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST29EE020A, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST29LE020, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF010A, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF020A, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF040, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF512, 64 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF010, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF020, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF040, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF080, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SST SST49LF002A/B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF003A/B, 384 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF004A/B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xaa, id2 0xbb Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000. Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for ST M29F040B, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for ST M29F400BT, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for ST M29W010B, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for ST M29W040B, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x5b Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x5b Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x5b Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x5b Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xaa, id2 0xbb Probing for ST M50LPW116, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Winbond W25x10, 128 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Winbond W29C020C, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Winbond W29C040P, 512 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Winbond W29EE011, 128 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xbf, id2 0x5b Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for Winbond W49F002U, 256 KB: skipped. Host bus type LPC,FWH and chip bus type Parallel are incompatible. Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0x5b Probing for Winbond W49V002FA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x5b Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: id1 0xbf, id2 0x5b Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: id1 0xbf, id2 0x5b Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type LPC,FWH and chip bus type SPI are incompatible. No operations were specified. 00:00.0 Host bridge [0600]: ATI Technologies Inc Radeon Xpress 7930 Host Bridge [1002:7930] Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 32 Kernel modules: ati-agp 00: 02 10 30 79 06 00 20 22 00 00 00 06 00 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.0 PCI bridge [0604]: ATI Technologies Inc RS7932 PCI Bridge [1002:7932] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 99 Bus: primary=00, secondary=01, subordinate=01, sec-latency=68 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fdf00000-fdffffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel modules: shpchp 00: 02 10 32 79 07 00 30 02 00 00 04 06 00 63 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 44 d1 d1 20 22 20: f0 fd f0 fd 01 d0 f1 df 00 00 00 00 00 00 00 00 30: 00 00 00 00 b0 00 00 00 00 00 00 00 ff 00 08 00 00:04.0 PCI bridge [0604]: ATI Technologies Inc Device [1002:7934] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 4 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fde00000-fdefffff Prefetchable memory behind bridge: 00000000fdd00000-00000000fddfffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: 02 10 34 79 07 04 10 00 00 00 04 06 01 00 01 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 e1 e1 00 00 20: e0 fd e0 fd d1 fd d1 fd 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 00:12.0 SATA controller [0106]: ATI Technologies Inc SB600 Non-Raid-5 SATA [1002:4380] (prog-if 01) Subsystem: ATI Technologies Inc SB600 Non-Raid-5 SATA [1002:4380] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 Interrupt: pin A routed to IRQ 22 Region 0: I/O ports at ff00 [size=8] Region 1: I/O ports at fe00 [size=4] Region 2: I/O ports at fd00 [size=8] Region 3: I/O ports at fc00 [size=4] Region 4: I/O ports at fb00 [size=16] Region 5: Memory at fe02f000 (32-bit, non-prefetchable) [size=1K] Capabilities: <access denied> Kernel driver in use: ahci 00: 02 10 80 43 07 00 30 02 00 01 06 01 00 20 00 00 10: 01 ff 00 00 01 fe 00 00 01 fd 00 00 01 fc 00 00 20: 01 fb 00 00 00 f0 02 fe 00 00 00 00 02 10 80 43 30: 00 00 00 00 60 00 00 00 00 00 00 00 0b 01 00 00 00:13.0 USB Controller [0c03]: ATI Technologies Inc SB600 USB (OHCI0) [1002:4387] (prog-if 10) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at fe02e000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 87 43 07 00 a0 02 00 10 03 0c 01 20 80 00 10: 00 e0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 01 00 00 00:13.1 USB Controller [0c03]: ATI Technologies Inc SB600 USB (OHCI1) [1002:4388] (prog-if 10) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin B routed to IRQ 17 Region 0: Memory at fe02d000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 88 43 07 00 a0 02 00 10 03 0c 01 20 00 00 10: 00 d0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 02 00 00 00:13.2 USB Controller [0c03]: ATI Technologies Inc SB600 USB (OHCI2) [1002:4389] (prog-if 10) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin C routed to IRQ 18 Region 0: Memory at fe02c000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 89 43 07 00 a0 02 00 10 03 0c 01 20 00 00 10: 00 c0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 03 00 00 00:13.3 USB Controller [0c03]: ATI Technologies Inc SB600 USB (OHCI3) [1002:438a] (prog-if 10) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin B routed to IRQ 17 Region 0: Memory at fe02b000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 8a 43 07 00 a0 02 00 10 03 0c 01 20 00 00 10: 00 b0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 02 00 00 00:13.4 USB Controller [0c03]: ATI Technologies Inc SB600 USB (OHCI4) [1002:438b] (prog-if 10) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin C routed to IRQ 18 Region 0: Memory at fe02a000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 02 10 8b 43 07 00 a0 02 00 10 03 0c 01 20 00 00 10: 00 a0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 03 00 00 00:13.5 USB Controller [0c03]: ATI Technologies Inc SB600 USB Controller (EHCI) [1002:4386] (prog-if 20) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 32 bytes Interrupt: pin D routed to IRQ 19 Region 0: Memory at fe029000 (32-bit, non-prefetchable) [size=256] Capabilities: <access denied> Kernel driver in use: ehci_hcd 00: 02 10 86 43 16 00 b0 02 00 20 03 0c 08 20 00 00 10: 00 90 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 c0 00 00 00 00 00 00 00 07 04 00 00 00:14.0 SMBus [0c05]: ATI Technologies Inc SBx00 SMBus Controller [1002:4385] (rev 13) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Region 0: I/O ports at 0b00 [size=16] Region 1: Memory at fed00000 (32-bit, non-prefetchable) [size=1K] Kernel driver in use: piix4_smbus Kernel modules: i2c-piix4 00: 02 10 85 43 03 04 20 02 13 00 05 0c 00 00 80 00 10: 01 0b 00 00 00 00 d0 fe 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.1 IDE interface [0101]: ATI Technologies Inc SB600 IDE [1002:438c] (prog-if 8a [Master SecP PriP]) Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 Interrupt: pin A routed to IRQ 16 Region 0: I/O ports at 01f0 [size=8] Region 1: I/O ports at 03f4 [size=1] Region 2: I/O ports at 0170 [size=8] Region 3: I/O ports at 0374 [size=1] Region 4: I/O ports at f900 [size=16] Capabilities: <access denied> Kernel driver in use: pata_atiixp 00: 02 10 8c 43 05 00 30 02 00 8a 01 01 00 20 00 00 10: 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00 20: 01 f9 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 70 00 00 00 00 00 00 00 ff 01 00 00 00:14.2 Audio device [0403]: ATI Technologies Inc SBx00 Azalia (Intel HDA) [1002:4383] Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin ? routed to IRQ 16 Region 0: Memory at fe024000 (64-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: 02 10 83 43 06 00 10 04 00 00 03 04 01 20 00 00 10: 04 40 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 00 00 00 00:14.3 ISA bridge [0601]: ATI Technologies Inc SB600 PCI to LPC Bridge [1002:438d] Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: 02 10 8d 43 0f 00 20 02 00 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.4 PCI bridge [0604]: ATI Technologies Inc SBx00 PCI to PCI Bridge [1002:4384] (prog-if 01) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop+ ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 Bus: primary=00, secondary=03, subordinate=03, sec-latency=64 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: fdc00000-fdcfffff Prefetchable memory behind bridge: fdb00000-fdbfffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- 00: 02 10 84 43 27 00 a0 02 00 01 04 06 00 40 81 00 10: 00 00 00 00 00 00 00 00 00 03 03 40 c0 c0 80 22 20: c0 fd c0 fd b0 fd b0 fd 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:05.0 VGA compatible controller [0300]: ATI Technologies Inc RS600 [Radeon Xpress 1200 Series] [1002:7941] Subsystem: ABIT Computer Corp. Device [147b:2412] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 2: Memory at fdff0000 (64-bit, non-prefetchable) [size=64K] Region 4: I/O ports at de00 [size=256] Capabilities: <access denied> 00: 02 10 41 79 07 00 10 00 00 00 00 03 01 20 00 00 10: 0c 00 00 d0 00 00 00 00 04 00 ff fd 00 00 00 00 20: 01 de 00 00 00 00 00 00 00 00 00 00 7b 14 12 24 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 00 00 02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 01) Subsystem: ABIT Computer Corp. Device [147b:2410] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 2302 Region 0: I/O ports at ee00 [size=256] Region 2: Memory at fdeff000 (64-bit, non-prefetchable) [size=4K] [virtual] Expansion ROM at fdd00000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: r8169 Kernel modules: r8169 00: ec 10 68 81 07 04 10 00 01 00 00 02 08 00 00 00 10: 01 ee 00 00 00 00 00 00 04 f0 ef fd 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 10 24 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 00 00 superiotool r4424 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xc400, id=0x23a0 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xa023, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Found Winbond W83627DHG (id=0xa0, rev=0x23) at 0x2e Register dump: idx 02 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val ff a0 23 ff 00 c4 00 00 ff 50 00 7c c0 08 00 00 ff def 00 a0 NA ff 00 MM 00 MM RR 50 00 00 RR e2 21 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 8e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 00 00 00 00 04 38 def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 00 00 00 00 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 00 00 00 00 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 00 80 def 01 00 60 00 64 01 0c 83 LDN 0x06 (Serial peripheral interface) idx 30 62 63 val 00 ff ff def 00 00 00 LDN 0x07 (GPIO 6) idx 30 f4 f5 f6 f7 val 07 ff ff ff ff def 00 ff 00 00 00 LDN 0x08 (WDTO#, PLED) idx 30 f5 f6 f7 val 00 ff 00 ff def 00 00 00 00 LDN 0x09 (GPIO 2, GPIO 3, GPIO 4, GPIO 5) idx 30 e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 f0 f1 f2 f3 f4 f5 f6 f7 fe val 02 ff ff ff ff ff ff ff 00 ff ff ff d7 00 00 ff ff ff ff 00 def 00 ff 00 00 ff 00 00 00 00 00 00 ff 00 00 00 ff 00 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 f2 f3 f4 f6 f7 fe val 00 00 00 00 10 00 00 00 0c 10 09 00 7d 00 00 00 08 00 def 00 00 01 00 ff 08 00 RR 1c 00 RR RR 7c 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 f1 f2 val 01 02 90 02 81 ff 82 def 00 00 00 00 81 00 00 LDN 0x0c (PECI, SST) idx e0 e1 e2 e3 e4 e5 e8 f1 fe ff val 00 48 48 48 48 00 00 48 ff ff def 00 48 48 48 48 00 00 48 00 00 Hardware monitor (0x0295) Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff

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3COM NIC 3C900B-TPO Working.
by Marko Kraljevic 24 Aug '09

24 Aug '09

"flashrom v0.9.0-r696 Found "3COM 3C90xB: PCI 10BASE-T (TPO)" (10b7:9004, BDF 00:11.0). === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Thank you for your help! === " Just tried with this card, it is working fine (PREW), so it can be marked as working. I'm now using it in combination with a board I'm working on, it *should* be supporting 2, 4, 8Mbit EEPROMs. I'll post schematics and modified code in the near future. I've tried with 2Mb so far, and it is working :-) -Mark

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[commit] r699 - trunk
by svn＠flashrom.org 24 Aug '09

24 Aug '09

Author: hailfinger Date: 2009-08-24 03:47:33 +0200 (Mon, 24 Aug 2009) New Revision: 699 Modified: trunk/nic3com.c Log: "3COM 3C90xB: PCI 10BASE-T (TPO)" (10b7:9004) works fine. Reported by Mark Panajotovic <panajotovic.marko(a)gmail.com>. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/nic3com.c =================================================================== --- trunk/nic3com.c 2009-08-24 01:42:24 UTC (rev 698) +++ trunk/nic3com.c 2009-08-24 01:47:33 UTC (rev 699) @@ -38,7 +38,7 @@ /* 3C90xB */ {0x10b7, 0x9055, PCI_OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, {0x10b7, 0x9001, PCI_NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, - {0x10b7, 0x9004, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T (TPO)" }, + {0x10b7, 0x9004, PCI_OK, "3COM", "3C90xB: PCI 10BASE-T (TPO)" }, {0x10b7, 0x9005, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" }, {0x10b7, 0x9006, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" }, {0x10b7, 0x900a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FL" },

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[patch] MX29f001T/B support
by Marko Kraljevic 24 Aug '09

24 Aug '09

Added support for MX29F001T and MX29F001B flash chips. Signed-off-by: Mark Panajotovic <panajotovic.marko(a)gmail.com> --- Changed code to use the functions from mx29f002.c. Tested all functionality for MX29F001T, and marked it as such. Let me know if I'm missing anything. :) #flashrom flashrom v0.9.0-r695 No coreboot table found. Found chipset "Intel PIIX4/4E/4M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "Macronix MX29F001T" (128 KB, Parallel) at physical address 0xfffe0000. No operations were specified. #flashrom -r dump.hex flashrom v0.9.0-r695 No coreboot table found. Found chipset "Intel PIIX4/4E/4M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "Macronix MX29F001T" (128 KB, Parallel) at physical address 0xfffe0000. Reading flash... done. #flashrom -E flashrom v0.9.0-r695 No coreboot table found. Found chipset "Intel PIIX4/4E/4M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "Macronix MX29F001T" (128 KB, Parallel) at physical address 0xfffe0000. Erasing flash chip... SUCCESS. #flashrom -r blank.hex flashrom v0.9.0-r695 No coreboot table found. Found chipset "Intel PIIX4/4E/4M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "Macronix MX29F001T" (128 KB, Parallel) at physical address 0xfffe0000. Reading flash... done. #hexdump blank.hex 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0020000 #flashrom -w dump.hex flashrom v0.9.0-r695 No coreboot table found. Found chipset "Intel PIIX4/4E/4M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "Macronix MX29F001T" (128 KB, Parallel) at physical address 0xfffe0000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Programming page: address: 0x00000000address: 0x00001000address: 0x00002000address: 0x00003000address: 0x00004000address: 0x00005000address: 0x00006000address: 0x00007000address: 0x00008000address: 0x00009000address: 0x0000a000address: 0x0000b000address: 0x0000c000address: 0x0000d000address: 0x0000e000address: 0x0000f000address: 0x00010000address: 0x00011000address: 0x00012000address: 0x00013000address: 0x00014000address: 0x00015000address: 0x00016000address: 0x00017000address: 0x00018000address: 0x00019000address: 0x0001a000address: 0x0001b000address: 0x0001c000address: 0x0001d000address: 0x0001e000address: 0x0001f000 COMPLETE. Verifying flash... VERIFIED.

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[commit] r698 - trunk
by svn＠flashrom.org 24 Aug '09

24 Aug '09

Author: hailfinger Date: 2009-08-24 03:42:24 +0200 (Mon, 24 Aug 2009) New Revision: 698 Modified: trunk/flashchips.c trunk/flashchips.h Log: Add support for MX29F001T and MX29F001B flash chips. Signed-off-by: Mark Panajotovic <panajotovic.marko(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-08-24 01:34:48 UTC (rev 697) +++ trunk/flashchips.c 2009-08-24 01:42:24 UTC (rev 698) @@ -1396,6 +1396,38 @@ { .vendor = "Macronix", + .name = "MX29F001B", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = MX_ID, + .model_id = MX_29F001B, + .total_size = 128, + .page_size = 32 * 1024, + .tested = TEST_UNTESTED, + .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .erase = erase_29f002, + .write = write_29f002, + .read = read_memmapped, + }, + + { + .vendor = "Macronix", + .name = "MX29F001T", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = MX_ID, + .model_id = MX_29F001T, + .total_size = 128, + .page_size = 32 * 1024, + .tested = TEST_OK_PREW, + .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .erase = erase_29f002, + .write = write_29f002, + .read = read_memmapped, + }, + + { + .vendor = "Macronix", .name = "MX29F002B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = MX_ID, Modified: trunk/flashchips.h =================================================================== --- trunk/flashchips.h 2009-08-24 01:34:48 UTC (rev 697) +++ trunk/flashchips.h 2009-08-24 01:42:24 UTC (rev 698) @@ -262,6 +262,8 @@ #define MX_25L12805 0x2018 /* MX25L12805 */ #define MX_25L1635D 0x2415 #define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ +#define MX_29F001B 0x19 +#define MX_29F001T 0x18 #define MX_29F002B 0x34 /* Same as MX29F002NB */ #define MX_29F002T 0xB0 /* Same as MX29F002NT */ #define MX_29F004B 0x46

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ASD AE29F2008 is supported.
by Marko Kraljevic 24 Aug '09

24 Aug '09

The ASD AE29F2008 I have is detected as a Winbond W29C020C. Everything works on it, R/W/E, so perhaps it should be added to the list of supported chips? Mark

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[commit] r697 - trunk
by svn＠flashrom.org 24 Aug '09

24 Aug '09

Author: hailfinger Date: 2009-08-24 03:34:48 +0200 (Mon, 24 Aug 2009) New Revision: 697 Modified: trunk/flashchips.h Log: ASD AE29F2008 and Winbond W29C020C have the same ID. Reported by Mark Panajotovic <panajotovic.marko(a)gmail.com>. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.h =================================================================== --- trunk/flashchips.h 2009-08-21 17:26:13 UTC (rev 696) +++ trunk/flashchips.h 2009-08-24 01:34:48 UTC (rev 697) @@ -470,7 +470,7 @@ #define W_25X32 0x3016 #define W_25X64 0x3017 #define W_29C011 0xC1 -#define W_29C020C 0x45 /* Same as W29C020 */ +#define W_29C020C 0x45 /* Same as W29C020 and ASD AE29F2008 */ #define W_29C040P 0x46 /* Same as W29C040 */ #define W_29EE011 0xC1 #define W_39L020 0xB5

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3COM NIC modification for >128kB flash.
by Marko Kraljevic 23 Aug '09

23 Aug '09

I was playing with modifying the supported 3COM NICs to support larger than 128kB chips. It's been a success so far, and seems to be functioning well with 256kB chips. I haven't tried with 4Mbit/512kB yet, and I don't remember the last time I've seen an 8Mbit [DIP] one. I need to add 28pin DIP and 32pin PLCC sockets yet - that should cover the whole 28F/29F family. It will need some work for the 512kB chips to work. On <512kB chips, pin 1 is either Vpp or /RST, so it has to be high. On the 512k chips, it's A18, so it has to change. For now, I have a pullup on it, and a switch to the bankswitching latch(A18). So when the switch is open, there is no support for 512k chips, but smaller should be fine... I should be able to take care of this in software though. I guess just have it turn the line on at init, and drop it if the probe determines a 512k+ chip. There's only a few bits of the latch used, so the others can be used for general purpose outputs. Right now I have two of the bits tied to LEDs, and the code set to turn on one or the other, depending whether it is in a write or read routine. With some hardware work, off the other outputs - I should be able to switch higher voltages to Vpp for the 27xxxx EPROM, I hope, but that's for another day. Here's a photo of the current card. Not very pretty, but once I get the kinks out, I should be able to get some (much smaller) add-on PCBs made, that will just plug into the stock plug on the NIC. http://electrontube.org/3com_mod/etherlink_mod.jpg Schematic, as is: http://electrontube.org/3com_mod/current_sm.png Schematic (minimalistic version): http://electrontube.org/3com_mod/minimal_sm.png Code changes: http://electrontube.org/3com_mod/3comhack.diff I think for the demo board, Maybe I'll add another decoder and an 8255.. then I'll have 3 bytes of GPIO - for whatever. Schematics, pictures, etc, related to this are CC-SA if you want them for anything. Anyways, any ideas, comments, criticism, etc, would be welcome :-) -Mark Oh yeah - one thing I've noticed, after read, write, or erase, the shutdown routine is called, but it *isn't* called after a probe. (on 3com NICs at least). Is that correct behaviour..? I noticed this, because the latch leaves LEDs on after a probe, but not after R/E/W (the shutdown function clears the bankswitching latch).

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flashrom success with MA790GP-DS4 motherboard.
by Ralph Loader 22 Aug '09

22 Aug '09

Hi, Just reporting successful flash upgrade of bios with flashrom for a board not listed on your website. Board is a Gigabyte MA790GP-DS4H (flashrom output says DS3H), with AMD 790GX / SB750 chipset, and Macronix MX25L8005 rom. Cheers, Ralph. # flashrom Calibrating delay loop... OK. No coreboot table found. Found chipset "ATI(AMD) SB700", enabling flash write... OK. Found board "GIGABYTE GA-MA78G-DS3H", enabling flash write... Serial flash segment 0xfffe0000-0xffffffff disabled Serial flash segment 0x000e0000-0x000fffff disabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff disabled LPC write to serial flash disabled serial flash pin 29 FAILED! Found chip "Macronix MX25L8005" (1024 KB) at physical address 0xfff00000. No operations were specified.

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[RFC] Bad chips and boards policy
by Carl-Daniel Hailfinger 22 Aug '09

22 Aug '09

Hi, we desperately need a policy which states the exact requirements for listing a board or flash chip (or programmer) as known broken. This policy should include criteria for retesting as well. The following is what I came up with. Comments appreciated. Each known bad entry: - stores the flashrom revision used for the test - has a link to the mailing list post or mail address of reporter - has a reason why the board/chip does not work (e.g. chip region protection support incomplete, board enable missing, unknown) - is not a specific instance of a problem on another layer (e.g. do not list boards with chipset problems) If a chipset/programmer/flashchip is not supported at all, don't list it. If no effort was made to fix the problem, don't add an entry to the bad list because it wouldn't have any useful information. Do not add entries to the bad list unless the current svn version of flashrom was tested (exceptions apply if current svn is broken). After each release, ask people with broken boards/chipsets/flashchips to retest and update the bad entries with their new results, even if it's just that flashrom still does not work. If the last known state of a board is older than one release (e.g. pre-0.9.0 for the 0.9.1 release) and the reporter does not respond, mark the board as unknown. Reasons for the policy above: - Only track hardware where we have a chance to fix the problem. - Avoid accumulation of stale entries. - Give a better impression (loads of red with some green in between makes us look like incompetent developers). I noticed some press coverage about 0.9.0 where this was a problem. - Motivate people to contribute support for unsupported hardware instead of scaring them away with "doesn't work" if nobody didn't bother to add support yet. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH] Add ICH9 Engineering sample to chipset enables
by Carl-Daniel Hailfinger 21 Aug '09

21 Aug '09

Anne Le Coq <annyvonne.le_coq(a)alcatel-lucent.fr> reported that flashrom didn't recognize her ICH9 LPC controller. According to http://pci-ids.ucw.cz/read/PC/8086/2910 the ID 0x8086/0x2910 was only used for an engineering sample. No intel doc mentions this ID at all. Anne, could you reply to this mail with "lspci -nnvvvxxx" as attachment? Thanks! This list accepts attachments. If the patch below is what you had in mind and detecting the chipset works for you, please reply with Acked-by: Anne Le Coq <annyvonne.le_coq(a)alcatel-lucent.fr> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> This patch will also appear at the top of http://patchwork.coreboot.org/project/flashrom/list/ so if you have trouble extracting the patch from this mail, you can download it from there. Index: flashrom-ich9_engineeringsample/chipset_enable.c =================================================================== --- flashrom-ich9_engineeringsample/chipset_enable.c (Revision 695) +++ flashrom-ich9_engineeringsample/chipset_enable.c (Arbeitskopie) @@ -1012,6 +1012,7 @@ {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] Add ICH9 Engineering sample to chipset enables
by Carl-Daniel Hailfinger 21 Aug '09

21 Aug '09

bouncing this mail... On 21.08.2009 18:41, LE COQ ANNYVONNE wrote: > Acked-by: Anne Le Coq <annyvonne.le_coq(a)alcatel-lucent.fr> > > Hi Carl-Daniel, > > It's the modification I've done to accept the ICH9, and it works fine. I just mention "ICH9" instead of "ICH9 Engineering Sample", but I don't think it's very important. > > My problem now is that the opcode 06 is unknown in the opcode table. > To continue my test, I replace one of unused opcode (0B9H) by 06 and it's better. But it's not a good solution... > Then, after that, I can only read, write and erase my flash till A000H. > I think it's because I use the ICH9 in descriptor mode. > I have the following fault: > ERROR at 0x0000a000: Expected=0xff, Read=0x00 > Have you got an idea about this issue ? > Thanks > Anne >

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Re: [flashrom] [PATCH] Add ICH9 Engineering sample to chipset enables
by Carl-Daniel Hailfinger 21 Aug '09

21 Aug '09

bouncing this mail... On 21.08.2009 18:55, LE COQ ANNYVONNE wrote: > Hello, > I have to leave my office now. I'll send the lspci result on Monday. > I'm working on an INTEL demo board called GreenCity: > 2 Nehalem processors, ICH9 + Tylersburg. > The problem is that I'm not able to flash a new BIOS ... > > I'm OK with the patch below, I've tested it on the GreenCity MotherBoard > Have a good week end > Anne > -- http://www.hailfinger.org/

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[commit] r696 - trunk
by svn＠flashrom.org 21 Aug '09

21 Aug '09

Author: hailfinger Date: 2009-08-21 19:26:13 +0200 (Fri, 21 Aug 2009) New Revision: 696 Modified: trunk/chipset_enable.c Log: Anne Le Coq <annyvonne.le_coq(a)alcatel-lucent.fr> reported that flashrom didn't recognize her ICH9 LPC controller on the Green City Intel Customer Reference Board with ICH9 + Tylersburg Chipset. According to http://pci-ids.ucw.cz/read/PC/8086/2910 the ID 0x8086/0x2910 was used for engineering samples. No intel doc mentions this ID at all. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Anne Le Coq <annyvonne.le_coq(a)alcatel-lucent.fr> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-08-20 18:45:18 UTC (rev 695) +++ trunk/chipset_enable.c 2009-08-21 17:26:13 UTC (rev 696) @@ -1012,6 +1012,7 @@ {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4},

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Re: [flashrom] [PATCH] Add ICH9 Engineering sample to chipset enables
by Carl-Daniel Hailfinger 21 Aug '09

21 Aug '09

forwarding to list... -------- Original Message -------- Subject: RE: [flashrom] [PATCH] Add ICH9 Engineering sample to chipset enables Date: Fri, 21 Aug 2009 18:41:36 +0200 From: LE COQ ANNYVONNE <Annyvonne.Le_Coq(a)alcatel-lucent.fr> To: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> References: <4A8EB02D.9000607(a)gmx.net> Acked-by: Anne Le Coq <annyvonne.le_coq(a)alcatel-lucent.fr> Hi Carl-Daniel, It's the modification I've done to accept the ICH9, and it works fine. I just mention "ICH9" instead of "ICH9 Engineering Sample", but I don't think it's very important. My problem now is that the opcode 06 is unknown in the opcode table. To continue my test, I replace one of unused opcode (0B9H) by 06 and it's better. But it's not a good solution... Then, after that, I can only read, write and erase my flash till A000H. I think it's because I use the ICH9 in descriptor mode. I have the following fault: ERROR at 0x0000a000: Expected=0xff, Read=0x00 Have you got an idea about this issue ? Thanks Anne

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bad flash ?
by Benjamin BELLEC 21 Aug '09

21 Aug '09

Hello, I have tried to flash the BIOS of my motherboard. It's a Gigabyte G33M-DS2R (ICH9R + SST SST25VF080B" (1024 KB)). [root@scarabee benjamin]# flashrom --version flashrom v0.9.0 (on Fedora 11 x86_64) Here is the log of the flash (my motherboard was previously in version F7) : flashrom --write ./G33MDS2R.F8 Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH9R", enabling flash write... OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Programming page: [root@scarabee motherboard_bios_ga-g33m-ds2r_f8]# and I check the BIOS : [root@scarabee motherboard_bios_ga-g33m-ds2r_f8]# flashrom --verify ./G33MDS2R.F8 Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH9R", enabling flash write... OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... FAILED at 0x00000000! Expected=0x00, Read=0x01 [root@scarabee motherboard_bios_ga-g33m-ds2r_f8]# and when I try to erase it : [root@scarabee benjamin]# flashrom --erase Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH9R", enabling flash write... OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Erasing flash chip... FAILED! ERROR at 0x00000000: Expected=0xff, Read=0x01 [root@scarabee benjamin]# I can post the entire log (--write --verbose) if you want. What can I do, is my BIOS really write or not ? Can I reboot ? Thanks for your time. Benjamin (from France)

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Non-working board submission: Matsonic MS8308E
by Putlinuxonit 21 Aug '09

21 Aug '09

Hi, I've tested this board with flashrom-0.9.0-r695 as well as superiotool r4424. Also contained are dumps from* #lspci -vvnnxxxx*, *#dmidecode* and *#lshw*. As always, a lot of the info is probably duplicated but is provided for the sake of completeness. I'm available for further testing if required. Bios: AMI > Board: Matsonic MS8308E http://www.motherboard.cz/mb/matsonic/MS8308E.htm > Flash Chip: W49F002UP12B (PLCC) > Chipset: Sis 730 > Enjoy!, Udu E. Ogah .~~~~~~~~~~.

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#3: OSError: (13, 'Permission denied')
by flashrom 21 Aug '09

21 Aug '09

#3: OSError: (13, 'Permission denied') ---------------------------------+------------------------------------------ Reporter: hailfinger | Owner: hailfinger Type: defect | Status: new Priority: major | Milestone: Component: flashrom | Version: Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ ==== How to Reproduce ==== While doing a POST operation on `/attachment/ticket/2`, Trac issued an internal error. ''(please provide additional details here)'' Request parameters: {{{ {'__FORM_TOKEN': u'88590e6c536c68a9192d038f', 'action': u'new', 'attachment': FieldStorage('attachment', 'test.c', '#include <stdio.h>\n#include <stdint.h>\n\nvoid u64function(uint64_t bar)\n{\n\tprintf("%llx\\n", bar);\n}\n\nint main()\n{\n\tuint32_t hi = 0xdeadbeef;\n\tuint32_t lo = 0xcafebabe;\n\tu64function((((uint64_t) hi) << 32) | lo);\n\treturn 0;\n}\n'), 'description': u'test attachment', 'id': u'2', 'path': u'2', 'realm': u'ticket'} }}} User Agent was: `Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.8.1.19) Gecko/20081213 SUSE/1.1.14-1.1 SeaMonkey/1.1.14` ==== System Information ==== || '''Trac''' || `0.11.5` || || '''Python''' || `2.6 (r26:66714, Feb 3 2009, 20:49:49) ` [[br]] `[GCC 4.3.2 [gcc-4_3-branch revision 141291]]` || || '''setuptools''' || `0.6c9` || || '''SQLite''' || `3.6.4` || || '''pysqlite''' || `2.4.1` || || '''Genshi''' || `0.5.1` || || '''Pygments''' || `1.0` || || '''Subversion''' || `1.6.4 (r38063)` || || '''jQuery:''' || `1.2.6` || ==== Python Traceback ==== {{{ Traceback (most recent call last): File "/usr/lib64/python2.6/site-packages/trac/web/main.py", line 444, in _dispatch_request dispatcher.dispatch(req) File "/usr/lib64/python2.6/site-packages/trac/web/main.py", line 205, in dispatch resp = chosen_handler.process_request(req) File "/usr/lib64/python2.6/site-packages/trac/attachment.py", line 398, in process_request self._do_save(req, attachment) File "/usr/lib64/python2.6/site-packages/trac/attachment.py", line 612, in _do_save attachment.insert(filename, upload.file, size) File "/usr/lib64/python2.6/site-packages/trac/attachment.py", line 219, in insert os.makedirs(self.path) File "/usr/lib64/python2.6/os.py", line 150, in makedirs makedirs(head, mode) File "/usr/lib64/python2.6/os.py", line 157, in makedirs mkdir(name, mode) OSError: [Errno 13] Permission denied: '/srv/trac/flashrom/attachments/ticket' }}} -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/3> flashrom <http://www.flashrom.org/>

1 1

#2: test attachments
by flashrom 21 Aug '09

21 Aug '09

#2: test attachments ---------------------------------+------------------------------------------ Reporter: hailfinger | Owner: hailfinger Type: defect | Status: new Priority: major | Milestone: Component: flashrom | Version: Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ It seems that attachments do not work... -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/2> flashrom <http://www.flashrom.org/>

1 1

flashrom support for intel pro100 - worthwhile?
by Marko Kraljevic 21 Aug '09

21 Aug '09

The support for 3com NICs got me thinking about other NICs with boot ROMs. I've got a few intel 100 pro PCI cards around, with the 82558 chipset. They have a PLCC socket, and a parallel interface; so they *should* support any PLCC 28/29 family chips. There's good documentation available, so I think adding support should not be too difficult. The only problem is, 82558 only supports up to 64kB [A0:16], and 82559 only supports up to 128kB [A0:17]. So I'm not sure if I should bother, especially with the PLCC socket, and the fact that we already have support for the cheap and common 3com cards. If you guys think it would be worthwhile to support, I can take a stab at it though. :-) datasheet for 82558: http://developer.intel.com/design/network/datashts/29736001.pdf datasheet for 82559: http://download.intel.com/design/network/datashts/73825902.pdf I'll take a look into some of intel's other ethernet controller chips, see if anything supports > 1Mbit. Although I have a suspicion that more modern controllers probably moved away from the parallel bus and/or dumped boot rom altogether. And of course - I'll have to make sure someone sold a physical card with them and a ROM socket! Mark

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