- flashrom - mail.coreboot.org

[commit] r748 - trunk
by svn＠flashrom.org 06 Oct '09

06 Oct '09

Author: uwe Date: 2009-10-06 15:00:00 +0200 (Tue, 06 Oct 2009) New Revision: 748 Modified: trunk/board_enable.c trunk/print.c Log: Upon popular request, move board support tables to print.c. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-10-06 11:32:21 UTC (rev 747) +++ trunk/board_enable.c 2009-10-06 13:00:00 UTC (rev 748) @@ -1015,6 +1015,12 @@ } /** + * Below is the list of boards which need a special "board enable" code in + * flashrom before their ROM chip can be accessed/written to. + * + * NOTE: Please add boards that _don't_ need such enables or don't work yet + * to the respective tables in print.c. Thanks! + * * We use 2 sets of IDs here, you're free to choose which is which. This * is to provide a very high degree of certainty when matching a board on * the basis of subsystem/card IDs. As not every vendor handles @@ -1091,149 +1097,6 @@ { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL}, /* end marker */ }; -/* Please keep this list alphabetically ordered by vendor/board. */ -const struct board_info boards_ok[] = { - /* Verified working boards that don't need write-enables. */ - { "Abit", "AX8", }, - { "Abit", "Fatal1ty F-I90HD", }, - { "Advantech", "PCM-5820", }, - { "ASI", "MB-5BLMP", }, - { "ASRock", "A770CrossFire", }, - { "ASUS", "A7N8X Deluxe", }, - { "ASUS", "A7N8X-E Deluxe", }, - { "ASUS", "A7V400-MX", }, - { "ASUS", "A7V8X-MX", }, - { "ASUS", "A8N-E", }, - { "ASUS", "A8NE-FM/S", }, - { "ASUS", "A8N-SLI", }, - { "ASUS", "A8N-SLI Premium", }, - { "ASUS", "A8V Deluxe", }, - { "ASUS", "A8V-E Deluxe", }, - { "ASUS", "A8V-E SE", }, - { "ASUS", "M2A-MX", }, - { "ASUS", "M2A-VM", }, - { "ASUS", "M2N-E", }, - { "ASUS", "M2V", }, - { "ASUS", "M3A78-EM", }, - { "ASUS", "P2B", }, - { "ASUS", "P2B-D", }, - { "ASUS", "P2B-DS", }, - { "ASUS", "P2B-F", }, - { "ASUS", "P2L97-S", }, - { "ASUS", "P5B-Deluxe", }, - { "ASUS", "P5KC", }, - { "ASUS", "P5L-MX", }, - { "ASUS", "P6T Deluxe V2", }, - { "A-Trend", "ATC-6220", }, - { "BCOM", "WinNET100", }, - { "Elitegroup", "P6VAP-A+", }, - { "GIGABYTE", "GA-6BXC", }, - { "GIGABYTE", "GA-6BXDU", }, - { "GIGABYTE", "GA-6ZMA", }, - { "GIGABYTE", "GA-7ZM", }, - { "GIGABYTE", "GA-EP35-DS3L", }, - { "GIGABYTE", "GA-EX58-UD4P", }, - { "GIGABYTE", "GA-MA78GPM-DS2H", }, - { "GIGABYTE", "GA-MA790GP-DS4H", }, - { "GIGABYTE", "GA-MA770T-UD3P", }, - { "Intel", "EP80759", }, - { "Jetway", "J7F4K1G5D-PB", }, - { "MSI", "MS-6570 (K7N2)", }, - { "MSI", "MS-7065", }, - { "MSI", "MS-7168 (Orion)", }, - { "MSI", "MS-7236 (945PL Neo3)", }, - { "MSI", "MS-7255 (P4M890M)", }, - { "MSI", "MS-7345 (P35 Neo2-FIR)", }, - { "MSI", "MS-7368 (K9AG Neo2-Digital)", }, - { "NEC", "PowerMate 2000", }, - { "PC Engines", "Alix.1c", }, - { "PC Engines", "Alix.2c2", }, - { "PC Engines", "Alix.2c3", }, - { "PC Engines", "Alix.3c3", }, - { "PC Engines", "Alix.3d3", }, - { "RCA", "RM4100", }, - { "Sun", "Blade x6250", }, - { "Supermicro", "H8QC8", }, - { "Thomson", "IP1000", }, - { "TriGem", "Lomita", }, - { "T-Online", "S-100", }, - { "Tyan", "iS5375-1U", }, - { "Tyan", "S1846", }, - { "Tyan", "S2466", }, - { "Tyan", "S2881", }, - { "Tyan", "S2882", }, - { "Tyan", "S2882-D", }, - { "Tyan", "S2891", }, - { "Tyan", "S2892", }, - { "Tyan", "S2895", }, - { "Tyan", "S3095", }, - { "Tyan", "S5180", }, - { "Tyan", "S5191", }, - { "Tyan", "S5197", }, - { "Tyan", "S5211", }, - { "Tyan", "S5211-1U", }, - { "Tyan", "S5220", }, - { "Tyan", "S5375", }, - { "Tyan", "S5376G2NR/S5376WAG2NR", }, - { "Tyan", "S5377", }, - { "Tyan", "S5397", }, - { "VIA", "EPIA-EX15000G", }, - { "VIA", "EPIA-LN", }, - { "VIA", "EPIA-M700", }, - { "VIA", "EPIA-NX15000G", }, - { "VIA", "NAB74X0", }, - { "VIA", "pc2500e", }, - { "VIA", "VB700X", }, - - {}, -}; - -/* Please keep this list alphabetically ordered by vendor/board. */ -const struct board_info boards_bad[] = { - /* Verified non-working boards (for now). */ - { "Abit", "IS-10", }, - { "ASRock", "K7VT4A+", }, - { "ASUS", "MEW-AM", }, - { "ASUS", "MEW-VM", }, - { "ASUS", "P3B-F", }, - { "ASUS", "P5B", }, - { "ASUS", "P5BV-M", }, - { "Biostar", "M6TBA", }, - { "Boser", "HS-6637", }, - { "DFI", "855GME-MGF", }, - { "FIC", "VA-502", }, - { "MSI", "MS-6178", }, - { "MSI", "MS-7260 (K9N Neo)", }, - { "Soyo", "SY-5VD", }, - { "Sun", "Fire x4150", }, - { "Sun", "Fire x4200", }, - { "Sun", "Fire x4540", }, - { "Sun", "Fire x4600", }, - - {}, -}; - -/* Please keep this list alphabetically ordered by vendor/board. */ -const struct board_info laptops_ok[] = { - /* Verified working laptops. */ - { "Lenovo", "3000 V100 TF05Cxx", }, - - {}, -}; - -/* Please keep this list alphabetically ordered by vendor/board. */ -const struct board_info laptops_bad[] = { - /* Verified non-working laptops (for now). */ - { "Acer", "Aspire One", }, - { "ASUS", "Eee PC 701 4G", }, - { "Dell", "Latitude CPi A366XT", }, - { "HP/Compaq", "nx9010", }, - { "IBM/Lenovo", "Thinkpad T40p", }, - { "IBM/Lenovo", "240", }, - - {}, -}; - /** * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-10-06 11:32:21 UTC (rev 747) +++ trunk/print.c 2009-10-06 13:00:00 UTC (rev 748) @@ -221,3 +221,148 @@ print_supported_boards_helper(laptops_bad, "Laptops which have been verified to NOT work yet"); } + + +/* Please keep this list alphabetically ordered by vendor/board. */ +const struct board_info boards_ok[] = { + /* Verified working boards that don't need write-enables. */ + { "Abit", "AX8", }, + { "Abit", "Fatal1ty F-I90HD", }, + { "Advantech", "PCM-5820", }, + { "ASI", "MB-5BLMP", }, + { "ASRock", "A770CrossFire", }, + { "ASUS", "A7N8X Deluxe", }, + { "ASUS", "A7N8X-E Deluxe", }, + { "ASUS", "A7V400-MX", }, + { "ASUS", "A7V8X-MX", }, + { "ASUS", "A8N-E", }, + { "ASUS", "A8NE-FM/S", }, + { "ASUS", "A8N-SLI", }, + { "ASUS", "A8N-SLI Premium", }, + { "ASUS", "A8V Deluxe", }, + { "ASUS", "A8V-E Deluxe", }, + { "ASUS", "A8V-E SE", }, + { "ASUS", "M2A-MX", }, + { "ASUS", "M2A-VM", }, + { "ASUS", "M2N-E", }, + { "ASUS", "M2V", }, + { "ASUS", "M3A78-EM", }, + { "ASUS", "P2B", }, + { "ASUS", "P2B-D", }, + { "ASUS", "P2B-DS", }, + { "ASUS", "P2B-F", }, + { "ASUS", "P2L97-S", }, + { "ASUS", "P5B-Deluxe", }, + { "ASUS", "P5KC", }, + { "ASUS", "P5L-MX", }, + { "ASUS", "P6T Deluxe V2", }, + { "A-Trend", "ATC-6220", }, + { "BCOM", "WinNET100", }, + { "Elitegroup", "P6VAP-A+", }, + { "GIGABYTE", "GA-6BXC", }, + { "GIGABYTE", "GA-6BXDU", }, + { "GIGABYTE", "GA-6ZMA", }, + { "GIGABYTE", "GA-7ZM", }, + { "GIGABYTE", "GA-EP35-DS3L", }, + { "GIGABYTE", "GA-EX58-UD4P", }, + { "GIGABYTE", "GA-MA78GPM-DS2H", }, + { "GIGABYTE", "GA-MA790GP-DS4H", }, + { "GIGABYTE", "GA-MA770T-UD3P", }, + { "Intel", "EP80759", }, + { "Jetway", "J7F4K1G5D-PB", }, + { "MSI", "MS-6570 (K7N2)", }, + { "MSI", "MS-7065", }, + { "MSI", "MS-7168 (Orion)", }, + { "MSI", "MS-7236 (945PL Neo3)", }, + { "MSI", "MS-7255 (P4M890M)", }, + { "MSI", "MS-7345 (P35 Neo2-FIR)", }, + { "MSI", "MS-7368 (K9AG Neo2-Digital)", }, + { "NEC", "PowerMate 2000", }, + { "PC Engines", "Alix.1c", }, + { "PC Engines", "Alix.2c2", }, + { "PC Engines", "Alix.2c3", }, + { "PC Engines", "Alix.3c3", }, + { "PC Engines", "Alix.3d3", }, + { "RCA", "RM4100", }, + { "Sun", "Blade x6250", }, + { "Supermicro", "H8QC8", }, + { "Thomson", "IP1000", }, + { "TriGem", "Lomita", }, + { "T-Online", "S-100", }, + { "Tyan", "iS5375-1U", }, + { "Tyan", "S1846", }, + { "Tyan", "S2466", }, + { "Tyan", "S2881", }, + { "Tyan", "S2882", }, + { "Tyan", "S2882-D", }, + { "Tyan", "S2891", }, + { "Tyan", "S2892", }, + { "Tyan", "S2895", }, + { "Tyan", "S3095", }, + { "Tyan", "S5180", }, + { "Tyan", "S5191", }, + { "Tyan", "S5197", }, + { "Tyan", "S5211", }, + { "Tyan", "S5211-1U", }, + { "Tyan", "S5220", }, + { "Tyan", "S5375", }, + { "Tyan", "S5376G2NR/S5376WAG2NR", }, + { "Tyan", "S5377", }, + { "Tyan", "S5397", }, + { "VIA", "EPIA-EX15000G", }, + { "VIA", "EPIA-LN", }, + { "VIA", "EPIA-M700", }, + { "VIA", "EPIA-NX15000G", }, + { "VIA", "NAB74X0", }, + { "VIA", "pc2500e", }, + { "VIA", "VB700X", }, + + {}, +}; + +/* Please keep this list alphabetically ordered by vendor/board. */ +const struct board_info boards_bad[] = { + /* Verified non-working boards (for now). */ + { "Abit", "IS-10", }, + { "ASRock", "K7VT4A+", }, + { "ASUS", "MEW-AM", }, + { "ASUS", "MEW-VM", }, + { "ASUS", "P3B-F", }, + { "ASUS", "P5B", }, + { "ASUS", "P5BV-M", }, + { "Biostar", "M6TBA", }, + { "Boser", "HS-6637", }, + { "DFI", "855GME-MGF", }, + { "FIC", "VA-502", }, + { "MSI", "MS-6178", }, + { "MSI", "MS-7260 (K9N Neo)", }, + { "Soyo", "SY-5VD", }, + { "Sun", "Fire x4150", }, + { "Sun", "Fire x4200", }, + { "Sun", "Fire x4540", }, + { "Sun", "Fire x4600", }, + + {}, +}; + +/* Please keep this list alphabetically ordered by vendor/board. */ +const struct board_info laptops_ok[] = { + /* Verified working laptops. */ + { "Lenovo", "3000 V100 TF05Cxx", }, + + {}, +}; + +/* Please keep this list alphabetically ordered by vendor/board. */ +const struct board_info laptops_bad[] = { + /* Verified non-working laptops (for now). */ + { "Acer", "Aspire One", }, + { "ASUS", "Eee PC 701 4G", }, + { "Dell", "Latitude CPi A366XT", }, + { "HP/Compaq", "nx9010", }, + { "IBM/Lenovo", "Thinkpad T40p", }, + { "IBM/Lenovo", "240", }, + + {}, +}; +

1 0

[commit] r747 - trunk
by svn＠flashrom.org 06 Oct '09

06 Oct '09

Author: libv Date: 2009-10-06 13:32:21 +0200 (Tue, 06 Oct 2009) New Revision: 747 Modified: trunk/chipset_enable.c Log: Mark NVIDIA Nforce4/MCP04 as tested. Oops. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Luc Verhaegen <libv(a)skynet.be> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-10-05 18:46:35 UTC (rev 746) +++ trunk/chipset_enable.c 2009-10-06 11:32:21 UTC (rev 747) @@ -1018,7 +1018,7 @@ {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, - {0x10de, 0x0030, NT, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, + {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ {0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2},

1 0

Re: [flashrom] non-working board report for Asrock K7S41GX with flashrom r711
by Luc Verhaegen 06 Oct '09

06 Oct '09

On Mon, Oct 05, 2009 at 11:34:14PM +0100, Putlinuxonit wrote: > Hi Luc, > > Find attached. > > Keep up the good work. I am able to easily find the int16h hook, but once there i am unable to track down the code for ah=0xE0. You should get a multimeter out and check whether your bios chip really has one of its write protection lines set. Luc Verhaegen.

1 0

Board enable for EPoX EP-8RDA3+ lspci fix
by . . 05 Oct '09

05 Oct '09

Hi, seems hotmail leaves out parts of the lspci output, so pastebinned it here: http://coreboot.pastebin.com/f22a57659 Link should stay 'forever'. Thanks, Anol. _________________________________________________________________ With Windows Live, you can organize, edit, and share your photos. http://www.microsoft.com/middleeast/windows/windowslive/products/photo-gall…

4 7

[commit] r746 - trunk
by svn＠flashrom.org 05 Oct '09

05 Oct '09

Author: libv Date: 2009-10-05 20:46:35 +0200 (Mon, 05 Oct 2009) New Revision: 746 Modified: trunk/board_enable.c Log: Board enable for EPoX EP-8RDA3+. SocketA + nForce2 + MCP2. Motherboard includes a second ethernet controller and an Agere firewire controller with valid subsystem ids, so these are used for matching the board. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Eddie Vanhove <moonraket(a)hotmail.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-10-05 16:07:00 UTC (rev 745) +++ trunk/board_enable.c 2009-10-05 18:46:35 UTC (rev 746) @@ -454,7 +454,24 @@ return 0; } +/** + * Suited for EPoX EP-8RDA3+: Socket A + nForce2 Ultra 400 + MCP2. + */ +static int board_epox_ep_8rda3plus(const char *name) +{ + struct pci_dev *dev; + dev = pci_dev_find(0x10DE, 0x0060); /* NVIDIA nForce2 ISA Bridge */ + if (!dev) { + fprintf(stderr, "\nERROR: NVIDIA ISA bridge not found.\n"); + return -1; + } + + nvidia_mcp_gpio_raise(dev, 0x31); + + return 0; +} + static int board_hp_dl145_g3_enable(const char *name) { /* Set GPIO lines in the Broadcom HT-1000 southbridge. */ @@ -1038,6 +1055,7 @@ {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "S1850", ich5_gpio23_raise}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", it8705f_write_enable_2e}, {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", board_epox_ep_8k5a2}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", board_epox_ep_8rda3plus}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, {0x1039, 0x0761, 0, 0, 0, 0, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable},

1 0

Re: [flashrom] Board support for ASUS P5ND2-SLI Deluxe.
by Luc Verhaegen 05 Oct '09

05 Oct '09

On Mon, Oct 05, 2009 at 03:24:47PM +0200, Martin S. wrote: > On Mon, 2009-10-05 at 13:52 +0200, Luc Verhaegen wrote: > > Can you attach the output of lspci -vvnnxxx? > > > > Attached. > > > I will soon send in a patch for the chipset enable. > > > > Got it. Going to test now. > > > When the full lspci is provided, i will be able to quickly provide you > > with a board enable for your board. > > > > Oh, and about your blog entry: my first linux box was a SuSE 6.0, but > > undoubtedly Stepan can easily trump that as i believe he was working > > for SuSE (already/still) at the time. > > Nice, looking for evidence. ;) > > > Also, please use your real and full name for acknowledging patches later > > on. > > Sure. Thanks for your efforts. Here is the board specific patch. Also included is your lspci for the ml. Luc Verhaegen.

2 2

[commit] r745 - trunk
by svn＠flashrom.org 05 Oct '09

05 Oct '09

Author: libv Date: 2009-10-05 18:07:00 +0200 (Mon, 05 Oct 2009) New Revision: 745 Modified: trunk/board_enable.c Log: Board enable for ASUS P5ND2-SLI Deluxe. This patch reorganises the board_ga_k8n_sli to create nvidia_mcp_gpio_raise, a more general routine to set these bits. Without docs, i can only assume that these memory area are gpio lines. Then it becomes easy to add support for this nForce4 SLI board. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Martin Szulecki <opensuse(a)sukimashita.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-10-05 16:04:47 UTC (rev 744) +++ trunk/board_enable.c 2009-10-05 16:07:00 UTC (rev 745) @@ -400,13 +400,30 @@ } /** + * No docs, so we are just guessing that these might be individual gpio lines. + */ +static void nvidia_mcp_gpio_raise(struct pci_dev *dev, uint8_t offset) +{ + uint16_t base; + uint8_t tmp; + + base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */ + + base += 0xC0; + + /* if anyone knows more about nvidia mcps, feel free to explain this */ + tmp = INB(base + offset); + tmp &= ~0x0F; + tmp |= 0x05; + OUTB(tmp, base + offset); +} + +/** * Suited for the Gigabyte GA-K8N-SLI: CK804 southbridge. */ static int board_ga_k8n_sli(const char *name) { struct pci_dev *dev; - uint32_t base; - uint8_t tmp; dev = pci_dev_find(0x10DE, 0x0050); /* NVIDIA CK804 LPC */ if (!dev) { @@ -414,16 +431,30 @@ return -1; } - base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */ + nvidia_mcp_gpio_raise(dev, 0x21); - /* if anyone knows more about nvidia lpcs, feel free to explain this */ - tmp = INB(base + 0xE1); - tmp |= 0x05; - OUTB(tmp, base + 0xE1); + return 0; +} +/** + * Suited for ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04. + */ +static int board_asus_p5nd2_sli(const char *name) +{ + struct pci_dev *dev; + + dev = pci_dev_find(0x10DE, 0x0030); /* NVIDIA nForce4 ISA Bridge */ + if (!dev) { + fprintf(stderr, "\nERROR: NVIDIA ISA bridge not found.\n"); + return -1; + } + + nvidia_mcp_gpio_raise(dev, 0x10); + return 0; } + static int board_hp_dl145_g3_enable(const char *name) { /* Set GPIO lines in the Broadcom HT-1000 southbridge. */ @@ -1002,6 +1033,7 @@ {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", ich2_gpio22_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", board_asus_p4p800}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", board_asus_p5nd2_sli}, {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "S1850", ich5_gpio23_raise}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", it8705f_write_enable_2e},

1 0

Chipset enable for nVidia nForce4/MCP4.
by Luc Verhaegen 05 Oct '09

05 Oct '09

Please test whether your board is matched correctly. When the board enable gets provided, please apply that on top of this patch, and if both work correctly, reply to both mails with Acked-by: Martin ##DeineRichtigeNachname## <info(a)sukimashita.com> Also, the pci id matched here is not in the pciids.sf.net database. You might want to work with them to get your pciids in their list (my guess is that they need you to dig through some windows driver .inf files.) Thanks, Luc Verhaegen.

2 2

[commit] r744 - trunk
by svn＠flashrom.org 05 Oct '09

05 Oct '09

Author: libv Date: 2009-10-05 18:04:47 +0200 (Mon, 05 Oct 2009) New Revision: 744 Modified: trunk/chipset_enable.c Log: Chipset support for the nVidia nForce 4. Add pciids for the new isa bridge, and hook it to the nforce2 chipset enable. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Martin Szulecki <opensuse(a)sukimashita.com> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-10-03 17:08:02 UTC (rev 743) +++ trunk/chipset_enable.c 2009-10-05 16:04:47 UTC (rev 744) @@ -1018,6 +1018,7 @@ {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x10de, 0x0030, NT, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ {0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2},

1 0

"ERASED FAILED!" messages for ICH2 / SST49LF0002A/B
by Allan Bjorklund 05 Oct '09

05 Oct '09

Hello, I'm wanting to upgrade the BIOS on an older machine that I have. A Sony Vaio (PCV-RX650(UC)), with an ASUSTeK mother board (P4B266LM Rev: 1.xx), running Linux kernel 2.6.28. Running flashrom (today's trunk version) with no arguments gives this: flashrom v0.9.1-runknown No coreboot table found. Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000. No operations were specified. I saved a copy of my existing BIOS image with: flashrom -r original_bios.bin That appears to work, as the file is the same size as the updated BIOS .bin file I downloaded from the vendor's site. To test writing, I attempted to write the original BIOS image back with flashrom -w original_bios.bin, and here is the output: flashrom v0.9.1-runknown No coreboot table found. Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x25, failed byte count from 0x00000000-0x00003fff: 0x3fa4 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! If I do a flashrom -v original_bios.bin, I get: flashrom v0.9.1-runknown No coreboot table found. Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000. Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. And reading a second copy and doing a binary diff shows no differences, so my BIOS checks out as not being damaged. (At least, I think so.) So, any advice on what to look for/change to make this work? Thanks. --Allan

4 4

Board support for ASUS P5ND2-SLI Deluxe.
by Luc Verhaegen 05 Oct '09

05 Oct '09

Can you attach the output of lspci -vvnnxxx? I will soon send in a patch for the chipset enable. When the full lspci is provided, i will be able to quickly provide you with a board enable for your board. Oh, and about your blog entry: my first linux box was a SuSE 6.0, but undoubtedly Stepan can easily trump that as i believe he was working for SuSE (already/still) at the time. Also, please use your real and full name for acknowledging patches later on. Luc Verhaegen.

1 0

Re: [flashrom] [coreboot] #131: New flashrom motherboard support
by Martin S. 05 Oct '09

05 Oct '09

On Mon, 2009-10-05 at 01:45 +0000, coreboot wrote: > #131: New flashrom motherboard support > ---------------------------------+------------------------------------------ > Reporter: anonymous | Owner: somebody > Type: enhancement | Status: new > Priority: trivial | Milestone: flashrom v1.0 > Component: flashrom | Version: > Keywords: flashrom asus | Dependencies: > Patchstatus: there is no patch | > ---------------------------------+------------------------------------------ > > Comment(by hailfinger): > > Please send a short mail to flashrom(a)flashrom.org which has a link to this > ticket and mentions that you're the person with the "ASUS P5ND2-SLI > Deluxe". This will make it easier for us to stay in touch with you. > Thanks. > Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/131#comment:4> It's me. ;) Cheers. --- Martin S.

1 0

Data regarding GA-MA790GP-UD4H board
by Yair K. 05 Oct '09

05 Oct '09

Hi, Per discussion in IRC, I'm attaching "flashrom -V" and "lspci -nnvx" output. Flashrom 0.9.0 flashing works. Hopefully the attached files will help with autodetection. Yours, Yair K.

2 1

flashing results for the MS-7094 board
by Jelle Geerts 05 Oct '09

05 Oct '09

Hello, I've ran flashrom -v {-E,-r,-v,-w} on my MS-7094 board. For more info regarding the board, please see http://www.msi.com/index.php?func=proddesc&maincat_no=1&cat2_no=&cat3_no=&p… I've attached the results to this e-mail. Reading/verifying/writing worked fine. Erasing however, didn't go so well, as you can see in the attached log. BTW, two thumbs up to the flashrom developers: the Award flash utility did not work (kept saying 'Unknown flash type'), but flashrom did. ;) HTH, Jelle Geerts

3 2

Non-working board submission: Asrock K7VT4A+
by Putlinuxonit 05 Oct '09

05 Oct '09

Hi, I've tested this board with flashrom-0.9.0-r695 as well as superiotool r4424. Also contained are dumps from* #lspci -vvnnxxxx*, *#dmidecode* and *#lshw*. i tried a forced read via *#flashrom -f -r -c SST39SF020A oldfirmware.bin*and provide the dumps as well though that maybe useless as i was warned. A lot of the info is probably duplicated but is provided for the sake of completeness. Bios: AMI > Board: Asrock K7VT4A+ > Flash Chip: SST39SF020A (PLCC) > Chipset: Via VT8235 > Enjoy!, Udu E. Ogah .~~~~~~~~~~.

2 1

Asus M4A79T deluxe
by Sander Sweers 04 Oct '09

04 Oct '09

Hello Flashrom people, I just successfully did a flash from linux for the first time ever, yeah :-) Attached are the logs (bzipped) for flashrom -V -rV and flashrom -V -wV. I hope this help you guys adding official support for this motherboards. If you need more info please let me know. Greets Sander

1 0

Re: [flashrom] [coreboot] [PATCH]Remove non-CBFS
by Carl-Daniel Hailfinger 03 Oct '09

03 Oct '09

[adding flashrom(a)flashrom.org to CC] On 03.10.2009 18:40, Peter Stuge wrote: > Carl-Daniel Hailfinger wrote: > >> Given that flashrom already has a generic image layout feature, I >> propose to have cbfstool spit out an image layout file which is >> then read by flashrom. This makes flashrom independent of CBFS and >> that's a good thing (think upgrade). >> > > This is trivial to implement and might be a good first step, but it's > absolutely horrible from a usability perspective; > > The user would need to keep track of and understand no less than two > tools, AND an intermediary layout file, in order to perform the > single task of partial firmware update. > The user has to understand cbfstool and lar anyway right now if he/she wants to do anything useful with fallback/normal. The user also has to understand flashrom to flash the resulting image. The user will not directly inspect the ROM image, nor will he/she directly inspect the layout file. > I think it is quite neccessary for flashrom to understand CBFS (and > LAR, for v3 users). > What about WPH and other formats from proprietary BIOS vendors? Flashrom has more users who deal with WPH and related formats than it has users who deal with CBFS or LAR. IIRC the Unix philosophy is roughly "Create programs that do one thing and do it well. Use simple programs together." I like that philosophy. One option would be to have cbfstool and lar execute the flashrom binary. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

[PATCH] Clean up and fix libz detection
by Carl-Daniel Hailfinger 03 Oct '09

03 Oct '09

There is no need to tell people to install libz if flashrom doesn't need libz. So far, the only case where libz is needed is when a library (libpci) pulls in libz and even then it only happens if libpci is available in a static version only and said static version has libz requirements. Check for libpci separately and don't require libz if it isn't needed. Clarify the README. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-libz_detection/Makefile =================================================================== --- flashrom-libz_detection/Makefile (Revision 742) +++ flashrom-libz_detection/Makefile (Arbeitskopie) @@ -41,7 +41,7 @@ LDFLAGS += -L/usr/local/lib endif -LIBS += -lpci -lz +LIBS += -lpci OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o \ @@ -142,6 +142,9 @@ OBJS += print_wiki.o endif +# We could use PULLED_IN_LIBS, but that would be ugly. +FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") + $(PROGRAM): $(OBJS) $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(LIBS) $(FEATURE_LIBS) @@ -157,7 +160,7 @@ rm -f $(PROGRAM) *.o distclean: clean - rm -f .dependencies .features + rm -f .dependencies .features .libdeps dep: @$(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies @@ -175,17 +178,36 @@ @rm -f .test.c .test pciutils: compiler - @printf "Checking for pciutils and zlib... " + @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test.c -o .test $(LIBS) >/dev/null 2>&1 && \ - echo "found." || ( echo "not found."; echo; \ - echo "Please install pciutils-devel and zlib-devel."; \ - echo "See README for more information."; echo; \ - rm -f .test.c .test; exit 1) - @rm -f .test.c .test + @$(CC) -c $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ + echo "found." || ( echo "not found."; echo; \ + echo "Please install libpci headers (package pciutils-devel)."; \ + echo "See README for more information."; echo; \ + rm -f .test.c .test.o; exit 1) + @printf "Checking for libpci... " + @$(shell ( echo "#include <pci/pci.h>"; \ + echo "int main(int argc, char **argv)"; \ + echo "{ return 0; }"; ) > .test1.c ) + @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 $(LIBS) >/dev/null 2>&1 && \ + echo "found." || ( echo "not found."; echo; \ + echo "Please install libpci (package pciutils)."; \ + echo "See README for more information."; echo; \ + rm -f .test1.c .test1; exit 1) + @printf "Checking if libpci is sufficient... " + @printf "" > .libdeps + @$(CC) $(LDFLAGS) .test.o -o .test $(LIBS) >/dev/null 2>&1 && \ + echo "yes." || ( echo "no."; \ + printf "Checking if libz is present and supplies all needed symbols..."; \ + $(CC) $(LDFLAGS) .test.o -o .test $(LIBS) -lz >/dev/null 2>&1 && \ + ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ + echo "Please install libz."; \ + echo "See README for more information."; echo; \ + rm -f .test.c .test.o .test; exit 1) ) + @rm -f .test.c .test.o .test .test1.c .test1 .features: features Index: flashrom-libz_detection/README =================================================================== --- flashrom-libz_detection/README (Revision 742) +++ flashrom-libz_detection/README (Arbeitskopie) @@ -38,7 +38,7 @@ Linux et al: - * pciutils + * pciutils / libpci * pciutils-devel / pciutils-dev / libpci-dev * zlib-devel / zlib1g-dev (only needed if libpci is static) @@ -79,13 +79,16 @@ In order to install flashrom and the manpage into /usr/local, type: - sudo make install + make install For installation in a different directory use DESTDIR, e.g. like this: - sudo make DESTDIR=/usr install + make DESTDIR=/usr install +If you have insufficient permissions for the destination directory, use sudo +by adding sudo in front of the commands above. + Usage / Options --------------- -- http://www.hailfinger.org/

2 2

[commit] r743 - trunk
by svn＠flashrom.org 03 Oct '09

03 Oct '09

Author: hailfinger Date: 2009-10-03 19:08:02 +0200 (Sat, 03 Oct 2009) New Revision: 743 Modified: trunk/Makefile trunk/README Log: There is no need to tell people to install libz if flashrom doesn't need libz. So far, the only case where libz is needed is when a library (libpci) pulls in libz and even then it only happens if libpci is available in a static version only and said static version has libz requirements. Check for libpci separately and don't require libz if it isn't needed. Clarify the README. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-10-01 18:40:02 UTC (rev 742) +++ trunk/Makefile 2009-10-03 17:08:02 UTC (rev 743) @@ -41,7 +41,7 @@ LDFLAGS += -L/usr/local/lib endif -LIBS += -lpci -lz +LIBS += -lpci OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o \ @@ -142,6 +142,9 @@ OBJS += print_wiki.o endif +# We could use PULLED_IN_LIBS, but that would be ugly. +FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") + $(PROGRAM): $(OBJS) $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(LIBS) $(FEATURE_LIBS) @@ -157,7 +160,7 @@ rm -f $(PROGRAM) *.o distclean: clean - rm -f .dependencies .features + rm -f .dependencies .features .libdeps dep: @$(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies @@ -175,17 +178,36 @@ @rm -f .test.c .test pciutils: compiler - @printf "Checking for pciutils and zlib... " + @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test.c -o .test $(LIBS) >/dev/null 2>&1 && \ - echo "found." || ( echo "not found."; echo; \ - echo "Please install pciutils-devel and zlib-devel."; \ - echo "See README for more information."; echo; \ - rm -f .test.c .test; exit 1) - @rm -f .test.c .test + @$(CC) -c $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ + echo "found." || ( echo "not found."; echo; \ + echo "Please install libpci headers (package pciutils-devel)."; \ + echo "See README for more information."; echo; \ + rm -f .test.c .test.o; exit 1) + @printf "Checking for libpci... " + @$(shell ( echo "#include <pci/pci.h>"; \ + echo "int main(int argc, char **argv)"; \ + echo "{ return 0; }"; ) > .test1.c ) + @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 $(LIBS) >/dev/null 2>&1 && \ + echo "found." || ( echo "not found."; echo; \ + echo "Please install libpci (package pciutils)."; \ + echo "See README for more information."; echo; \ + rm -f .test1.c .test1; exit 1) + @printf "Checking if libpci is sufficient... " + @printf "" > .libdeps + @$(CC) $(LDFLAGS) .test.o -o .test $(LIBS) >/dev/null 2>&1 && \ + echo "yes." || ( echo "no."; \ + printf "Checking if libz is present and supplies all needed symbols..."; \ + $(CC) $(LDFLAGS) .test.o -o .test $(LIBS) -lz >/dev/null 2>&1 && \ + ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ + echo "Please install libz."; \ + echo "See README for more information."; echo; \ + rm -f .test.c .test.o .test; exit 1) ) + @rm -f .test.c .test.o .test .test1.c .test1 .features: features Modified: trunk/README =================================================================== --- trunk/README 2009-10-01 18:40:02 UTC (rev 742) +++ trunk/README 2009-10-03 17:08:02 UTC (rev 743) @@ -38,7 +38,7 @@ Linux et al: - * pciutils + * pciutils / libpci * pciutils-devel / pciutils-dev / libpci-dev * zlib-devel / zlib1g-dev (only needed if libpci is static) @@ -79,13 +79,16 @@ In order to install flashrom and the manpage into /usr/local, type: - sudo make install + make install For installation in a different directory use DESTDIR, e.g. like this: - sudo make DESTDIR=/usr install + make DESTDIR=/usr install +If you have insufficient permissions for the destination directory, use sudo +by adding sudo in front of the commands above. + Usage / Options ---------------

1 0

flashrom test flashrom v0.9.1-r710
by Buckeyne, Thomas 03 Oct '09

03 Oct '09

This was tested on a "custom" mainboard Of interest to the flashrom group would be that this worked on "Intel ICH9M-E", Chip set with an Atmel "AT25DF641" 8MB chip this was a "./flashrom -r save.img" -V >./flashrom-trace.txt === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Reading flash... done. <<flashrom-trace.txt>> After save of SPI rom image I did a cmp -l between what I put on it with a ms-dos fpt.exe program and the saved image => compare came out identical I will send more traces as I do write ... etc. If you need / want more info I will do what I can to get it for you Thomas Buckeyne Sr Firmware Eng. Bally Technologies 6601 South Bermuda Road Las Vegas, NV 89119 Direct 702.584.7109 Main 702.584.7700

2 1

[commit] r742 - trunk
by svn＠flashrom.org 01 Oct '09

01 Oct '09

Author: uwe Date: 2009-10-01 20:40:02 +0200 (Thu, 01 Oct 2009) New Revision: 742 Modified: trunk/flashrom.c trunk/ft2232_spi.c Log: Cosmetics and small coding style fixes (trivial). Also, introduce BITMODE_BITBANG_SPI to eliminate a magic value. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-10-01 14:51:25 UTC (rev 741) +++ trunk/flashrom.c 2009-10-01 18:40:02 UTC (rev 742) @@ -563,12 +563,12 @@ return ret; } -void emergency_help_message() +void emergency_help_message(void) { fprintf(stderr, "Your flash chip is in an unknown state.\n" - "Get help on IRC at irc.freenode.net channel #flashrom or\n" - "mail flashrom(a)flashrom.org\n" - "------------------------------------------------------------\n" + "Get help on IRC at irc.freenode.net (channel #flashrom) or\n" + "mail flashrom(a)flashrom.org!\n--------------------" + "-----------------------------------------------------------\n" "DO NOT REBOOT OR POWEROFF!\n"); } Modified: trunk/ft2232_spi.c =================================================================== --- trunk/ft2232_spi.c 2009-10-01 14:51:25 UTC (rev 741) +++ trunk/ft2232_spi.c 2009-10-01 18:40:02 UTC (rev 742) @@ -29,15 +29,20 @@ #include "spi.h" #include <ftdi.h> -/* the 'H' chips can run internally at either 12Mhz or 60Mhz. - * the non-H chips can only run at 12Mhz. */ +/* + * The 'H' chips can run internally at either 12MHz or 60MHz. + * The non-H chips can only run at 12MHz. + */ #define CLOCK_5X 1 -/* in either case, the divisor is a simple integer clock divider. - * if CLOCK_5X is set, this divisor divides 30Mhz, else it - * divides 6Mhz */ -#define DIVIDE_BY 3 // e.g. '3' will give either 10Mhz or 2Mhz spi clock +/* + * In either case, the divisor is a simple integer clock divider. + * If CLOCK_5X is set, this divisor divides 30MHz, else it divides 6MHz. + */ +#define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */ +#define BITMODE_BITBANG_NORMAL 1 +#define BITMODE_BITBANG_SPI 2 static struct ftdi_context ftdic_context; @@ -76,7 +81,7 @@ if (ftdi_init(ftdic) < 0) { fprintf(stderr, "ftdi_init failed\n"); - return EXIT_FAILURE; + return EXIT_FAILURE; // TODO } if (programmer_param && !strlen(programmer_param)) { @@ -113,9 +118,9 @@ f = ftdi_usb_open(ftdic, 0x0403, ft2232_type); if (f < 0 && f != -5) { - fprintf(stderr, "Unable to open ftdi device: %d (%s)\n", f, + fprintf(stderr, "Unable to open FTDI device: %d (%s)\n", f, ftdi_get_error_string(ftdic)); - exit(-1); + exit(-1); // TODO } if (ftdi_set_interface(ftdic, ft2232_interface) < 0) { @@ -124,7 +129,7 @@ } if (ftdi_usb_reset(ftdic) < 0) { - fprintf(stderr, "Unable to reset ftdi device\n"); + fprintf(stderr, "Unable to reset FTDI device\n"); } if (ftdi_set_latency_timer(ftdic, 2) < 0) { @@ -135,13 +140,13 @@ fprintf(stderr, "Unable to set chunk size\n"); } - if (ftdi_set_bitmode(ftdic, 0x00, 2) < 0) { - fprintf(stderr, "Unable to set bitmode\n"); + if (ftdi_set_bitmode(ftdic, 0x00, BITMODE_BITBANG_SPI) < 0) { + fprintf(stderr, "Unable to set bitmode to SPI\n"); } #if CLOCK_5X printf_debug("Disable divide-by-5 front stage\n"); - buf[0] = 0x8a; /* disable divide-by-5 */ + buf[0] = 0x8a; /* Disable divide-by-5. */ if (send_buf(ftdic, buf, 1)) return -1; #define MPSSE_CLK 60.0 @@ -154,16 +159,16 @@ printf_debug("Set clock divisor\n"); buf[0] = 0x86; /* command "set divisor" */ /* valueL/valueH are (desired_divisor - 1) */ - buf[1] = (DIVIDE_BY-1) & 0xff; - buf[2] = ((DIVIDE_BY-1) >> 8) & 0xff; + buf[1] = (DIVIDE_BY - 1) & 0xff; + buf[2] = ((DIVIDE_BY - 1) >> 8) & 0xff; if (send_buf(ftdic, buf, 3)) return -1; printf("SPI clock is %fMHz\n", - (double)(MPSSE_CLK / (((DIVIDE_BY-1) + 1) * 2))); + (double)(MPSSE_CLK / (((DIVIDE_BY - 1) + 1) * 2))); - /* Disconnect TDI/DO to TDO/DI for Loopback */ - printf_debug("No loopback of tdi/do tdo/di\n"); + /* Disconnect TDI/DO to TDO/DI for loopback. */ + printf_debug("No loopback of TDI/DO TDO/DI\n"); buf[0] = 0x85; if (send_buf(ftdic, buf, 1)) return -1; @@ -180,7 +185,7 @@ if (send_buf(ftdic, buf, 3)) return -1; - printf_debug("\nft2232 chosen\n"); + // printf_debug("\nft2232 chosen\n"); buses_supported = CHIP_BUSTYPE_SPI; spi_controller = SPI_CONTROLLER_FT2232; @@ -193,7 +198,7 @@ { struct ftdi_context *ftdic = &ftdic_context; static unsigned char *buf = NULL; - int i, ret = 0; + int i = 0, ret = 0; if (writecnt > 65536 || readcnt > 65536) return SPI_INVALID_LENGTH; @@ -201,15 +206,13 @@ buf = realloc(buf, writecnt + readcnt + 100); if (!buf) { fprintf(stderr, "Out of memory!\n"); - exit(1); + exit(1); // -1 } - i = 0; - - /* minimize USB transfers by packing as many commands - * as possible together. if we're not expecting to - * read, we can assert CS, write, and deassert CS all - * in one shot. if reading, we do three separate + /* + * Minimize USB transfers by packing as many commands as possible + * together. If we're not expecting to read, we can assert CS#, write, + * and deassert CS# all in one shot. If reading, we do three separate * operations. */ printf_debug("Assert CS#\n"); @@ -221,11 +224,12 @@ buf[i++] = 0x11; buf[i++] = (writecnt - 1) & 0xff; buf[i++] = ((writecnt - 1) >> 8) & 0xff; - memcpy(buf+i, writearr, writecnt); + memcpy(buf + i, writearr, writecnt); i += writecnt; } - /* optionally terminate this batch of commands with a + /* + * Optionally terminate this batch of commands with a * read command, then do the fetch of the results. */ if (readcnt) { @@ -235,13 +239,13 @@ ret = send_buf(ftdic, buf, i); i = 0; if (ret == 0) { - /* FIXME: This is unreliable. There's no guarantee that we read - * the response directly after sending the read command. - * We may be scheduled out etc. + /* + * FIXME: This is unreliable. There's no guarantee that + * we read the response directly after sending the read + * command. We may be scheduled out etc. */ ret = get_buf(ftdic, readarr, readcnt); } - } printf_debug("De-assert CS#\n"); @@ -266,7 +270,7 @@ int i; spi_disable_blockprotect(); - /* Erase first */ + /* Erase first. */ printf("Erasing flash before programming... "); if (erase_flash(flash)) { fprintf(stderr, "ERASE FAILED!\n"); @@ -285,7 +289,7 @@ fprintf(stderr, "%s: write fail %d\n", __func__, r); return 1; } - + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) /* loop */; }

1 0

[PATCH] Bitbanging SPI driver
by Carl-Daniel Hailfinger 01 Oct '09

01 Oct '09

This is a bitbanging SPI driver without hardware support. If you want support for a particular piece of hardware, just fill in a few functions. That's it. Tested, trace looks OK. Not 0.9.1 material. If I get an ack, I'll commit after 0.9.1. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-bitbang_spi/flash.h =================================================================== --- flashrom-bitbang_spi/flash.h (Revision 682) +++ flashrom-bitbang_spi/flash.h (Arbeitskopie) @@ -90,6 +90,7 @@ #if SERPROG_SUPPORT == 1 PROGRAMMER_SERPROG, #endif + PROGRAMMER_BITBANGSPI, PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -390,6 +391,12 @@ int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf); +/* bitbang_spi.c */ +int bitbang_spi_init(void); +int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); +int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); + /* flashrom.c */ extern char *programmer_param; extern int verbose; @@ -428,6 +435,7 @@ SPI_CONTROLLER_WBSIO, SPI_CONTROLLER_FT2232, SPI_CONTROLLER_DUMMY, + SPI_CONTROLLER_BITBANG, }; struct spi_command { unsigned int writecnt; Index: flashrom-bitbang_spi/bitbang_spi.c =================================================================== --- flashrom-bitbang_spi/bitbang_spi.c (Revision 0) +++ flashrom-bitbang_spi/bitbang_spi.c (Revision 0) @@ -0,0 +1,183 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdio.h> +#include <stdint.h> +#include <string.h> +#include <stdlib.h> +#include <ctype.h> +#include "flash.h" +#include "spi.h" + +#if BITBANG_SPI_SUPPORT == 1 + +/* Length of half a clock period in usecs */ +int bitbang_half_period = 0; + +/* Empty functions, need to be replaced with actual driver implementation. */ +void bitbang_set_cs(int val) +{ +} + +void bitbang_set_sck(int val) +{ +} + +void bitbang_set_mosi(int val) +{ +} + +int bitbang_get_miso(void) +{ + return 1; +} + +int bitbang_spi_init(void) +{ + bitbang_set_cs(1); + bitbang_set_sck(0); + + buses_supported = CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_BITBANG; + + return 0; +} + +uint8_t bitbang_spi_readwrite_byte(uint8_t val) +{ + uint8_t ret = 0; + int i; + + for (i = 7; i >= 0; i--) { + bitbang_set_mosi((val >> i) & 1); + programmer_delay(bitbang_half_period); + bitbang_set_sck(1); + ret <<= 1; + ret |= bitbang_get_miso(); + programmer_delay(bitbang_half_period); + bitbang_set_sck(0); + } + return ret; +} + +int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + static unsigned char *bufout = NULL; + static unsigned char *bufin = NULL; + static int oldbufsize = 0; + int bufsize = max(writecnt + readcnt, 260); + int i; + + /* Arbitrary size limitation here. We're only constrained by memory. */ + if (writecnt > 65536 || readcnt > 65536) + return SPI_INVALID_LENGTH; + + if (bufsize != oldbufsize) { + bufout = realloc(bufout, bufsize); + if (!bufout) { + fprintf(stderr, "Out of memory!\n"); + if (bufin) + free(bufin); + exit(1); + } + bufin = realloc(bufout, bufsize); + if (!bufin) { + fprintf(stderr, "Out of memory!\n"); + if (bufout) + free(bufout); + exit(1); + } + } + + memcpy(bufout, writearr, writecnt); + /* Shift out 0x00 while reading data. */ + memset(bufout + writecnt, 0x00, readcnt); + /* Make sure any non-read data is 0xff. */ + memset(bufin + writecnt, 0xff, readcnt); + + bitbang_set_cs(0); + for (i = 0; i < readcnt + writecnt; i++) { + bufin[i] = bitbang_spi_readwrite_byte(bufout[i]); + } + programmer_delay(bitbang_half_period); + bitbang_set_cs(1); + programmer_delay(bitbang_half_period); + memcpy(readarr, bufin + writecnt, readcnt); + + return 0; +} + +int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + /* Maximum read length is unlimited, use 64k bytes. */ + return spi_read_chunked(flash, buf, start, len, 64 * 1024); +} + +int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf) +{ + int total_size = 1024 * flash->total_size; + int i; + + printf_debug("total_size is %d\n", total_size); + for (i = 0; i < total_size; i += 256) { + int l, r; + if (i + 256 <= total_size) + l = 256; + else + l = total_size - i; + + if ((r = spi_nbyte_program(i, &buf[i], l))) { + fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r); + return 1; + } + + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + /* loop */; + } + + return 0; +} + +#else +int bitbang_spi_init(void) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} + +int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} + +int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} + +int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} +#endif Index: flashrom-bitbang_spi/spi.c =================================================================== --- flashrom-bitbang_spi/spi.c (Revision 682) +++ flashrom-bitbang_spi/spi.c (Arbeitskopie) @@ -95,6 +95,13 @@ .read = NULL, .write_256 = NULL, }, + + { /* SPI_CONTROLLER_BITBANG */ + .command = bitbang_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = bitbang_spi_read, + .write_256 = bitbang_spi_write_256, + }, }; Index: flashrom-bitbang_spi/Makefile =================================================================== --- flashrom-bitbang_spi/Makefile (Revision 682) +++ flashrom-bitbang_spi/Makefile (Arbeitskopie) @@ -67,11 +67,19 @@ # Always enable serprog for now. Needs to be disabled on Windows. CONFIG_SERPROG = yes +# Bitbanging SPI is not yet ready. +CONFIG_BITBANG_SPI = yes + ifeq ($(CONFIG_SERPROG), yes) FEATURE_CFLAGS += -D'SERPROG_SUPPORT=1' OBJS += serprog.o endif +ifeq ($(CONFIG_BITBANG_SPI), yes) +FEATURE_CFLAGS += -D'BITBANG_SPI_SUPPORT=1' +OBJS += bitbang_spi.o +endif + FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-lftdi") Index: flashrom-bitbang_spi/flashrom.c =================================================================== --- flashrom-bitbang_spi/flashrom.c (Revision 682) +++ flashrom-bitbang_spi/flashrom.c (Arbeitskopie) @@ -158,6 +158,23 @@ }, #endif + { + .name = "bitbangspi", + .init = bitbang_spi_init, + .shutdown = fallback_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = dummy_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = fallback_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; @@ -512,7 +529,7 @@ " -z | --list-supported-wiki: print supported devices in wiki syntax\n" " -p | --programmer <name>: specify the programmer device\n" " (internal, dummy, nic3com, satasii,\n" - " it87spi, ft2232spi, serprog)\n" + " it87spi, ft2232spi, serprog, bitbangspi)\n" " -h | --help: print this help text\n" " -R | --version: print the version (release)\n" "\nYou can specify one of -E, -r, -w, -v or no operation. If no operation is\n" -- http://www.hailfinger.org/

2 6

[commit] r741 - trunk
by svn＠flashrom.org 01 Oct '09

01 Oct '09

Author: hailfinger Date: 2009-10-01 16:51:25 +0200 (Thu, 01 Oct 2009) New Revision: 741 Modified: trunk/bitbang_spi.c trunk/flash.h trunk/flashrom.c Log: Make bitbang_spi naming consistent. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/bitbang_spi.c =================================================================== --- trunk/bitbang_spi.c 2009-10-01 14:11:43 UTC (rev 740) +++ trunk/bitbang_spi.c 2009-10-01 14:51:25 UTC (rev 741) @@ -26,40 +26,40 @@ #include "spi.h" /* Length of half a clock period in usecs */ -int bitbang_half_period = 0; +int bitbang_spi_half_period = 0; -enum spi_bitbang_master spi_bitbang_master = SPI_BITBANG_INVALID; +enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID; -const struct spi_bitbang_master_entry spi_bitbang_master_table[] = { - {}, /* This entry corresponds to SPI_BITBANG_INVALID. */ +const struct bitbang_spi_master_entry bitbang_spi_master_table[] = { + {}, /* This entry corresponds to BITBANG_SPI_INVALID. */ }; -const int spi_bitbang_master_count = ARRAY_SIZE(spi_bitbang_master_table); +const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table); -void bitbang_set_cs(int val) +void bitbang_spi_set_cs(int val) { - spi_bitbang_master_table[spi_bitbang_master].set_cs(val); + bitbang_spi_master_table[bitbang_spi_master].set_cs(val); } -void bitbang_set_sck(int val) +void bitbang_spi_set_sck(int val) { - spi_bitbang_master_table[spi_bitbang_master].set_sck(val); + bitbang_spi_master_table[bitbang_spi_master].set_sck(val); } -void bitbang_set_mosi(int val) +void bitbang_spi_set_mosi(int val) { - spi_bitbang_master_table[spi_bitbang_master].set_mosi(val); + bitbang_spi_master_table[bitbang_spi_master].set_mosi(val); } -int bitbang_get_miso(void) +int bitbang_spi_get_miso(void) { - return spi_bitbang_master_table[spi_bitbang_master].get_miso(); + return bitbang_spi_master_table[bitbang_spi_master].get_miso(); } int bitbang_spi_init(void) { - bitbang_set_cs(1); - bitbang_set_sck(0); + bitbang_spi_set_cs(1); + bitbang_spi_set_sck(0); buses_supported = CHIP_BUSTYPE_SPI; return 0; } @@ -70,13 +70,13 @@ int i; for (i = 7; i >= 0; i--) { - bitbang_set_mosi((val >> i) & 1); - programmer_delay(bitbang_half_period); - bitbang_set_sck(1); + bitbang_spi_set_mosi((val >> i) & 1); + programmer_delay(bitbang_spi_half_period); + bitbang_spi_set_sck(1); ret <<= 1; - ret |= bitbang_get_miso(); - programmer_delay(bitbang_half_period); - bitbang_set_sck(0); + ret |= bitbang_spi_get_miso(); + programmer_delay(bitbang_spi_half_period); + bitbang_spi_set_sck(0); } return ret; } @@ -117,13 +117,13 @@ /* Make sure any non-read data is 0xff. */ memset(bufin + writecnt, 0xff, readcnt); - bitbang_set_cs(0); + bitbang_spi_set_cs(0); for (i = 0; i < readcnt + writecnt; i++) { bufin[i] = bitbang_spi_readwrite_byte(bufout[i]); } - programmer_delay(bitbang_half_period); - bitbang_set_cs(1); - programmer_delay(bitbang_half_period); + programmer_delay(bitbang_spi_half_period); + bitbang_spi_set_cs(1); + programmer_delay(bitbang_spi_half_period); memcpy(readarr, bufin + writecnt, readcnt); return 0; @@ -149,7 +149,7 @@ l = total_size - i; if ((r = spi_nbyte_program(i, &buf[i], l))) { - fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r); + fprintf(stderr, "%s: write fail %d\n", __func__, r); return 1; } Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-10-01 14:11:43 UTC (rev 740) +++ trunk/flash.h 2009-10-01 14:51:25 UTC (rev 741) @@ -148,15 +148,15 @@ void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void programmer_delay(int usecs); -enum spi_bitbang_master { - SPI_BITBANG_INVALID /* This must always be the last entry. */ +enum bitbang_spi_master { + BITBANG_SPI_INVALID /* This must always be the last entry. */ }; -extern const int spi_bitbang_master_count; +extern const int bitbang_spi_master_count; -extern enum spi_bitbang_master spi_bitbang_master; +extern enum bitbang_spi_master bitbang_spi_master; -struct spi_bitbang_master_entry { +struct bitbang_spi_master_entry { void (*set_cs) (int val); void (*set_sck) (int val); void (*set_mosi) (int val); @@ -470,8 +470,8 @@ int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf); /* bitbang_spi.c */ -extern int bitbang_half_period; -extern const struct spi_bitbang_master_entry spi_bitbang_master_table[]; +extern int bitbang_spi_half_period; +extern const struct bitbang_spi_master_entry bitbang_spi_master_table[]; int bitbang_spi_init(void); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-10-01 14:11:43 UTC (rev 740) +++ trunk/flashrom.c 2009-10-01 14:51:25 UTC (rev 741) @@ -713,7 +713,7 @@ exit(1); } #if BITBANG_SPI_SUPPORT == 1 - if (spi_bitbang_master_count - 1 != SPI_BITBANG_INVALID) { + if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { fprintf(stderr, "Bitbanging SPI master table miscompilation!\n"); exit(1); }

1 0

[commit] r740 - trunk
by svn＠flashrom.org 01 Oct '09

01 Oct '09

Author: uwe Date: 2009-10-01 16:11:43 +0200 (Thu, 01 Oct 2009) New Revision: 740 Modified: trunk/Makefile Log: Disable NVIDIA flashing support for now, erase/write is not properly working, yet. This needs more testing and investigation (partly timing related, it seems). Reads did work in multiple cases, though. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-10-01 13:16:32 UTC (rev 739) +++ trunk/Makefile 2009-10-01 14:11:43 UTC (rev 740) @@ -74,8 +74,8 @@ # Always enable 3Com NICs for now. CONFIG_NIC3COM ?= yes -# Always enable NVIDIA graphics cards for now. -CONFIG_GFXNVIDIA ?= yes +# Disable NVIDIA graphics cards for now, write/erase don't work properly. +CONFIG_GFXNVIDIA ?= no # Always enable SiI SATA controllers for now. CONFIG_SATASII ?= yes

1 0

[PATCH] Introduce proper error checking for SPI programming
by Carl-Daniel Hailfinger 01 Oct '09

01 Oct '09

Introduce proper error checking for SPI programming. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_program_errorcheck/spi.c =================================================================== --- flashrom-spi_program_errorcheck/spi.c (Revision 725) +++ flashrom-spi_program_errorcheck/spi.c (Arbeitskopie) @@ -971,7 +971,7 @@ int spi_chip_write_1(struct flashchip *flash, uint8_t *buf) { int total_size = 1024 * flash->total_size; - int i; + int i, result = 0; spi_disable_blockprotect(); /* Erase first */ @@ -982,7 +982,9 @@ } printf("done.\n"); for (i = 0; i < total_size; i++) { - spi_byte_program(i, buf[i]); + result = spi_byte_program(i, buf[i]); + if (result) + return 1; while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } Index: flashrom-spi_program_errorcheck/sb600spi.c =================================================================== --- flashrom-spi_program_errorcheck/sb600spi.c (Revision 725) +++ flashrom-spi_program_errorcheck/sb600spi.c (Arbeitskopie) @@ -48,9 +48,9 @@ /* FIXME: SB600 can write 5 bytes per transaction. */ int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf) { - int rc = 0, i; + int i; int total_size = flash->total_size * 1024; - int result; + int result = 0; spi_disable_blockprotect(); /* Erase first */ @@ -63,10 +63,10 @@ printf("Programming flash"); for (i = 0; i < total_size; i++, buf++) { - result = spi_byte_program(i, *buf); + result = spi_nbyte_program(i, buf, 1); if (result) { - // spi_byte_program reported the error for us already - printf_debug("... continuing anyway.\n"); + fprintf(stderr, "Write error!\n"); + return result; } /* wait program complete. */ @@ -76,7 +76,7 @@ ; } printf(" done.\n"); - return rc; + return result; } static void reset_internal_fifo_pointer(void) -- http://www.hailfinger.org/

2 3

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom