- flashrom - mail.coreboot.org

flashrom Windows port
by Carl-Daniel Hailfinger 19 Nov '09

19 Nov '09

Hi, what's the current state of the Windows port of flashrom (and DirectIO, for that matter)? I'm willing to review/merge/update anything which brings us closer, as long as functionality on supported platforms is not affected. Patches I'm talking about are: http://patchwork.coreboot.org/patch/97/ (but one of the patches in that mail is missing) http://patchwork.coreboot.org/patch/98/ Subject was: [flashrom] [PATCH] new windows port Regards, Carl-Daniel -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers."

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FAIL: AsRock K8Upgrade, weird write behavior, board still intact
by Adrian Glaubitz 18 Nov '09

18 Nov '09

Hi, I tried flashing an AsRock K8Upgrade board (yes, the model name is really "K8Upgrade"). flashrom didn't detect the chipset but it detected the flash chip. I attempted to write the flash which initially seemed to work: flashrom indicated that it was writing some pages however progress was *very* slow (as opposed to the Elitegroup K7S5A which I successfully flashed for example). Thus while the flash was written I already suspected something going wrong. Eventually flashrom gave up. However, when I reread the flash and compared it with the flash before write the images matched. So I suspect the bios is still intact. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V plus the output for the failed flash attempt. Adrian

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FAIL: Asus P4PE-X, board still intact, couldn't erase
by Adrian Glaubitz 18 Nov '09

18 Nov '09

Hi, I tried flashing an P4PE-X. Erasing the flash failed, however, the flash is still intact. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V plus the output for the failed flash attempt. Adrian

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FAIL: Asus P5B, board still intact, couldn't erase
by Adrian Glaubitz 18 Nov '09

18 Nov '09

Hi, I tried flashing an P5B today. However, opposed to the previously reported working "Asus P5B Deluxe" in the Wiki, the P5B doesn't seem to be supported. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V plus the output for the failed flash attempt. Adrian

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Verbose output of lspci, superiotool and flashrom - AsRock K7S8X (unsupported)
by Adrian Glaubitz 18 Nov '09

18 Nov '09

Hi, tested an AsRock K7S8X, however no Super I/O chip was detected and therefore flashing was not possible. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V. Adrian

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Issues with ASUS P4T
by Adrian Glaubitz 18 Nov '09

18 Nov '09

Hi, I tried flashing an ASUS P4T today. However, there were several problems which probably arise due a misdetected flash chip: - first the chip and the original BIOS image from ASUS mismatch in size, the image is 256kb large, flashrom detects the chip to be 512kb - second, the erasing of the flash fails; the BIOS is still intact though, see logs attached So my wild guess is that the flash chip is not properly detected. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V plus the output for the failed flash attempt. Adrian

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[PATCH] Clean up main loop
by Carl-Daniel Hailfinger 17 Nov '09

17 Nov '09

To prepare for libflashrom I wanted to make the main loop more readable and more correct and factor out stuff which can be useful in libflashrom. - Factor out printing of supported devices to print.c. - Adjust name of wiki printing function to fit the pattern. - Abort if the user specified --verify and --noverify at the same time. - Check for extra parameters which don't fit commandline syntax. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-mainloop_cleanup/flash.h =================================================================== --- flashrom-mainloop_cleanup/flash.h (Revision 755) +++ flashrom-mainloop_cleanup/flash.h (Arbeitskopie) @@ -338,11 +338,9 @@ /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); -void print_supported_chips(void); -void print_supported_chipsets(void); -void print_supported_boards(void); +void print_supported(void); void print_supported_pcidevs(struct pcidev_status *devs); -void print_wiki_tables(void); +void print_supported_wiki(void); /* board_enable.c */ void w836xx_ext_enter(uint16_t port); Index: flashrom-mainloop_cleanup/flashrom.c =================================================================== --- flashrom-mainloop_cleanup/flashrom.c (Revision 755) +++ flashrom-mainloop_cleanup/flashrom.c (Arbeitskopie) @@ -801,14 +801,25 @@ write_it = 1; break; case 'v': + //FIXME: gracefully handle superfluous -v if (++operation_specified > 1) { fprintf(stderr, "More than one operation " "specified. Aborting.\n"); exit(1); } + if (dont_verify_it) { + fprintf(stderr, "--verify and --noverify are" + "mutually exclusive. Aborting.\n"); + exit(1); + } verify_it = 1; break; case 'n': + if (verify_it) { + fprintf(stderr, "--verify and --noverify are" + "mutually exclusive. Aborting.\n"); + exit(1); + } dont_verify_it = 1; break; case 'c': @@ -896,29 +907,13 @@ } if (list_supported) { - print_supported_chips(); - print_supported_chipsets(); - print_supported_boards(); - printf("\nSupported PCI devices flashrom can use " - "as programmer:\n\n"); -#if NIC3COM_SUPPORT == 1 - print_supported_pcidevs(nics_3com); -#endif -#if GFXNVIDIA_SUPPORT == 1 - print_supported_pcidevs(gfx_nvidia); -#endif -#if DRKAISER_SUPPORT == 1 - print_supported_pcidevs(drkaiser_pcidev); -#endif -#if SATASII_SUPPORT == 1 - print_supported_pcidevs(satas_sii); -#endif + print_supported(); exit(0); } #if PRINT_WIKI_SUPPORT == 1 if (list_supported_wiki) { - print_wiki_tables(); + print_supported_wiki(); exit(0); } #endif @@ -930,6 +925,11 @@ if (optind < argc) filename = argv[optind++]; + + if (optind < argc) { + printf("Error: Extra parameter found.\n"); + usage(argv[0]); + } if (programmer_init()) { fprintf(stderr, "Error: Programmer initialization failed.\n"); @@ -1146,7 +1146,7 @@ if (write_it) programmer_delay(1000*1000); ret = verify_flash(flash, buf); - /* If we tried to write, and now we don't properly verify, we + /* If we tried to write, and verification now fails, we * might have an emergency situation. */ if (ret && write_it) Index: flashrom-mainloop_cleanup/print_wiki.c =================================================================== --- flashrom-mainloop_cleanup/print_wiki.c (Revision 755) +++ flashrom-mainloop_cleanup/print_wiki.c (Arbeitskopie) @@ -535,7 +535,7 @@ } } -void print_wiki_tables(void) +void print_supported_wiki(void) { time_t t = time(NULL); Index: flashrom-mainloop_cleanup/print.c =================================================================== --- flashrom-mainloop_cleanup/print.c (Revision 755) +++ flashrom-mainloop_cleanup/print.c (Arbeitskopie) @@ -222,7 +222,28 @@ "Laptops which have been verified to NOT work yet"); } +void print_supported(void) +{ + print_supported_chips(); + print_supported_chipsets(); + print_supported_boards(); + printf("\nSupported PCI devices flashrom can use " + "as programmer:\n\n"); +#if NIC3COM_SUPPORT == 1 + print_supported_pcidevs(nics_3com); +#endif +#if GFXNVIDIA_SUPPORT == 1 + print_supported_pcidevs(gfx_nvidia); +#endif +#if DRKAISER_SUPPORT == 1 + print_supported_pcidevs(drkaiser_pcidev); +#endif +#if SATASII_SUPPORT == 1 + print_supported_pcidevs(satas_sii); +#endif +} + /* Please keep this list alphabetically ordered by vendor/board. */ const struct board_info boards_ok[] = { /* Verified working boards that don't need write-enables. */ -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

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[commit] r766 - trunk
by svn＠flashrom.org 17 Nov '09

17 Nov '09

Author: hailfinger Date: 2009-11-17 10:57:34 +0100 (Tue, 17 Nov 2009) New Revision: 766 Modified: trunk/flash.h trunk/flashrom.c trunk/print.c trunk/print_wiki.c Log: To prepare for libflashrom I wanted to make the main loop more readable and more correct and factor out stuff which can be useful in libflashrom. - Factor out printing of supported devices to print.c. - Adjust name of wiki printing function to fit the pattern. - Abort if the user specified --verify and --noverify at the same time. - Check for extra parameters which don't fit commandline syntax. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-16 21:22:24 UTC (rev 765) +++ trunk/flash.h 2009-11-17 09:57:34 UTC (rev 766) @@ -338,11 +338,9 @@ /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); -void print_supported_chips(void); -void print_supported_chipsets(void); -void print_supported_boards(void); +void print_supported(void); void print_supported_pcidevs(struct pcidev_status *devs); -void print_wiki_tables(void); +void print_supported_wiki(void); /* board_enable.c */ void w836xx_ext_enter(uint16_t port); Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-11-16 21:22:24 UTC (rev 765) +++ trunk/flashrom.c 2009-11-17 09:57:34 UTC (rev 766) @@ -801,14 +801,25 @@ write_it = 1; break; case 'v': + //FIXME: gracefully handle superfluous -v if (++operation_specified > 1) { fprintf(stderr, "More than one operation " "specified. Aborting.\n"); exit(1); } + if (dont_verify_it) { + fprintf(stderr, "--verify and --noverify are" + "mutually exclusive. Aborting.\n"); + exit(1); + } verify_it = 1; break; case 'n': + if (verify_it) { + fprintf(stderr, "--verify and --noverify are" + "mutually exclusive. Aborting.\n"); + exit(1); + } dont_verify_it = 1; break; case 'c': @@ -896,29 +907,13 @@ } if (list_supported) { - print_supported_chips(); - print_supported_chipsets(); - print_supported_boards(); - printf("\nSupported PCI devices flashrom can use " - "as programmer:\n\n"); -#if NIC3COM_SUPPORT == 1 - print_supported_pcidevs(nics_3com); -#endif -#if GFXNVIDIA_SUPPORT == 1 - print_supported_pcidevs(gfx_nvidia); -#endif -#if DRKAISER_SUPPORT == 1 - print_supported_pcidevs(drkaiser_pcidev); -#endif -#if SATASII_SUPPORT == 1 - print_supported_pcidevs(satas_sii); -#endif + print_supported(); exit(0); } #if PRINT_WIKI_SUPPORT == 1 if (list_supported_wiki) { - print_wiki_tables(); + print_supported_wiki(); exit(0); } #endif @@ -930,6 +925,11 @@ if (optind < argc) filename = argv[optind++]; + + if (optind < argc) { + printf("Error: Extra parameter found.\n"); + usage(argv[0]); + } if (programmer_init()) { fprintf(stderr, "Error: Programmer initialization failed.\n"); @@ -1146,7 +1146,7 @@ if (write_it) programmer_delay(1000*1000); ret = verify_flash(flash, buf); - /* If we tried to write, and now we don't properly verify, we + /* If we tried to write, and verification now fails, we * might have an emergency situation. */ if (ret && write_it) Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-11-16 21:22:24 UTC (rev 765) +++ trunk/print.c 2009-11-17 09:57:34 UTC (rev 766) @@ -222,7 +222,28 @@ "Laptops which have been verified to NOT work yet"); } +void print_supported(void) +{ + print_supported_chips(); + print_supported_chipsets(); + print_supported_boards(); + printf("\nSupported PCI devices flashrom can use " + "as programmer:\n\n"); +#if NIC3COM_SUPPORT == 1 + print_supported_pcidevs(nics_3com); +#endif +#if GFXNVIDIA_SUPPORT == 1 + print_supported_pcidevs(gfx_nvidia); +#endif +#if DRKAISER_SUPPORT == 1 + print_supported_pcidevs(drkaiser_pcidev); +#endif +#if SATASII_SUPPORT == 1 + print_supported_pcidevs(satas_sii); +#endif +} + /* Please keep this list alphabetically ordered by vendor/board. */ const struct board_info boards_ok[] = { /* Verified working boards that don't need write-enables. */ Modified: trunk/print_wiki.c =================================================================== --- trunk/print_wiki.c 2009-11-16 21:22:24 UTC (rev 765) +++ trunk/print_wiki.c 2009-11-17 09:57:34 UTC (rev 766) @@ -539,7 +539,7 @@ } } -void print_wiki_tables(void) +void print_supported_wiki(void) { time_t t = time(NULL);

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info about Asus P4P800 SE
by Dev 17 Nov '09

17 Nov '09

MotherBoard: Asus P4P800 SE additional info attached. thanks for your support. Regards, Evgeny

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Success: Gigabyte GA-EP45-DS3 (rev. 1.0), MX25L8005
by alsterwassermann＠gmx.de 17 Nov '09

17 Nov '09

Hi, I'd like to provide an update to http://www.flashrom.org/Flashrom#Supported_chips I just flashed a MX25L8005 successfully - that's on a Gigabyte GA-EP45-DS3 (rev. 1.0). Need anything else? Just ping me... # uname -a Linux mybox 2.6.26-2-xen-amd64 #1 SMP Mon Oct 26 12:43:40 UTC 2009 x86_64 GNU/Linux # # flashrom flashrom v0.9.1-r736 No coreboot table found. Found chipset "Intel ICH10", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Calibrating delay loop... OK. Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. No operations were specified. # # lspci -nn 00:00.0 Host bridge [0600]: Intel Corporation 4 Series Chipset DRAM Controller [8086:2e20] (rev 03) 00:01.0 PCI bridge [0604]: Intel Corporation 4 Series Chipset PCI Express Root Port [8086:2e21] (rev 03) 00:1a.0 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 [8086:3a37] 00:1a.1 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 [8086:3a38] 00:1a.2 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 [8086:3a39] 00:1a.7 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 [8086:3a3c] 00:1b.0 Audio device [0403]: Intel Corporation 82801JI (ICH10 Family) HD Audio Controller [8086:3a3e] 00:1c.0 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 1 [8086:3a40] 00:1c.1 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 2 [8086:3a42] 00:1c.3 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 4 [8086:3a46] 00:1c.4 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 5 [8086:3a48] 00:1c.5 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 6 [8086:3a4a] 00:1d.0 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 [8086:3a34] 00:1d.1 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 [8086:3a35] 00:1d.2 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 [8086:3a36] 00:1d.7 USB Controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 [8086:3a3a] 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev 90) 00:1f.0 ISA bridge [0601]: Intel Corporation 82801JIB (ICH10) LPC Interface Controller [8086:3a18] 00:1f.2 SATA controller [0106]: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller [8086:3a22] 00:1f.3 SMBus [0c05]: Intel Corporation 82801JI (ICH10 Family) SMBus Controller [8086:3a30] 01:00.0 VGA compatible controller [0300]: ATI Technologies Inc Radeon X1650 XT (Primary) (PCIE) [1002:7291] 01:00.1 Display controller [0380]: ATI Technologies Inc Radeon X1650 XT (Secondary) (PCIE) [1002:72b1] 03:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 01) 04:00.0 IDE interface [0101]: JMicron Technologies, Inc. JMB368 IDE controller [197b:2368] 05:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 02) 06:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 02) 07:00.0 Network controller [0280]: Atheros Communications Inc. AR5416 802.11abgn Wireless PCI Adapter [168c:0023] (rev 01) 07:01.0 Multimedia video controller [0400]: Conexant CX23880/1/2/3 PCI Video and Audio Decoder [14f1:8800] (rev 05) 07:01.2 Multimedia controller [0480]: Conexant CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port] [14f1:8802] (rev 05) # # flashrom flashrom v0.9.1-r736 No coreboot table found. Found chipset "Intel ICH10", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Calibrating delay loop... OK. Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. No operations were specified. debbyhost:~/flashrom# flashrom -V flashrom v0.9.1-r736 No coreboot table found. Found chipset "Intel ICH10", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 Root Complex Register Block address = 0xfed1c000 GCS = 0x464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x2008 (HSFS) FLOCKDN 0, FDV 0, FDOPSS 1, SCIP 0, BERASE 1, AEL 0, FCERR 0, FDONE 0 0x50: 0x00000202 (FRAP) BMWAG 0, BMRAG 0, BRWA 2, BRRA 2 0x54: 0x00001fff (FREG0) 0x58: 0x00001fff (FREG1) 0x5C: 0x00001fff (FREG2) 0x60: 0x00001fff (FREG3) 0x64: 0x00001fff (FREG4) 0x74: 0x00000000 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x00426004 (SSFS, SSFC) 0x94: 0x0006 (PREOP) 0x96: 0x463b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0xc79f0190 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xB0: 0x00000000 (FDOC) Programming OPCODES... program_opcodes: preop=0006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: LPC,FWH,SPI. Calibrating delay loop... 760M loops per second, 100 myus = 200 us. OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F040B, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for ASD AE49F2008, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT25DF021, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT29C512, 64 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C020, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT45CS1282, 16896 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A25L40P, 512 KB: RDID returned 0xc2 0x20 0x14 0xc2. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A29002B, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A29002T, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A29040B, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A49LF040A, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Eon EN25B05, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25D16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0x24, id2 0xc8 Probing for Macronix MX25L512, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Numonyx M25PE10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm29F0002T, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for PMC Pm29F0002B, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for PMC Pm49FL002, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0x24, id2 0xc8 Probing for Spansion S25FL016A, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF016B, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040B, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040.REMS, 512 KB: REMS returned c2 13. probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B.REMS, 512 KB: REMS returned c2 13. probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST28SF040A, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29EE010, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29LE010, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29EE020A, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29LE020, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF010A, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF020A, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF040, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF512, 64 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF010, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF020, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF040, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF080, 1024 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST49LF002A/B, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: probe_jedec: id1 0x24, id2 0xc8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0x24, id2 0xc8 Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0x24, id2 0xc8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05.RES, 64 KB: RDID returned 0xc2 0x20 0x14. Probing for ST M25P10-A, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10.RES, 128 KB: RDID returned 0xc2 0x20 0x14. Probing for ST M25P20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 KB: RDID returned 0xc2 0x20 0x14. Probing for ST M25P80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M29F002B, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29F040B, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29F400BT, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29W010B, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29W040B, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M50FLW040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0x24, id2 0xc8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0x24, id2 0xc8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0x24, id2 0xc8 Probing for ST M50LPW116, 2048 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W25x10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W29C011, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W29C020C, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W29C040P, 512 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W29EE011, 128 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0x24, id2 0xc8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: skipped. Host bus type LPC,FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0x24, id2 0xc8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel unknown Atmel SPI chip, 0 KB: Not mapping flash chip, zero size at 0x100000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for EON unknown EON SPI chip, 0 KB: Not mapping flash chip, zero size at 0x100000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for Macronix unknown Macronix SPI chip, 0 KB: Not mapping flash chip, zero size at 0x100000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for PMC unknown PMC SPI chip, 0 KB: Not mapping flash chip, zero size at 0x100000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for SST unknown SST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x100000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for ST unknown ST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x100000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) No operations were specified. #

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[commit] r765 - trunk
by svn＠flashrom.org 16 Nov '09

16 Nov '09

Author: hailfinger Date: 2009-11-16 22:22:24 +0100 (Mon, 16 Nov 2009) New Revision: 765 Modified: trunk/Makefile Log: Fix incorrect comment about wiki printing in Makefile. Spotted by Benjamin BELLEC <b.bellec(a)gmail.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-11-16 15:03:35 UTC (rev 764) +++ trunk/Makefile 2009-11-16 21:22:24 UTC (rev 765) @@ -89,7 +89,7 @@ # Always enable Dr. Kaiser for now. CONFIG_DRKAISER ?= yes -# Always enable wiki printing for now. +# Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no ifeq ($(CONFIG_SERPROG), yes)

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Tiny mistake in the Makefile (I think)
by Benjamin BELLEC 16 Nov '09

16 Nov '09

Hello, I was reading the Makefile (r764) and I saw at line 92-92 : 92 - # Always enable wiki printing for now. 93 - CONFIG_PRINT_WIKI ?= no Given the precedent lines I think this is not coherent, right ? Benjamin

2 1

SUCCESS: AsRock K8S8X, SuperI/O not detected however
by Adrian Glaubitz 16 Nov '09

16 Nov '09

Hello, I successfully flashed a new BIOS version onto an AsRock K8S8X. Used flashrom r764. flashrom did not detect the SuperI/O though. Chipset is SiS 755. The board works absolutely fine and there were NO issues during flash, worked like a charm :). Please see the attached logs and mark the board as *supported*. Thanks, Adrian

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[PATCH] Show ICH flash descriptor info only if valid
by Carl-Daniel Hailfinger 16 Nov '09

16 Nov '09

Show ICH flash descriptor info only if valid. Otherwise it is just confusing the developers. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-ich_spi_descriptor/chipset_enable.c =================================================================== --- flashrom-ich_spi_descriptor/chipset_enable.c (Revision 764) +++ flashrom-ich_spi_descriptor/chipset_enable.c (Arbeitskopie) @@ -426,7 +426,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, int ich_generation) { - int ret, i; + int ret, i, hwseq = 0; uint8_t old, new, bbs, buc; uint16_t spibar_offset, tmp2; uint32_t tmp, gcs; @@ -540,30 +540,50 @@ printf_debug("0x04: 0x%04x (HSFS)\n", tmp2); printf_debug("FLOCKDN %i, ", (tmp2 >> 15 & 1)); printf_debug("FDV %i, ", (tmp2 >> 14) & 1); + /* Flash Descriptor Override Pin-Strap Status, but unfortunately + * there is no info on how it affects hardware sequencing if + * FDV=1, nor do we know whether FDOPSS needs to be ORed or + * XORed with FDV. + */ printf_debug("FDOPSS %i, ", (tmp2 >> 13) & 1); printf_debug("SCIP %i, ", (tmp2 >> 5) & 1); printf_debug("BERASE %i, ", (tmp2 >> 3) & 3); printf_debug("AEL %i, ", (tmp2 >> 2) & 1); printf_debug("FCERR %i, ", (tmp2 >> 1) & 1); printf_debug("FDONE %i\n", (tmp2 >> 0) & 1); + /* If the flash descriptor is valid, hardware sequencing is + * supported and software sequencing may encounter transaction + * errors if it tries to access regions outside the BIOS area. + * See the FDOPSS note above for potential pitfalls. + */ + hwseq = (tmp2 >> 14) & 1; + if (hwseq) { + tmp = mmio_readl(spibar + 0x0); + printf("WARNING: SPI descriptor mode is active, " + "flashing may fail in some regions.\n"); + printf_debug("0x00: 0x%08x (BPFR)\n", tmp); + printf_debug("PRB 0x%x, ", (tmp & 0x1FFF) << 12); + tmp >>= 16; + printf_debug("PRL 0x%x, ", (tmp & 0x1FFF) << 12); - tmp = mmio_readl(spibar + 0x50); - printf_debug("0x50: 0x%08x (FRAP)\n", tmp); - printf_debug("BMWAG %i, ", (tmp >> 24) & 0xff); - printf_debug("BMRAG %i, ", (tmp >> 16) & 0xff); - printf_debug("BRWA %i, ", (tmp >> 8) & 0xff); - printf_debug("BRRA %i\n", (tmp >> 0) & 0xff); + tmp = mmio_readl(spibar + 0x50); + printf_debug("0x50: 0x%08x (FRAP)\n", tmp); + printf_debug("BMWAG %i, ", (tmp >> 24) & 0xff); + printf_debug("BMRAG %i, ", (tmp >> 16) & 0xff); + printf_debug("BRWA %i, ", (tmp >> 8) & 0xff); + printf_debug("BRRA %i\n", (tmp >> 0) & 0xff); - printf_debug("0x54: 0x%08x (FREG0)\n", - mmio_readl(spibar + 0x54)); - printf_debug("0x58: 0x%08x (FREG1)\n", - mmio_readl(spibar + 0x58)); - printf_debug("0x5C: 0x%08x (FREG2)\n", - mmio_readl(spibar + 0x5C)); - printf_debug("0x60: 0x%08x (FREG3)\n", - mmio_readl(spibar + 0x60)); - printf_debug("0x64: 0x%08x (FREG4)\n", - mmio_readl(spibar + 0x64)); + printf_debug("0x54: 0x%08x (FREG0)\n", + mmio_readl(spibar + 0x54)); + printf_debug("0x58: 0x%08x (FREG1)\n", + mmio_readl(spibar + 0x58)); + printf_debug("0x5C: 0x%08x (FREG2)\n", + mmio_readl(spibar + 0x5C)); + printf_debug("0x60: 0x%08x (FREG3)\n", + mmio_readl(spibar + 0x60)); + printf_debug("0x64: 0x%08x (FREG4)\n", + mmio_readl(spibar + 0x64)); + } printf_debug("0x74: 0x%08x (PR0)\n", mmio_readl(spibar + 0x74)); printf_debug("0x78: 0x%08x (PR1)\n", @@ -586,8 +606,10 @@ mmio_readl(spibar + 0x9C)); printf_debug("0xA0: 0x%08x (BBAR)\n", mmio_readl(spibar + 0xA0)); - printf_debug("0xB0: 0x%08x (FDOC)\n", - mmio_readl(spibar + 0xB0)); + if (hwseq) { + printf_debug("0xB0: 0x%08x (FDOC)\n", + mmio_readl(spibar + 0xB0)); + } if (tmp2 & (1 << 15)) { printf("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

1 1

[commit] r764 - trunk
by svn＠flashrom.org 16 Nov '09

16 Nov '09

Author: hailfinger Date: 2009-11-16 16:03:35 +0100 (Mon, 16 Nov 2009) New Revision: 764 Modified: trunk/spi.c Log: If a SPI command taking an address does fail, we want to know the address for easier debugging. Vincent wrote: This patch provided help to debug the partial write on ICH in descriptor mode. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Vincent S. Cojot <openlook(a)cojot.name> Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-11-16 14:13:09 UTC (rev 763) +++ trunk/spi.c 2009-11-16 15:03:35 UTC (rev 764) @@ -615,8 +615,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -659,7 +659,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -721,8 +722,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -827,21 +828,21 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); } return result; } -int spi_nbyte_program(int address, uint8_t *bytes, int len) +int spi_nbyte_program(int addr, uint8_t *bytes, int len) { int result; /* FIXME: Switch to malloc based on len unless that kills speed. */ unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { JEDEC_BYTE_PROGRAM, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr >> 0) & 0xff, }; struct spi_command cmds[] = { { @@ -874,8 +875,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); } return result; }

1 0

Re: [flashrom] [PATCH] More verbose failures for SPI commands
by Carl-Daniel Hailfinger 16 Nov '09

16 Nov '09

Hi Vincent, On 16.11.2009 16:00, vincent(a)cojot.name wrote: > This patch provided help to debug the issue.. > Acked-by: Vincent S. Cojot <openlook(a)cojot.name> thanks for testing. Committed in r764. Regards, Carl-Daniel -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

1 0

[PATCH] More verbose failures for SPI commands
by Carl-Daniel Hailfinger 16 Nov '09

16 Nov '09

If a SPI command taking an address does fail, we want to know the address for easier debugging. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_command_failure_verbose/spi.c =================================================================== --- flashrom-spi_command_failure_verbose/spi.c (Revision 763) +++ flashrom-spi_command_failure_verbose/spi.c (Arbeitskopie) @@ -615,8 +615,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -659,7 +659,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -721,8 +722,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -827,21 +828,21 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); } return result; } -int spi_nbyte_program(int address, uint8_t *bytes, int len) +int spi_nbyte_program(int addr, uint8_t *bytes, int len) { int result; /* FIXME: Switch to malloc based on len unless that kills speed. */ unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { JEDEC_BYTE_PROGRAM, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr >> 0) & 0xff, }; struct spi_command cmds[] = { { @@ -874,8 +875,8 @@ result = spi_send_multicommand(cmds); if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); } return result; } -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

2 1

[commit] r763 - trunk
by svn＠flashrom.org 16 Nov '09

16 Nov '09

Author: hailfinger Date: 2009-11-16 15:13:09 +0100 (Mon, 16 Nov 2009) New Revision: 763 Modified: trunk/print_wiki.c Log: Add URLs for boards ASUS K8V, ASUS K8V SE Deluxe, Elitegroup K7S5A. Add a note for ASUS M2N-E. Change "iff" to "if". Most people don't understand what "iff" means and the meaning of both words is close enough to hopefully give users the right idea. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/print_wiki.c =================================================================== --- trunk/print_wiki.c 2009-11-16 14:05:13 UTC (rev 762) +++ trunk/print_wiki.c 2009-11-16 14:13:09 UTC (rev 763) @@ -115,6 +115,8 @@ { "ASUS", "A8V Deluxe", "http://www.asus.com/product.aspx?P_ID=tvpdgPNCPaABZRVU" }, { "ASUS", "A8V-E Deluxe", "http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=143&l4=0&model=376&model…" }, { "ASUS", "A8V-E SE", "http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=143&l4=0&model=576&model…" }, + { "ASUS", "K8V", "http://www.asus.com/product.aspx?P_ID=fG2KZOWF7v6MRFRm" }, + { "ASUS", "K8V SE Deluxe", "http://www.asus.com/product.aspx?P_ID=65HeDI8XM1u6Uy6o" }, { "ASUS", "M2A-MX", "http://www.asus.com/products.aspx?l1=3&l2=101&l3=583&l4=0&model=1909&modelm…" }, { "ASUS", "M2A-VM", "http://www.asus.com.tw/products.aspx?l1=3&l2=101&l3=496&l4=0&model=1568&mod…" }, { "ASUS", "M2N-E", "http://www.asus.com/products.aspx?l1=3&l2=101&l3=308&l4=0&model=1181&modelm…" }, @@ -131,6 +133,7 @@ { "ASUS", "P6T Deluxe V2", "http://www.asus.com/product.aspx?P_ID=iRlP8RG9han6saZx" }, { "A-Trend", "ATC-6220", "http://www.motherboard.cz/mb/atrend/atc6220.htm" }, { "BCOM", "WinNET100", "http://www.coreboot.org/BCOM_WINNET100" }, + { "Elitegroup", "K7S5A", "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&…" }, { "Elitegroup", "P6VAP-A+", "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&…" }, { "GIGABYTE", "GA-6BXC", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ClassVal…" }, { "GIGABYTE", "GA-6BXDU", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ProductI…" }, @@ -282,7 +285,8 @@ { "ASUS", "A8V-E SE", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html." }, { "ASUS", "M2A-VM", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html." }, { "BCOM", "WinNET100", "Used in the IGEL-316 thin client." }, - { "GIGABYTE", "GA-7ZM", "Works fine iff you remove jumper JP9 on the board and disable the flash protection BIOS option." }, + { "GIGABYTE", "GA-7ZM", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option." }, + { "ASUS", "M2N-E", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html" }, /* Verified working boards that DO need write-enables. */ { "Acer", "Aspire One", "See http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html." },

1 0

[commit] r762 - trunk
by svn＠flashrom.org 16 Nov '09

16 Nov '09

Author: hailfinger Date: 2009-11-16 15:05:13 +0100 (Mon, 16 Nov 2009) New Revision: 762 Modified: trunk/Makefile Log: Retrieve the proper linker flags for libftdi via pkg-config and fall back if pkg-config isn't available or if it doesn't know libftdi. Fix $LIBS and $FEATURE_LIBS to honor dependency order. The original patch is from J?\195?\182rg, it has been updated by Carl-Daniel to work on the current tree and to have a fallback in case pkg-config is not available or not working. Signed-off-by: J?\195?\182rg Mayer <jmayer(a)loplof.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: J?\195?\182rg Mayer <jmayer(a)loplof.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-11-15 17:23:59 UTC (rev 761) +++ trunk/Makefile 2009-11-16 14:05:13 UTC (rev 762) @@ -120,10 +120,11 @@ OBJS += satasii.o endif +FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") ifeq ($(CONFIG_FT2232SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") -FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-lftdi") +FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") OBJS += ft2232_spi.o endif @@ -146,7 +147,7 @@ FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") $(PROGRAM): $(OBJS) - $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(LIBS) $(FEATURE_LIBS) + $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(FEATURE_LIBS) $(LIBS) # TAROPTIONS reduces information leakage from the packager's system. # If other tar programs support command line arguments for setting uid/gid of @@ -218,7 +219,7 @@ echo "struct ftdi_context *ftdic = NULL;"; \ echo "int main(int argc, char **argv)"; \ echo "{ return ftdi_init(ftdic); }"; ) > .featuretest.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(LIBS) -lftdi >/dev/null 2>&1 && \ + @$(CC) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ ( echo "found."; echo "FTDISUPPORT := yes" >> .features.tmp ) || \ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features

1 0

Fix feature detection when fdti requires libusb for linking
by Joerg Mayer 16 Nov '09

16 Nov '09

see attached patch. patch is too small to be copyrightable... ciao Joerg -- Joerg Mayer <jmayer(a)loplof.de> We are stuck with technology when what we really want is just stuff that works. Some say that should read Microsoft instead of technology.

3 5

[commit] r761 - trunk
by svn＠flashrom.org 15 Nov '09

15 Nov '09

Author: hailfinger Date: 2009-11-15 18:23:59 +0100 (Sun, 15 Nov 2009) New Revision: 761 Modified: trunk/ Log: svn:ignore .libdeps Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Property changes on: trunk ___________________________________________________________________ Modified: svn:ignore - flashrom .features .dependencies + flashrom .features .dependencies .libdeps

1 0

[commit] r760 - trunk
by svn＠flashrom.org 15 Nov '09

15 Nov '09

Author: hailfinger Date: 2009-11-15 18:20:21 +0100 (Sun, 15 Nov 2009) New Revision: 760 Modified: trunk/chipset_enable.c trunk/print.c Log: Mark Elitegroup K7S5A as supported. Mark SiS 735 as supported. Remove "SiS" from the model number to avoid printing it twice. Reported by Adrian Glaubitz. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-11-15 17:13:29 UTC (rev 759) +++ trunk/chipset_enable.c 2009-11-15 17:20:21 UTC (rev 760) @@ -1155,34 +1155,34 @@ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, - {0x1039, 0x0496, NT, "SiS", "SiS 85C496+497", enable_flash_sis85c496}, - {0x1039, 0x0406, NT, "SiS", "SiS 501/5101/5501", enable_flash_sis501}, - {0x1039, 0x5511, NT, "SiS", "SiS 5511", enable_flash_sis5511}, - {0x1039, 0x5596, NT, "SiS", "SiS 5596", enable_flash_sis5596}, - {0x1039, 0x5571, NT, "SiS", "SiS 5571", enable_flash_sis530}, - {0x1039, 0x5591, NT, "SiS", "SiS 5591/5592", enable_flash_sis530}, - {0x1039, 0x5597, NT, "SiS", "SiS 5597/5598/5581/5120", enable_flash_sis530}, - {0x1039, 0x0530, NT, "SiS", "SiS 530", enable_flash_sis530}, - {0x1039, 0x5600, NT, "SiS", "SiS 600", enable_flash_sis530}, - {0x1039, 0x0620, NT, "SiS", "SiS 620", enable_flash_sis530}, - {0x1039, 0x0540, NT, "SiS", "SiS 540", enable_flash_sis540}, - {0x1039, 0x0630, NT, "SiS", "SiS 630", enable_flash_sis630}, - {0x1039, 0x0635, NT, "SiS", "SiS 635", enable_flash_sis630}, - {0x1039, 0x0640, NT, "SiS", "SiS 640", enable_flash_sis630}, - {0x1039, 0x0645, NT, "SiS", "SiS 645", enable_flash_sis630}, - {0x1039, 0x0646, NT, "SiS", "SiS 645DX", enable_flash_sis630}, - {0x1039, 0x0648, NT, "SiS", "SiS 648", enable_flash_sis630}, - {0x1039, 0x0650, NT, "SiS", "SiS 650", enable_flash_sis630}, - {0x1039, 0x0651, NT, "SiS", "SiS 651", enable_flash_sis630}, - {0x1039, 0x0655, NT, "SiS", "SiS 655", enable_flash_sis630}, - {0x1039, 0x0730, NT, "SiS", "SiS 730", enable_flash_sis630}, - {0x1039, 0x0733, NT, "SiS", "SiS 733", enable_flash_sis630}, - {0x1039, 0x0735, NT, "SiS", "SiS 735", enable_flash_sis630}, - {0x1039, 0x0740, NT, "SiS", "SiS 740", enable_flash_sis630}, - {0x1039, 0x0745, NT, "SiS", "SiS 745", enable_flash_sis630}, - {0x1039, 0x0746, NT, "SiS", "SiS 746", enable_flash_sis630}, - {0x1039, 0x0748, NT, "SiS", "SiS 748", enable_flash_sis630}, - {0x1039, 0x0755, NT, "SiS", "SiS 755", enable_flash_sis630}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, + {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5596}, + {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, + {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, + {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, + {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis630}, + {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis630}, + {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis630}, + {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis630}, + {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis630}, + {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis630}, + {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis630}, + {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis630}, + {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis630}, + {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis630}, + {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis630}, + {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis630}, + {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis630}, + {0x1039, 0x0745, NT, "SiS", "745", enable_flash_sis630}, + {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis630}, + {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis630}, + {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis630}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-11-15 17:13:29 UTC (rev 759) +++ trunk/print.c 2009-11-15 17:20:21 UTC (rev 760) @@ -260,6 +260,7 @@ { "ASUS", "P6T Deluxe V2", }, { "A-Trend", "ATC-6220", }, { "BCOM", "WinNET100", }, + { "Elitegroup", "K7S5A", }, { "Elitegroup", "P6VAP-A+", }, { "GIGABYTE", "GA-6BXC", }, { "GIGABYTE", "GA-6BXDU", },

1 0

[commit] r759 - trunk
by svn＠flashrom.org 15 Nov '09

15 Nov '09

Author: hailfinger Date: 2009-11-15 18:13:29 +0100 (Sun, 15 Nov 2009) New Revision: 759 Modified: trunk/chipset_enable.c trunk/flash.h trunk/internal.c Log: Add support for every single SiS chipset out there. The two existing SiS chipset enables (compared to the 28 in this patch) were refactored, and one of them was fixed. A function to match PCI vendor/class combinations was added to generic code. Tested on the "Elitegroup K7S5A". Results are somewhat unexpected (some PCI settings seem to be inaccessible, but it still works). This is not based on any docs, but rather on detailed analysis of existing opensource code for some of the chipsets. Thanks to for Adrian Glaubitz testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Adrian Glaubitz <glaubitz(a)physik.fu-berlin.de> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-11-14 03:58:58 UTC (rev 758) +++ trunk/chipset_enable.c 2009-11-15 17:13:29 UTC (rev 759) @@ -70,54 +70,193 @@ return 0; } +static int enable_flash_sis85c496(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + + tmp = pci_read_byte(dev, 0xd0); + tmp |= 0xf8; + pci_write_byte(dev, 0xd0, tmp); + + return 0; +} + +static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + + /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ + /* This is 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ + new = pci_read_byte(dev, 0x40); + new &= (~0x04); /* No idea why we clear bit 2. */ + new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */ + pci_write_byte(dev, 0x40, new); + newer = pci_read_byte(dev, 0x40); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); + printf_debug("Stuck at 0x%x\n", newer); + return -1; + } + return 0; +} + +static struct pci_dev *find_southbridge(uint16_t vendor, const char *name) +{ + struct pci_dev *sbdev; + + sbdev = pci_dev_find_vendorclass(vendor, 0x0601); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0680); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0000); + if (!sbdev) + fprintf(stderr, "No southbridge found for %s!\n", name); + if (sbdev) + printf_debug("Found southbridge %04x:%04x at %02x:%02x:%01x\n", + sbdev->vendor_id, sbdev->device_id, + sbdev->bus, sbdev->dev, sbdev->func); + return sbdev; +} + +static int enable_flash_sis501(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x80); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x80, tmp); + + tmp = sio_read(0x22, 0x70); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x70, tmp); + + return ret; +} + +static int enable_flash_sis5511(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x50); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x50, tmp); + + return ret; +} + +static int enable_flash_sis5596(struct pci_dev *dev, const char *name) +{ + int ret; + + ret = enable_flash_sis5511(dev, name); + + /* FIXME: Needs same superio handling as enable_flash_sis630 */ + return ret; +} + +static int enable_flash_sis530(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x20); + new |= 0x4; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + +static int enable_flash_sis540(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x80); + new |= 0x40; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + static int enable_flash_sis630(struct pci_dev *dev, const char *name) { - uint8_t b; + uint8_t tmp; + uint16_t siobase; + int ret; - /* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ - b = pci_read_byte(dev, 0x40); - pci_write_byte(dev, 0x40, b | 0xb); + ret = enable_flash_sis540(dev, name); - /* Flash write enable on SiS 540/630. */ - b = pci_read_byte(dev, 0x45); - pci_write_byte(dev, 0x45, b | 0x40); - /* The same thing on SiS 950 Super I/O side... */ /* First probe for Super I/O on config port 0x2e. */ - OUTB(0x87, 0x2e); - OUTB(0x01, 0x2e); - OUTB(0x55, 0x2e); - OUTB(0x55, 0x2e); + siobase = 0x2e; + enter_conf_mode_ite(siobase); - if (INB(0x2f) != 0x87) { + if (INB(siobase + 1) != 0x87) { /* If that failed, try config port 0x4e. */ - OUTB(0x87, 0x4e); - OUTB(0x01, 0x4e); - OUTB(0x55, 0x4e); - OUTB(0xaa, 0x4e); - if (INB(0x4f) != 0x87) { - printf("Can not access SiS 950\n"); + siobase = 0x4e; + enter_conf_mode_ite(siobase); + if (INB(siobase + 1) != 0x87) { + printf("Can not find SuperI/O.\n"); return -1; } - OUTB(0x24, 0x4e); - b = INB(0x4f) | 0xfc; - OUTB(0x24, 0x4e); - OUTB(b, 0x4f); - OUTB(0x02, 0x4e); - OUTB(0x02, 0x4f); } - OUTB(0x24, 0x2e); - printf_debug("2f is %#x\n", INB(0x2f)); - b = INB(0x2f) | 0xfc; - OUTB(0x24, 0x2e); - OUTB(b, 0x2f); + /* Enable flash mapping. Works for most old ITE style SuperI/O. */ + tmp = sio_read(siobase, 0x24); + tmp |= 0xfc; + sio_write(siobase, 0x24, tmp); - OUTB(0x02, 0x2e); - OUTB(0x02, 0x2f); + exit_conf_mode_ite(siobase); - return 0; + return ret; } /* Datasheet: @@ -603,38 +742,6 @@ return 0; } -static int enable_flash_sis5595(struct pci_dev *dev, const char *name) -{ - uint8_t new, newer; - - new = pci_read_byte(dev, 0x45); - - new &= (~0x20); /* Clear bit 5. */ - new |= 0x4; /* Set bit 2. */ - - pci_write_byte(dev, 0x45, new); - - newer = pci_read_byte(dev, 0x45); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - - /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ - new = pci_read_byte(dev, 0x40); - new &= 0xFB; - new |= 0x3; - pci_write_byte(dev, 0x40, new); - newer = pci_read_byte(dev, 0x40); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - return 0; -} - /* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) { @@ -1048,8 +1155,34 @@ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, - {0x1039, 0x0008, OK, "SiS", "SiS5595", enable_flash_sis5595}, - {0x1039, 0x0630, NT, "SiS", "SiS630", enable_flash_sis630}, + {0x1039, 0x0496, NT, "SiS", "SiS 85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0406, NT, "SiS", "SiS 501/5101/5501", enable_flash_sis501}, + {0x1039, 0x5511, NT, "SiS", "SiS 5511", enable_flash_sis5511}, + {0x1039, 0x5596, NT, "SiS", "SiS 5596", enable_flash_sis5596}, + {0x1039, 0x5571, NT, "SiS", "SiS 5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "SiS 5591/5592", enable_flash_sis530}, + {0x1039, 0x5597, NT, "SiS", "SiS 5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x0530, NT, "SiS", "SiS 530", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "SiS 600", enable_flash_sis530}, + {0x1039, 0x0620, NT, "SiS", "SiS 620", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "SiS 540", enable_flash_sis540}, + {0x1039, 0x0630, NT, "SiS", "SiS 630", enable_flash_sis630}, + {0x1039, 0x0635, NT, "SiS", "SiS 635", enable_flash_sis630}, + {0x1039, 0x0640, NT, "SiS", "SiS 640", enable_flash_sis630}, + {0x1039, 0x0645, NT, "SiS", "SiS 645", enable_flash_sis630}, + {0x1039, 0x0646, NT, "SiS", "SiS 645DX", enable_flash_sis630}, + {0x1039, 0x0648, NT, "SiS", "SiS 648", enable_flash_sis630}, + {0x1039, 0x0650, NT, "SiS", "SiS 650", enable_flash_sis630}, + {0x1039, 0x0651, NT, "SiS", "SiS 651", enable_flash_sis630}, + {0x1039, 0x0655, NT, "SiS", "SiS 655", enable_flash_sis630}, + {0x1039, 0x0730, NT, "SiS", "SiS 730", enable_flash_sis630}, + {0x1039, 0x0733, NT, "SiS", "SiS 733", enable_flash_sis630}, + {0x1039, 0x0735, NT, "SiS", "SiS 735", enable_flash_sis630}, + {0x1039, 0x0740, NT, "SiS", "SiS 740", enable_flash_sis630}, + {0x1039, 0x0745, NT, "SiS", "SiS 745", enable_flash_sis630}, + {0x1039, 0x0746, NT, "SiS", "SiS 746", enable_flash_sis630}, + {0x1039, 0x0748, NT, "SiS", "SiS 748", enable_flash_sis630}, + {0x1039, 0x0755, NT, "SiS", "SiS 755", enable_flash_sis630}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-14 03:58:58 UTC (rev 758) +++ trunk/flash.h 2009-11-15 17:13:29 UTC (rev 759) @@ -389,6 +389,7 @@ /* internal.c */ struct pci_dev *pci_dev_find_filter(struct pci_filter filter); +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); Modified: trunk/internal.c =================================================================== --- trunk/internal.c 2009-11-14 03:58:58 UTC (rev 758) +++ trunk/internal.c 2009-11-15 17:13:29 UTC (rev 759) @@ -42,6 +42,26 @@ return NULL; } +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class) +{ + struct pci_dev *temp; + struct pci_filter filter; + uint16_t tmp2; + + pci_filter_init(NULL, &filter); + filter.vendor = vendor; + + for (temp = pacc->devices; temp; temp = temp->next) + if (pci_filter_match(&filter, temp)) { + /* Read PCI class */ + tmp2 = pci_read_word(temp, 0x0a); + if (tmp2 == class) + return temp; + } + + return NULL; +} + struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) { struct pci_dev *temp;

1 0

[PATCH] Add support for every single SiS chipset out there
by Carl-Daniel Hailfinger 15 Nov '09

15 Nov '09

Add support for every single SiS chipset out there. The two existing SiS chipset enables (compared to the 28 in this patch) were refactored, and one of them was fixed. A function to match PCI vendor/class combinations was added to generic code. Untested. This is not based on any docs, but rather on detailed analysis of existing opensource code for some of the chipsets. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-sis_all/flash.h =================================================================== --- flashrom-sis_all/flash.h (Revision 758) +++ flashrom-sis_all/flash.h (Arbeitskopie) @@ -389,6 +389,7 @@ /* internal.c */ struct pci_dev *pci_dev_find_filter(struct pci_filter filter); +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); Index: flashrom-sis_all/chipset_enable.c =================================================================== --- flashrom-sis_all/chipset_enable.c (Revision 758) +++ flashrom-sis_all/chipset_enable.c (Arbeitskopie) @@ -70,54 +70,190 @@ return 0; } +static int enable_flash_sis85c496(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + + tmp = pci_read_byte(dev, 0xd0); + tmp |= 0xf8; + pci_write_byte(dev, 0xd0, tmp); + + return 0; +} + +static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + + /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ + /* This is 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ + new = pci_read_byte(dev, 0x40); + new &= (~0x04); /* No idea why we clear bit 2. */ + new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */ + pci_write_byte(dev, 0x40, new); + newer = pci_read_byte(dev, 0x40); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); + printf_debug("Stuck at 0x%x\n", newer); + return -1; + } + return 0; +} + +static struct pci_dev *find_southbridge(uint16_t vendor, const char *name) +{ + struct pci_dev *sbdev; + + sbdev = pci_dev_find_vendorclass(vendor, 0x0601); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0680); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0000); + if (!sbdev) + fprintf(stderr, "No southbridge found for %s!\n", name); + + return sbdev; +} + +static int enable_flash_sis501(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x80); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x80, tmp); + + tmp = sio_read(0x22, 0x70); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x70, tmp); + + return ret; +} + +static int enable_flash_sis5511(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x50); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x50, tmp); + + return ret; +} + +static int enable_flash_sis5596(struct pci_dev *dev, const char *name) +{ + int ret; + + ret = enable_flash_sis5511(dev, name); + + /* FIXME: Needs same superio handling as enable_flash_sis630 */ + return ret; +} + +static int enable_flash_sis530(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x20); + new |= 0x4; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + +static int enable_flash_sis540(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x80); + new |= 0x40; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + static int enable_flash_sis630(struct pci_dev *dev, const char *name) { - uint8_t b; + uint8_t tmp; + uint16_t siobase; + int ret; - /* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ - b = pci_read_byte(dev, 0x40); - pci_write_byte(dev, 0x40, b | 0xb); + ret = enable_flash_sis540(dev, name); - /* Flash write enable on SiS 540/630. */ - b = pci_read_byte(dev, 0x45); - pci_write_byte(dev, 0x45, b | 0x40); - /* The same thing on SiS 950 Super I/O side... */ /* First probe for Super I/O on config port 0x2e. */ - OUTB(0x87, 0x2e); - OUTB(0x01, 0x2e); - OUTB(0x55, 0x2e); - OUTB(0x55, 0x2e); + siobase = 0x2e; + enter_conf_mode_ite(siobase); - if (INB(0x2f) != 0x87) { + if (INB(siobase + 1) != 0x87) { /* If that failed, try config port 0x4e. */ - OUTB(0x87, 0x4e); - OUTB(0x01, 0x4e); - OUTB(0x55, 0x4e); - OUTB(0xaa, 0x4e); - if (INB(0x4f) != 0x87) { - printf("Can not access SiS 950\n"); + siobase = 0x4e; + enter_conf_mode_ite(siobase); + if (INB(siobase + 1) != 0x87) { + printf("Can not find SuperI/O.\n"); return -1; } - OUTB(0x24, 0x4e); - b = INB(0x4f) | 0xfc; - OUTB(0x24, 0x4e); - OUTB(b, 0x4f); - OUTB(0x02, 0x4e); - OUTB(0x02, 0x4f); } - OUTB(0x24, 0x2e); - printf_debug("2f is %#x\n", INB(0x2f)); - b = INB(0x2f) | 0xfc; - OUTB(0x24, 0x2e); - OUTB(b, 0x2f); + /* Enable flash mapping. Works for most old ITE style SuperI/O. */ + tmp = sio_read(siobase, 0x24); + tmp |= 0xfc; + sio_write(siobase, 0x24, tmp); - OUTB(0x02, 0x2e); - OUTB(0x02, 0x2f); + exit_conf_mode_ite(siobase); - return 0; + return ret; } /* Datasheet: @@ -603,38 +739,6 @@ return 0; } -static int enable_flash_sis5595(struct pci_dev *dev, const char *name) -{ - uint8_t new, newer; - - new = pci_read_byte(dev, 0x45); - - new &= (~0x20); /* Clear bit 5. */ - new |= 0x4; /* Set bit 2. */ - - pci_write_byte(dev, 0x45, new); - - newer = pci_read_byte(dev, 0x45); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - - /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ - new = pci_read_byte(dev, 0x40); - new &= 0xFB; - new |= 0x3; - pci_write_byte(dev, 0x40, new); - newer = pci_read_byte(dev, 0x40); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - return 0; -} - /* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) { @@ -1048,8 +1152,34 @@ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, - {0x1039, 0x0008, OK, "SiS", "SiS5595", enable_flash_sis5595}, - {0x1039, 0x0630, NT, "SiS", "SiS630", enable_flash_sis630}, + {0x1039, 0x0496, NT, "SiS", "SiS 85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0406, NT, "SiS", "SiS 501/5101/5501", enable_flash_sis501}, + {0x1039, 0x5511, NT, "SiS", "SiS 5511", enable_flash_sis5511}, + {0x1039, 0x5596, NT, "SiS", "SiS 5596", enable_flash_sis5596}, + {0x1039, 0x5571, NT, "SiS", "SiS 5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "SiS 5591/5592", enable_flash_sis530}, + {0x1039, 0x5597, NT, "SiS", "SiS 5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x0530, NT, "SiS", "SiS 530", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "SiS 600", enable_flash_sis530}, + {0x1039, 0x0620, NT, "SiS", "SiS 620", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "SiS 540", enable_flash_sis540}, + {0x1039, 0x0630, NT, "SiS", "SiS 630", enable_flash_sis630}, + {0x1039, 0x0635, NT, "SiS", "SiS 635", enable_flash_sis630}, + {0x1039, 0x0640, NT, "SiS", "SiS 640", enable_flash_sis630}, + {0x1039, 0x0645, NT, "SiS", "SiS 645", enable_flash_sis630}, + {0x1039, 0x0646, NT, "SiS", "SiS 645DX", enable_flash_sis630}, + {0x1039, 0x0648, NT, "SiS", "SiS 648", enable_flash_sis630}, + {0x1039, 0x0650, NT, "SiS", "SiS 650", enable_flash_sis630}, + {0x1039, 0x0651, NT, "SiS", "SiS 651", enable_flash_sis630}, + {0x1039, 0x0655, NT, "SiS", "SiS 655", enable_flash_sis630}, + {0x1039, 0x0730, NT, "SiS", "SiS 730", enable_flash_sis630}, + {0x1039, 0x0733, NT, "SiS", "SiS 733", enable_flash_sis630}, + {0x1039, 0x0735, NT, "SiS", "SiS 735", enable_flash_sis630}, + {0x1039, 0x0740, NT, "SiS", "SiS 740", enable_flash_sis630}, + {0x1039, 0x0745, NT, "SiS", "SiS 745", enable_flash_sis630}, + {0x1039, 0x0746, NT, "SiS", "SiS 746", enable_flash_sis630}, + {0x1039, 0x0748, NT, "SiS", "SiS 748", enable_flash_sis630}, + {0x1039, 0x0755, NT, "SiS", "SiS 755", enable_flash_sis630}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, Index: flashrom-sis_all/internal.c =================================================================== --- flashrom-sis_all/internal.c (Revision 758) +++ flashrom-sis_all/internal.c (Arbeitskopie) @@ -42,6 +42,26 @@ return NULL; } +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class) +{ + struct pci_dev *temp; + struct pci_filter filter; + uint16_t tmp2; + + pci_filter_init(NULL, &filter); + filter.vendor = vendor; + + for (temp = pacc->devices; temp; temp = temp->next) + if (pci_filter_match(&filter, temp)) { + /* Read PCI class */ + tmp2 = pci_read_word(temp, 0x0a); + if (tmp2 == class) + return temp; + } + + return NULL; +} + struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) { struct pci_dev *temp; -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

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Output of flashrom -V on several boards
by Adrian Glaubitz 15 Nov '09

15 Nov '09

Hello, I've played around with flashrom on several different machines in my university. I haven't flashed yet any of the boards. However, there are alot of boards where flashrom detects the chip but it's not listed on the webpage. I will try flashing these boards within the next weeks once I have more time (it's not the flashing that takes so much time but the recovery of the machine in case the flash failed :)). AsRock Conroe945G: http://pastebin.org/53578 - Chip detected: "Winbond W39V040B" (512 KB, LPC) AsRock K7S8X: http://pastebin.org/53576 - NO Chip detected AsRock K8Upgrade: http://pastebin.org/53574 - Chip detected: "PMC Pm49FL002" (256 KB, LPC,FWH) ASUS K8V-XSE: http://pastebin.org/53579 - Chip detected: "PMC Pm49FL004" (512 KB, LPC,FWH) ASUS P4P-X: http://pastebin.org/53573 - Chip detected: "PMC Pm49FL002" (256 KB, LPC,FWH) ASUS P4T-E: http://pastebin.org/53572 - Chip detected: "SST SST49LF002A/B" (256 KB, FWH) ASUS P5B: http://pastebin.org/53580 - Chip detected: "SST SST25VF080B" (1024 KB, SPI) Elitegroup K7S5A: http://pastebin.org/53571 - NO Chip detected Supermicro H8DAR-T: http://pastebin.org/53583 - Chip detected: "SST SST49LF004A/B" (512 KB, FWH) Supermicro H8DA8: http://pastebin.org/53585 - Chip detected: "SST SST49LF004A/B" (512 KB, FWH) Looking forward to provide more reports, then *with* actual flashing of the boards. Adrian

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