- flashrom - mail.coreboot.org

ss50 files
by Val Fucich 03 Jan '10

03 Jan '10

Board is FS50V1.3 Bios location...http://image.shuttle.com/ResourceCenter/download_file.jsp?file_i…

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[commit] r826 - trunk
by svn＠flashrom.org 03 Jan '10

03 Jan '10

Author: mkarcher Date: 2010-01-03 16:09:17 +0100 (Sun, 03 Jan 2010) New Revision: 826 Modified: trunk/chipset_enable.c Log: Fix Intel FWH decode size Fixes wrong detection of area decoded to the FWH interfaces. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2010-01-03 14:40:30 UTC (rev 825) +++ trunk/chipset_enable.c 2010-01-03 15:09:17 UTC (rev 826) @@ -364,7 +364,7 @@ (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp ? "en" : "dis"); - if ((tmp == 0) && contiguous) { + if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x80000; } else { contiguous = 0; @@ -376,7 +376,7 @@ (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp ? "en" : "dis"); - if ((tmp == 0) && contiguous) { + if ((tmp == 1) && contiguous) { max_decode_fwh_decode = (8 - i) * 0x100000; } else { contiguous = 0;

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[commit] r825 - trunk
by svn＠flashrom.org 03 Jan '10

03 Jan '10

Author: stepan Date: 2010-01-03 15:40:30 +0100 (Sun, 03 Jan 2010) New Revision: 825 Modified: trunk/flashrom.8 Log: drop known broken email addresses. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-12-24 16:54:21 UTC (rev 824) +++ trunk/flashrom.8 2010-01-03 14:40:30 UTC (rev 825) @@ -262,7 +262,7 @@ .br Dominik Geyer <dominik.geyer(a)kontron.com> .br -Eric Biederman <ebiederman(a)lnxi.com> +Eric Biederman .br Giampiero Giancipoli <gianci(a)email.it> .br @@ -292,9 +292,9 @@ .br Uwe Hermann <uwe(a)hermann-uwe.de> .br -Wang Qingpei <Qingpei.Wang(a)amd.com> +Wang Qingpei .br -Yinghai Lu <yinghai.lu(a)amd.com> +Yinghai Lu .br some others .PP

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Cannot flash satabios (Sil3112)
by Benjamin 01 Jan '10

01 Jan '10

Hello, I was not capable to flash (in fact I only try to read for the moment) my SATABIOS Ctrl (Silicon Image 3112) on a Abit NF7-S (rev 2.0) ( http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA… ) Here is the log : # /usr/local/sbin/flashrom --programmer satasii --read CURRENT_SATABIOS.bin --verbose flashrom v0.9.1-r824 Found "Silicon Image SiI 3112 [SATALink/SATARaid] SATA Ctrl" (1095:3112, BDF 01:0b.0). Mapping SATA SIL registers at 0xe7002000, unaligned size 0x100. Warning: Flash seems unconnected. Calibrating delay loop... 634M loops per second, 100 myus = 139 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29F080B, 1024 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT49F002(N), 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for AMIC A49LF040A, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for EMST F49B002UA, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Eon EN25B05, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0x90, id2 0x90 Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0x90, id2 0x90 Probing for Intel 28F001BX-B, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Intel 28F001BX-T, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Intel 82802AB, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Intel 82802AC, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0x90, id2 0x90 Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC Pm29F002T, 256 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for PMC Pm29F002B, 256 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for PMC Pm39LV010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for PMC Pm49FL002, 256 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for PMC Pm49FL004, 512 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Sharp LHF00L04, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0x90, id2 0x90 Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST29EE020A, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SST SST49LF002A/B, 256 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF003A/B, 384 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF004A/B, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF004C, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF008A, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF008C, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF016C, 2048 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for SST SST49LF020, 256 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF020A, 256 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF040, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF040B, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF080A, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SST SST49LF160C, 2048 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for ST M25P05-A, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M29F002T/NT, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0x90, id2 0x90 Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0x90, id2 0x90 Probing for ST M29W010B, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M29W040B, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for ST M50FLW040A, 512 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW040B, 512 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW080A, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW080B, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC,FWH are incompatible. Probing for ST M50FW002, 256 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50FW016, 2048 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50FW040, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50FW080, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for ST M50LPW116, 2048 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for SyncMOS S29C31004T, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SyncMOS S29C51001T, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SyncMOS S29C51002T, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for SyncMOS S29C51004T, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for TI TMS29F002RB, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for TI TMS29F002RT, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W25x10, 128 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x32, 4096 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W25x64, 8192 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W39V040B, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W39V040C, 512 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W39V040FA, 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Winbond W39V080A, 1024 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W49F002U, 256 KB: probe_jedec: id1 0x90, id2 0x90, id1 parity violation Probing for Winbond W49V002A, 256 KB: skipped. Host bus type Parallel and chip bus type LPC are incompatible. Probing for Winbond W49V002FA, 256 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Winbond W39V080FA, 1024 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Host bus type Parallel and chip bus type FWH are incompatible. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically.

4 7

MSI IM-945GSE-A testreport
by spam＠systol-ng.god.lan 31 Dec '09

31 Dec '09

Thanks for the great app! Just for reference I would like to report my results on a MSI mainboard: IM-945GSE-A see: http://www.msi.com/index.php?func=proddesc&maincat_no=388&prod_no=1693 /sys/devices/virtual/dmi/id/ board_vendor MSI board_name A9830IMS bios_vendor American Megatrends Inc. Bridge: ICH7M Flash chip: "Macronix MX25L4005" (512 KB, SPI) at physical address 0xfff80000 The bios write protect is located on GPIO 24 on the ICH7M according to the manual. But there's an easy way in BIOS to enable this. Reading flash is OK. Not tested writing yet, will test it with next bios upgrade. Below is a flashrom log attached. Many thanks again! Henk Vergonet ------------------------- flashrom log ------------------------- flashrom v0.9.1-r710 No coreboot table found. Found chipset "Intel ICH7M", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode disabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x130464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x0004 (SPIS) 0x02: 0x4140 (SPIC) 0x04: 0x00000000 (SPIA) 0x08: 0x000020c2 (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x00000000 (SPID2+4) 0x20: 0x00000000 (SPID3) 0x24: 0x00000000 (SPID3+4) 0x28: 0x00000000 (SPID4) 0x2c: 0x00000000 (SPID4+4) 0x30: 0x00000000 (SPID5) 0x34: 0x00000000 (SPID5+4) 0x38: 0x00000000 (SPID6) 0x3c: 0x00000000 (SPID6+4) 0x40: 0x00000000 (SPID7) 0x44: 0x00000000 (SPID7+4) 0x50: 0x00000000 (BBAR) 0x54: 0x0004 (PREOP) 0x56: 0x543b (OPTYPE) 0x58: 0x05d80302 (OPMENU) 0x5c: 0x0006019f (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) 0x6c: 0x00000000 (PBR3) Programming OPCODES... program_opcodes: preop=0006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: SPI. Calibrating delay loop... 793M loops per second, 100 myus = 199 us. OK. ... Probing for Macronix MX25L2005, 256 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L4005, 512 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L4005" (512 KB, SPI) at physical address 0xfff80000. Probing for Macronix MX25L8005, 1024 KB: RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 ... RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for EON unknown EON SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for Macronix unknown Macronix SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for PMC unknown PMC SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for SST unknown SST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) Probing for ST unknown ST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x13. probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Not unmapping zero size at (nil) No operations were specified.

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Flashrom Verbose for Tyan S5211
by david＠lattice.net 30 Dec '09

30 Dec '09

From: David Rabine Email: david.rabine(a)nasa.gov || david(a)lattice.net NASA Goddard Space Flight Center 8800 Greenbelt Road: 694.0 Greenbelt, MD 20771 Board Information: Tyan S5211 (don't see any revision number) Offical BIOS Link: http://www.tyan.com/support_download_bios.aspx?model=S.S5211 Attempting: 2009/08/18 S5211_v109 v1.09

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[Fwd: Re: Patch: Support ASUS M2NBP-VM CSM]
by Michael Karcher 30 Dec '09

30 Dec '09

Hello, as you told yesterday in the IRC channel, my (old) patch for the ASUS M2NBP-VM CSM made flashrom work for you. Could you please try the current revision of this patch (contained in this email, needs at least revision 810 as base) and if it also works for you, please respond to the mail with a line like "Acked-By: Your Real Name <ying.w(a)a-power.com>" (without the quotes). Make sure your response reaches the mailing list at flashrom(a)flashrom.org You told that you want to use flashrom to upgrade 900 machines. Be very careful - I suspect you might run into serious trouble. The board you want to update has an nForce network chip. The MAC address for that network interface is stored in the system BIOS. flashrom is currently unable to copy information from the old BIOS into the new image you are going to flash, so you will loose your MAC address if you update using flashrom, and reset that to a dummy address. This dummy address will probably be the same on all your 900 machines, so you will get trouble with networking, as MAC addresses should be unique. I would try first with two or three machines to find out whether you really get identical MAC addresses, and if yes, don't you flashrom to upgrade your pool unless you don't use the nForce network interface. The flashrom project would like to get the Acked-By line even if the MAC-address stuff is preventing you from using flashrom, as that line only indicates that the patch to enable flash update on your mainboard does what it should do. Regards, Michael Karcher -------- Forwarded message -------- > Von: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > An: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Betreff: Re: [flashrom] Patch: Support ASUS M2NBP-VM CSM > Datum: Tue, 29 Dec 2009 01:24:35 +0100 > > Am Samstag, den 19.12.2009, 02:09 +0100 schrieb Michael Karcher: > > Add board enable for Asus M2NBP-VM CSM > > Rebased to current svn, tested by a chat user called "Ying". I hope to > catch an Ack. If some person has the email address of Ying (he/she tried > to send an 800k binary to the list some hours ago), please forward. > > Signed-Off-By: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Index: board_enable.c =================================================================== --- board_enable.c (Revision 824) +++ board_enable.c (Arbeitskopie) @@ -474,6 +474,14 @@ } /** + * Suited for ASUS M2NBP-VM CSM: nVidia MCP51. + */ +static int nvidia_mcp_gpio0_raise(const char *name) +{ + return nvidia_mcp_gpio_set(0x00, 1); +} + +/** * Suited for MSI K8N Neo4: nVidia CK804. */ static int nvidia_mcp_gpio2_raise(const char *name) @@ -1186,6 +1194,7 @@ {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, + {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, "ASUS", "M2NBP-VM CSM", nvidia_mcp_gpio0_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise},

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Acked-By: Corey Hamilton <Corey_Hamilton@sd33.bc.ca>
by Corey Hamilton 29 Dec '09

29 Dec '09

Hello, Wanted to verify that the patch as outlined here (http://www.coreboot.org/pipermail/flashrom/2009-December/001374.html) enabled the Asus M2NBP-VM CSM to be flashed by Flashrom. Thanks again for your quick help and my apologies for the delay in getting back to you to verify functionality. Happy Holidays! Corey ----- Corey Hamilton Technology Department School District 33 - Chilliwack

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Dell Dimension 4700 probe report
by Steven Zakulec 28 Dec '09

28 Dec '09

Hi, I ran flashrom -V, lspci -nnvvvxxx, and superiotool -deV on a Dell Dimension 4700 one of my colleagues owns. flashrom v0.9.1-r811 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x0 bytes BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x2 tried to set 0xdc to 0x3 on ICH6/ICH6R failed (WARNING ONLY) FAILED! This chipset supports the following protocols: FWH. Calibrating delay loop... 761M loops per second, 100 myus = 208 us. OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ASD AE49F2008, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C020, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A25L40P, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A29002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A29040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A49LF040A, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for EMST F49B002UA, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Eon EN25B05, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Intel 82802AB, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for PMC Pm29F0002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for PMC Pm49FL002, 256 KB: Chip size 256 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0x09, id2 0x4f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Sharp LHF00L04, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_lhf00l04: id1 0xff, id2 0xff Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29EE010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29LE010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29EE020A, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29LE020, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF010A, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF020A, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF040, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF512, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF020, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF040, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF080, 1024 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST49LF002A/B, 256 KB: Chip size 256 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0x09, id2 0x4f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 KB: Chip size 384 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0x10, id2 0x52, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: Chip size 2048 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF020A, 256 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF040, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF040B, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF080A, 1024 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF160C, 2048 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for ST M25P05-A, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29F040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29F400BT, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29W010B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29W040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M50FLW040A, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: Chip size 256 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_49lfxxxc: id1 0x09, id2 0x4f Probing for ST M50FW016, 2048 KB: Chip size 2048 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W25x10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x64, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W29C020C, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W29C040P, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W29EE011, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W39V040A, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W39V040B, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W39V040C, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W39V040FA, 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W49F002U, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W49V002A, 256 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W49V002FA, 256 KB: Chip size 256 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_jedec: id1 0x09, id2 0x4f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 KB: Chip size 1024 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip size 512 kB is bigger than supported size 0 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically. lspci: 00:00.0 Host bridge [0600]: Intel Corporation 82915G/P/GV/GL/PL/910GL Memory Controller Hub [8086:2580] (rev 04) Subsystem: Dell Device [1028:0181] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information <?> 00: 86 80 80 25 06 01 90 20 04 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 00 50 da fe 00 00 da fe 00 00 00 e0 00 40 da fe 50: 00 00 02 00 03 00 00 b8 00 00 00 00 00 00 00 00 60: 01 c0 da fe 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 10 11 11 00 00 00 00 00 00 00 00 00 40 1a 79 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 20 01 00 00 e0: 09 00 09 21 02 b3 9b 08 02 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 05 00 00 00 00 00 00:01.0 PCI bridge [0604]: Intel Corporation 82915G/P/GV/GL/PL/910GL PCI Express Root Port [8086:2581] (rev 04) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: dfd00000-dfefffff Prefetchable memory behind bridge: d0000000-d7ffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [88] Subsystem: Intel Corporation Device [8086:0000] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4151 Capabilities: [a0] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x16, ASPM L0s, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- Slot #1e00, PowerLimit 25.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100] Virtual Channel <?> Capabilities: [140] Root Complex Link <?> Kernel driver in use: pcieport-driver 00: 86 80 81 25 07 05 10 00 04 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 d0 d0 00 20 20: d0 df e0 df 00 d0 f0 d7 00 00 00 00 00 00 00 00 30: 00 00 00 00 88 00 00 00 00 00 00 00 0b 01 0a 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 80: 01 90 02 c8 00 00 00 00 0d 80 00 00 86 80 00 00 90: 05 a0 01 00 0c 30 e0 fe 51 41 00 00 00 00 00 00 a0: 10 00 41 01 00 00 00 00 00 00 00 00 01 25 01 02 b0: 40 00 01 11 80 0c 00 f0 c0 01 48 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 07 00 00 00 f0: 00 00 01 00 00 00 00 00 00 00 05 00 00 00 00 00 00:1c.0 PCI bridge [0604]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1 [8086:2660] (rev 03) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: dfc00000-dfcfffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag+ RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 2, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4159 Capabilities: [90] Subsystem: Gammagraphx, Inc. (or missing ID) Device [0000:0000] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> Kernel driver in use: pcieport-driver 00: 86 80 60 26 07 05 10 00 03 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 20 20: c0 df c0 df f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 02 00 40: 10 80 41 01 e0 0f 00 00 00 00 10 00 11 24 01 01 50: 40 00 01 10 60 05 10 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 0c 30 e0 fe 59 41 00 00 00 00 00 00 90: 0d a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1d.0 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1 [8086:2658] (rev 03) (prog-if 00 [UHCI]) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 21 Region 4: I/O ports at ff80 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 58 26 05 00 80 02 03 00 03 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 ff 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 03 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1d.1 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2 [8086:2659] (rev 03) (prog-if 00 [UHCI]) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 22 Region 4: I/O ports at ff60 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 59 26 05 00 80 02 03 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 61 ff 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 09 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 03 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1d.2 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3 [8086:265a] (rev 03) (prog-if 00 [UHCI]) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at ff40 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 5a 26 05 00 80 02 03 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 41 ff 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 03 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1d.3 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4 [8086:265b] (rev 03) (prog-if 00 [UHCI]) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 23 Region 4: I/O ports at ff20 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 5b 26 05 00 80 02 03 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 21 ff 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 04 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 03 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1d.7 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller [8086:265c] (rev 03) (prog-if 20 [EHCI]) Subsystem: Dell Device [1028:0181] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 21 Region 0: Memory at ffa80800 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci_hcd 00: 86 80 5c 26 06 01 90 02 03 20 03 0c 00 00 00 00 10: 00 08 a8 ff 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00 60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 08 80 70: 00 00 d7 3f 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 aa ff 00 55 55 ff 00 20 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 80 00 09 88 8c 40 00 80 0f 03 00 86 17 00 00 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev d3) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=32 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: dfb00000-dfbfffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Subsystem: Gammagraphx, Inc. (or missing ID) Device [0000:0000] 00: 86 80 4e 24 07 01 10 00 d3 01 04 06 00 00 81 00 10: 00 00 00 00 00 00 00 00 00 03 03 20 c0 c0 80 22 20: b0 df b0 df f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 00 00 02 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 0d 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1e.2 Multimedia audio controller [0401]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller [8086:266e] (rev 03) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 0: I/O ports at ec00 [size=256] Region 1: I/O ports at e8c0 [size=64] Region 2: Memory at dffffe00 (32-bit, non-prefetchable) [size=512] Region 3: Memory at dffffd00 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: Intel ICH 00: 86 80 6e 26 07 00 90 02 03 00 01 04 00 00 00 00 10: 01 ec 00 00 c1 e8 00 00 00 fe ff df 00 fd ff df 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 50 00 00 00 00 00 00 00 03 01 00 00 40: 09 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 c9 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1f.0 ISA bridge [0601]: Intel Corporation 82801FB/FR (ICH6/ICH6R) LPC Interface Bridge [8086:2640] (rev 03) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: 86 80 40 26 07 01 00 02 03 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 01 08 00 00 80 00 00 00 81 08 00 00 10 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 8b 85 85 80 90 00 00 00 89 8a 89 83 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 0d 14 01 0c 00 00 e1 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 10 06 00 00 38 00 00 00 00 00 00 00 00 03 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 33 22 11 00 67 45 00 00 c0 c0 00 00 02 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 01 80 da fe 00 00 00 00 80 0f 03 00 00 00 00 00 00:1f.1 IDE interface [0101]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller [8086:266f] (rev 03) (prog-if 8a [Master SecP PriP]) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 0: I/O ports at 01f0 [size=8] Region 1: I/O ports at 03f4 [size=1] Region 2: I/O ports at 0170 [size=8] Region 3: I/O ports at 0374 [size=1] Region 4: I/O ports at ffa0 [size=16] Kernel driver in use: ata_piix 00: 86 80 6f 26 05 00 80 02 03 8a 01 01 00 00 00 00 10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00 20: a1 ff 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 40: 33 e3 00 40 0b 00 00 00 03 00 22 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1f.2 IDE interface [0101]: Intel Corporation 82801FB/FW (ICH6/ICH6W) SATA Controller [8086:2651] (rev 03) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 20 Region 0: I/O ports at fe00 [size=8] Region 1: I/O ports at fe10 [size=4] Region 2: I/O ports at fe20 [size=8] Region 3: I/O ports at fe30 [size=4] Region 4: I/O ports at fea0 [size=16] Capabilities: [70] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ata_piix 00: 86 80 51 26 05 00 b0 02 03 8f 01 01 00 00 00 00 10: 01 fe 00 00 11 fe 00 00 21 fe 00 00 31 fe 00 00 20: a1 fe 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 70 00 00 00 00 00 00 00 09 03 00 00 40: 07 e3 00 00 00 00 00 00 01 00 01 00 00 00 00 00 50: 00 00 00 00 11 10 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 1f 00 82 01 80 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 00:1f.3 SMBus [0c05]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller [8086:266a] (rev 03) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 17 Region 4: I/O ports at e8a0 [size=32] Kernel driver in use: i801_smbus 00: 86 80 6a 26 01 01 80 02 03 00 05 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: a1 e8 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 02 00 00 40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 80 0f 03 00 00 00 00 00 01:00.0 VGA compatible controller [0300]: ATI Technologies Inc RV370 5B60 [Radeon X300 (PCIE)] [1002:5b60] (prog-if 00 [VGA controller]) Subsystem: ATI Technologies Inc Device [1002:0302] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at d0000000 (32-bit, prefetchable) [size=128M] Region 1: I/O ports at dc00 [size=256] Region 2: Memory at dfde0000 (32-bit, non-prefetchable) [size=64K] Expansion ROM at dfe00000 [disabled] [size=128K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <128ns, L1 <2us ExtTag+ AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <128ns, L1 <1us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Capabilities: [100] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn- 00: 02 10 60 5b 07 00 10 00 00 00 00 03 10 00 80 00 10: 08 00 00 d0 01 dc 00 00 00 00 de df 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 02 10 02 03 30: 00 00 e0 df 50 00 00 00 00 00 00 00 0b 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 02 10 02 03 50: 01 58 02 06 00 00 00 00 10 80 01 00 60 02 64 00 60: 16 09 00 00 01 1d 00 00 40 00 01 11 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:00.1 Display controller [0380]: ATI Technologies Inc RV370 [Radeon X300SE] [1002:5b70] Subsystem: ATI Technologies Inc Device [1002:0303] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Region 0: Memory at dfdf0000 (32-bit, non-prefetchable) [size=64K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <128ns, L1 <2us ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <128ns, L1 <1us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- 00: 02 10 70 5b 07 00 10 00 00 00 80 03 10 00 00 00 10: 00 00 df df 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 02 10 03 03 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 02 06 00 00 00 00 10 00 01 00 40 02 00 00 60: 06 00 00 00 01 1d 00 00 00 00 01 11 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03:01.0 Modem [0703]: Intel Corporation FA82537EP 56K V.92 Data/Fax Modem PCI [8086:1080] (rev 04) (prog-if 00 [Generic]) Subsystem: Dell Device [1028:1000] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping+ SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 (250ns min, 15500ns max), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at dfbfe000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at cc00 [size=256] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: serial 00: 86 80 80 10 97 01 90 02 04 00 03 07 10 40 00 00 10: 00 e0 bf df 01 cc 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 00 10 30: 00 00 00 00 80 00 00 00 00 00 00 00 05 01 01 3e 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03:08.0 Ethernet controller [0200]: Intel Corporation 82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller [8086:1064] (rev 03) Subsystem: Dell Device [1028:0181] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 (2000ns min, 14000ns max), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 20 Region 0: Memory at dfbff000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at c8c0 [size=64] Capabilities: [dc] Power Management version 2 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- Kernel driver in use: e100 00: 86 80 64 10 17 01 90 02 03 00 00 02 10 40 00 00 10: 00 f0 bf df c1 c8 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 81 01 30: 00 00 00 00 dc 00 00 00 00 00 00 00 09 01 08 38 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 22 fe e0: 00 40 00 3a 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 66 0f 03 00 00 00 00 00 superiotool r4931 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0x0000, rev=0x00 Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0x7601, rev=0x9 Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0x7601, rev=0x9 Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0x7601, rev=0x9 Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x7601, rev=0x9 Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Found SMSC LPC47M584 (id=0x76, rev=0x01) at 0x2e No dump available for this Super I/O No extra registers known for this chip. Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff BIOS download info: http://support.dell.com/support/downloads/driverslist.aspx?c=us&cs=04&l=en&…

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Re: [flashrom] MCP51 - Asus M2NBP-VM CSM - File Archive as Link
by ying.w＠a-power.com 28 Dec '09

28 Dec '09

http://ying.apdir.com/files/mcp51_flashrom_1.tar.gz

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[PATCH] Boards: Remove it8705_rom_write_enable.
by Luc Verhaegen 26 Dec '09

26 Dec '09

Should be functionally the same as it8705f_write_enable_2e. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> --- board_enable.c | 80 +++++++++++++++++++++----------------------------------- 1 files changed, 30 insertions(+), 50 deletions(-) diff --git a/board_enable.c b/board_enable.c index 3c0057c..abe1d47 100644 --- a/board_enable.c +++ b/board_enable.c @@ -205,6 +205,33 @@ static int w836xx_memw_enable_2e(const char *name) return 0; } +/** + * + */ +static int it8705f_write_enable(uint8_t port, const char *name) +{ + enter_conf_mode_ite(port); + sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ + exit_conf_mode_ite(port); + + return 0; +} + +/** + * Suited for: + * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. + * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF + * - Elitegroup K7S6A: SiS745 + ITE IT8705F + * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F + * + * SIS950 superio probably requires the same flash write enable. + */ +static int it8705f_write_enable_2e(const char *name) +{ + return it8705f_write_enable(0x2e, name); +} /** * VT823x: Set one of the GPIO pins. @@ -889,33 +916,6 @@ static int board_kontron_986lcd_m(const char *name) } /** - * Suited for: - * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF - * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 - * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. - * - * SIS950 superio probably requires the same flash write enable. - */ -static int it8705_rom_write_enable(const char *name) -{ - /* enter IT87xx conf mode */ - enter_conf_mode_ite(0x2e); - - /* select right flash chip */ - sio_mask(0x2e, 0x22, 0x80, 0x80); - - /* bit 3: flash chip write enable - * bit 7: map flash chip at 1MB-128K (why though? ignoring this.) - */ - sio_mask(0x2e, 0x24, 0x04, 0x04); - - /* exit IT87xx conf mode */ - exit_conf_mode_ite(0x2e); - - return 0; -} - -/** * Suited for Soyo SY-7VCA: Pro133A + VT82C686. */ static int board_soyo_sy_7vca(const char *name) @@ -978,26 +978,6 @@ static int board_msi_651ml(const char *name) return 0; } -static int it8705f_write_enable(uint8_t port, const char *name) -{ - enter_conf_mode_ite(port); - sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ - exit_conf_mode_ite(port); - - return 0; -} - -/** - * Suited for: - * - Elitegroup K7S6A: SiS745 + ITE IT8705F - * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F - * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int it8705f_write_enable_2e(const char *name) -{ - return it8705f_write_enable(0x2e, name); -} - /** * Find the runtime registers of an SMSC Super I/O, after verifying its * chip ID. @@ -1201,7 +1181,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, @@ -1213,7 +1193,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, @@ -1221,7 +1201,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash}, -- 1.6.0.2 --NU0Ex4SbNnrxsi6C--

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[PATCH] Boards: Add max_rom_decode_parallel entry to board enable table.
by Luc Verhaegen 26 Dec '09

26 Dec '09

This is a quick fix for board specific parallel addressing limits. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> --- board_enable.c | 129 +++++++++++++++++++++++++++----------------------------- flash.h | 1 + 2 files changed, 63 insertions(+), 67 deletions(-) diff --git a/board_enable.c b/board_enable.c index 2446ddd..3c0057c 100644 --- a/board_enable.c +++ b/board_enable.c @@ -991,19 +991,10 @@ static int it8705f_write_enable(uint8_t port, const char *name) * Suited for: * - Elitegroup K7S6A: SiS745 + ITE IT8705F * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F */ -static int elitegroup_k7vta3(const char *name) +static int it8705f_write_enable_2e(const char *name) { - max_rom_decode.parallel = 256 * 1024; - return it8705f_write_enable(0x2e, name); -} - -/** - * Suited for: Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int shuttle_ak38n(const char *name) -{ - max_rom_decode.parallel = 256 * 1024; return it8705f_write_enable(0x2e, name); } @@ -1204,62 +1195,62 @@ static int board_asus_a7v600x(const char *name) /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, - - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL}, /* end marker */ + /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name max_rom_... flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", 0, intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, "Acorp", "6A815EPD", 0, board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", 0, board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", 0, via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", 0, intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", 0, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", 0, w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", 0, board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, "IBM", "x3455", 0, board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel", "D201GLY", 0, wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", 0, board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, board_msi_651ml}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", 0, intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", 0, nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", 256, it8705f_write_enable_2e}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", 0, board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", 0, board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", 0, via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, "VIA", "EPIA-N/NL", 0, via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, "VIA", "PC3500G", 0, it87xx_probe_spi_flash}, + + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, 0, NULL}, /* end marker */ }; /** @@ -1364,6 +1355,10 @@ int board_flash_enable(const char *vendor, const char *part) board = board_match_pci_card_ids(); if (board) { + if (board->max_rom_decode_parallel) + max_rom_decode.parallel = + board->max_rom_decode_parallel * 1024; + printf("Disabling flash write protection for board \"%s %s\"... ", board->vendor_name, board->board_name); diff --git a/flash.h b/flash.h index 069b903..75a84b0 100644 --- a/flash.h +++ b/flash.h @@ -269,6 +269,7 @@ struct board_pciid_enable { const char *vendor_name; const char *board_name; + int max_rom_decode_parallel; int (*enable) (const char *name); }; -- 1.6.0.2 --1UWUbFP1cBYEclgG--

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[Flashrom] Chip Driver Notes, JEDEC and similar
by Sean Nelson 25 Dec '09

25 Dec '09

This shows how we could refactor the jedec code. After the refactor we can delete these: * am29f040b * en29f002a -> file_not_used * m29f002 * mx29f002 * pm29f002 * sst49lf040 * w49f002u These files can be deleted if we *could* find a way to integrate the problems into jedec.c: * w29ee011 -> checks specifically for w29ee011 * w39v040c -> checks for lock in probe: address 0xfff2 * pm49fl00x -> uses chip protect code * m29f002 -> block based writing * m29f400bt -> block based writing I was looking through these two files and saw that they used variable block sizes for writing sectors, maybe we can do something simpler to block_erasers: * m29f002 * m29f400bt There are a few files that performs another map_flash_registers() after successful probe, I was wondering if we could add the re-mapping to probe_jedec_common or if its safe to omit the function call: * pm49fl00x * stm50flw0x0x * w39v080fa List of chips that use a specific addressing for command codes: 0x2AA based chips: * am29f040b * mx29f002 * pm29f002 0xAAA based chips: * m29f002 * m29f400bt 0x2AAA based chips: * pm49fl00x * sst49lf040 * stm50flw0x0x * w29ee011 * w39v040c * w39v080fa * w49f002u The full notes: @jedec { # start_program_jedec => AA 55 A0 # probe_jedec => AA 55 90 MID DID AA 55 F0 # erase_sector_jedec => AA 55 80 AA 55 30 # erase_block_jedec => AA 55 80 AA 55 50 # erase_chip_jedec => AA 55 80 AA 55 10 # write_page_write_jedec # write_byte_program_jedec # write_sector_jedec - byte_program based # write_jedec is a chip by page writer - page based # write_jedec_1 is a chip by page writer - sector based # # void start_program_jedec(chipaddr bios, unsigned int mask, # unsigned int shift) # { # chip_writeb(0xAA, bios + (0x5555 & mask) ); # chip_writeb(0x55, bios + ((0x2AAA & mask)>>shift) ); # chip_writeb(0xA0, bios + (0x5555 & mask) ); # } } @82802ab { # FWHUB map_flash_registers } @am29f040b { # 0x555 0x2AA erase_29f040b => erase_chip_jedec_2aa erase_chip_29f040b => erase_chip_block_jedec_2aa erase_sector_29f040b => erase_sector_jedec_2aa probe_29f040b => probe_jedec_2aa_reset write_29f040b => write_jedec_2aa write_sector_29f040b => write_sector_jedec_2aa } @en29f002a { # file_not_used } @m29f002 { # 0x555 0xAAA block_based_write do_block erase_m29f002 => erase_chip_block_jedec_aaa rewrite_block => write_block_jedec_aaa write_m29f002t # variable page writing write_m29f002b # same as previous } @m29f400bt { # 0x555 0xAAA block_based_write block_erase_chip_m29f400bt => erase_chip_block_jedec_aaa block_erase_m29f400bt => erase_sector_jedec_aaa erase_m29f400bt => erase_chip_jedec_aaa probe_m29f400bt => probe_jedec_aaa_did_02 write_coreboot_m29f400bt # same as previous write_m29f400bt # variable page writing write_page_m29f400bt } @mx29f002 { # 0x555 0x2AA erase_29f002 => erase_chip_jedec_2aa erase_chip_29f002 => erase_chip_block_jedec_2aa erase_sector_29f002 => erase_sector_jedec_2aa probe_29f002 => probe_jedec_2aa_reset } @pm29f002 { # 0x555 0x2AA write_pm29f002 => write_jedec_1_2aa } @pm49fl00x { # 0x5555 0x2AAA map_flash_registers needs_protects erase_49fl00x => erase_chip_block_jedec_2aaa probe_49fl00x => probe_jedec_2aaa write_49fl00x => write_jedec_2aaa write_lockbits_49fl00x } @sharplhf00l04 { # FWHUB map_flash_registers } @sst28sf040 { # FWHUB } @sst49lf040 { # 0x5555 0x2AAA erase_49lf040 => erase_sector_jedec_2aaa write_49lf040 => write_jedec_2aaa } @sst49lfxxxc { # FWHUB map_flash_registers } @sst_fwhub { # FWHUB map_flash_registers } @stm50flw0x0x { # 0x5555 0x2AAA map_flash_registers erase_block_stm50flw0x0x erase_stm50flw0x0x probe_stm50flw0x0x => probe_jedec_2aaa unlock_block_stm50flw0x0x wait_stm50flw0x0x write_page_stm50flw0x0x write_stm50flw0x0x } @w29ee011 { # 0x5555 0x2AAA has_check_W29EE011 funks_up_AMIC_A49LF040A probe_w29ee011 => probe_jedec_2aaa_60 } @w39v040c { # 0x5555 0x2AAA has_lock_fff2 probe_w39v040c => probe_jedec_2aaa } @w39v080fa { # 0x5555 0x2AAA map_flash_registers erase_sector_winbond_fwhub erase_winbond_fwhub probe_winbond_fwhub => probe_jedec_2aaa unlock_block_winbond_fwhub unlock_winbond_fwhub write_winbond_fwhub } @w49f002u { # 0x5555 0x2AAA write_49f002 => write_jedec_1_2aaa }

1 0

Report on SST SST25VF016B with flashrom v0.9.1-r824
by Water Chen 25 Dec '09

25 Dec '09

Report on SST SST25VF016B with flashrom v0.9.1-r824 Attached please find the flashrom output with the (-V, -rV, -wV, -EV) options. It's OK on Supermicro X7SLM-L / http://www.supermicro.com/products/motherboard/Core2Duo/945/X7SLM-L.cfm

1 0

[Flashrom] [PATCH] Separate Makefile's main OBJS list into Programmer, Chip, Lib, CLI object lists
by Sean Nelson 24 Dec '09

24 Dec '09

This patch shouldn't affect anything else in patchwork. It just splits $(OBJS) in Makefile into separate lists for Programmer, Chip, and CLI related files/objects. This should help later on figuring out where files may go for a libflashrom library. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 8

[commit] r824 - trunk
by svn＠flashrom.org 24 Dec '09

24 Dec '09

Author: snelson Date: 2009-12-24 17:54:21 +0100 (Thu, 24 Dec 2009) New Revision: 824 Modified: trunk/Makefile Log: This patch shouldn't affect anything else in patchwork. It just splits $(OBJS) in Makefile into separate lists for Programmer, Chip, and CLI related files/objects. This should help later on figuring out where files may go for a libflashrom library. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-12-24 03:33:11 UTC (rev 823) +++ trunk/Makefile 2009-12-24 16:54:21 UTC (rev 824) @@ -41,12 +41,17 @@ LDFLAGS += -L/usr/local/lib endif -OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ +CHIP_OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ - sst49lfxxxc.o sst_fwhub.o flashchips.o layout.o spi.o \ - flashrom.o print.o udelay.o + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o +LIB_OBJS = layout.o + +CLI_OBJS = flashrom.o print.o + +PROGRAMMER_OBJS = udelay.o + all: pciutils features dep $(PROGRAM) # Set the flashrom version string from the highest revision number @@ -96,13 +101,13 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o NEED_PCI := yes endif ifeq ($(CONFIG_SERPROG), yes) FEATURE_CFLAGS += -D'SERPROG_SUPPORT=1' -OBJS += serprog.o +PROGRAMMER_OBJS += serprog.o ifeq ($(OS_ARCH), SunOS) LIBS += -lsocket endif @@ -110,24 +115,24 @@ ifeq ($(CONFIG_BITBANG_SPI), yes) FEATURE_CFLAGS += -D'BITBANG_SPI_SUPPORT=1' -OBJS += bitbang_spi.o +PROGRAMMER_OBJS += bitbang_spi.o endif ifeq ($(CONFIG_NIC3COM), yes) FEATURE_CFLAGS += -D'NIC3COM_SUPPORT=1' -OBJS += nic3com.o +PROGRAMMER_OBJS += nic3com.o NEED_PCI := yes endif ifeq ($(CONFIG_GFXNVIDIA), yes) FEATURE_CFLAGS += -D'GFXNVIDIA_SUPPORT=1' -OBJS += gfxnvidia.o +PROGRAMMER_OBJS += gfxnvidia.o NEED_PCI := yes endif ifeq ($(CONFIG_SATASII), yes) FEATURE_CFLAGS += -D'SATASII_SUPPORT=1' -OBJS += satasii.o +PROGRAMMER_OBJS += satasii.o NEED_PCI := yes endif @@ -136,48 +141,55 @@ # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") -OBJS += ft2232_spi.o +PROGRAMMER_OBJS += ft2232_spi.o endif ifeq ($(CONFIG_DUMMY), yes) FEATURE_CFLAGS += -D'DUMMY_SUPPORT=1' -OBJS += dummyflasher.o +PROGRAMMER_OBJS += dummyflasher.o endif ifeq ($(CONFIG_DRKAISER), yes) FEATURE_CFLAGS += -D'DRKAISER_SUPPORT=1' -OBJS += drkaiser.o +PROGRAMMER_OBJS += drkaiser.o NEED_PCI := yes endif ifeq ($(CONFIG_BUSPIRATESPI), yes) FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' -OBJS += buspirate_spi.o +PROGRAMMER_OBJS += buspirate_spi.o endif # Ugly, but there's no elif/elseif. ifeq ($(CONFIG_SERPROG), yes) -OBJS += serial.o +LIB_OBJS += serial.o else ifeq ($(CONFIG_BUSPIRATESPI), yes) -OBJS += serial.o +LIB_OBJS += serial.o endif endif ifeq ($(NEED_PCI), yes) LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' -OBJS += pcidev.o physmap.o internal.o +PROGRAMMER_OBJS += pcidev.o physmap.o internal.o #FIXME: We need to move stuff + # from internal.c and pcidev.c to pci.c + # internal.c needs to be split + # into internal-programmer-only stuff + # and a support lib for all internal+pci + # based stuff. endif ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' -OBJS += print_wiki.o +CLI_OBJS += print_wiki.o endif # We could use PULLED_IN_LIBS, but that would be ugly. FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") +OBJS = $(CHIP_OBJS) $(CLI_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) + $(PROGRAM): $(OBJS) $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(FEATURE_LIBS) $(LIBS)

1 0

[PATCH] Don't compile internal code if not selected
by Carl-Daniel Hailfinger 24 Dec '09

24 Dec '09

internal.c was always compiled in because it hosted the function internal_delay(). Move that function to udelay.c and compile internal.c only if really needed. physmap.c is only needed if the programmer is internal or a PCI card. Make its compilation conditional. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-programmer_internal_refactor_delay/flash.h =================================================================== --- flashrom-programmer_internal_refactor_delay/flash.h (Revision 821) +++ flashrom-programmer_internal_refactor_delay/flash.h (Arbeitskopie) @@ -277,6 +277,7 @@ /* udelay.c */ void myusec_delay(int usecs); void myusec_calibrate_delay(void); +void internal_delay(int usecs); #if NEED_PCI == 1 /* pcidev.c */ @@ -365,7 +366,6 @@ uint8_t mmio_readb(void *addr); uint16_t mmio_readw(void *addr); uint32_t mmio_readl(void *addr); -void internal_delay(int usecs); int noop_shutdown(void); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); void fallback_unmap(void *virt_addr, size_t len); Index: flashrom-programmer_internal_refactor_delay/Makefile =================================================================== --- flashrom-programmer_internal_refactor_delay/Makefile (Revision 821) +++ flashrom-programmer_internal_refactor_delay/Makefile (Arbeitskopie) @@ -47,7 +47,7 @@ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o layout.o spi.o \ - flashrom.o print.o physmap.o internal.o udelay.o + flashrom.o print.o udelay.o all: pciutils features dep $(PROGRAM) @@ -168,7 +168,7 @@ ifeq ($(NEED_PCI), yes) FEATURE_CFLAGS += -D'NEED_PCI=1' -OBJS += pcidev.o +OBJS += pcidev.o physmap.o internal.o endif ifeq ($(CONFIG_PRINT_WIKI), yes) Index: flashrom-programmer_internal_refactor_delay/internal.c =================================================================== --- flashrom-programmer_internal_refactor_delay/internal.c (Revision 821) +++ flashrom-programmer_internal_refactor_delay/internal.c (Arbeitskopie) @@ -248,18 +248,6 @@ return *(volatile uint32_t *) addr; } -void internal_delay(int usecs) -{ - /* If the delay is >1 s, use usleep because timing does not need to - * be so precise. - */ - if (usecs > 1000000) { - usleep(usecs); - } else { - myusec_delay(usecs); - } -} - /* No-op shutdown() for programmers which don't need special handling */ int noop_shutdown(void) { Index: flashrom-programmer_internal_refactor_delay/udelay.c =================================================================== --- flashrom-programmer_internal_refactor_delay/udelay.c (Revision 821) +++ flashrom-programmer_internal_refactor_delay/udelay.c (Arbeitskopie) @@ -63,3 +63,16 @@ (unsigned long)micro, timeusec); printf("OK.\n"); } + +void internal_delay(int usecs) +{ + /* If the delay is >1 s, use usleep because timing does not need to + * be so precise. + */ + if (usecs > 1000000) { + usleep(usecs); + } else { + myusec_delay(usecs); + } +} + -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 3

[PATCH] Only check for requested features in Makefile
by Carl-Daniel Hailfinger 24 Dec '09

24 Dec '09

Only check for requested features in the Makefile. libpci is no longer required to build flashrom and will not be checked for if no PCI code is needed for the selected programmers. libftdi is no longer checked for if FT2232 support is not selected. With this patch, it is possible to build on pretty much every OS out there (including Windows) without altering the Makefile. Some gcc versions may need a CFLAGS override for a warning in dummyflasher.c, though. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-makefile_check_libpci_only_if_needed/Makefile =================================================================== --- flashrom-makefile_check_libpci_only_if_needed/Makefile (Revision 822) +++ flashrom-makefile_check_libpci_only_if_needed/Makefile (Arbeitskopie) @@ -41,8 +41,6 @@ LDFLAGS += -L/usr/local/lib endif -LIBS += -lpci - OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ @@ -167,6 +165,7 @@ endif ifeq ($(NEED_PCI), yes) +LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' OBJS += pcidev.o physmap.o internal.o endif @@ -211,6 +210,7 @@ rm -f .test.c .test; exit 1) @rm -f .test.c .test +ifeq ($(NEED_PCI), yes) pciutils: compiler @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ @@ -226,25 +226,30 @@ @$(shell ( echo "#include <pci/pci.h>"; \ echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test1.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci (package pciutils)."; \ echo "See README for more information."; echo; \ rm -f .test1.c .test1; exit 1) @printf "Checking if libpci is sufficient... " @printf "" > .libdeps - @$(CC) $(LDFLAGS) .test.o -o .test $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(LDFLAGS) .test.o -o .test -lpci $(LIBS) >/dev/null 2>&1 && \ echo "yes." || ( echo "no."; \ printf "Checking if libz is present and supplies all needed symbols..."; \ - $(CC) $(LDFLAGS) .test.o -o .test $(LIBS) -lz >/dev/null 2>&1 && \ + $(CC) $(LDFLAGS) .test.o -o .test -lpci -lz $(LIBS) >/dev/null 2>&1 && \ ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ echo "Please install libz."; \ echo "See README for more information."; echo; \ rm -f .test.c .test.o .test; exit 1) ) @rm -f .test.c .test.o .test .test1.c .test1 +else +pciutils: compiler + @printf "" > .libdeps +endif .features: features +ifeq ($(CONFIG_FT2232SPI), yes) features: compiler @echo "FEATURES := yes" > .features.tmp @printf "Checking for FTDI support... " @@ -257,6 +262,10 @@ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest +else +features: compiler + @echo "FEATURES := yes" > .features +endif install: $(PROGRAM) mkdir -p $(DESTDIR)$(PREFIX)/sbin -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r823 - trunk
by svn＠flashrom.org 24 Dec '09

24 Dec '09

Author: hailfinger Date: 2009-12-24 04:33:11 +0100 (Thu, 24 Dec 2009) New Revision: 823 Modified: trunk/Makefile Log: Only check for requested features in the Makefile. libpci is no longer required to build flashrom and will not be checked for if no PCI code is needed for the selected programmers. libftdi is no longer checked for if FT2232 support is not selected. With this patch, it is possible to build on pretty much every OS out there (including Windows) without altering the Makefile. Some gcc versions may need a CFLAGS override for a warning in dummyflasher.c, though. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-12-24 03:11:55 UTC (rev 822) +++ trunk/Makefile 2009-12-24 03:33:11 UTC (rev 823) @@ -41,8 +41,6 @@ LDFLAGS += -L/usr/local/lib endif -LIBS += -lpci - OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ @@ -167,6 +165,7 @@ endif ifeq ($(NEED_PCI), yes) +LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' OBJS += pcidev.o physmap.o internal.o endif @@ -211,6 +210,7 @@ rm -f .test.c .test; exit 1) @rm -f .test.c .test +ifeq ($(NEED_PCI), yes) pciutils: compiler @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ @@ -226,25 +226,30 @@ @$(shell ( echo "#include <pci/pci.h>"; \ echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test1.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci (package pciutils)."; \ echo "See README for more information."; echo; \ rm -f .test1.c .test1; exit 1) @printf "Checking if libpci is sufficient... " @printf "" > .libdeps - @$(CC) $(LDFLAGS) .test.o -o .test $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(LDFLAGS) .test.o -o .test -lpci $(LIBS) >/dev/null 2>&1 && \ echo "yes." || ( echo "no."; \ printf "Checking if libz is present and supplies all needed symbols..."; \ - $(CC) $(LDFLAGS) .test.o -o .test $(LIBS) -lz >/dev/null 2>&1 && \ + $(CC) $(LDFLAGS) .test.o -o .test -lpci -lz $(LIBS) >/dev/null 2>&1 && \ ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ echo "Please install libz."; \ echo "See README for more information."; echo; \ rm -f .test.c .test.o .test; exit 1) ) @rm -f .test.c .test.o .test .test1.c .test1 +else +pciutils: compiler + @printf "" > .libdeps +endif .features: features +ifeq ($(CONFIG_FT2232SPI), yes) features: compiler @echo "FEATURES := yes" > .features.tmp @printf "Checking for FTDI support... " @@ -257,6 +262,10 @@ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest +else +features: compiler + @echo "FEATURES := yes" > .features +endif install: $(PROGRAM) mkdir -p $(DESTDIR)$(PREFIX)/sbin

1 0

[commit] r822 - trunk
by svn＠flashrom.org 24 Dec '09

24 Dec '09

Author: hailfinger Date: 2009-12-24 04:11:55 +0100 (Thu, 24 Dec 2009) New Revision: 822 Modified: trunk/Makefile trunk/flash.h trunk/internal.c trunk/udelay.c Log: internal.c was always compiled in because it hosted the function internal_delay(). Move that function to udelay.c and compile internal.c only if really needed. physmap.c is only needed if the programmer is internal or a PCI card. Make its compilation conditional. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-12-24 02:15:55 UTC (rev 821) +++ trunk/Makefile 2009-12-24 03:11:55 UTC (rev 822) @@ -47,7 +47,7 @@ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o layout.o spi.o \ - flashrom.o print.o physmap.o internal.o udelay.o + flashrom.o print.o udelay.o all: pciutils features dep $(PROGRAM) @@ -168,7 +168,7 @@ ifeq ($(NEED_PCI), yes) FEATURE_CFLAGS += -D'NEED_PCI=1' -OBJS += pcidev.o +OBJS += pcidev.o physmap.o internal.o endif ifeq ($(CONFIG_PRINT_WIKI), yes) Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-12-24 02:15:55 UTC (rev 821) +++ trunk/flash.h 2009-12-24 03:11:55 UTC (rev 822) @@ -277,6 +277,7 @@ /* udelay.c */ void myusec_delay(int usecs); void myusec_calibrate_delay(void); +void internal_delay(int usecs); #if NEED_PCI == 1 /* pcidev.c */ @@ -365,7 +366,6 @@ uint8_t mmio_readb(void *addr); uint16_t mmio_readw(void *addr); uint32_t mmio_readl(void *addr); -void internal_delay(int usecs); int noop_shutdown(void); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); void fallback_unmap(void *virt_addr, size_t len); Modified: trunk/internal.c =================================================================== --- trunk/internal.c 2009-12-24 02:15:55 UTC (rev 821) +++ trunk/internal.c 2009-12-24 03:11:55 UTC (rev 822) @@ -248,18 +248,6 @@ return *(volatile uint32_t *) addr; } -void internal_delay(int usecs) -{ - /* If the delay is >1 s, use usleep because timing does not need to - * be so precise. - */ - if (usecs > 1000000) { - usleep(usecs); - } else { - myusec_delay(usecs); - } -} - /* No-op shutdown() for programmers which don't need special handling */ int noop_shutdown(void) { Modified: trunk/udelay.c =================================================================== --- trunk/udelay.c 2009-12-24 02:15:55 UTC (rev 821) +++ trunk/udelay.c 2009-12-24 03:11:55 UTC (rev 822) @@ -63,3 +63,16 @@ (unsigned long)micro, timeusec); printf("OK.\n"); } + +void internal_delay(int usecs) +{ + /* If the delay is >1 s, use usleep because timing does not need to + * be so precise. + */ + if (usecs > 1000000) { + usleep(usecs); + } else { + myusec_delay(usecs); + } +} +

1 0

[PATCH] Factor out CLI code, 1/n
by Carl-Daniel Hailfinger 24 Dec '09

24 Dec '09

Factor out CLI code by moving generic stuff out of main(). Add a generic programmer list output function to be used by alternative frontends. The interface between main() and doit is a hack and should get a clean design, but for now it serves the purpose of shortening main() by 120 lines. The rest of main() needs to be refactored a bit more before moving main() away. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-main_refactor/flash.h =================================================================== --- flashrom-main_refactor/flash.h (Revision 820) +++ flashrom-main_refactor/flash.h (Arbeitskopie) @@ -481,6 +481,7 @@ int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); char *strcat_realloc(char *dest, const char *src); +int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it); #define OK 0 #define NT 1 /* Not tested */ Index: flashrom-main_refactor/flashrom.c =================================================================== --- flashrom-main_refactor/flashrom.c (Revision 820) +++ flashrom-main_refactor/flashrom.c (Arbeitskopie) @@ -899,14 +899,26 @@ "DO NOT REBOOT OR POWEROFF!\n"); } -void usage(const char *name) +/* The way to go if you want a delimited list of programmers*/ +void list_programmers(char *delim) { + enum programmer p; + for (p = 0; p < PROGRAMMER_INVALID; p++) { + printf("%s", programmer_table[p].name); + if (p < PROGRAMMER_INVALID - 1) + printf("%s", delim); + } + printf("\n"); +} + +void cli_usage(const char *name) +{ const char *pname; int pnamelen; int remaining = 0; enum programmer p; - printf("usage: %s [-VfLzhR] [-E|-r file|-w file|-v file] [-c chipname]\n" + printf("cli_usage: %s [-VfLzhR] [-E|-r file|-w file|-v file] [-c chipname]\n" " [-m [vendor:]part] [-l file] [-i image] [-p programmer]\n\n", name); printf("Please note that the command line interface for flashrom will " @@ -971,11 +983,70 @@ printf("flashrom v%s\n", flashrom_version); } +int selfcheck(void) +{ + /* Safety check. */ + if (ARRAY_SIZE(programmer_table) - 1 != PROGRAMMER_INVALID) { + fprintf(stderr, "Programmer table miscompilation!\n"); + return 1; + } + if (spi_programmer_count - 1 != SPI_CONTROLLER_INVALID) { + fprintf(stderr, "SPI programmer table miscompilation!\n"); + return 1; + } +#if BITBANG_SPI_SUPPORT == 1 + if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { + fprintf(stderr, "Bitbanging SPI master table miscompilation!\n"); + return 1; + } +#endif + return 0; +} + +void check_chip_supported(struct flashchip *flash) +{ + if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { + printf("===\n"); + if (flash->tested & TEST_BAD_MASK) { + printf("This flash part has status NOT WORKING for operations:"); + if (flash->tested & TEST_BAD_PROBE) + printf(" PROBE"); + if (flash->tested & TEST_BAD_READ) + printf(" READ"); + if (flash->tested & TEST_BAD_ERASE) + printf(" ERASE"); + if (flash->tested & TEST_BAD_WRITE) + printf(" WRITE"); + printf("\n"); + } + if ((!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) || + (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) || + (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) || + (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE))) { + printf("This flash part has status UNTESTED for operations:"); + if (!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) + printf(" PROBE"); + if (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) + printf(" READ"); + if (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) + printf(" ERASE"); + if (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE)) + printf(" WRITE"); + printf("\n"); + } + printf("Please email a report to flashrom(a)flashrom.org if any " + "of the above operations\nwork correctly for you with " + "this flash part. Please include the flashrom\noutput " + "with the additional -V option for all operations you " + "tested (-V, -rV,\n-wV, -EV), and mention which " + "mainboard or programmer you tested. Thanks for your " + "help!\n===\n"); + } +} + int main(int argc, char *argv[]) { - uint8_t *buf; - unsigned long size, numbytes; - FILE *image; + unsigned long size; /* Probe for up to three flash chips. */ struct flashchip *flash, *flashes[3]; const char *name; @@ -989,7 +1060,7 @@ int list_supported_wiki = 0; #endif int operation_specified = 0; - int ret = 0, i; + int i; #if PRINT_WIKI_SUPPORT == 1 const char *optstring = "rRwvnVEfc:m:l:i:p:Lzh"; @@ -1032,21 +1103,8 @@ printf_debug("%s\n", argv[i]); } - /* Safety check. */ - if (ARRAY_SIZE(programmer_table) - 1 != PROGRAMMER_INVALID) { - fprintf(stderr, "Programmer table miscompilation!\n"); + if (selfcheck()) exit(1); - } - if (spi_programmer_count - 1 != SPI_CONTROLLER_INVALID) { - fprintf(stderr, "SPI programmer table miscompilation!\n"); - exit(1); - } -#if BITBANG_SPI_SUPPORT == 1 - if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { - fprintf(stderr, "Bitbanging SPI master table miscompilation!\n"); - exit(1); - } -#endif setbuf(stdout, NULL); while ((opt = getopt_long(argc, argv, optstring, @@ -1163,7 +1221,7 @@ break; case 'h': default: - usage(argv[0]); + cli_usage(argv[0]); break; } } @@ -1182,7 +1240,7 @@ if (read_it && write_it) { printf("Error: -r and -w are mutually exclusive.\n"); - usage(argv[0]); + cli_usage(argv[0]); } if (optind < argc) @@ -1190,7 +1248,7 @@ if (optind < argc) { printf("Error: Extra parameter found.\n"); - usage(argv[0]); + cli_usage(argv[0]); } if (programmer_init()) { @@ -1198,6 +1256,7 @@ exit(1); } + // FIXME: Delay calibration should happen in programmer code. myusec_calibrate_delay(); for (i = 0; i < ARRAY_SIZE(flashes); i++) { @@ -1242,43 +1301,7 @@ flash = flashes[0]; - if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { - printf("===\n"); - if (flash->tested & TEST_BAD_MASK) { - printf("This flash part has status NOT WORKING for operations:"); - if (flash->tested & TEST_BAD_PROBE) - printf(" PROBE"); - if (flash->tested & TEST_BAD_READ) - printf(" READ"); - if (flash->tested & TEST_BAD_ERASE) - printf(" ERASE"); - if (flash->tested & TEST_BAD_WRITE) - printf(" WRITE"); - printf("\n"); - } - if ((!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) || - (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) || - (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) || - (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE))) { - printf("This flash part has status UNTESTED for operations:"); - if (!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) - printf(" PROBE"); - if (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) - printf(" READ"); - if (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) - printf(" ERASE"); - if (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE)) - printf(" WRITE"); - printf("\n"); - } - printf("Please email a report to flashrom(a)flashrom.org if any " - "of the above operations\nwork correctly for you with " - "this flash part. Please include the flashrom\noutput " - "with the additional -V option for all operations you " - "tested (-V, -rV,\n-wV, -EV), and mention which " - "mainboard or programmer you tested. Thanks for your " - "help!\n===\n"); - } + check_chip_supported(flash); size = flash->total_size * 1024; if (check_max_decode((buses_supported & flash->bustype), size) && @@ -1307,6 +1330,21 @@ if (write_it && !dont_verify_it) verify_it = 1; + return doit(flash, force, filename, read_it, write_it, erase_it, verify_it); +} + +/* This function signature is horrible. We need to design a better interface, + * but right now it allows us to split off the CLI code. + */ +int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it) +{ + uint8_t *buf; + unsigned long numbytes; + FILE *image; + int ret = 0; + unsigned long size; + + size = flash->total_size * 1024; buf = (uint8_t *) calloc(size, sizeof(char)); if (erase_it) { -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r821 - trunk
by svn＠flashrom.org 24 Dec '09

24 Dec '09

Author: hailfinger Date: 2009-12-24 03:15:55 +0100 (Thu, 24 Dec 2009) New Revision: 821 Modified: trunk/flash.h trunk/flashrom.c Log: Factor out CLI code by moving generic stuff out of main(). Add a generic programmer list output function to be used by alternative frontends. The interface between main() and doit is a hack and should get a clean design, but for now it serves the purpose of shortening main() by 120 lines. The rest of main() needs to be refactored a bit more before moving main() away. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-12-23 21:29:18 UTC (rev 820) +++ trunk/flash.h 2009-12-24 02:15:55 UTC (rev 821) @@ -481,6 +481,7 @@ int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); char *strcat_realloc(char *dest, const char *src); +int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it); #define OK 0 #define NT 1 /* Not tested */ Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-12-23 21:29:18 UTC (rev 820) +++ trunk/flashrom.c 2009-12-24 02:15:55 UTC (rev 821) @@ -899,14 +899,26 @@ "DO NOT REBOOT OR POWEROFF!\n"); } -void usage(const char *name) +/* The way to go if you want a delimited list of programmers*/ +void list_programmers(char *delim) { + enum programmer p; + for (p = 0; p < PROGRAMMER_INVALID; p++) { + printf("%s", programmer_table[p].name); + if (p < PROGRAMMER_INVALID - 1) + printf("%s", delim); + } + printf("\n"); +} + +void cli_usage(const char *name) +{ const char *pname; int pnamelen; int remaining = 0; enum programmer p; - printf("usage: %s [-VfLzhR] [-E|-r file|-w file|-v file] [-c chipname]\n" + printf("cli_usage: %s [-VfLzhR] [-E|-r file|-w file|-v file] [-c chipname]\n" " [-m [vendor:]part] [-l file] [-i image] [-p programmer]\n\n", name); printf("Please note that the command line interface for flashrom will " @@ -971,11 +983,70 @@ printf("flashrom v%s\n", flashrom_version); } +int selfcheck(void) +{ + /* Safety check. */ + if (ARRAY_SIZE(programmer_table) - 1 != PROGRAMMER_INVALID) { + fprintf(stderr, "Programmer table miscompilation!\n"); + return 1; + } + if (spi_programmer_count - 1 != SPI_CONTROLLER_INVALID) { + fprintf(stderr, "SPI programmer table miscompilation!\n"); + return 1; + } +#if BITBANG_SPI_SUPPORT == 1 + if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { + fprintf(stderr, "Bitbanging SPI master table miscompilation!\n"); + return 1; + } +#endif + return 0; +} + +void check_chip_supported(struct flashchip *flash) +{ + if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { + printf("===\n"); + if (flash->tested & TEST_BAD_MASK) { + printf("This flash part has status NOT WORKING for operations:"); + if (flash->tested & TEST_BAD_PROBE) + printf(" PROBE"); + if (flash->tested & TEST_BAD_READ) + printf(" READ"); + if (flash->tested & TEST_BAD_ERASE) + printf(" ERASE"); + if (flash->tested & TEST_BAD_WRITE) + printf(" WRITE"); + printf("\n"); + } + if ((!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) || + (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) || + (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) || + (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE))) { + printf("This flash part has status UNTESTED for operations:"); + if (!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) + printf(" PROBE"); + if (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) + printf(" READ"); + if (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) + printf(" ERASE"); + if (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE)) + printf(" WRITE"); + printf("\n"); + } + printf("Please email a report to flashrom(a)flashrom.org if any " + "of the above operations\nwork correctly for you with " + "this flash part. Please include the flashrom\noutput " + "with the additional -V option for all operations you " + "tested (-V, -rV,\n-wV, -EV), and mention which " + "mainboard or programmer you tested. Thanks for your " + "help!\n===\n"); + } +} + int main(int argc, char *argv[]) { - uint8_t *buf; - unsigned long size, numbytes; - FILE *image; + unsigned long size; /* Probe for up to three flash chips. */ struct flashchip *flash, *flashes[3]; const char *name; @@ -989,7 +1060,7 @@ int list_supported_wiki = 0; #endif int operation_specified = 0; - int ret = 0, i; + int i; #if PRINT_WIKI_SUPPORT == 1 const char *optstring = "rRwvnVEfc:m:l:i:p:Lzh"; @@ -1032,21 +1103,8 @@ printf_debug("%s\n", argv[i]); } - /* Safety check. */ - if (ARRAY_SIZE(programmer_table) - 1 != PROGRAMMER_INVALID) { - fprintf(stderr, "Programmer table miscompilation!\n"); + if (selfcheck()) exit(1); - } - if (spi_programmer_count - 1 != SPI_CONTROLLER_INVALID) { - fprintf(stderr, "SPI programmer table miscompilation!\n"); - exit(1); - } -#if BITBANG_SPI_SUPPORT == 1 - if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { - fprintf(stderr, "Bitbanging SPI master table miscompilation!\n"); - exit(1); - } -#endif setbuf(stdout, NULL); while ((opt = getopt_long(argc, argv, optstring, @@ -1163,7 +1221,7 @@ break; case 'h': default: - usage(argv[0]); + cli_usage(argv[0]); break; } } @@ -1182,7 +1240,7 @@ if (read_it && write_it) { printf("Error: -r and -w are mutually exclusive.\n"); - usage(argv[0]); + cli_usage(argv[0]); } if (optind < argc) @@ -1190,7 +1248,7 @@ if (optind < argc) { printf("Error: Extra parameter found.\n"); - usage(argv[0]); + cli_usage(argv[0]); } if (programmer_init()) { @@ -1198,6 +1256,7 @@ exit(1); } + // FIXME: Delay calibration should happen in programmer code. myusec_calibrate_delay(); for (i = 0; i < ARRAY_SIZE(flashes); i++) { @@ -1242,43 +1301,7 @@ flash = flashes[0]; - if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { - printf("===\n"); - if (flash->tested & TEST_BAD_MASK) { - printf("This flash part has status NOT WORKING for operations:"); - if (flash->tested & TEST_BAD_PROBE) - printf(" PROBE"); - if (flash->tested & TEST_BAD_READ) - printf(" READ"); - if (flash->tested & TEST_BAD_ERASE) - printf(" ERASE"); - if (flash->tested & TEST_BAD_WRITE) - printf(" WRITE"); - printf("\n"); - } - if ((!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) || - (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) || - (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) || - (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE))) { - printf("This flash part has status UNTESTED for operations:"); - if (!(flash->tested & TEST_BAD_PROBE) && !(flash->tested & TEST_OK_PROBE)) - printf(" PROBE"); - if (!(flash->tested & TEST_BAD_READ) && !(flash->tested & TEST_OK_READ)) - printf(" READ"); - if (!(flash->tested & TEST_BAD_ERASE) && !(flash->tested & TEST_OK_ERASE)) - printf(" ERASE"); - if (!(flash->tested & TEST_BAD_WRITE) && !(flash->tested & TEST_OK_WRITE)) - printf(" WRITE"); - printf("\n"); - } - printf("Please email a report to flashrom(a)flashrom.org if any " - "of the above operations\nwork correctly for you with " - "this flash part. Please include the flashrom\noutput " - "with the additional -V option for all operations you " - "tested (-V, -rV,\n-wV, -EV), and mention which " - "mainboard or programmer you tested. Thanks for your " - "help!\n===\n"); - } + check_chip_supported(flash); size = flash->total_size * 1024; if (check_max_decode((buses_supported & flash->bustype), size) && @@ -1307,6 +1330,21 @@ if (write_it && !dont_verify_it) verify_it = 1; + return doit(flash, force, filename, read_it, write_it, erase_it, verify_it); +} + +/* This function signature is horrible. We need to design a better interface, + * but right now it allows us to split off the CLI code. + */ +int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it) +{ + uint8_t *buf; + unsigned long numbytes; + FILE *image; + int ret = 0; + unsigned long size; + + size = flash->total_size * 1024; buf = (uint8_t *) calloc(size, sizeof(char)); if (erase_it) {

1 0

Flashrom.c code analysis: cli, programmer, flasher code
by Sean Nelson 23 Dec '09

23 Dec '09

This patch breaks out the cli, programmer, and flasher code into separate files. The only file that will not cleanly compile is cli.c, which is looking for the table defined in programmer.c. Files were compiled with "gcc -c -o %.o %.c" in this test. I don't expect this patch to be committed so no sign-off. Note, the breakdown is what I assume to be the cli, programmer related code, and flash routines like read, erase, probe, verify, and etc. I didn't {re,}write any functions.

2 2

[PATCH] VIA VT8233A identification
by GatoLoko 23 Dec '09

23 Dec '09

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Signed-off-by: Raúl Soriano <GatoLoko(a)gmail.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAksyfOcACgkQ063tJLOwQueCHwCeP4aGvXoVFvW1E0klLA9IDk0S tIYAnj4fcXIOqQjRSMIYUWNRs8ZQgv1C =NjDu -----END PGP SIGNATURE-----

2 1

[commit] r820 - trunk
by svn＠flashrom.org 23 Dec '09

23 Dec '09

Author: hailfinger Date: 2009-12-23 22:29:18 +0100 (Wed, 23 Dec 2009) New Revision: 820 Modified: trunk/chipset_enable.c Log: Add VIA VT8233A identification, mark as tested. Signed-off-by: Ra?\195?\186l Soriano <GatoLoko(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-12-23 17:05:59 UTC (rev 819) +++ trunk/chipset_enable.c 2009-12-23 21:29:18 UTC (rev 820) @@ -1234,6 +1234,7 @@ {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, + {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x},

1 0

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