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Board Enable for MSI 651M-L
by Michael Karcher 09 Jan '10

09 Jan '10

Hello, This patch should enable flash read/write on the MSI 651M-L. Please test. DuratarskeyK: This is your board. Please report success or failure (with output of "flashrom -V") to the mailing list. Regards, Michael Karcher diff --git a/board_enable.c b/board_enable.c index 39cdadc..2d3b9a1 100644 --- a/board_enable.c +++ b/board_enable.c @@ -947,6 +947,35 @@ static int board_soyo_sy_7vca(const char *name) return 0; } +/** + * Enable some GPIO pin on SiS southbridge. + * Suited for MSI 651M-L: SiS651 / SiS962 + */ +static int board_msi_651ml(const char *name) +{ + struct pci_dev *dev; + uint16_t base; + uint16_t temp; + + dev = pci_dev_find(0x1039, 0x0962); + if (!dev) { + fprintf(stderr, "Expected south bridge not found\n"); + return 1; + } + + /* Registers 68 and 64 seem like bitmaps */ + base = pci_read_word(dev, 0x74); + temp = INW(base + 0x68); + temp &= ~(1 << 0); /* Make pin output? */ + OUTW(temp, base + 0x68); + + temp = INW(base + 0x64); + temp |= (1 << 0); /* Raise output? */ + OUTW(temp, base + 0x64); + + return 0; +} + static int it8705f_write_enable(uint8_t port, const char *name) { enter_conf_mode_ite(port); @@ -1215,6 +1244,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise},

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Re: [flashrom] Board Enable for MSI 651M-L
by Michael Karcher 09 Jan '10

09 Jan '10

> Acked-by: Sergey Lichack <shadowpilot34(a)gmail.com> > > 2010/1/9 Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > That patch is wrong. I missed a superio enable. > > Please use the included one (also at > http://dpaste.com/142499/) instead. Thanks for your ack. Committed as revision 845. Regards, Michael Karcher

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[commit] r845 - trunk
by svn＠flashrom.org 09 Jan '10

09 Jan '10

Author: mkarcher Date: 2010-01-09 18:36:06 +0100 (Sat, 09 Jan 2010) New Revision: 845 Modified: trunk/board_enable.c Log: Enable flashing on MSI 651M-L. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sergey Lichack <shadowpilot34(a)gmail.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2010-01-09 14:18:01 UTC (rev 844) +++ trunk/board_enable.c 2010-01-09 17:36:06 UTC (rev 845) @@ -947,6 +947,37 @@ return 0; } +/** + * Enable some GPIO pin on SiS southbridge. + * Suited for MSI 651M-L: SiS651 / SiS962 + */ +static int board_msi_651ml(const char *name) +{ + struct pci_dev *dev; + uint16_t base; + uint16_t temp; + + dev = pci_dev_find(0x1039, 0x0962); + if (!dev) { + fprintf(stderr, "Expected south bridge not found\n"); + return 1; + } + + /* Registers 68 and 64 seem like bitmaps */ + base = pci_read_word(dev, 0x74); + temp = INW(base + 0x68); + temp &= ~(1 << 0); /* Make pin output? */ + printf_debug("changed to %04x\n",temp); + + temp = INW(base + 0x64); + temp |= (1 << 0); /* Raise output? */ + OUTW(temp, base + 0x64); + + w836xx_memw_enable(0x2E); + + return 0; +} + static int it8705f_write_enable(uint8_t port, const char *name) { enter_conf_mode_ite(port); @@ -1215,6 +1246,7 @@ {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise},

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Samsung R45 laptop - SAMSUNG SR45P (I guess)
by Jon Shadow 09 Jan '10

09 Jan '10

Here's the info about my laptop flashrom -V http://paste.pocoo.org/show/163671/ lspci -nnvvvxxx http://paste.pocoo.org/show/163672/ dmidecode http://paste.pocoo.org/show/163675/ superiotool -deV http://paste.pocoo.org/show/163676/ -- Sergeyli

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[PATCH] Fix Makefile dependencies if FT2232SPI is not selected
by Carl-Daniel Hailfinger 09 Jan '10

09 Jan '10

Fix Makefile dependencies if FT2232SPI is not selected. .features was always regenerated in that case, triggering whole-project recompiles even if nothing changed. If you want to test, run make distclean make CONFIG_INTERNAL=no CONFIG_SERPROG=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_NIC3COM=no CONFIG_BUSPIRATESPI=no CONFIG_FT2232SPI=no CONFIG_DUMMY=yes make CONFIG_INTERNAL=no CONFIG_SERPROG=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_NIC3COM=no CONFIG_BUSPIRATESPI=no CONFIG_FT2232SPI=no CONFIG_DUMMY=yes Without the patch, you get a full recompile on the second make call. With the patch, make notices that nothing changed and thus does nothing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-ft2232_makefile_no_recompile/Makefile =================================================================== --- flashrom-ft2232_makefile_no_recompile/Makefile (Revision 841) +++ flashrom-ft2232_makefile_no_recompile/Makefile (Arbeitskopie) @@ -136,8 +136,8 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_FT2232SPI), yes) FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") -ifeq ($(CONFIG_FT2232SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") @@ -280,7 +280,8 @@ @rm -f .featuretest.c .featuretest else features: compiler - @echo "FEATURES := yes" > .features + @echo "FEATURES := yes" > .features.tmp + @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features endif install: $(PROGRAM) -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

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[commit] r844 - trunk
by svn＠flashrom.org 09 Jan '10

09 Jan '10

Author: hailfinger Date: 2010-01-09 15:18:01 +0100 (Sat, 09 Jan 2010) New Revision: 844 Modified: trunk/Makefile Log: Fix Makefile dependencies if FT2232SPI is not selected. .features was always regenerated in that case, triggering whole-project recompiles even if nothing changed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-09 05:30:14 UTC (rev 843) +++ trunk/Makefile 2010-01-09 14:18:01 UTC (rev 844) @@ -136,8 +136,8 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_FT2232SPI), yes) FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") -ifeq ($(CONFIG_FT2232SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") @@ -280,7 +280,8 @@ @rm -f .featuretest.c .featuretest else features: compiler - @echo "FEATURES := yes" > .features + @echo "FEATURES := yes" > .features.tmp + @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features endif install: $(PROGRAM)

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hp dx7500 probe report
by Steven Zakulec 09 Jan '10

09 Jan '10

Hi, here is the information for the dx7500 model. The bios link is here<http://h20000.www2.hp.com/bizsupport/TechSupport/SoftwareDescription.jsp?la…> .

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hp xw4400 probe report
by Steven Zakulec 09 Jan '10

09 Jan '10

Hi, here is the information from flashrom -V, lspci -nnvvvxxx, superiotool -deV. BIOS link is here<http://h20000.www2.hp.com/bizsupport/TechSupport/SoftwareDescription.jsp?la…> . Not sure if it matters at all, but this machine is also supported under RHEL 3 & 5 (neither of which I am running). I have attached the output from the other commands.

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[commit] r843 - trunk
by svn＠flashrom.org 09 Jan '10

09 Jan '10

Author: snelson Date: 2010-01-09 06:30:14 +0100 (Sat, 09 Jan 2010) New Revision: 843 Modified: trunk/82802ab.c trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h Log: Convert chips to block_erasers: ASD AE49F2008 AMIC A25L40P(T/U) AMIC A49LF040A EMST F49B002UA Eon EN25B05 Eon EN25B10 Eon EN25B20 Eon EN25B40 Eon EN25B80 Eon EN25B16 Eon EN25B32 Eon EN25B64 Eon EN25D16 Eon EN25F05 Eon EN25F10 Eon EN25F20 Eon EN25F40 Eon EN25F80 Eon EN25F16 Eon EN25F32 Intel 28F001BX-B Intel 28F001BX-T Intel 82802AB Intel 82802AC Macronix MX25L1635D Macronix MX25L3235D Macronix MX25L6405 Macronix MX25L12805 Macronix MX29F001B Macronix MX29F001T Macronix MX29LV040 Added new chips (according to datasheets): Eon EN25B05T Eon EN25B10T Eon EN25B20T Eon EN25B40T Eon EN25B80T Eon EN25B16T Eon EN25B32T Eon EN25B64T Added minor Device IDs for Eon EN25Bxx{T,B} chips. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/82802ab.c =================================================================== --- trunk/82802ab.c 2010-01-09 04:32:23 UTC (rev 842) +++ trunk/82802ab.c 2010-01-09 05:30:14 UTC (rev 843) @@ -90,32 +90,32 @@ return status; } -int erase_82802ab_block(struct flashchip *flash, int offset) +int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize) { - chipaddr bios = flash->virtual_memory + offset; - chipaddr wrprotect = flash->virtual_registers + offset + 2; + chipaddr bios = flash->virtual_memory; + chipaddr wrprotect = flash->virtual_registers + page + 2; uint8_t status; // clear status register - chip_writeb(0x50, bios); + chip_writeb(0x50, bios + page); // clear write protect chip_writeb(0, wrprotect); // now start it - chip_writeb(0x20, bios); - chip_writeb(0xd0, bios); + chip_writeb(0x20, bios + page); + chip_writeb(0xd0, bios + page); programmer_delay(10); // now let's see what the register is - status = wait_82802ab(flash->virtual_memory); + status = wait_82802ab(bios); print_82802ab_status(status); - if (check_erased_range(flash, offset, flash->page_size)) { + if (check_erased_range(flash, page, pagesize)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } - printf("DONE BLOCK 0x%x\n", offset); + printf("DONE BLOCK 0x%x\n", page); return 0; } @@ -128,7 +128,7 @@ printf("total_size is %d; flash->page_size is %d\n", total_size, flash->page_size); for (i = 0; i < total_size; i += flash->page_size) - if (erase_82802ab_block(flash, i)) { + if (erase_82802ab_block(flash, i, flash->page_size)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } @@ -182,7 +182,7 @@ } /* erase block by block and write block by block; this is the most secure way */ - if (erase_82802ab_block(flash, i * page_size)) { + if (erase_82802ab_block(flash, i * page_size, page_size)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } Modified: trunk/chipdrivers.h =================================================================== --- trunk/chipdrivers.h 2010-01-09 04:32:23 UTC (rev 842) +++ trunk/chipdrivers.h 2010-01-09 05:30:14 UTC (rev 843) @@ -56,6 +56,7 @@ uint8_t wait_82802ab(chipaddr bios); int probe_82802ab(struct flashchip *flash); int erase_82802ab(struct flashchip *flash); +int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize); int write_82802ab(struct flashchip *flash, uint8_t *buf); /* am29f040b.c */ Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-09 04:32:23 UTC (rev 842) +++ trunk/flashchips.c 2010-01-09 05:30:14 UTC (rev 843) @@ -283,7 +283,22 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {128 * 1024, 1}, + {96 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -1140,24 +1155,74 @@ .read = read_memmapped, }, + /* The next two chip definitions have top/bottom boot blocks, but has no + device differenciation between the two */ { .vendor = "AMIC", - .name = "A25L40P", + .name = "A25L40PT", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = AMIC_ID, .model_id = AMIC_A25L40P, .total_size = 512, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "AMIC", + .name = "A25L40PU", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID, + .model_id = AMIC_A25L40P, + .total_size = 512, + .page_size = 256, + .tested = TEST_OK_PRW, + .probe = probe_spi_rdid4, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 7}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", .name = "A29002B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = AMIC_ID_NOPREFIX, @@ -1253,10 +1318,20 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ - .erase = erase_49fl00x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49fl00x, .read = read_memmapped, }, @@ -1272,7 +1347,22 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {128 * 1024, 1}, + {96 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -1288,13 +1378,59 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B05T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B05, + .total_size = 64, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25B10", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1304,13 +1440,59 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 3}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B10T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B10, + .total_size = 128, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {32 * 1024, 3}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25B20", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1320,13 +1502,61 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 3} + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B20T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B20, + .total_size = 256, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25B40", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1336,13 +1566,61 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 7} + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B40T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B40, + .total_size = 512, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25B80", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1352,13 +1630,61 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 15} + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B80T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B80, + .total_size = 1024, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 15}, + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25B16", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1368,13 +1694,61 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 31}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B16T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B16, + .total_size = 2048, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 31}, + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25B32", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1384,13 +1758,61 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 63}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B32T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B32, + .total_size = 4096, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 63}, + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25B64", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1400,13 +1822,61 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 2}, + {8 * 1024, 1}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 127}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Eon", + .name = "EN25B64T", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = EON_ID_NOPREFIX, + .model_id = EN_25B64, + .total_size = 8192, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 127}, + {32 * 1024, 1}, + {16 * 1024, 1}, + {8 * 1024, 1}, + {4 * 1024, 2}, + }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Eon", .name = "EN25D16", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = EON_ID_NOPREFIX, @@ -1416,7 +1886,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1432,7 +1921,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1448,7 +1956,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1464,7 +1991,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1484,16 +2030,16 @@ .block_erasers = { { - .eraseblocks = { {4 * 1024, 2048} }, + .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, }, { - .eraseblocks = { {4 * 1024, 2048} }, + .eraseblocks = { {64 * 1024, 8} }, .block_erase = spi_block_erase_d8, }, { - .eraseblocks = { {8 * 1024 * 1024, 1} }, + .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { - .eraseblocks = { {8 * 1024 * 1024, 1} }, + .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, }, }, @@ -1512,7 +2058,23 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1528,7 +2090,23 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1544,7 +2122,23 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1743,10 +2337,21 @@ .model_id = P28F001BXB, .total_size = 128, .page_size = 128 * 1024, /* 8k + 2x4k + 112k */ - .tested = TEST_BAD_ERASE|TEST_BAD_WRITE, + .tested = TEST_BAD_WRITE, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 1}, + {4 * 1024, 2}, + {112 * 1024, 1}, + }, + .block_erase = erase_82802ab_block, + }, + }, .write = NULL, .read = read_memmapped, }, @@ -1759,10 +2364,21 @@ .model_id = P28F001BXT, .total_size = 128, .page_size = 128 * 1024, /* 112k + 2x4k + 8k */ - .tested = TEST_OK_PR|TEST_BAD_ERASE|TEST_BAD_WRITE, + .tested = TEST_OK_PR|TEST_BAD_WRITE, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {112 * 1024, 1}, + {4 * 1024, 2}, + {8 * 1024, 1}, + }, + .block_erase = erase_82802ab_block, + }, + }, .write = NULL, .read = read_memmapped, }, @@ -1775,10 +2391,17 @@ .model_id = I_82802AB, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ - .erase = erase_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_82802ab_block, + }, + }, .write = write_82802ab, .read = read_memmapped, }, @@ -1791,10 +2414,17 @@ .model_id = I_82802AC, .total_size = 1024, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ - .erase = erase_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_82802ab_block, + }, + }, .write = write_82802ab, .read = read_memmapped, }, @@ -2017,7 +2647,23 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2065,7 +2711,23 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2081,7 +2743,23 @@ .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2097,7 +2775,23 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2110,10 +2804,26 @@ .model_id = MX_29F001B, .total_size = 128, .page_size = 32 * 1024, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PR, .probe = probe_29f002, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ - .erase = erase_29f002, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 1}, + {4 * 1024, 2}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 1}, + }, + .block_erase = erase_sector_29f002, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_29f002, + } + }, .write = write_jedec_1, .read = read_memmapped, }, @@ -2126,10 +2836,26 @@ .model_id = MX_29F001T, .total_size = 128, .page_size = 32 * 1024, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PR, .probe = probe_29f002, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ - .erase = erase_29f002, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 1}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {4 * 1024, 2}, + {8 * 1024, 1}, + }, + .block_erase = erase_sector_29f002, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_29f002, + } + }, .write = write_jedec_1, .read = read_memmapped, }, @@ -2207,7 +2933,17 @@ .tested = TEST_OK_PR, .probe = probe_29f002, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ - .erase = erase_29f002, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_sector_29f002, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_29f002, + }, + }, .write = write_jedec_1, .read = read_memmapped, }, Modified: trunk/flashchips.h =================================================================== --- trunk/flashchips.h 2010-01-09 04:32:23 UTC (rev 842) +++ trunk/flashchips.h 2010-01-09 05:30:14 UTC (rev 843) @@ -164,13 +164,29 @@ #define EON_ID 0x7F1C /* EON Silicon Devices */ #define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */ #define EN_25B05 0x2010 /* Same as P05, 2^19 kbit or 2^16 kByte */ +#define EN_25B05T 0x25 +#define EN_25B05B 0x95 #define EN_25B10 0x2011 /* Same as P10 */ +#define EN_25B10T 0x40 +#define EN_25B10B 0x30 #define EN_25B20 0x2012 /* Same as P20 */ +#define EN_25B20T 0x41 +#define EN_25B20B 0x31 #define EN_25B40 0x2013 /* Same as P40 */ +#define EN_25B40T 0x42 +#define EN_25B40B 0x32 #define EN_25B80 0x2014 /* Same as P80 */ +#define EN_25B80T 0x43 +#define EN_25B80B 0x33 #define EN_25B16 0x2015 /* Same as P16 */ +#define EN_25B16T 0x44 +#define EN_25B16B 0x34 #define EN_25B32 0x2016 /* Same as P32 */ +#define EN_25B32T 0x45 +#define EN_25B32B 0x35 #define EN_25B64 0x2017 /* Same as P64 */ +#define EN_25B64T 0x46 +#define EN_25B64B 0x36 #define EN_25D16 0x3015 #define EN_25F05 0x3110 #define EN_25F10 0x3111

1 0

[PATCH] Convert chips to block erasers: ASD, AMIC, EMST, Eon, Intel, Macronix
by Sean Nelson 09 Jan '10

09 Jan '10

This patch should have all chips from A to M converted to struct block erasers. Converted chips to block_erasers: ASD AE49F2008 AMIC A25L40P(T/U) AMIC A49LF040A EMST F49B002UA Eon EN25B05 Eon EN25B10 Eon EN25B20 Eon EN25B40 Eon EN25B80 Eon EN25B16 Eon EN25B32 Eon EN25B64 Eon EN25D16 Eon EN25F05 Eon EN25F10 Eon EN25F20 Eon EN25F40 Eon EN25F80 Eon EN25F16 Eon EN25F32 Intel 28F001BX-B Intel 28F001BX-T Intel 82802AB Intel 82802AC Macronix MX25L1635D Macronix MX25L3235D Macronix MX25L6405 Macronix MX25L12805 Macronix MX29F001B Macronix MX29F001T Macronix MX29LV040 Added new chips (according to datasheets): Eon EN25B05T Eon EN25B10T Eon EN25B20T Eon EN25B40T Eon EN25B80T Eon EN25B16T Eon EN25B32T Eon EN25B64T Implement fixes for jedec probe by Carl-Daniel. Added minor Device IDs for Eon EN25Bxx{T,B} chips. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 7

[PATCH] Convert dummyflasher to msg_*
by Carl-Daniel Hailfinger 09 Jan '10

09 Jan '10

Convert dummyflasher to msg_* and make good use of msg_pspew. Rule of thumb: Diagnostic programmer init messages are msg_pdbg, all other debug stuff (except warnings, which should be pmsg_pinfo or msg_perr) is msg_pspew. This makes "flashrom -p dummy -V" output a whole lot more readable (try it!). In case someone wants the full barfed output, it is possible to specify -VV instead of -V. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-msg_dummyflasher/dummyflasher.c =================================================================== --- flashrom-msg_dummyflasher/dummyflasher.c (Revision 841) +++ flashrom-msg_dummyflasher/dummyflasher.c (Arbeitskopie) @@ -27,7 +27,7 @@ int dummy_init(void) { int i; - printf_debug("%s\n", __func__); + msg_pspew("%s\n", __func__); /* "all" is equivalent to specifying no type. */ if (programmer_param && (!strcmp(programmer_param, "all"))) { @@ -43,95 +43,95 @@ buses_supported = CHIP_BUSTYPE_NONE; if (strstr(programmer_param, "parallel")) { buses_supported |= CHIP_BUSTYPE_PARALLEL; - printf_debug("Enabling support for %s flash.\n", "parallel"); + msg_pdbg("Enabling support for %s flash.\n", "parallel"); } if (strstr(programmer_param, "lpc")) { buses_supported |= CHIP_BUSTYPE_LPC; - printf_debug("Enabling support for %s flash.\n", "LPC"); + msg_pdbg("Enabling support for %s flash.\n", "LPC"); } if (strstr(programmer_param, "fwh")) { buses_supported |= CHIP_BUSTYPE_FWH; - printf_debug("Enabling support for %s flash.\n", "FWH"); + msg_pdbg("Enabling support for %s flash.\n", "FWH"); } if (strstr(programmer_param, "spi")) { buses_supported |= CHIP_BUSTYPE_SPI; spi_controller = SPI_CONTROLLER_DUMMY; - printf_debug("Enabling support for %s flash.\n", "SPI"); + msg_pdbg("Enabling support for %s flash.\n", "SPI"); } if (buses_supported == CHIP_BUSTYPE_NONE) - printf_debug("Support for all flash bus types disabled.\n"); + msg_pdbg("Support for all flash bus types disabled.\n"); free(programmer_param); return 0; } int dummy_shutdown(void) { - printf_debug("%s\n", __func__); + msg_pspew("%s\n", __func__); return 0; } void *dummy_map(const char *descr, unsigned long phys_addr, size_t len) { - printf_debug("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n", - __func__, descr, (unsigned long)len, phys_addr); + msg_pspew("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n", + __func__, descr, (unsigned long)len, phys_addr); return (void *)phys_addr; } void dummy_unmap(void *virt_addr, size_t len) { - printf_debug("%s: Unmapping 0x%lx bytes at %p\n", - __func__, (unsigned long)len, virt_addr); + msg_pspew("%s: Unmapping 0x%lx bytes at %p\n", + __func__, (unsigned long)len, virt_addr); } void dummy_chip_writeb(uint8_t val, chipaddr addr) { - printf_debug("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val); + msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val); } void dummy_chip_writew(uint16_t val, chipaddr addr) { - printf_debug("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val); + msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val); } void dummy_chip_writel(uint32_t val, chipaddr addr) { - printf_debug("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); + msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); } void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len) { size_t i; - printf_debug("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", - __func__, addr, (unsigned long)len); + msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", + __func__, addr, (unsigned long)len); for (i = 0; i < len; i++) { if ((i % 16) == 0) - printf_debug("\n"); - printf_debug("%02x ", buf[i]) + msg_pspew("\n"); + msg_pspew("%02x ", buf[i]); } } uint8_t dummy_chip_readb(const chipaddr addr) { - printf_debug("%s: addr=0x%lx, returning 0xff\n", __func__, addr); + msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr); return 0xff; } uint16_t dummy_chip_readw(const chipaddr addr) { - printf_debug("%s: addr=0x%lx, returning 0xffff\n", __func__, addr); + msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr); return 0xffff; } uint32_t dummy_chip_readl(const chipaddr addr) { - printf_debug("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr); + msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr); return 0xffffffff; } void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) { - printf_debug("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", - __func__, addr, (unsigned long)len); + msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", + __func__, addr, (unsigned long)len); memset(buf, 0xff, len); return; } @@ -141,18 +141,18 @@ { int i; - printf_debug("%s:", __func__); + msg_pspew("%s:", __func__); - printf_debug(" writing %u bytes:", writecnt); + msg_pspew(" writing %u bytes:", writecnt); for (i = 0; i < writecnt; i++) - printf_debug(" 0x%02x", writearr[i]); + msg_pspew(" 0x%02x", writearr[i]); - printf_debug(" reading %u bytes:", readcnt); + msg_pspew(" reading %u bytes:", readcnt); for (i = 0; i < readcnt; i++) { - printf_debug(" 0xff"); + msg_pspew(" 0xff"); readarr[i] = 0xff; } - printf_debug("\n"); + msg_pspew("\n"); return 0; } -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r842 - trunk
by svn＠flashrom.org 09 Jan '10

09 Jan '10

Author: hailfinger Date: 2010-01-09 05:32:23 +0100 (Sat, 09 Jan 2010) New Revision: 842 Modified: trunk/dummyflasher.c Log: Convert dummyflasher to msg_* and make good use of msg_pspew. Rule of thumb: Diagnostic programmer init messages are msg_pdbg, all other debug stuff (except warnings, which should be pmsg_pinfo or msg_perr) is msg_pspew. This makes "flashrom -p dummy -V" output a whole lot more readable (try it!). In case someone wants the full barfed output, it is possible to specify -VV instead of -V. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/dummyflasher.c =================================================================== --- trunk/dummyflasher.c 2010-01-09 03:22:31 UTC (rev 841) +++ trunk/dummyflasher.c 2010-01-09 04:32:23 UTC (rev 842) @@ -27,7 +27,7 @@ int dummy_init(void) { int i; - printf_debug("%s\n", __func__); + msg_pspew("%s\n", __func__); /* "all" is equivalent to specifying no type. */ if (programmer_param && (!strcmp(programmer_param, "all"))) { @@ -43,95 +43,95 @@ buses_supported = CHIP_BUSTYPE_NONE; if (strstr(programmer_param, "parallel")) { buses_supported |= CHIP_BUSTYPE_PARALLEL; - printf_debug("Enabling support for %s flash.\n", "parallel"); + msg_pdbg("Enabling support for %s flash.\n", "parallel"); } if (strstr(programmer_param, "lpc")) { buses_supported |= CHIP_BUSTYPE_LPC; - printf_debug("Enabling support for %s flash.\n", "LPC"); + msg_pdbg("Enabling support for %s flash.\n", "LPC"); } if (strstr(programmer_param, "fwh")) { buses_supported |= CHIP_BUSTYPE_FWH; - printf_debug("Enabling support for %s flash.\n", "FWH"); + msg_pdbg("Enabling support for %s flash.\n", "FWH"); } if (strstr(programmer_param, "spi")) { buses_supported |= CHIP_BUSTYPE_SPI; spi_controller = SPI_CONTROLLER_DUMMY; - printf_debug("Enabling support for %s flash.\n", "SPI"); + msg_pdbg("Enabling support for %s flash.\n", "SPI"); } if (buses_supported == CHIP_BUSTYPE_NONE) - printf_debug("Support for all flash bus types disabled.\n"); + msg_pdbg("Support for all flash bus types disabled.\n"); free(programmer_param); return 0; } int dummy_shutdown(void) { - printf_debug("%s\n", __func__); + msg_pspew("%s\n", __func__); return 0; } void *dummy_map(const char *descr, unsigned long phys_addr, size_t len) { - printf_debug("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n", - __func__, descr, (unsigned long)len, phys_addr); + msg_pspew("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n", + __func__, descr, (unsigned long)len, phys_addr); return (void *)phys_addr; } void dummy_unmap(void *virt_addr, size_t len) { - printf_debug("%s: Unmapping 0x%lx bytes at %p\n", - __func__, (unsigned long)len, virt_addr); + msg_pspew("%s: Unmapping 0x%lx bytes at %p\n", + __func__, (unsigned long)len, virt_addr); } void dummy_chip_writeb(uint8_t val, chipaddr addr) { - printf_debug("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val); + msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val); } void dummy_chip_writew(uint16_t val, chipaddr addr) { - printf_debug("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val); + msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val); } void dummy_chip_writel(uint32_t val, chipaddr addr) { - printf_debug("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); + msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); } void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len) { size_t i; - printf_debug("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", - __func__, addr, (unsigned long)len); + msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", + __func__, addr, (unsigned long)len); for (i = 0; i < len; i++) { if ((i % 16) == 0) - printf_debug("\n"); - printf_debug("%02x ", buf[i]) + msg_pspew("\n"); + msg_pspew("%02x ", buf[i]); } } uint8_t dummy_chip_readb(const chipaddr addr) { - printf_debug("%s: addr=0x%lx, returning 0xff\n", __func__, addr); + msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr); return 0xff; } uint16_t dummy_chip_readw(const chipaddr addr) { - printf_debug("%s: addr=0x%lx, returning 0xffff\n", __func__, addr); + msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr); return 0xffff; } uint32_t dummy_chip_readl(const chipaddr addr) { - printf_debug("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr); + msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr); return 0xffffffff; } void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) { - printf_debug("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", - __func__, addr, (unsigned long)len); + msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", + __func__, addr, (unsigned long)len); memset(buf, 0xff, len); return; } @@ -141,18 +141,18 @@ { int i; - printf_debug("%s:", __func__); + msg_pspew("%s:", __func__); - printf_debug(" writing %u bytes:", writecnt); + msg_pspew(" writing %u bytes:", writecnt); for (i = 0; i < writecnt; i++) - printf_debug(" 0x%02x", writearr[i]); + msg_pspew(" 0x%02x", writearr[i]); - printf_debug(" reading %u bytes:", readcnt); + msg_pspew(" reading %u bytes:", readcnt); for (i = 0; i < readcnt; i++) { - printf_debug(" 0xff"); + msg_pspew(" 0xff"); readarr[i] = 0xff; } - printf_debug("\n"); + msg_pspew("\n"); return 0; }

1 0

[PATCH] Fix up msg_* macros
by Carl-Daniel Hailfinger 09 Jan '10

09 Jan '10

This slipped through the review. The msg_* macros won't compile as is if you use more than one parameter (i.e. have a format string and a variable). There are two alternative styles: GNU or C99 variadic macros. While C99 has limitations compared to the GNU extensions, these limitations do not affect our macros, so I decided to go with the standard way. I adjusted whitespace a bit to have aligned values (cosmetic change). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-msg_macro_fix/flash.h =================================================================== --- flashrom-msg_macro_fix/flash.h (Revision 839) +++ flashrom-msg_macro_fix/flash.h (Arbeitskopie) @@ -506,22 +506,22 @@ /* cli_output.c */ int print(int type, const char *fmt, ...); -#define MSG_ERROR 0 -#define MSG_INFO 1 -#define MSG_DEBUG 2 -#define MSG_BARF 3 -#define msg_gerr(x) print(MSG_ERROR, x) /* general errors */ -#define msg_perr(x) print(MSG_ERROR, x) /* programmer errors */ -#define msg_cerr(x) print(MSG_ERROR, x) /* chip errors */ -#define msg_ginfo(x) print(MSG_INFO, x) /* general info */ -#define msg_pinfo(x) print(MSG_INFO, x) /* programmer info */ -#define msg_cinfo(x) print(MSG_INFO, x) /* chip info */ -#define msg_gdbg(x) print(MSG_DEBUG, x) /* general debug */ -#define msg_pdbg(x) print(MSG_DEBUG, x) /* programmer debug */ -#define msg_cdbg(x) print(MSG_DEBUG, x) /* chip debug */ -#define msg_gspew(x) print(MSG_BARF, x) /* general debug barf */ -#define msg_pspew(x) print(MSG_BARF, x) /* programmer debug barf */ -#define msg_cspew(x) print(MSG_BARF, x) /* chip debug barf */ +#define MSG_ERROR 0 +#define MSG_INFO 1 +#define MSG_DEBUG 2 +#define MSG_BARF 3 +#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ +#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ +#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ +#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ +#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ +#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ +#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */ +#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */ +#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */ +#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */ +#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */ +#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */ /* cli_classic.c */ int cli_classic(int argc, char *argv[]); -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r841 - trunk
by svn＠flashrom.org 09 Jan '10

09 Jan '10

Author: hailfinger Date: 2010-01-09 04:22:31 +0100 (Sat, 09 Jan 2010) New Revision: 841 Modified: trunk/flash.h Log: The msg_* macros won't compile as is if you use more than one parameter (i.e. have a format string and a variable). There are two alternative styles: GNU or C99 variadic macros. While C99 has limitations compared to the GNU extensions, these limitations do not affect our macros, so I decided to go with the standard way. I adjusted whitespace a bit to have aligned values (cosmetic change). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-09 03:15:50 UTC (rev 840) +++ trunk/flash.h 2010-01-09 03:22:31 UTC (rev 841) @@ -508,22 +508,22 @@ /* cli_output.c */ int print(int type, const char *fmt, ...); -#define MSG_ERROR 0 -#define MSG_INFO 1 -#define MSG_DEBUG 2 -#define MSG_BARF 3 -#define msg_gerr(x) print(MSG_ERROR, x) /* general errors */ -#define msg_perr(x) print(MSG_ERROR, x) /* programmer errors */ -#define msg_cerr(x) print(MSG_ERROR, x) /* chip errors */ -#define msg_ginfo(x) print(MSG_INFO, x) /* general info */ -#define msg_pinfo(x) print(MSG_INFO, x) /* programmer info */ -#define msg_cinfo(x) print(MSG_INFO, x) /* chip info */ -#define msg_gdbg(x) print(MSG_DEBUG, x) /* general debug */ -#define msg_pdbg(x) print(MSG_DEBUG, x) /* programmer debug */ -#define msg_cdbg(x) print(MSG_DEBUG, x) /* chip debug */ -#define msg_gspew(x) print(MSG_BARF, x) /* general debug barf */ -#define msg_pspew(x) print(MSG_BARF, x) /* programmer debug barf */ -#define msg_cspew(x) print(MSG_BARF, x) /* chip debug barf */ +#define MSG_ERROR 0 +#define MSG_INFO 1 +#define MSG_DEBUG 2 +#define MSG_BARF 3 +#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ +#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ +#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ +#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ +#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ +#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ +#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */ +#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */ +#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */ +#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */ +#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */ +#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */ /* cli_classic.c */ int cli_classic(int argc, char *argv[]);

1 0

[PATCH] Use address mask in probe_jedec
by Carl-Daniel Hailfinger 09 Jan '10

09 Jan '10

Use address mask in probe_jedec. This allows us to have one common probe_jedec function instead of half a dozen wrappers. The trick here is to have FEATURE_ADDR_FULL==0 and thus default to unmasked addresses. That way, we only have to annotate chips which need small address masks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-probe_jedec_featurebits_addrmask/flash.h =================================================================== --- flashrom-probe_jedec_featurebits_addrmask/flash.h (Revision 836) +++ flashrom-probe_jedec_featurebits_addrmask/flash.h (Arbeitskopie) @@ -149,8 +149,10 @@ */ #define NUM_ERASEFUNCTIONS 5 -#define FEATURE_REGISTERMAP (1 << 0) -#define FEATURE_BYTEWRITES (1 << 1) +#define FEATURE_REGISTERMAP (1 << 0) +#define FEATURE_BYTEWRITES (1 << 1) +#define FEATURE_ADDR_FULL (0 << 2) +#define FEATURE_ADDR_MASK (3 << 2) struct flashchip { const char *vendor; Index: flashrom-probe_jedec_featurebits_addrmask/jedec.c =================================================================== --- flashrom-probe_jedec_featurebits_addrmask/jedec.c (Revision 836) +++ flashrom-probe_jedec_featurebits_addrmask/jedec.c (Arbeitskopie) @@ -373,6 +373,19 @@ return failed; } +int getaddrmask(struct flashchip *flash) +{ + switch (flash->feature_bits & FEATURE_ADDR_MASK) { + case FEATURE_ADDR_FULL: + return MASK_FULL; + break; + default: + fprintf(stderr, "%s called with unknown mask\n", __func__); + return 0; + break; + } +} + int write_jedec(struct flashchip *flash, uint8_t *buf) { int i, failed = 0; @@ -438,7 +451,10 @@ int probe_jedec(struct flashchip *flash) { - return probe_jedec_common(flash, MASK_FULL, 1); + int mask; + + mask = getaddrmask(flash); + return probe_jedec_common(flash, mask, 1); } int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int size) -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r840 - trunk
by svn＠flashrom.org 09 Jan '10

09 Jan '10

Author: hailfinger Date: 2010-01-09 04:15:50 +0100 (Sat, 09 Jan 2010) New Revision: 840 Modified: trunk/flash.h trunk/jedec.c Log: Use address mask in probe_jedec. This allows us to have one common probe_jedec function instead of half a dozen wrappers. The trick here is to have FEATURE_ADDR_FULL==0 and thus default to unmasked addresses. That way, we only have to annotate chips which need small address masks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-09 02:24:17 UTC (rev 839) +++ trunk/flash.h 2010-01-09 03:15:50 UTC (rev 840) @@ -149,8 +149,10 @@ */ #define NUM_ERASEFUNCTIONS 5 -#define FEATURE_REGISTERMAP (1 << 0) -#define FEATURE_BYTEWRITES (1 << 1) +#define FEATURE_REGISTERMAP (1 << 0) +#define FEATURE_BYTEWRITES (1 << 1) +#define FEATURE_ADDR_FULL (0 << 2) +#define FEATURE_ADDR_MASK (3 << 2) struct flashchip { const char *vendor; Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2010-01-09 02:24:17 UTC (rev 839) +++ trunk/jedec.c 2010-01-09 03:15:50 UTC (rev 840) @@ -373,6 +373,19 @@ return failed; } +int getaddrmask(struct flashchip *flash) +{ + switch (flash->feature_bits & FEATURE_ADDR_MASK) { + case FEATURE_ADDR_FULL: + return MASK_FULL; + break; + default: + fprintf(stderr, "%s called with unknown mask\n", __func__); + return 0; + break; + } +} + int write_jedec(struct flashchip *flash, uint8_t *buf) { int i, failed = 0; @@ -438,7 +451,10 @@ int probe_jedec(struct flashchip *flash) { - return probe_jedec_common(flash, MASK_FULL, 1); + int mask; + + mask = getaddrmask(flash); + return probe_jedec_common(flash, mask, 1); } int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int size)

1 0

[PATCH] Use the register mapping feature bit
by Carl-Daniel Hailfinger 09 Jan '10

09 Jan '10

Use the register mapping feature bit. All functions which just call probe_jedec and then map flash registers are replaced by probe_jedec. All functions which call probe_jedec, map flash registers and do something else can at least eliminate mapping flash registers. Fix logic inversion in probe_jedec to map flash registers on success instead of on failure. Change a few TIMING_IGNORED to TIMING_FIXME where probe_jedec is used. Total savings: One probe function simplified, three probe functions eliminated. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-registermap_featurebit/pm49fl00x.c =================================================================== --- flashrom-registermap_featurebit/pm49fl00x.c (Revision 834) +++ flashrom-registermap_featurebit/pm49fl00x.c (Arbeitskopie) @@ -36,16 +36,6 @@ } } -int probe_49fl00x(struct flashchip *flash) -{ - int ret = probe_jedec(flash); - - if (ret == 1) - map_flash_registers(flash); - - return ret; -} - int erase_49fl00x(struct flashchip *flash) { int i; Index: flashrom-registermap_featurebit/jedec.c =================================================================== --- flashrom-registermap_featurebit/jedec.c (Revision 834) +++ flashrom-registermap_featurebit/jedec.c (Arbeitskopie) @@ -189,13 +189,13 @@ printf_debug(", id2 is normal flash content"); printf_debug("\n"); - if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id) - return 1; + if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id) + return 0; if (flash->feature_bits & FEATURE_REGISTERMAP) map_flash_registers(flash); - return 0; + return 1; } int erase_sector_jedec_common(struct flashchip *flash, unsigned int page, Index: flashrom-registermap_featurebit/flashchips.c =================================================================== --- flashrom-registermap_featurebit/flashchips.c (Revision 834) +++ flashrom-registermap_featurebit/flashchips.c (Arbeitskopie) @@ -827,7 +827,7 @@ .total_size = 64, .page_size = 128, .tested = TEST_OK_PRW, - .probe = probe_jedec, + .probe = probe_jedec, .probe_timing = 10000, /* 10mS, Enter=Exec */ .erase = NULL, .block_erasers = @@ -1252,8 +1252,9 @@ .model_id = AMIC_A49LF040A, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_49fl00x, + .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, @@ -2473,8 +2474,9 @@ .model_id = PMC_49FL002, .total_size = 256, .page_size = 16 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_49fl00x, + .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, @@ -2489,8 +2491,9 @@ .model_id = PMC_49FL004, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_49fl00x, + .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, @@ -2965,6 +2968,7 @@ .model_id = SST_49LF002A, .total_size = 256, .page_size = 16 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -2981,6 +2985,7 @@ .model_id = SST_49LF003A, .total_size = 384, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3000,6 +3005,7 @@ .model_id = SST_49LF004A, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3045,6 +3051,7 @@ .model_id = SST_49LF008A, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3141,6 +3148,7 @@ .model_id = SST_49LF040B, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3483,8 +3491,9 @@ .model_id = ST_M50FLW040A, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -3499,8 +3508,9 @@ .model_id = ST_M50FLW040B, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -3515,8 +3525,9 @@ .model_id = ST_M50FLW080A, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -3531,8 +3542,9 @@ .model_id = ST_M50FLW080B, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -4027,9 +4039,10 @@ .model_id = W_39V080FA, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_winbond_fwhub, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w39v080fa.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, .read = read_memmapped, @@ -4043,9 +4056,10 @@ .model_id = W_39V080FA_DM, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_winbond_fwhub, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w39v080fa.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, .read = read_memmapped, Index: flashrom-registermap_featurebit/stm50flw0x0x.c =================================================================== --- flashrom-registermap_featurebit/stm50flw0x0x.c (Revision 834) +++ flashrom-registermap_featurebit/stm50flw0x0x.c (Arbeitskopie) @@ -31,18 +31,6 @@ #include "flash.h" #include "flashchips.h" -int probe_stm50flw0x0x(struct flashchip *flash) -{ - int result = probe_jedec(flash); - - if (!result) - return result; - - map_flash_registers(flash); - - return 1; -} - static void wait_stm50flw0x0x(chipaddr bios) { chip_writeb(0x70, bios); Index: flashrom-registermap_featurebit/sst_fwhub.c =================================================================== --- flashrom-registermap_featurebit/sst_fwhub.c (Revision 834) +++ flashrom-registermap_featurebit/sst_fwhub.c (Arbeitskopie) @@ -89,8 +89,6 @@ if (probe_jedec(flash) == 0) return 0; - map_flash_registers(flash); - for (i = 0; i < flash->total_size * 1024; i += flash->page_size) check_sst_fwhub_block_lock(flash, i); Index: flashrom-registermap_featurebit/w39v080fa.c =================================================================== --- flashrom-registermap_featurebit/w39v080fa.c (Revision 834) +++ flashrom-registermap_featurebit/w39v080fa.c (Arbeitskopie) @@ -20,18 +20,6 @@ #include "flash.h" -int probe_winbond_fwhub(struct flashchip *flash) -{ - int result = probe_jedec(flash); - - if (!result) - return result; - - map_flash_registers(flash); - - return 1; -} - static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset) { chipaddr wrprotect = flash->virtual_registers + offset + 2; -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

3 3

[commit] r839 - trunk
by svn＠flashrom.org 09 Jan '10

09 Jan '10

Author: hailfinger Date: 2010-01-09 03:24:17 +0100 (Sat, 09 Jan 2010) New Revision: 839 Modified: trunk/flashchips.c trunk/jedec.c trunk/pm49fl00x.c trunk/sst_fwhub.c trunk/stm50flw0x0x.c trunk/w39v080fa.c Log: Use the register mapping feature bit. All functions which just call probe_jedec and then map flash registers are replaced by probe_jedec. All functions which call probe_jedec, map flash registers and do something else can at least eliminate mapping flash registers. Fix logic inversion in probe_jedec to map flash registers on success instead of on failure. Change a few TIMING_IGNORED to TIMING_FIXME where probe_jedec is used. Total savings: One probe function simplified, three probe functions eliminated. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-08 21:18:08 UTC (rev 838) +++ trunk/flashchips.c 2010-01-09 02:24:17 UTC (rev 839) @@ -827,7 +827,7 @@ .total_size = 64, .page_size = 128, .tested = TEST_OK_PRW, - .probe = probe_jedec, + .probe = probe_jedec, .probe_timing = 10000, /* 10mS, Enter=Exec */ .erase = NULL, .block_erasers = @@ -1252,8 +1252,9 @@ .model_id = AMIC_A49LF040A, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_49fl00x, + .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, @@ -2473,8 +2474,9 @@ .model_id = PMC_49FL002, .total_size = 256, .page_size = 16 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_49fl00x, + .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, @@ -2489,8 +2491,9 @@ .model_id = PMC_49FL004, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_49fl00x, + .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, @@ -2980,6 +2983,7 @@ .model_id = SST_49LF002A, .total_size = 256, .page_size = 16 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -2996,6 +3000,7 @@ .model_id = SST_49LF003A, .total_size = 384, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3015,6 +3020,7 @@ .model_id = SST_49LF004A, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3060,6 +3066,7 @@ .model_id = SST_49LF008A, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3156,6 +3163,7 @@ .model_id = SST_49LF040B, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ @@ -3498,8 +3506,9 @@ .model_id = ST_M50FLW040A, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -3514,8 +3523,9 @@ .model_id = ST_M50FLW040B, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -3530,8 +3540,9 @@ .model_id = ST_M50FLW080A, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -3546,8 +3557,9 @@ .model_id = ST_M50FLW080B, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_stm50flw0x0x, + .probe = probe_jedec, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, @@ -4042,9 +4054,10 @@ .model_id = W_39V080FA, .total_size = 1024, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, - .probe = probe_winbond_fwhub, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w39v080fa.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, .read = read_memmapped, @@ -4058,9 +4071,10 @@ .model_id = W_39V080FA_DM, .total_size = 512, .page_size = 64 * 1024, + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_winbond_fwhub, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w39v080fa.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, .read = read_memmapped, Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2010-01-08 21:18:08 UTC (rev 838) +++ trunk/jedec.c 2010-01-09 02:24:17 UTC (rev 839) @@ -189,13 +189,13 @@ printf_debug(", id2 is normal flash content"); printf_debug("\n"); - if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id) - return 1; + if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id) + return 0; if (flash->feature_bits & FEATURE_REGISTERMAP) map_flash_registers(flash); - return 0; + return 1; } int erase_sector_jedec_common(struct flashchip *flash, unsigned int page, Modified: trunk/pm49fl00x.c =================================================================== --- trunk/pm49fl00x.c 2010-01-08 21:18:08 UTC (rev 838) +++ trunk/pm49fl00x.c 2010-01-09 02:24:17 UTC (rev 839) @@ -36,16 +36,6 @@ } } -int probe_49fl00x(struct flashchip *flash) -{ - int ret = probe_jedec(flash); - - if (ret == 1) - map_flash_registers(flash); - - return ret; -} - int erase_49fl00x(struct flashchip *flash) { int i; Modified: trunk/sst_fwhub.c =================================================================== --- trunk/sst_fwhub.c 2010-01-08 21:18:08 UTC (rev 838) +++ trunk/sst_fwhub.c 2010-01-09 02:24:17 UTC (rev 839) @@ -89,8 +89,6 @@ if (probe_jedec(flash) == 0) return 0; - map_flash_registers(flash); - for (i = 0; i < flash->total_size * 1024; i += flash->page_size) check_sst_fwhub_block_lock(flash, i); Modified: trunk/stm50flw0x0x.c =================================================================== --- trunk/stm50flw0x0x.c 2010-01-08 21:18:08 UTC (rev 838) +++ trunk/stm50flw0x0x.c 2010-01-09 02:24:17 UTC (rev 839) @@ -31,18 +31,6 @@ #include "flash.h" #include "flashchips.h" -int probe_stm50flw0x0x(struct flashchip *flash) -{ - int result = probe_jedec(flash); - - if (!result) - return result; - - map_flash_registers(flash); - - return 1; -} - static void wait_stm50flw0x0x(chipaddr bios) { chip_writeb(0x70, bios); Modified: trunk/w39v080fa.c =================================================================== --- trunk/w39v080fa.c 2010-01-08 21:18:08 UTC (rev 838) +++ trunk/w39v080fa.c 2010-01-09 02:24:17 UTC (rev 839) @@ -20,18 +20,6 @@ #include "flash.h" -int probe_winbond_fwhub(struct flashchip *flash) -{ - int result = probe_jedec(flash); - - if (!result) - return result; - - map_flash_registers(flash); - - return 1; -} - static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset) { chipaddr wrprotect = flash->virtual_registers + offset + 2;

1 0

Error Reading BIOS on Dell Optiplex 745
by Anthony DeRosa 08 Jan '10

08 Jan '10

carldani, The bios version I am currently using (2.6.2) is no longer available for download, but i happen to have a copy of it attached (raw ROM file). Below is the rest of the info. you asked for. ubuntu@ubuntu:~/flashrom$ sudo ./flashrom -r backup.bin flashrom v0.9.1-r837 No coreboot table found. Found chipset "Intel ICH8/ICH8R", enabling flash write... WARNING: SPI Configuration Lockdown activated. FAILED! This chipset supports the following protocols: FWH,SPI. Calibrating delay loop... OK. Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: ERASE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === Reading flash... done. ubuntu@ubuntu:~/flashrom$ hexdump backup.bin 0000000 0000 0000 0000 0000 0000 0000 0000 0000 * 0100000 ubuntu@ubuntu:~/flashrom$ dmidecode snippet (bonus!) Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: Dell Inc. Version: 2.6.2 Release Date: 08/12/2008 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 1024 kB Characteristics: PCI is supported PNP is supported APM is supported BIOS is upgradeable BIOS shadowing is allowed Boot from CD is supported Selectable boot is supported EDD is supported Japanese floppy for Toshiba 1.2 MB is supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) ACPI is supported USB legacy is supported LS-120 boot is supported BIOS boot specification is supported Function key-initiated network boot is supported Targeted content distribution is supported BIOS Revision: 2.6 flashrom -V flashrom v0.9.1-r837 No coreboot table found. Found chipset "Intel ICH8/ICH8R", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x2 tried to set 0xdc to 0x3 on ICH8/ICH8R failed (WARNING ONLY) Root Complex Register Block address = 0xfeda8000 GCS = 0x460: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfeda8000 + 0x3020 0x04: 0xa000 (HSFS) FLOCKDN 1, FDV 0, FDOPSS 1, SCIP 0, BERASE 0, AEL 0, FCERR 0, FDONE 0 0x50: 0x00000202 (FRAP) BMWAG 0, BMRAG 0, BRWA 2, BRRA 2 0x54: 0x00001fff (FREG0) 0x58: 0x00001fff (FREG1) 0x5C: 0x00001fff (FREG2) 0x60: 0x00001fff (FREG3) 0x64: 0x00000000 (FREG4) 0x74: 0x00000000 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x00422004 (SSFS, SSFC) 0x94: 0x0606 (PREOP) 0x96: 0x4fc8 (OPTYPE) 0x98: 0x029fabab (OPMENU) 0x9C: 0x010502d8 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xB0: 0x00000000 (FDOC) WARNING: SPI Configuration Lockdown activated. Generating OPCODES... done SPI Read Configuration: prefetching disabled, caching enabled, FAILED! This chipset supports the following protocols: FWH,SPI. Calibrating delay loop... 512M loops per second, 100 myus = 200 us. OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F040B, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for ASD AE49F2008, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT25DF021, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT29C512, 64 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C020, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT45CS1282, 16896 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A25L40P, 512 KB: RDID returned 0xc2 0x20 0x14 0xc2. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A29002B, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A29002T, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A29040B, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for AMIC A49LF040A, 512 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for EMST F49B002UA, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Eon EN25B05, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25D16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0x01, id2 0x0b Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xda, id2 0x00 Probing for Macronix MX25L512, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Numonyx M25PE10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm29F002T, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for PMC Pm29F002B, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x01, id2 0x0b, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sharp LHF00L04, 1024 KB: probe_49lfxxxc: id1 0xda, id2 0x00 Probing for Spansion S25FL016A, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF016B, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040.REMS, 512 KB: Invalid OPCODE 0x90 Probing for SST SST25VF040B, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040B.REMS, 512 KB: Invalid OPCODE 0x90 Probing for SST SST25VF080B, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST28SF040A, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29EE010, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29LE010, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29EE020A, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST29LE020, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF010A, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF020A, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF040, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF512, 64 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF010, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF020, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF040, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF080, 1024 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0x01, id2 0x0b, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0x01, id2 0x0b Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0xda, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xda, id2 0x00 Probing for SST SST49LF016C, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for SST SST49LF020A, 256 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for SST SST49LF040, 512 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for SST SST49LF040B, 512 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for SST SST49LF080A, 1024 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for SST SST49LF160C, 2048 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for ST M25P05-A, 64 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05.RES, 64 KB: RDID returned 0xc2 0x20 0x14. Probing for ST M25P10-A, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10.RES, 128 KB: RDID returned 0xc2 0x20 0x14. Probing for ST M25P20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 KB: RDID returned 0xc2 0x20 0x14. Probing for ST M25P80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M29F002B, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29F040B, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29F400BT, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29W010B, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M29W040B, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for ST M50FLW040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x01, id2 0x0b, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x01, id2 0x0b, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xda, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xda, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M50FW016, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x01, id2 0x0b Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xda, id2 0x00 Probing for ST M50LPW116, 2048 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W25x10, 128 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x20, 256 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x40, 512 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x80, 1024 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x16, 2048 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x32, 4096 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x64, 8192 KB: RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W29C011, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W29C020C, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W29C040P, 512 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W29EE011, 128 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W39V040A, 512 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for Winbond W39V040B, 512 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for Winbond W39V040C, 512 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0x01, id2 0x0b, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for Winbond W49F002U, 256 KB: skipped. Host bus type FWH,SPI and chip bus type Parallel are incompatible. Probing for Winbond W49V002A, 256 KB: skipped. Host bus type FWH,SPI and chip bus type LPC are incompatible. Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xda, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x01, id2 0x0b, id1 is normal flash content, id2 is normal flash content Probing for Atmel unknown Atmel SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for EON unknown EON SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for Macronix unknown Macronix SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for PMC unknown PMC SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for SST unknown SST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for ST unknown ST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for Sanyo unknown Sanyo SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for Generic unknown SPI chip (RDID), 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xc2 0x20 0x14. probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Not unmapping zero size at (nil) Probing for Generic unknown SPI chip (REMS), 0 KB: Not mapping flash chip, zero size at 0x00000000. Invalid OPCODE 0x90 Not unmapping zero size at (nil) === This flash part has status UNTESTED for operations: ERASE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified. lspci -nnvvvxxx 00:00.0 Host bridge [0600]: Intel Corporation 82Q963/Q965 Memory Controller Hub [8086:2990] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information <?> Kernel modules: intel-agp 00: 86 80 90 29 06 01 90 20 02 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 01 50 da fe 00 00 00 00 00 00 da fe 00 00 00 00 50: 00 00 02 00 03 00 00 00 00 00 00 00 00 00 00 00 60: 01 00 00 e0 00 00 00 00 01 40 da fe 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 10 11 11 01 00 00 00 00 40 00 4b 00 00 1a 79 00 a0: 40 00 00 13 00 00 00 d0 00 00 00 00 00 00 f0 cf b0: 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 49 00 00 00 01 00 01 13 e0: 09 00 09 51 6e 03 00 48 06 8c 00 00 00 00 00 00 f0: 02 00 00 00 00 00 00 00 90 0f 04 00 00 00 00 00 00:01.0 PCI bridge [0604]: Intel Corporation 82Q963/Q965 PCI Express Root Port [8086:2991] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fa000000-feafffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [88] Subsystem: Dell Device [1028:01da] Capabilities: [80] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Address: fee0300c Data: 4151 Capabilities: [a0] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x16, ASPM L0s, Latency L0 <256ns, L1 <4us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- Slot # 1, PowerLimit 25.000000; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100] Virtual Channel <?> Capabilities: [140] Root Complex Link <?> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: 86 80 91 29 07 05 10 00 02 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 d0 d0 00 00 20: 00 fa a0 fe 01 d0 f1 df 00 00 00 00 00 00 00 00 30: 00 00 00 00 88 00 00 00 00 00 00 00 0b 01 0a 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 80: 01 90 03 c8 08 00 00 00 0d 80 00 00 28 10 da 01 90: 05 a0 01 00 0c 30 e0 fe 51 41 00 00 00 00 00 00 a0: 10 00 41 01 00 80 00 00 00 00 00 00 01 25 01 02 b0: 40 00 01 11 80 0c 0c 00 c0 01 48 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 07 00 00 00 f0: 00 00 01 00 03 e1 3f 00 90 0f 04 00 00 00 00 00 00:1a.0 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #4 [8086:2834] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 4: I/O ports at ff20 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 34 28 05 00 80 02 02 00 03 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 21 ff 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1a.1 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #5 [8086:2835] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 17 Region 4: I/O ports at ff00 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 35 28 05 00 80 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 ff 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1a.7 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #2 [8086:283a] (rev 02) (prog-if 20) Subsystem: Dell Device [1028:01da] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 22 Region 0: Memory at febfbc00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci_hcd 00: 86 80 3a 28 06 01 90 02 02 20 03 0c 00 00 00 00 10: 00 bc bf fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 50 00 00 00 00 00 00 00 09 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00 60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 08 80 70: 00 00 c7 03 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 97 02 20 00:1b.0 Audio device [0403]: Intel Corporation 82801H (ICH8 Family) HD Audio Controller [8086:284b] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at febfc000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Virtual Channel <?> Capabilities: [130] Root Complex Link <?> Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: 86 80 4b 28 06 01 10 00 02 00 03 04 10 00 00 00 10: 04 c0 bf fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 40: 01 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 60: 05 70 80 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 00 91 00 00 00 00 00 00 08 10 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1c.0 PCI bridge [0604]: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 [8086:283f] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: f9f00000-f9ffffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <256ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 4, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Address: fee0300c Data: 4159 Capabilities: [90] Subsystem: Dell Device [1028:01da] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: 86 80 3f 28 07 05 10 00 02 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 00 20: f0 f9 f0 f9 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 02 00 40: 10 80 41 01 c0 8f 00 00 00 00 10 00 11 24 11 01 50: 40 00 11 30 60 05 20 00 00 00 48 01 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 0c 30 e0 fe 59 41 00 00 00 00 00 00 90: 0d a0 00 00 28 10 da 01 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1c.4 PCI bridge [0604]: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 [8086:2847] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: f9e00000-f9efffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <256ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 0, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Address: fee0300c Data: 4161 Capabilities: [90] Subsystem: Dell Device [1028:01da] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: 86 80 47 28 07 05 10 00 02 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 f0 00 00 00 20: e0 f9 e0 f9 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 02 00 40: 10 80 41 01 c0 8f 00 00 00 00 10 00 11 24 11 05 50: 40 00 11 30 60 05 00 00 00 00 48 01 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 0c 30 e0 fe 61 41 00 00 00 00 00 00 90: 0d a0 00 00 28 10 da 01 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1d.0 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #1 [8086:2830] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 4: I/O ports at ff80 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 30 28 05 00 80 02 02 00 03 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 ff 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1d.1 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #2 [8086:2831] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 17 Region 4: I/O ports at ff60 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 31 28 05 00 80 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 61 ff 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1d.2 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #3 [8086:2832] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at ff40 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 32 28 05 00 80 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 41 ff 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1d.7 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 [8086:2836] (rev 02) (prog-if 20) Subsystem: Dell Device [1028:01da] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 0: Memory at ff980800 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci_hcd 00: 86 80 36 28 06 01 90 02 02 20 03 0c 00 00 00 00 10: 00 08 98 ff 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00 60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 08 80 70: 00 00 c7 3f 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 88 85 40 00 86 0f 03 00 06 97 02 20 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev f2) (prog-if 01) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=04, subordinate=04, sec-latency=32 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: f9c00000-f9dfffff Prefetchable memory behind bridge: 00000000f0000000-00000000f00fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Subsystem: Dell Device [1028:01da] 00: 86 80 4e 24 07 01 10 00 f2 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 20 c0 c0 80 22 20: c0 f9 d0 f9 01 f0 01 f0 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 00 00 02 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 50: 0d 00 00 00 28 10 da 01 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1f.0 ISA bridge [0601]: Intel Corporation 82801HB/HR (ICH8/R) LPC Interface Controller [8086:2810] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information <?> Kernel modules: iTCO_wdt 00: 86 80 10 28 07 01 10 02 02 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 01 08 00 00 80 00 00 00 81 08 00 00 10 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 8b 8a 83 80 d0 00 00 00 89 80 89 85 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 0d 14 01 0c 7c 00 e1 00 04 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 10 06 00 00 38 00 00 00 13 00 00 00 00 03 00 00 b0: 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 33 22 11 00 67 45 00 00 00 c0 00 00 02 00 00 00 e0: 09 00 0c 10 21 00 04 ca 60 00 00 00 00 00 00 00 f0: 01 80 da fe 09 c1 23 00 86 0f 03 00 00 00 00 00 00:1f.2 IDE interface [0101]: Intel Corporation 82801H (ICH8 Family) 4 port SATA IDE Controller [8086:2820] (rev 02) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 20 Region 0: I/O ports at fe00 [size=8] Region 1: I/O ports at fe10 [size=4] Region 2: I/O ports at fe20 [size=8] Region 3: I/O ports at fe30 [size=4] Region 4: I/O ports at fec0 [size=16] Region 5: I/O ports at ecc0 [size=16] Capabilities: [70] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ata_piix 00: 86 80 20 28 07 00 b0 02 02 8f 01 01 00 00 00 00 10: 01 fe 00 00 11 fe 00 00 21 fe 00 00 31 fe 00 00 20: c1 fe 00 00 c1 ec 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 70 00 00 00 00 00 00 00 09 03 00 00 40: 07 e3 03 e3 00 00 00 00 05 00 02 01 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 00 03 40 08 00 00 00 00 00 00 00 00 00 00 00 80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 03 83 80 01 80 40 00 00 00 00 01 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1f.3 SMBus [0c05]: Intel Corporation 82801H (ICH8 Family) SMBus Controller [8086:283e] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin C routed to IRQ 9 Region 0: Memory at febfbb00 (32-bit, non-prefetchable) [size=256] Region 4: I/O ports at ece0 [size=32] Kernel modules: i2c-i801 00: 86 80 3e 28 03 01 80 02 02 00 05 0c 00 00 00 00 10: 00 bb bf fe 00 00 00 00 00 00 00 00 00 00 00 00 20: e1 ec 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 09 03 00 00 40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 00:1f.5 IDE interface [0101]: Intel Corporation 82801H (ICH8 Family) 2 port SATA IDE Controller [8086:2825] (rev 02) (prog-if 85 [Master SecO PriO]) Subsystem: Dell Device [1028:01da] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 20 Region 0: I/O ports at fe40 [size=8] Region 1: I/O ports at fe50 [size=4] Region 2: I/O ports at fe60 [size=8] Region 3: I/O ports at fe70 [size=4] Region 4: I/O ports at fed0 [size=16] Region 5: I/O ports at ecd0 [size=16] Capabilities: [70] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ata_piix 00: 86 80 25 28 05 00 b0 02 02 85 01 01 00 00 00 00 10: 41 fe 00 00 51 fe 00 00 61 fe 00 00 71 fe 00 00 20: d1 fe 00 00 d1 ec 00 00 00 00 00 00 28 10 da 01 30: 00 00 00 00 70 00 00 00 00 00 00 00 09 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 00 03 40 08 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00 01:00.0 VGA compatible controller [0300]: nVidia Corporation G84 [Quadro FX 570] [10de:040e] (rev a1) Subsystem: nVidia Corporation Device [10de:0474] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 11 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at fa000000 (64-bit, non-prefetchable) [size=32M] Region 5: I/O ports at dc80 [size=128] Expansion ROM at fea00000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [68] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [78] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Virtual Channel <?> Capabilities: [128] Power Budgeting <?> Capabilities: [600] Vendor Specific Information <?> Kernel modules: nvidiafb 00: de 10 0e 04 03 00 10 00 a1 00 00 03 10 00 00 00 10: 00 00 00 fd 0c 00 00 d0 00 00 00 00 04 00 00 fa 20: 00 00 00 00 81 dc 00 00 00 00 00 00 de 10 74 04 30: 00 00 a0 fe 60 00 00 00 00 00 00 00 0b 01 00 00 40: de 10 74 04 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 00 00 01 00 00 00 ce d6 23 00 00 00 00 00 60: 01 68 02 00 00 00 00 00 05 78 80 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 10 00 01 00 e0 84 64 00 80: 16 29 00 00 01 3d 01 00 40 00 01 11 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02:00.0 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5721 Gigabit Ethernet PCI Express [14e4:1659] (rev 21) Subsystem: Broadcom Corporation NetXtreme BCM5721 Gigabit Ethernet PCI Express [14e4:1659] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 27 Region 0: Memory at f9ff0000 (64-bit, non-prefetchable) [size=64K] Expansion ROM at <ignored> [disabled] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data <?> Capabilities: [58] Message Signalled Interrupts: Mask- 64bit+ Queue=0/3 Enable+ Address: 00000000fee0300c Data: 4191 Capabilities: [d0] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag+ AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 4096 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <4us, L1 <64us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Advanced Error Reporting <?> Capabilities: [13c] Virtual Channel <?> Capabilities: [160] Device Serial Number 7d-86-2e-fe-ff-18-10-00 Capabilities: [16c] Power Budgeting <?> Kernel driver in use: tg3 Kernel modules: tg3 00: e4 14 59 16 06 04 10 00 21 00 00 02 10 00 00 00 10: 04 00 ff f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 07 00 00 00 e4 14 59 16 30: 00 00 58 e4 48 00 00 00 00 00 00 00 0b 01 00 00 40: 00 00 00 00 00 00 00 00 01 50 02 c0 00 20 00 64 50: 03 58 e8 00 21 1d a2 56 05 d0 87 00 0c 30 e0 fe 60: 00 00 00 00 91 41 00 00 98 02 01 42 00 00 18 76 70: f2 10 00 00 c0 00 00 00 50 00 00 00 00 00 00 00 80: 03 58 e8 00 00 00 00 00 34 00 13 04 82 50 08 3c 90: 09 4f 00 01 00 00 00 00 00 00 00 00 c8 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 80 00 00 0e 00 00 00 00 00 00 00 d0: 10 00 01 00 a0 0f 28 00 00 50 10 00 11 6c 03 00 e0: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03:00.0 Ethernet controller [0200]: Broadcom Corporation NetXtreme BCM5754 Gigabit Ethernet PCI Express [14e4:167a] (rev 02) Subsystem: Dell Device [1028:01da] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 28 Region 0: Memory at f9ef0000 (64-bit, non-prefetchable) [size=64K] Expansion ROM at <ignored> [disabled] Capabilities: [48] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data <?> Capabilities: [58] Vendor Specific Information <?> Capabilities: [e8] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+ Address: 00000000fee0300c Data: 4199 Capabilities: [d0] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 4096 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <4us, L1 <64us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Advanced Error Reporting <?> Capabilities: [13c] Virtual Channel <?> Capabilities: [160] Device Serial Number 86-0f-ac-fe-ff-a0-1a-00 Capabilities: [16c] Power Budgeting <?> Kernel driver in use: tg3 Kernel modules: tg3 00: e4 14 7a 16 06 04 10 00 02 00 00 02 10 00 00 00 10: 04 00 ef f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 da 01 30: 00 00 5b d7 48 00 00 00 00 00 00 00 0b 01 00 00 40: 00 00 00 00 00 00 00 00 01 50 03 c0 08 20 00 64 50: 03 58 c8 00 d6 f7 78 18 09 e8 78 00 88 2b 7f 6f 60: 00 00 00 00 00 00 00 00 98 02 02 b0 00 00 18 76 70: f2 10 00 00 c0 00 00 00 14 70 00 00 00 00 00 00 80: 70 9a 47 57 00 00 00 00 34 00 13 04 82 90 08 24 90: 29 92 00 01 00 00 00 00 00 00 00 00 ad 00 00 00 a0: 00 00 00 00 e5 01 00 00 00 00 00 00 b3 01 00 00 b0: 00 00 00 00 00 00 00 41 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 80 00 00 0e 00 00 00 00 00 00 00 d0: 10 00 01 00 a0 8f 28 00 00 50 10 00 11 64 03 00 e0: 40 00 11 10 00 00 00 00 05 d0 81 00 0c 30 e0 fe f0: 00 00 00 00 99 41 00 00 00 00 00 00 00 00 00 00 04:00.0 Ethernet controller [0200]: Intel Corporation 82541GI Gigabit Ethernet Controller [8086:1076] Subsystem: Intel Corporation Device [8086:1176] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 (63750ns min), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at f9cc0000 (32-bit, non-prefetchable) [size=128K] Region 1: Memory at f9ce0000 (32-bit, non-prefetchable) [size=128K] Region 2: I/O ports at ccc0 [size=64] Expansion ROM at f0000000 [disabled] [size=128K] Capabilities: [dc] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [e4] PCI-X non-bridge device Command: DPERE- ERO+ RBC=512 OST=1 Status: Dev=00:00.0 64bit- 133MHz- SCD- USC- DC=simple DMMRBC=2048 DMOST=1 DMCRS=8 RSCEM- 266MHz- 533MHz- Capabilities: [f0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Kernel driver in use: e1000 Kernel modules: e1000 00: 86 80 76 10 17 01 30 02 00 00 00 02 10 40 00 00 10: 00 00 cc f9 00 00 ce f9 c1 cc 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 76 11 30: 00 00 d0 f9 dc 00 00 00 00 00 00 00 0b 01 ff 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 e4 22 c8 e0: 00 20 00 28 07 f0 02 00 00 00 40 00 00 00 00 00 f0: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 04:02.0 Serial controller [0700]: Lava Computer mfg Inc Quattro-PCI A [1407:0120] (prog-if 02) Subsystem: Lava Computer mfg Inc Quattro-PCI A [1407:0120] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 18 Region 0: I/O ports at cca0 [size=8] Region 1: I/O ports at cca8 [size=8] Kernel driver in use: serial 00: 07 14 20 01 41 00 80 04 00 02 00 07 00 00 80 00 10: a1 cc 00 00 a9 cc 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 07 14 20 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04:02.1 Serial controller [0700]: Lava Computer mfg Inc Quattro-PCI B [1407:0121] (prog-if 02) Subsystem: Lava Computer mfg Inc Quattro-PCI B [1407:0121] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 18 Region 0: I/O ports at ccb0 [size=8] Region 1: I/O ports at ccb8 [size=8] Kernel driver in use: serial 00: 07 14 21 01 41 00 80 04 00 02 00 07 00 00 80 00 10: b1 cc 00 00 b9 cc 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 07 14 21 01 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 superiotool -deV (version in subversion as of about the timestamp of this email) superiotool r4931 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0x0000, rev=0x00 Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x0400, id=0x0f83 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0x830f, rev=0x9 Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0x830f, rev=0x9 Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0x830f, rev=0x9 Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x830f, rev=0x9 Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Found SMSC SCH5514D (id=0x83, rev=0x0f) at 0x2e No dump available for this Super I/O No extra registers known for this chip. Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0x00/0x00, rev=0x00 Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff

5 7

Sun Fire x4... tests
by Carl-Daniel Hailfinger 08 Jan '10

08 Jan '10

Hi Jody, I remember you testing flashrom on a few Sun servers: Sun Fire x4150 Sun Fire x4200 Sun Fire x4540 Sun Fire x4600 Since then, flashrom has evolved a lot, both in chipset support and board support. Would you mind retesting current flashrom from svn and reporting the status? flashrom development has moved to flashrom(a)flashrom.org and that address is in CC of this mail, so you can just hit reply-all. Output from "flashrom -V", "lspci -nnvvvxxx" and "superiotool -deV" for each of these machines (and of course for any other machines you happen to test) would be very appreciated. That helps us build our working/non-working board database. dmidecode output would be appreciated as well (system+baseboard manufacturer+product+version), but that is not essential if the boards can be identified by looking at PCI subsystem IDs. If one of the boards does not work, we ask you to send us a link to a BIOS image (please do not post images to the mailing list) so we can investigate the exact reasons and provide fixes if technically possible. Thanks in advance. Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

1 1

[patch] NetBSD support
by Jonathan A. Kollasch 08 Jan '10

08 Jan '10

Add support for NetBSD. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> ---

2 3

[commit] r838 - trunk
by svn＠flashrom.org 08 Jan '10

08 Jan '10

Author: hailfinger Date: 2010-01-08 22:18:08 +0100 (Fri, 08 Jan 2010) New Revision: 838 Modified: trunk/Makefile trunk/README trunk/hwaccess.h Log: Add support for NetBSD. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-07 21:23:45 UTC (rev 837) +++ trunk/Makefile 2010-01-08 21:18:08 UTC (rev 838) @@ -178,7 +178,11 @@ # into internal-programmer-only stuff # and a support lib for all internal+pci # based stuff. +ifeq ($(OS_ARCH), NetBSD) +LIBS += -lpciutils # The libpci we want. +LIBS += -l$(shell uname -m) # For (i386|x86_64)_iopl(2). endif +endif ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' Modified: trunk/README =================================================================== --- trunk/README 2010-01-07 21:23:45 UTC (rev 837) +++ trunk/README 2010-01-08 21:18:08 UTC (rev 838) @@ -65,10 +65,10 @@ gmake LDFLAGS="-L$pathtolibpci" CC="gcc -I$pathtopciheaders" CFLAGS=-O2 -To compile on DragonFly BSD, use: +To compile on NetBSD or DragonFly BSD, use: ln -s /usr/pkg/include/pciutils pci - gmake CFLAGS=-I. LDFLAGS="-L/usr/pkg/lib" + gmake CFLAGS=-I. LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" To compile and run on Darwin/Mac OS X: Modified: trunk/hwaccess.h =================================================================== --- trunk/hwaccess.h 2010-01-07 21:23:45 UTC (rev 837) +++ trunk/hwaccess.h 2010-01-08 21:18:08 UTC (rev 838) @@ -76,6 +76,63 @@ #endif #endif +#if defined(__NetBSD__) + #define off64_t off_t + #define lseek64 lseek + #if defined(__i386__) || defined(__x86_64__) + #include <sys/types.h> + #include <machine/sysarch.h> + #if defined(__i386__) + #define iopl i386_iopl + #elif defined(__x86_64__) + #define iopl x86_64_iopl + #endif + #include <stdint.h> + +static inline void +outb(uint8_t value, uint16_t port) +{ + asm volatile ("outb %b0,%w1": :"a" (value), "Nd" (port)); +} + +static inline uint8_t +inb(uint16_t port) +{ + uint8_t value; + asm volatile ("inb %w1,%0":"=a" (value):"Nd" (port)); + return value; +} + +static inline void +outw(uint16_t value, uint16_t port) +{ + asm volatile ("outw %w0,%w1": :"a" (value), "Nd" (port)); +} + +static inline uint16_t +inw(uint16_t port) +{ + uint16_t value; + asm volatile ("inw %w1,%0":"=a" (value):"Nd" (port)); + return value; +} + +static inline void +outl(uint32_t value, uint16_t port) +{ + asm volatile ("outl %0,%w1": :"a" (value), "Nd" (port)); +} + +static inline uint32_t +inl(uint16_t port) +{ + uint32_t value; + asm volatile ("inl %1,%0":"=a" (value):"Nd" (port)); + return value; +} + #endif +#endif + #if defined(__FreeBSD__) || defined(__DragonFly__) extern int io_fd; #endif

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Abit AN-M2
by NotLim 08 Jan '10

08 Jan '10

Hi there... i had a problem, upgrading my motherboard bios... i was on #flashrom ... and some guy/girl named "carldani" told me: <carldani> can you mail the output of "flashrom -V", "lspci -nnvvvxxx", "superiotool -d" (allcommands as root), the exact name of your board (including revision, if there are multiple revisions), and a link to the official BIOS download <carldani> and please write in the mail that you need a board enable, and that it is Phoenix BIOS. Well: I need a board enable. My motherboard is an Abit AN-M2. Official links for bioses is here: http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA… I was trying to upgrade from 07/16/2007 (BIOS ID:13) to (today) latest version: 01/03/2008 (BIOS ID:19). I've attached "flashrom -V" as flashromV.txt, "lspci -nnvvvxxx" as lspcinnvvvxxx.txt, "superiotool -d" as superio.txt. And also a dmidecode and current error as "failed.txt" (You can see here too: http://pastebin.com/f7056e678 ) Thanks a lot! and... it is Phoenix BIOS!

3 4

[Patch] Boards: Fix up several issues with nvidia_mcp_gpio_set.
by Luc Verhaegen 08 Jan '10

08 Jan '10

Luc Verhaegen.

3 3

Re: [flashrom] [Fwd: Re: Patch: Support ASUS M2NBP-VM CSM]
by Michael Karcher 08 Jan '10

08 Jan '10

Am Dienstag, den 29.12.2009, 19:43 -0800 schrieb Ying Wong: > Michael, > > Thank you for the follow up. I will test out this patch as well with > revision 810 as the base later this week. [...] > I've been told by others that the MAC address problem you mentioned may > be of concern. Given enough time, I'll continue testing to see if > flashing using flashrom will affect the NICs. Whether this is successful > or not, I will make a note of it in the acknowledge email once I get a > chance to test the patch attached to this email. I'm afraid I didn't see a reply stating success or failure of the patch. Did you not get around to it yet? Or maybe the mail got lost? We are still interested in feedback. Best way is to send your feedback to the mailing list (use the reply-to-all function of your email client). Thanks you very much in advance, Michael Karcher

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