- flashrom - mail.coreboot.org

Asus m2n-mx revision 1.06G
by flashrom＠datastructuur.nl 19 Feb '10

19 Feb '10

Dear reader, my Asus m2n-mx motherboard seems not supported by Flashrom. The w39v040c was not found automatically, so I tried a forced read. The flashrom dump and the original bios are very similar but not the same. In case you want to have a look at the dump, I included a link to the file. If you need extra information, please let me know. Ted Crilly Motherboard: Asus m2n-mx rev. 1.06G Flashrom (visual inspection): Winbond PLCC32 w39v040cpz 4548323002 632fafa SuperIO (visual inspection): ITE it8712f-s 0714-kxs zm2s50 L BIOS: (Bios version 1004 adds protection from downgrading BIOS version) ftp://ftp.asus.com/pub/ASUS/mb/socketAM2/M2N-MX/M2NX1004.zip DUMPED BIOS forced read: (flashrom -f -r -c W39V040C m2n-mx.bios1004_dump) http://datastructuur.nl/flashrom/m2n-mx.bios1004_dump

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Log from Asus M4N78-Pro
by Vikram Ambrose 18 Feb '10

18 Feb '10

CPU: Phenom X3 710 Mobo: Asus M4N78-Pro Vid1: nforce IGP (unused) Vid2: ATi HD4870 flashrom -V lspci -nnvvvxxx superiotool -deV

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'flashrom -V', 'lspci -nnvvvxxx', 'superiotool -deV' outputs for XFX nFORCE 630I GEFORCE 7150 SOCKET 775 (Product Code: MG-63MI-7159)
by Maik Masling 18 Feb '10

18 Feb '10

The Bios is actually provided closed to owners so you need to have access to the xfx-support-centre to download63M715V155XFX.zip that contains 63M715V155XFX.iso. <cid:part1.02090806.05080903@googlemail.com> ~$ sudo flashrom -V flashrom v0.9.1-r893 No coreboot table found. DMI string 0: "XFX" DMI string 1: "MG-63MI-7159" DMI string 2: "2.0" DMI string 3: "XFX" DMI string 4: "MG-63MI-7159" DMI string 5: "2.0" Found ITE SuperI/O, id 8718 This chipset supports the following protocols: Non-SPI. WARNING: No chipset found. Flash detection will most likely fail. Calibrating delay loop... 811M loops per second, 100 myus = 201 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C010A, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C020, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C040A, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N), 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for AMIC A25L40PT, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A25L40PU, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B05T, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10T, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20T, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40T, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80T, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16T, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32T, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64T, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BX-T, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Sharp LHF00L04, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for Spansion S25FL008A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff Probing for SST SST29EE010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE020A, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE020, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF010A, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF020A, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF040, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF020, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF040, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF080, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0x12, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0xba, id2 0x08 Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for SyncMOS S29C31004T, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C51001T, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C51002T, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C51004T, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RB, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C020C, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C040P, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0xba, id2 0x08, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically. ~$ sudo lspci -nnvvvxxx 00:00.0 Host bridge [0600]: nVidia Corporation MCP73 Host Bridge [10de:07c0] (rev a2) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 c0 07 06 00 a0 00 a2 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 21 49 44 44 13 01 00 00 00 00 00 00 10 00 00 00 70: 07 75 02 04 1d 15 00 00 81 01 85 01 00 00 00 00 80: 00 00 00 00 00 00 00 00 70 00 00 80 00 00 00 00 90: 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: cb 10 00 02 00 ff 00 00 00 00 00 00 00 00 00 00 c0: 11 11 00 00 00 30 33 13 03 00 00 00 00 50 07 00 d0: 01 0a 00 00 00 00 00 00 ff ff 71 07 10 cf 30 06 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 e4 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00:00.1 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07cb] (rev a2) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 cb 07 04 00 a0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 21 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.0 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07cd] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 cd 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 01 00 00 3b 44 04 00 00 00 00 00 00 00 00 00 50: 08 f8 f0 a0 0c 0c 04 7e 0c 00 00 00 04 10 7f 04 60: 45 00 55 00 00 00 00 00 00 00 00 00 32 00 20 00 70: 36 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 3f 43 00 00 00 06 00 00 00 00 00 00 00 34 0c 44 90: 46 c9 44 41 52 a4 93 35 0d 3a 22 87 03 14 55 11 a0: 00 00 18 18 f0 11 02 00 20 00 27 00 00 00 00 00 b0: 00 80 00 80 00 80 00 80 00 80 00 80 00 80 00 80 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 31 26 61 24 31 26 61 24 31 26 61 24 31 26 61 24 e0: 03 00 00 00 10 08 71 0f f1 01 00 00 00 00 00 00 f0: 10 98 ff 08 08 10 03 e0 01 00 00 00 53 03 77 40 00:01.1 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07ce] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 ce 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 0c 0c 03 03 00 00 00 00 0c 0c 03 03 00 00 00 00 70: 01 10 a0 ee 01 10 a0 ee 00 00 b0 6e 00 00 b0 6e 80: 08 08 00 13 00 00 f0 03 18 28 80 00 20 60 70 00 90: 01 00 00 10 05 10 00 08 05 20 00 08 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 c0: 00 00 00 00 5c 06 82 81 10 00 00 00 01 01 00 00 d0: 4b 0a 00 01 44 00 10 00 00 00 20 00 00 00 30 00 e0: fa 7d f3 de df ee f6 ff 01 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.2 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07cf] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 cf 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: d0 00 00 00 00 00 00 00 54 15 48 80 79 02 00 06 50: 54 00 00 00 2a 00 08 03 ff ff ff ff ff ff ff ff 60: ff 00 0c 00 0e 00 00 00 24 80 a8 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 08 00 3f 70 08 00 07 0c 00 00 00 00 00 00 00 00 a0: 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: ff ff 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00:01.3 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d0] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d0 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: d1 00 00 00 55 00 00 00 24 00 00 00 33 00 00 00 70: 55 00 00 00 24 00 00 00 33 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 11 21 12 11 00 00 00 00 99 99 99 99 a0: 00 00 00 00 ee 0e e4 04 4b 4b 4b 4d 4b 4c 4b 4c b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 07 00 00 c0: 00 00 00 00 00 07 00 00 00 00 00 00 00 07 00 00 d0: 00 00 00 00 00 07 00 00 00 00 00 00 00 07 00 00 e0: 00 00 00 00 00 07 00 00 00 00 00 00 00 07 00 00 f0: 00 00 00 00 00 07 00 00 00 00 00 00 00 00 00 00 00:01.4 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d1] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d1 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 50 3f 00 00 ff 00 00 00 98 3a 30 80 80 01 00 02 50: 00 00 00 00 1f 1f 00 00 0f 0f 00 00 a0 f1 f1 00 60: 0f 0f 00 00 0f 00 0f 00 0f 0f 00 00 90 f1 f1 00 70: 0f 0f 00 00 0f 00 0f 00 03 00 00 00 0f 00 00 00 80: 0f 00 00 00 00 00 00 00 0f 00 0f 00 0f 00 0f 00 90: 0f 0f 00 00 0f 00 0f 00 0f 0f 00 00 0f 00 0f 00 a0: 0f 0f 00 00 00 00 00 02 0f 0f 00 00 0f 00 0f 00 b0: 01 03 00 00 44 45 54 11 44 44 44 44 44 44 44 00 c0: 00 00 00 04 00 00 00 04 00 00 00 00 00 00 00 00 d0: 00 00 00 00 0f 00 00 00 0f 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 44 00 00 00 44 00 00 00 f0: ff ff 00 02 00 00 00 00 0f 00 0f 00 0f 00 0f 00 00:01.5 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d2] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d2 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: f9 01 a0 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.6 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d3] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d3 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 33 43 34 33 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 07 07 00 00 99 99 99 99 00 00 00 00 d0: 00 00 00 00 00 00 00 00 40 40 00 00 88 00 07 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 88 88 88 88 00 00 00 00 00 00 00 00 00:02.0 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d6] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d6 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 44 44 44 44 44 44 44 44 44 44 44 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 44 44 44 00 44 04 44 04 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 44 44 44 00 44 04 44 04 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 40 40 40 40 40 40 40 40 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.0 ISA bridge [0601]: nVidia Corporation MCP73 LPC Bridge [10de:07d7] (rev a2) Subsystem: nVidia Corporation MCP73 LPC Bridge [10de:07d7] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Region 0: I/O ports at 4f00 [size=256] 00: de 10 d7 07 0f 00 a0 20 a2 00 01 06 00 00 80 00 10: 01 4f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: de 10 d7 07 00 00 d0 fe fa 3e ff 00 fa 3e ff 00 50: fa 3e ff 00 00 5a 62 02 00 00 00 05 2f 00 3c 01 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 00 ff ff cd 00 00 00 00 00 44 59 00 00 c0 00 80: 09 20 00 10 0d 18 00 00 00 00 40 01 ff 00 aa aa 90: 00 08 00 00 ff ff 3f 3f 00 00 00 00 00 00 00 00 a0: 00 00 10 81 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 0a 7f 0a 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 e0: 83 28 28 39 8b 35 00 00 0f 00 c0 40 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:03.1 SMBus [0c05]: nVidia Corporation MCP73 SMBus [10de:07d8] (rev a1) Subsystem: Micro-Star International Co., Ltd. Device [1462:7399] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at 4900 [size=64] Region 4: I/O ports at 4d00 [size=64] Region 5: I/O ports at 4e00 [size=64] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: nForce2_smbus Kernel modules: i2c-nforce2 00: de 10 d8 07 01 00 b0 00 a1 00 05 0c 00 00 80 00 10: 01 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 4d 00 00 01 4e 00 00 00 00 00 00 62 14 99 73 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 00 00 40: 62 14 99 73 01 00 02 c0 00 00 00 00 73 8b 11 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 40 00 00 01 44 00 00 01 48 00 00 00 10 d0 fe 70: 00 20 d0 fe 00 00 f8 f9 00 00 00 00 01 00 00 00 80: 00 40 d0 fe 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: d4 30 80 01 01 00 00 00 21 82 02 02 0d 0d 19 19 d0: 40 00 40 01 1d 00 14 0a 05 00 00 00 00 00 00 00 e0: 80 18 00 17 00 48 02 60 80 22 00 00 00 44 44 00 f0: 02 ff 1e bf 01 00 00 80 10 00 00 00 00 00 00 00 00:03.2 RAM memory [0500]: nVidia Corporation MCP73 Memory Controller [10de:07d9] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d9 07 00 04 a0 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: de 10 d7 07 00 00 00 00 10 02 80 10 10 00 10 10 50: 10 10 10 10 00 00 00 00 06 00 00 00 10 42 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 01 00 40 88 10 02 90: 21 84 10 0c a5 94 62 0a 85 98 52 0a c5 98 73 0e a0: 27 9d 63 12 27 a1 73 00 20 21 00 00 00 00 00 00 b0: 00 00 00 04 84 10 01 00 e0 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.3 Co-processor [0b40]: nVidia Corporation MCP73 Co-processor [10de:07da] (rev a2) Subsystem: Micro-Star International Co., Ltd. Device [1462:7399] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 7 Region 0: Memory at f9f80000 (32-bit, non-prefetchable) [size=512K] 00: de 10 da 07 06 00 a0 00 a2 00 40 0b 00 00 80 00 10: 00 00 f8 f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 99 73 30: 00 00 00 00 00 00 00 00 00 00 00 00 07 02 03 01 40: 62 14 99 73 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 f8 f9 00 00 00 00 00 00 00 00 80: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 02 a8 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.4 RAM memory [0500]: nVidia Corporation MCP73 Memory Controller [10de:07c8] (rev a1) Subsystem: nVidia Corporation Device [10de:07d7] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 c8 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 d7 07 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: de 10 d7 07 05 05 00 08 00 00 02 00 05 05 80 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 a3 11 b7 2b 60: e6 42 16 ce ff ff 00 00 61 00 0e 00 ff ff 00 00 70: 70 00 0e 00 76 41 16 80 03 2e 00 80 03 1a 00 00 80: 00 00 00 80 55 00 00 00 77 77 77 00 00 00 00 00 90: 7f 7f c0 00 7f 00 e0 00 00 70 18 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 36 59 30 90 01 20 00 72 04 01 00 00 36 59 00 10 c0: ff ff ff ff ff bf ff ff 00 00 00 00 88 80 aa 00 d0: 00 21 09 00 01 00 00 00 00 00 00 00 00 00 00 00 e0: 80 00 39 00 92 14 00 00 80 00 89 90 a8 01 93 00 f0: 1b 1b 1b 1b 00 ff 21 00 99 99 aa aa 00 00 0f 00 00:04.0 USB Controller [0c03]: nVidia Corporation GeForce 7100/nForce 630i USB [10de:07fe] (rev a1) (prog-if 10) Subsystem: Micro-Star International Co., Ltd. Device [1462:7399] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 21 Region 0: Memory at f9f7f000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ohci_hcd 00: de 10 fe 07 07 00 b0 00 a1 10 03 0c 00 00 80 00 10: 00 f0 f7 f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 99 73 30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 03 01 40: 62 14 99 73 01 00 02 fe 00 00 00 00 00 00 00 00 50: 13 00 00 00 1d 47 40 00 10 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:04.1 USB Controller [0c03]: nVidia Corporation MCP73 [nForce 630i] USB 2.0 Controller (EHCI) [10de:056a] (rev a1) (prog-if 20) Subsystem: Micro-Star International Co., Ltd. Device [1462:7399] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 22 Region 0: Memory at f9f7ec00 (32-bit, non-prefetchable) [size=256] Capabilities: [44] Debug port: BAR=1 offset=0098 Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ehci_hcd 00: de 10 6a 05 06 00 b0 00 a1 20 03 0c 00 00 80 00 10: 00 ec f7 f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 99 73 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 02 03 01 40: 62 14 99 73 0a 80 98 20 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 20 20 01 00 00 60 18 85 03 3c 0a 01 00 00 00 00 70: 00 00 08 00 00 10 20 80 89 3d b6 22 77 25 74 00 80: 01 00 02 fe 00 00 00 00 00 00 00 00 15 16 00 00 90: 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 b0: 00 00 22 22 11 00 00 00 ff 03 00 00 00 00 00 00 c0: 10 10 2d 0d 00 00 00 00 00 00 00 00 00 00 00 00 d0: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:08.0 IDE interface [0101]: nVidia Corporation MCP73 IDE [10de:056c] (rev a1) (prog-if 8a [Master SecP PriP]) Subsystem: Micro-Star International Co., Ltd. Device [1462:7399] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1] Region 4: I/O ports at ffa0 [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pata_amd 00: de 10 6c 05 05 00 b0 00 a1 8a 01 01 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: a1 ff 00 00 00 00 00 00 00 00 00 00 62 14 99 73 30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 03 01 40: 62 14 99 73 01 00 02 00 00 00 00 00 00 00 00 00 50: 02 f0 00 00 00 00 00 00 99 99 20 20 0a 00 a8 20 60: 00 00 c6 c0 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 f8 3e 20 00 00 06 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 01 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:09.0 Audio device [0403]: nVidia Corporation MCP73 High Definition Audio [10de:07fc] (rev a1) Subsystem: Micro-Star International Co., Ltd. Device [1462:399a] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (500ns min, 1250ns max) Interrupt: pin A routed to IRQ 23 Region 0: Memory at f9f78000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask+ 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Masking: 00000000 Pending: 00000000 Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: de 10 fc 07 06 00 b0 00 a1 00 03 04 00 00 00 00 10: 00 80 f7 f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 9a 39 30: 00 00 00 00 44 00 00 00 00 00 00 00 07 01 02 05 40: 62 14 9a 39 01 50 02 c0 00 00 00 00 01 01 0f 00 50: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 0f 00 00 00 08 00 02 a8 70: 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 0f 40 00 a2 00 00 01 00 01 00 00 20 00 00 00 00 f0: 00 00 00 00 00 00 00 47 00 29 00 00 00 00 00 00 00:0a.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056d] (rev a1) (prog-if 01) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: fff00000-000fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr+ DiscTmrStat- DiscTmrSERREn- Capabilities: [b8] Subsystem: nVidia Corporation Device [10de:07d7] 00: de 10 6d 05 04 00 b0 00 a1 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 20 f0 00 80 22 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 b8 00 00 00 00 00 00 00 00 00 02 02 40: 00 00 73 07 00 00 00 00 3f 07 00 00 00 00 44 01 50: 00 00 00 00 00 00 00 00 fc 1f ff 1f 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 07 00 00 00 00 e0 ff 00 00 00 00 08 00 00 a8 90: 00 00 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00 a0: 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 ff ff 00 00 0d 00 00 00 de 10 d7 07 c0: de 10 d7 07 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0b.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056e] (rev a1) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fa000000-febfffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Subsystem: nVidia Corporation Device [10de:07d7] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000fee0300c Data: 4149 Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- Slot # 1, PowerLimit 75.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100] Virtual Channel <?> Kernel driver in use: pcieport Kernel modules: shpchp 00: de 10 6e 05 07 04 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 e1 e1 00 00 20: 00 fa b0 fe 01 d0 f1 df 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 1a 00 40: 0d 48 00 00 de 10 d7 07 01 50 02 f8 00 00 00 00 50: 05 80 83 00 0c 30 e0 fe 00 00 00 00 49 41 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 21 80 00 00 10 28 01 00 01 3d 11 00 90: 00 00 41 30 80 25 08 00 c0 01 48 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0c.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056f] (rev a1) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Subsystem: nVidia Corporation Device [10de:07d7] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000fee0300c Data: 4151 Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- Slot # 2, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet+ LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100] Virtual Channel <?> Kernel driver in use: pcieport Kernel modules: shpchp 00: de 10 6f 05 04 04 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 02 00 40: 0d 48 00 00 de 10 d7 07 01 50 02 f8 00 00 00 00 50: 05 80 83 00 0c 30 e0 fe 00 00 00 00 51 41 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 21 80 00 00 10 28 00 00 11 3c 11 01 90: 00 00 11 10 00 05 10 00 c0 01 08 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0d.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056f] (rev a1) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Subsystem: nVidia Corporation Device [10de:07d7] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000fee0300c Data: 4159 Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- Slot # 3, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet+ LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100] Virtual Channel <?> Kernel driver in use: pcieport Kernel modules: shpchp 00: de 10 6f 05 04 04 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 02 00 40: 0d 48 00 00 de 10 d7 07 01 50 02 f8 00 00 00 00 50: 05 80 83 00 0c 30 e0 fe 00 00 00 00 59 41 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 21 80 00 00 10 28 00 00 11 3c 11 02 90: 00 00 11 10 00 05 18 00 c0 01 08 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0e.0 IDE interface [0101]: nVidia Corporation MCP73 IDE [10de:07f0] (rev a2) (prog-if 85 [Master SecO PriO]) Subsystem: Micro-Star International Co., Ltd. Device [1462:7399] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 27 Region 0: I/O ports at d480 [size=8] Region 1: I/O ports at d400 [size=4] Region 2: I/O ports at d080 [size=8] Region 3: I/O ports at d000 [size=4] Region 4: I/O ports at cc00 [size=16] Region 5: Memory at f9f7c000 (32-bit, non-prefetchable) [size=8K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [8c] SATA HBA <?> Capabilities: [b0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/3 Enable+ Address: 00000000fee0300c Data: 4169 Kernel driver in use: ahci 00: de 10 f0 07 07 04 b0 00 a2 85 01 01 00 00 00 00 10: 81 d4 00 00 01 d4 00 00 81 d0 00 00 01 d0 00 00 20: 01 cc 00 00 00 c0 f7 f9 00 00 00 00 62 14 99 73 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01 40: 62 14 99 73 01 8c 02 00 00 00 00 00 00 00 00 00 50: 0f 68 38 60 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 0f 06 42 00 00 00 00 70: 2c 78 c4 40 00 00 00 00 02 00 00 08 20 00 20 78 80: 0f 00 00 c0 00 00 00 00 00 00 00 00 12 b0 10 00 90: 5f 02 00 00 00 00 00 00 03 9f 22 a3 01 01 00 00 a0: 6e 5a 00 3f 00 00 00 00 00 00 00 00 33 34 00 02 b0: 05 00 87 00 0c 30 e0 fe 00 00 00 00 69 41 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 02 a8 d0: 00 00 00 00 00 00 00 00 00 00 40 00 00 00 00 00 e0: 00 00 00 00 00 00 3f 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 01 1e 00 00 00 00 00 00:0f.0 Ethernet controller [0200]: nVidia Corporation MCP73 Ethernet [10de:07dc] (rev a2) Subsystem: Micro-Star International Co., Ltd. Device [1462:7399] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (250ns min, 5000ns max) Interrupt: pin A routed to IRQ 28 Region 0: Memory at f9f77000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at c880 [size=8] Region 2: Memory at f9f7e800 (32-bit, non-prefetchable) [size=256] Region 3: Memory at f9f7e400 (32-bit, non-prefetchable) [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable+ DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask+ 64bit+ Queue=0/3 Enable+ Address: 00000000fee0300c Data: 4189 Masking: 000000fe Pending: 00000000 Kernel driver in use: forcedeth Kernel modules: forcedeth 00: de 10 dc 07 07 04 b0 00 a2 00 00 02 00 00 00 00 10: 00 70 f7 f9 81 c8 00 00 00 e8 f7 f9 00 e4 f7 f9 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 99 73 30: 00 00 00 00 44 00 00 00 00 00 00 00 07 01 01 14 40: 62 14 99 73 01 50 02 fe 00 01 00 00 08 00 00 00 50: 05 00 87 01 0c 30 e0 fe 00 00 00 00 89 41 00 00 60: fe 00 00 00 00 00 00 00 ff 00 00 00 08 00 02 a8 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 30 00 00 00 02 01 00 00 02 00 00 08 02:00.0 VGA compatible controller [0300]: nVidia Corporation G84 [GeForce 8600 GTS] [10de:0400] (rev a1) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 19 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at fa000000 (64-bit, non-prefetchable) [size=32M] Region 5: I/O ports at ec00 [size=128] [virtual] Expansion ROM at febe0000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [68] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [78] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Virtual Channel <?> Capabilities: [128] Power Budgeting <?> Capabilities: [600] Vendor Specific Information <?> Kernel driver in use: nvidia Kernel modules: nvidia-current, nouveau, nvidiafb 00: de 10 00 04 07 00 10 00 a1 00 00 03 00 00 00 00 10: 00 00 00 fd 0c 00 00 d0 00 00 00 00 04 00 00 fa 20: 00 00 00 00 01 ec 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 60 00 00 00 00 00 00 00 0a 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 00 00 01 00 00 00 ce d6 23 00 00 00 00 00 60: 01 68 02 00 00 00 00 00 05 78 80 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 10 00 01 00 e0 84 2c 01 80: 10 29 00 00 01 3d 01 00 08 00 41 10 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ~$ sudo superiotool -deV superiotool r3844 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x2e... Found ITE IT8718F (id=0x8718, rev=0x4) at 0x2e Register dump: idx 20 21 22 23 24 2b val 87 18 04 11 00 00 def 87 18 01 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 val 00 00 00 00 02 00 00 def 00 03 f0 06 02 00 00 LDN 0x01 (COM1) idx 30 60 61 70 f0 f1 f2 f3 val 00 00 00 00 00 50 00 7f def 00 03 f8 04 00 50 00 7f LDN 0x02 (COM2) idx 30 60 61 70 f0 f1 f2 f3 val 00 02 f8 03 00 50 00 7f def 00 02 f8 03 00 50 00 7f LDN 0x03 (Parallel port) idx 30 60 61 62 63 70 74 f0 val 00 03 78 07 78 07 04 0b def 00 03 78 07 78 07 03 03 LDN 0x04 (Environment controller) idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 f6 val 01 0a 10 0a 00 00 80 00 00 00 80 00 ff def 00 02 90 02 30 09 00 00 00 00 00 NA NA LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 71 f0 val 01 00 60 00 64 01 02 00 def 01 00 60 00 64 01 02 00 LDN 0x06 (Mouse) idx 30 70 71 f0 val 01 0c 02 00 def 00 0c 02 00 LDN 0x07 (GPIO) idx 25 26 27 28 29 2a 2c 60 61 62 63 64 65 70 71 72 73 74 b0 b1 b2 b3 b4 b5 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c5 c8 c9 ca cb cc e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe ff val 01 d3 00 00 00 20 1f 00 00 0a 20 0a 30 00 00 00 00 00 00 00 00 00 00 00 20 00 00 00 00 00 01 d3 00 40 00 00 01 d0 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 3f 00 00 00 def 01 00 00 40 00 00 00 00 00 00 00 00 00 00 00 20 38 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 40 00 00 01 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NA 00 00 00 LDN 0x0a (Consumer IR) idx 30 60 61 70 f0 val 00 00 00 00 06 def 00 03 10 0b 00 Environment controller (0x0a15) Register dump: idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 20 21 22 23 24 25 26 27 28 29 2a 2b 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 50 51 52 53 54 56 57 58 59 5b 5c 5d 5e 5f 60 61 62 63 64 65 68 69 6a 6b 6c 6d 70 71 72 73 74 75 80 81 82 83 88 89 8a 8b 8c 8d 8e 8f 90 91 92 94 95 96 a0 a1 a2 a3 a4 a5 a6 val 19 10 ff 07 00 00 00 00 00 80 14 c9 07 3d ff ff fe ff ff 70 d7 40 40 40 01 ff ff ff ff ff 57 4c c2 c1 c0 06 08 be ca 1f 27 22 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 31 7f 7f 7f fb 00 90 00 12 60 00 00 00 7f 7f 7f 00 00 64 7f 7f 7f 00 00 64 7f 7f 7f 00 00 64 00 00 00 00 00 00 00 00 00 00 02 00 ff 00 00 ff 00 00 00 00 00 00 00 00 00 def 18 00 00 00 00 00 00 00 00 80 40 09 00 NA NA NA NA NA NA 07 50 MM MM MM NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA 00 00 7f 7f 7f 00 00 90 00 12 00 00 00 00 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f 7f 7f 7f 00 00 7f NA NA NA NA 00 00 00 00 00 00 02 00 ff 00 00 ff 00 00 00 00 00 00 00 00 00 Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff

2 1

data for Elitegroup ECS GF8100VM-M3 v1.0
by marcel partap 18 Feb '10

18 Feb '10

..following up to > [20:06] <twice11 <#twice11>> !summary eMPee584 latest bios, specs etc available @ http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=881&… aight cheers ;)

2 1

[PATCH] Refactor MCP SPI detection
by Carl-Daniel Hailfinger 18 Feb '10

18 Feb '10

Refactor MCP SPI detection: - Set supported buses based on ISA bridge reg 0x8a - Use MCP55 chipset enable only if LPC is detected - Allow LPC on MCP61 - Eliminate duplicated code where possible Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-mcp_spi_detect_refactor/chipset_enable.c =================================================================== --- flashrom-mcp_spi_detect_refactor/chipset_enable.c (Revision 905) +++ flashrom-mcp_spi_detect_refactor/chipset_enable.c (Arbeitskopie) @@ -1054,30 +1054,39 @@ return 0; } -/** - * The MCP67 code is guesswork based on cleanroom reverse engineering. - * Due to that, it only reads info and doesn't change any settings. - * It is assumed that LPC chips need the MCP55 code and SPI chips need the - * code provided in this function. Until we know for sure, call - * enable_flash_mcp55 from this function. Warning: enable_flash_mcp55 - * might make SPI flash inaccessible. The same caveat applies to SPI init - * for LPC flash. +/* This is a shot in the dark. Even if the code is totally bogus for some + * chipsets, users will at least start to send in reports. */ -static int enable_flash_mcp67(struct pci_dev *dev, const char *name) +static int enable_flash_mcp6x_7x_common(struct pci_dev *dev, const char *name) { - int result = 0; uint8_t byte; uint16_t status; + char *busname; uint32_t mcp_spibaraddr; void *mcp_spibar; struct pci_dev *smbusdev; + msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); + /* dev is the ISA bridge. No idea what the stuff below does. */ byte = pci_read_byte(dev, 0x8a); - msg_pdbg("ISA bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 is " - "%i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); - msg_pdbg("Guessed flash bus type is %s\n", ((byte >> 5) & 0x3) == 0x2 ? - "SPI" : "unknown, probably LPC"); + msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " + "is %i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); + switch ((byte >> 5) & 0x3) { + case 0x0: + buses_supported = CHIP_BUSTYPE_LPC; + break; + case 0x2: + buses_supported = CHIP_BUSTYPE_SPI; + break; + default: + buses_supported = CHIP_BUSTYPE_UNKNOWN; + break; + } + busname = flashbuses_to_text(buses_supported); + msg_pdbg("Guessed flash bus type is %s\n", busname); + free(busname); + /* Disable the write code for now until we have more info. */ #if 0 byte |= (1 << 6); @@ -1088,8 +1097,9 @@ /* Look for the SMBus device (SMBus PCI class) */ smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); if (!smbusdev) { - msg_perr("ERROR: SMBus device not found. Aborting.\n"); - exit(1); + msg_perr("ERROR: SMBus device not found.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + return 1; } msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", smbusdev->vendor_id, smbusdev->device_id, @@ -1108,7 +1118,7 @@ msg_pdbg("after clearing low bits BAR is at 0x%08x\n", mcp_spibaraddr); /* Accessing a NULL pointer BAR is evil. Don't do it. */ - if (mcp_spibaraddr) { + if (mcp_spibaraddr && (buses_supported == CHIP_BUSTYPE_SPI)) { /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ mcp_spibar = physmap("MCP67 SPI", mcp_spibaraddr, 0x544); @@ -1125,54 +1135,81 @@ status, status & 0x1, (status >> 8) & 0x1); /* FIXME: Remove the physunmap once the SPI driver exists. */ physunmap(mcp_spibar, 0x544); + } else if (!mcp_spibaraddr && (buses_supported & CHIP_BUSTYPE_SPI)) { + msg_pdbg("Strange. MCP SPI BAR is invalid.\n"); + buses_supported &= ~CHIP_BUSTYPE_SPI; + } else if (mcp_spibaraddr && !(buses_supported & CHIP_BUSTYPE_SPI)) { + msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" + " doesn't support SPI.\n"); } else { - msg_pdbg("Strange. MCP67 SPI BAR is invalid.\n"); + msg_pdbg("MCP SPI not used.\n"); } msg_pinfo("Please send the output of \"flashrom -V\" to " "flashrom(a)flashrom.org to help us finish support for your " "chipset. Thanks.\n"); - /* Not sure if this is still correct. No docs as usual. */ - result = enable_flash_mcp55(dev, name); + return 0; +} +/** + * The MCP67 code is guesswork based on cleanroom reverse engineering. + * Due to that, it only reads info and doesn't change any settings. + * It is assumed that LPC chips need the MCP55 code and SPI chips need the + * code provided in this function. Until we know for sure, call + * enable_flash_mcp55 from this function. Warning: enable_flash_mcp55 + * might make SPI flash inaccessible. The same caveat applies to SPI init + * for LPC flash. + */ +static int enable_flash_mcp67(struct pci_dev *dev, const char *name) +{ + int result = 0; + + result = enable_flash_mcp6x_7x_common(dev, name); + if (result) + return result; + + /* Not sure if this is correct. No docs as usual. */ + switch (buses_supported) { + case CHIP_BUSTYPE_LPC: + result = enable_flash_mcp55(dev, name); + break; + case CHIP_BUSTYPE_SPI: + msg_pinfo("SPI on this chipset is not supported yet.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; + default: + msg_pinfo("Something went wrong with bus type detection.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; + } + return result; } -/* This is a shot in the dark. Even if the code is totally bogus for some - * chipsets, users will at least start to send in reports. - */ static int enable_flash_mcp7x(struct pci_dev *dev, const char *name) { - uint8_t byte; - uint32_t mcp_spibaraddr; - struct pci_dev *smbusdev; + int result = 0; - msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); + result = enable_flash_mcp6x_7x_common(dev, name); + if (result) + return result; - /* dev is the ISA bridge. No idea what the stuff below does. */ - byte = pci_read_byte(dev, 0x8a); - msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " - "is %i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); - - /* Look for the SMBus device (SMBus PCI class) */ - smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); - if (!smbusdev) { - msg_perr("ERROR: SMBus device not found. Aborting.\n"); - exit(1); + /* Not sure if this is correct. No docs as usual. */ + switch (buses_supported) { + case CHIP_BUSTYPE_LPC: + msg_pinfo("LPC on this chipset is not supported yet.\n"); + break; + case CHIP_BUSTYPE_SPI: + msg_pinfo("SPI on this chipset is not supported yet.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; + default: + msg_pinfo("Something went wrong with bus type detection.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; } - msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", - smbusdev->vendor_id, smbusdev->device_id, - smbusdev->bus, smbusdev->dev, smbusdev->func); - /* Locate the BAR where the SPI interface lives. */ - mcp_spibaraddr = pci_read_long(smbusdev, 0x74); - msg_pdbg("SPI BAR is at 0x%08x, ", mcp_spibaraddr); - - msg_pinfo("Please send the output of \"flashrom -V\" to " - "flashrom(a)flashrom.org to help us finish support for your " - "chipset. Thanks.\n"); - - return 0; + return result; } static int enable_flash_ht1000(struct pci_dev *dev, const char *name) @@ -1314,10 +1351,10 @@ {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, - {0x10de, 0x03e1, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, - {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, - {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, + {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, + {0x10de, 0x03e1, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, + {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, + {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 6

[commit] r906 - trunk
by repository service 18 Feb '10

18 Feb '10

Author: hailfinger Date: Thu Feb 18 13:24:38 2010 New Revision: 906 URL: http://flashrom.org/trac/coreboot/changeset/906 Log: Refactor MCP SPI detection: - Set supported buses based on ISA bridge reg 0x8a - Use MCP55 chipset enable only if LPC is detected - Allow LPC on MCP61 - Eliminate duplicated code where possible Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Tue Feb 16 01:49:50 2010 (r905) +++ trunk/chipset_enable.c Thu Feb 18 13:24:38 2010 (r906) @@ -1054,31 +1054,41 @@ return 0; } -/** - * The MCP67 code is guesswork based on cleanroom reverse engineering. - * Due to that, it only reads info and doesn't change any settings. - * It is assumed that LPC chips need the MCP55 code and SPI chips need the - * code provided in this function. Until we know for sure, call - * enable_flash_mcp55 from this function. Warning: enable_flash_mcp55 - * might make SPI flash inaccessible. The same caveat applies to SPI init - * for LPC flash. +/* This is a shot in the dark. Even if the code is totally bogus for some + * chipsets, users will at least start to send in reports. */ -static int enable_flash_mcp67(struct pci_dev *dev, const char *name) +static int enable_flash_mcp6x_7x_common(struct pci_dev *dev, const char *name) { - int result = 0; + int ret = 0; uint8_t byte; uint16_t status; + char *busname; uint32_t mcp_spibaraddr; void *mcp_spibar; struct pci_dev *smbusdev; + msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); + /* dev is the ISA bridge. No idea what the stuff below does. */ byte = pci_read_byte(dev, 0x8a); - msg_pdbg("ISA bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 is " - "%i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); - msg_pdbg("Guessed flash bus type is %s\n", ((byte >> 5) & 0x3) == 0x2 ? - "SPI" : "unknown, probably LPC"); - /* Disable the write code for now until we have more info. */ + msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " + "is %i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); + switch ((byte >> 5) & 0x3) { + case 0x0: + buses_supported = CHIP_BUSTYPE_LPC; + break; + case 0x2: + buses_supported = CHIP_BUSTYPE_SPI; + break; + default: + buses_supported = CHIP_BUSTYPE_UNKNOWN; + break; + } + busname = flashbuses_to_text(buses_supported); + msg_pdbg("Guessed flash bus type is %s\n", busname); + free(busname); + + /* Force enable SPI and disable LPC? Not a good idea. */ #if 0 byte |= (1 << 6); byte &= ~(1 << 5); @@ -1088,8 +1098,15 @@ /* Look for the SMBus device (SMBus PCI class) */ smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); if (!smbusdev) { - msg_perr("ERROR: SMBus device not found. Aborting.\n"); - exit(1); + if (buses_supported & CHIP_BUSTYPE_SPI) { + msg_perr("ERROR: SMBus device not found. Not enabling " + "SPI.\n"); + buses_supported &= ~CHIP_BUSTYPE_SPI; + ret = 1; + } else { + msg_pinfo("Odd. SMBus device not found.\n"); + } + goto out_msg; } msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", smbusdev->vendor_id, smbusdev->device_id, @@ -1108,7 +1125,7 @@ msg_pdbg("after clearing low bits BAR is at 0x%08x\n", mcp_spibaraddr); /* Accessing a NULL pointer BAR is evil. Don't do it. */ - if (mcp_spibaraddr) { + if (mcp_spibaraddr && (buses_supported == CHIP_BUSTYPE_SPI)) { /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ mcp_spibar = physmap("MCP67 SPI", mcp_spibaraddr, 0x544); @@ -1125,54 +1142,84 @@ status, status & 0x1, (status >> 8) & 0x1); /* FIXME: Remove the physunmap once the SPI driver exists. */ physunmap(mcp_spibar, 0x544); + } else if (!mcp_spibaraddr && (buses_supported & CHIP_BUSTYPE_SPI)) { + msg_pdbg("Strange. MCP SPI BAR is invalid.\n"); + buses_supported &= ~CHIP_BUSTYPE_SPI; + ret = 1; + } else if (mcp_spibaraddr && !(buses_supported & CHIP_BUSTYPE_SPI)) { + msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" + " doesn't have SPI enabled.\n"); } else { - msg_pdbg("Strange. MCP67 SPI BAR is invalid.\n"); + msg_pdbg("MCP SPI is not used.\n"); } +out_msg: msg_pinfo("Please send the output of \"flashrom -V\" to " "flashrom(a)flashrom.org to help us finish support for your " "chipset. Thanks.\n"); - /* Not sure if this is still correct. No docs as usual. */ - result = enable_flash_mcp55(dev, name); - - return result; + return ret; } -/* This is a shot in the dark. Even if the code is totally bogus for some - * chipsets, users will at least start to send in reports. +/** + * The MCP61/MCP67 code is guesswork based on cleanroom reverse engineering. + * Due to that, it only reads info and doesn't change any settings. + * It is assumed that LPC chips need the MCP55 code and SPI chips need the + * code provided in enable_flash_mcp6x_7x_common. Until we know for sure, call + * enable_flash_mcp55 from this function only if enable_flash_mcp6x_7x_common + * indicates the flash chip is LPC. Warning: enable_flash_mcp55 + * might make SPI flash inaccessible. The same caveat applies to SPI init + * for LPC flash. */ -static int enable_flash_mcp7x(struct pci_dev *dev, const char *name) +static int enable_flash_mcp67(struct pci_dev *dev, const char *name) { - uint8_t byte; - uint32_t mcp_spibaraddr; - struct pci_dev *smbusdev; - - msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); - - /* dev is the ISA bridge. No idea what the stuff below does. */ - byte = pci_read_byte(dev, 0x8a); - msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " - "is %i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); + int result = 0; - /* Look for the SMBus device (SMBus PCI class) */ - smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); - if (!smbusdev) { - msg_perr("ERROR: SMBus device not found. Aborting.\n"); - exit(1); + result = enable_flash_mcp6x_7x_common(dev, name); + if (result) + return result; + + /* Not sure if this is correct. No docs as usual. */ + switch (buses_supported) { + case CHIP_BUSTYPE_LPC: + result = enable_flash_mcp55(dev, name); + break; + case CHIP_BUSTYPE_SPI: + msg_pinfo("SPI on this chipset is not supported yet.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; + default: + msg_pinfo("Something went wrong with bus type detection.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; } - msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", - smbusdev->vendor_id, smbusdev->device_id, - smbusdev->bus, smbusdev->dev, smbusdev->func); - /* Locate the BAR where the SPI interface lives. */ - mcp_spibaraddr = pci_read_long(smbusdev, 0x74); - msg_pdbg("SPI BAR is at 0x%08x, ", mcp_spibaraddr); + return result; +} - msg_pinfo("Please send the output of \"flashrom -V\" to " - "flashrom(a)flashrom.org to help us finish support for your " - "chipset. Thanks.\n"); +static int enable_flash_mcp7x(struct pci_dev *dev, const char *name) +{ + int result = 0; - return 0; + result = enable_flash_mcp6x_7x_common(dev, name); + if (result) + return result; + + /* Not sure if this is correct. No docs as usual. */ + switch (buses_supported) { + case CHIP_BUSTYPE_LPC: + msg_pinfo("LPC on this chipset is not supported yet.\n"); + break; + case CHIP_BUSTYPE_SPI: + msg_pinfo("SPI on this chipset is not supported yet.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; + default: + msg_pinfo("Something went wrong with bus type detection.\n"); + buses_supported = CHIP_BUSTYPE_NONE; + break; + } + + return result; } static int enable_flash_ht1000(struct pci_dev *dev, const char *name) @@ -1314,10 +1361,10 @@ {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, - {0x10de, 0x03e1, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, - {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, - {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, + {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, + {0x10de, 0x03e1, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, + {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, + {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp67}, {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp7x},

1 0

Report (as requested in IRC channel)
by Andrea Cucchi 17 Feb '10

17 Feb '10

As I said in the IRC channel I had this output trying to fash my bios. andrea@andrea-desktop:~$ sudo flashrom \-w W7046IM7.21C flashrom v0.9.1-r905 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... OK. This chipset supports the following protocols: FWH. Disabling flash write protection for board "MSI MS-7046"... Intel ICH LPC Bridge: Raising GPIO19. OK. Calibrating delay loop... OK. Found chip "Winbond W39V040FA" (512 KB, FWH) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x49, failed byte count from 0x00000000-0x00000fff: 0x4ab ERASE FAILED! ERASE FAILED at 0x00000000! Expected=0xff, Read=0x49, failed byte count from 0x00000000-0x0000ffff: 0xc9f ERASE FAILED! ERASE FAILED at 0x00000000! Expected=0xff, Read=0x49, failed byte count from 0x00000000-0x0007ffff: 0x53e8d ERASE FAILED! FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! I already know that my BIOS is okay (verified it). Here is my mobo. Mobo: MSI MS-7046 Here is where I found the last BIOS http://www1.medion.de/downloads/index.pl?op=detail&id=2360&type=treiber&lan… http://www1.medion.de/downloads/index.pl?op=detail&id=2360&type=treiber&lan… (here is the version I downloaded, but I think it's the same) And here is the requested output of 'flashrom -V', 'lspci -nnvvvxxx', 'superiotool -deV' andrea@andrea-desktop:~/Scrivania$ sudo flashrom -V flashrom v0.9.1-r905 No coreboot table found. DMI string 0: "MEDIONPC" DMI string 1: "MS-7046" DMI string 2: " " DMI string 3: "MICRO-STAR INTERNATIONAL CO., LTD" DMI string 4: "MS-7046" DMI string 5: " " Found chipset "Intel ICH6/ICH6R", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: FWH. Disabling flash write protection for board "MSI MS-7046"... Intel ICH LPC Bridge: Raising GPIO19. OK. Calibrating delay loop... 839M loops per second, 100 myus = 198 us. OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ASD AE49F2008, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C020, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A25L40PT, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for AMIC A25L40PU, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A29002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A29040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for AMIC A49LF040A, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for EMST F49B002UA, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Eon EN25B05, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B05T, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B10T, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B20T, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B40T, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B80T, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B16T, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B32T, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25B64T, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Intel 28F004S5, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for Macronix MX25L512, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC Pm29F002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for PMC Pm29F002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xda, id2 0x34 Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0xda, id2 0x34 Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Sharp LHF00L04, 1024 KB: probe_49lfxxxc: id1 0x49, id2 0x4d Probing for Spansion S25FL008A, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29EE010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29LE010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29EE020A, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST29LE020, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF512, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF010A, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF020A, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39SF040, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF512, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF010, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF020, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF040, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST39VF080, 1024 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0xda, id2 0x34 Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0xda, id2 0x34 Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0xda, id2 0x34 Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0x49, id2 0x4d Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0xda, id2 0x34 Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0x49, id2 0x4d Probing for SST SST49LF016C, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF020A, 256 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF040, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF040B, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF080A, 1024 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SST SST49LF160C, 2048 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for ST M25P05-A, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29F040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29F400BT, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29W010B, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29W040B, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M29W512B, 64 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0x72, id2 0x41 Probing for ST M50FW016, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0x49, id2 0x4d Probing for ST M50LPW116, 2048 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W25x10, 128 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x32, 4096 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W25x64, 8192 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W29C020C, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W29C040P, 512 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W29EE011, 128 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W39V040A, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W39V040B, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W39V040C, 512 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0xda, id2 0x34 Found chip "Winbond W39V040FA" (512 KB, FWH) at physical address 0xfff80000. Probing for Winbond W39V080A, 1024 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W49F002U, 256 KB: skipped. Host bus type FWH and chip bus type Parallel are incompatible. Probing for Winbond W49V002A, 256 KB: skipped. Host bus type FWH and chip bus type LPC are incompatible. Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0xda, id2 0x34 Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xda, id2 0x34 Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xda, id2 0x34 Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type FWH and chip bus type SPI are incompatible. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified. andrea@andrea-desktop:~$ lspci -nnvvvxxx 00:00.0 Host bridge [0600]: Intel Corporation 82915G/P/GV/GL/PL/910GL Memory Controller Hub [8086:2580] (rev 04) Subsystem: Intel Corporation 82915G/P/GV/GL/PL/910GL Memory Controller Hub [8086:2580] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: <access denied> Kernel modules: intel-agp 00: 86 80 80 25 06 00 90 20 04 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 80 25 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 00:01.0 PCI bridge [0604]: Intel Corporation 82915G/P/GV/GL/PL/910GL PCI Express Root Port [8086:2581] (rev 04) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: c8000000-d7ffffff Prefetchable memory behind bridge: 80000000-800fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: 86 80 81 25 07 05 10 00 04 00 04 06 08 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 00 00 20: 00 c8 f0 d7 00 80 00 80 00 00 00 00 00 00 00 00 30: 00 00 00 00 88 00 00 00 00 00 00 00 05 01 0a 00 00:1b.0 Audio device [0403]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller [8086:2668] (rev 03) Subsystem: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller [8086:2668] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at d8100000 (64-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: 86 80 68 26 06 00 10 00 03 00 03 04 08 00 00 00 10: 04 00 10 d8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 68 26 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 00 00 00:1c.0 PCI bridge [0604]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1 [8086:2660] (rev 03) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: 86 80 60 26 07 05 10 00 03 00 04 06 08 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 20 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 05 01 02 00 00:1d.0 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1 [8086:2658] (rev 03) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 4: I/O ports at e300 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 58 26 05 00 80 02 03 00 03 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 e3 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 01 00 00 00:1d.1 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2 [8086:2659] (rev 03) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 19 Region 4: I/O ports at e000 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 59 26 05 00 80 02 03 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 e0 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 02 00 00 00:1d.2 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3 [8086:265a] (rev 03) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at e100 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 5a 26 05 00 80 02 03 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 e1 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 03 00 00 00:1d.3 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4 [8086:265b] (rev 03) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 16 Region 4: I/O ports at e200 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 5b 26 05 00 80 02 03 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 e2 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 04 00 00 00:1d.7 USB Controller [0c03]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller [8086:265c] (rev 03) (prog-if 20) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 0: Memory at d8104000 (32-bit, non-prefetchable) [size=1K] Capabilities: <access denied> Kernel driver in use: ehci_hcd 00: 86 80 5c 26 06 00 90 02 03 20 03 0c 00 00 00 00 10: 00 40 10 d8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 50 00 00 00 00 00 00 00 03 01 00 00 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev d3) (prog-if 01) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=32 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: d8000000-d80fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> 00: 86 80 4e 24 07 01 10 00 d3 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 03 20 d0 d0 80 22 20: 00 d8 00 d8 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 02 00 00:1f.0 ISA bridge [0601]: Intel Corporation 82801FB/FR (ICH6/ICH6R) LPC Interface Bridge [8086:2640] (rev 03) Subsystem: Intel Corporation 82801FB/FR (ICH6/ICH6R) LPC Interface Bridge [8086:2640] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Kernel modules: iTCO_wdt, intel-rng 00: 86 80 40 26 07 01 00 02 03 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 40 26 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:1f.1 IDE interface [0101]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller [8086:266f] (rev 03) (prog-if 8a [Master SecP PriP]) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 18 Region 0: I/O ports at 01f0 [size=8] Region 1: I/O ports at 03f4 [size=1] Region 2: I/O ports at 0170 [size=8] Region 3: I/O ports at 0374 [size=1] Region 4: I/O ports at f000 [size=16] Kernel driver in use: ata_piix 00: 86 80 6f 26 05 00 80 02 03 8a 01 01 00 00 00 00 10: 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00 20: 01 f0 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00:1f.2 IDE interface [0101]: Intel Corporation 82801FB/FW (ICH6/ICH6W) SATA Controller [8086:2651] (rev 03) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 19 Region 0: I/O ports at e400 [size=8] Region 1: I/O ports at e500 [size=4] Region 2: I/O ports at e600 [size=8] Region 3: I/O ports at e700 [size=4] Region 4: I/O ports at e800 [size=16] Capabilities: <access denied> Kernel driver in use: ata_piix 00: 86 80 51 26 05 00 b0 02 03 8f 01 01 00 00 00 00 10: 01 e4 00 00 01 e5 00 00 01 e6 00 00 01 e7 00 00 20: 01 e8 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 70 00 00 00 00 00 00 00 0b 02 00 00 00:1f.3 SMBus [0c05]: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller [8086:266a] (rev 03) Subsystem: Micro-Star International Co., Ltd. Device [1462:7046] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 11 Region 4: I/O ports at 0500 [size=32] Kernel modules: i2c-i801 00: 86 80 6a 26 01 00 80 02 03 00 05 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 05 00 00 00 00 00 00 00 00 00 00 62 14 46 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 02 00 00 01:00.0 VGA compatible controller [0300]: nVidia Corporation NV43 [GeForce 6600] [10de:0141] (rev a2) Subsystem: LeadTek Research Inc. Device [107d:f334] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 0: Memory at d0000000 (32-bit, non-prefetchable) [size=64M] Region 1: Memory at c8000000 (64-bit, prefetchable) [size=128M] Region 3: Memory at d4000000 (64-bit, non-prefetchable) [size=16M] [virtual] Expansion ROM at 80000000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: nvidia Kernel modules: nvidia, nvidiafb 00: de 10 41 01 07 00 10 00 a2 00 00 03 00 00 00 00 10: 00 00 00 d0 0c 00 00 c8 00 00 00 00 04 00 00 d4 20: 00 00 00 00 00 00 00 00 00 00 00 00 7d 10 34 f3 30: 00 00 00 00 60 00 00 00 00 00 00 00 05 01 00 00 03:03.0 FireWire (IEEE 1394) [0c00]: VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller [1106:3044] (rev 80) (prog-if 10) Subsystem: Micro-Star International Co., Ltd. Device [1462:046d] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (8000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 19 Region 0: Memory at d8000000 (32-bit, non-prefetchable) [size=2K] Region 1: I/O ports at d000 [size=128] Capabilities: <access denied> Kernel driver in use: ohci1394 Kernel modules: firewire-ohci, ohci1394 00: 06 11 44 30 07 00 10 02 80 10 00 0c 08 20 00 00 10: 00 00 00 d8 01 d0 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 6d 04 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 20 03:06.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105/VT6106S [Rhine-III] [1106:3106] (rev 8b) Subsystem: Micro-Star International Co., Ltd. Device [1462:046c] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (750ns min, 2000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 18 Region 0: I/O ports at d100 [size=256] Region 1: Memory at d8001000 (32-bit, non-prefetchable) [size=256] Capabilities: <access denied> Kernel driver in use: via-rhine Kernel modules: via-rhine 00: 06 11 06 31 07 00 10 02 8b 00 00 02 08 20 00 00 10: 01 d1 00 00 00 10 00 d8 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 6c 04 30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 03 08 andrea@andrea-desktop:~$ sudo superiotool -deV superiotool r3844 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xc6fe, id=0x8582 Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0x8285, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Found Winbond W83627THF/THG (id=0x82, rev=0x85) at 0x4e Register dump: idx 20 21 22 23 24 25 26 28 29 2a 2b 2c 2d 2e 2f val 82 85 ff fe c6 00 40 00 00 7c c0 03 01 00 ff def 82 NA ff 00 MM 00 MM 00 00 00 MM MM MM 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 03 3b def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 00 00 00 00 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 80 def 01 00 60 00 64 01 0c 80 LDN 0x07 (GPIO 1, GPIO 5, game port, MIDI port) idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 val 0f 00 00 00 00 00 ff 00 00 ff ff 00 def 00 02 01 03 30 09 ff 00 00 ff 00 00 LDN 0x08 (GPIO 2) idx 30 f0 f1 f2 f3 f4 f5 f6 f7 val 00 ff ff ff 00 ff 00 00 00 def 00 ff 00 00 00 RR 00 00 00 LDN 0x09 (GPIO 3, GPIO 4) idx 30 f0 f1 f2 f3 f4 f5 f6 val 00 ff ff ff 00 ff ff ff def 00 ff 00 00 00 ff 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 00 00 63 00 f0 27 10 00 80 00 00 af 3e 00 00 00 00 00 00 def 00 00 00 00 MM MM 00 00 00 00 00 00 00 00 00 00 00 RR RR LDN 0x0b (Hardware monitor) idx 30 60 61 70 val 01 02 90 00 def 00 00 00 00 Hardware monitor (0x0295) Register dump: idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f val 01 ff 01 58 10 00 3c 03 01 12 01 f0 3c 3c 01 06 01 ff 10 00 00 01 01 3c 43 00 ff ff 24 32 00 e0 71 d1 c4 b8 28 08 80 fa ff 77 f0 00 44 8b 00 40 8c 04 08 61 11 04 0b 00 22 20 0a 08 41 00 00 01 de b9 ff ff 00 00 ff 2d 03 01 c4 50 95 80 5c def RR ff RR ff 00 00 00 00 01 01 01 01 3c 3c 0a 0a RR ff 00 00 00 01 01 3c 43 RR ff ff RR RR NA NA NA NA NA NA NA RR RR NA NA NA NA NA NA NA NA NA NA NA NA NA RR RR RR RR NA NA NA NA NA RR RR 03 00 00 fe ff RR RR 5f NA 03 RR 44 18 15 80 5c LDN 0x00 (Bank 0) idx 50 51 52 53 54 55 56 57 58 59 5d 5e 5f val ff ff 00 ff ff ff 00 80 90 70 0d ff 05 def NA NA NA NA NA NA 00 80 90 70 00 RR RR LDN 0x01 (Bank 1) idx 50 51 52 53 54 55 56 val 3f 80 02 5f 00 64 00 def NA NA 00 4b 00 50 00 LDN 0x02 (Bank 2) idx 50 51 52 53 54 55 56 val 7f 80 02 5f 00 64 00 def NA NA 00 4b 00 50 00 LDN 0x04 (Bank 4) idx 50 51 52 53 54 55 56 59 5a 5b val 00 0f 00 00 00 19 00 ce 39 03 def 00 ff RR 00 00 00 00 00 00 00 LDN 0x05 (Bank 5) idx 50 51 52 53 54 55 56 57 val bc cc 00 00 0c 01 04 80 def NA NA RR RR NA NA NA NA LDN 0x06 (Bank 6) idx 50 val c8 def RR Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Thank you for your attenction!

2 1

JIDA CMOS
by Marc Ferland 17 Feb '10

17 Feb '10

Hi all, I work with kontron based COM boards. We currently use their home (DOS) tools fptup and jidacmos to update the bios of our boards. These tools work correctly but they must be run separatly from the rest of the "factory" tools used to prepare the machines. Our current factory tools use Linux to correctly update the different firmwares and softwares we run on the machines. The only missing part is the BIOS. So I am searching a way to integrate the BIOS update procedure to our standard update procedure to simplify to whole process. That being said, I tried the flashrom utility. I works for updating the BIOS image, but doesn't seem to be able to update the configuration part of the BIOS. The result is an updated BIOS version with a wrong configuration (which fails to boot correctly). Searching a little deeper, I found that to succesfully update the BIOS on these boards, you not only have to update the BIOS image but you also need to "pre-configure" it correctly. This is done by executing the jidacmos DOS utility using the following cmds: jidacmos rtc /clean jidacmos eep /clean So my question is: What is this jidacmos utility? Kontron doesn't give much details about it. You guys have any idea of how I could reproduce the behaviour of the jidacmos utility (cleaning the rtc and EEPROM I suppose)? Any info would be appreciated! Regards, Marc Tech info: Board model: SU9300 Chipset: ICH9M The board uses the: AT25DF321 chip.

3 4

Log from Asus M4N78-Pro
by Vikram Noel Ambrose 16 Feb '10

16 Feb '10

CPU: Phenom X3 710 Mobo: Asus M4N78-Pro Vid1: nforce IGP (unused) Vid2: ATi HD4870 flashrom -V lspci -nnvvvxxx superiotool -deV

1 0

Re: [flashrom] [PATCH] Fix PIIX4 GPO set
by Michael Karcher 16 Feb '10

16 Feb '10

[copied to the mailing list] Am Dienstag, den 16.02.2010, 10:23 -0600 schrieb Zach Stuart: > Here is the latest flashrom -V output. [...] > Disabling flash write protection for board "Intel SE440BX-2"... Port 8037 was 6f > should be set to 67 and is now 6f > OK. [...] The "OK" might be fixed, as it is not OK, because the value read after writing is not the value written. The code that produced this output has not appeared on the mailing list, so I include it here for reference: | /* PM IO base */ | base = pci_read_long(dev, 0x40) & 0x0000FFC0; | | gpo_byte = gpo >> 3; | gpo_bit = gpo & 7; | tmp = INB(base + 0x34 + gpo_byte); /* GPO register */ | msg_pdbg("Port %04x was %02x\n", base + 0x34 + gpo_byte, tmp); | if (raise) | tmp |= 0x01 << gpo_bit; | else | tmp &= ~(0x01 << gpo_bit); | OUTB(tmp, base + 0x34 + gpo_byte); | msg_pdbg("should be set to %02x and is now %02x\n", tmp, INB(base+0x34+gpo_byte)); Anyone got an idea what could be wrong here? The following ideas have already been rejected: 1) The pin is configured as input Rejected because: On the PIIX4, there are no GPIOs, GPI and GPO are on different pins. 2) Multiplexing of pins makes this GPO not available Rejected because: GPO27 is not multiplexed 3) The write to the GPO port is trapped. Rejected because: The datasheet doesn't tell anything about trapability or making the GPO register read only. 4) You need a special magic dance to write to this register Rejected because: The SMI code from that board does a plain and operation just like we do, without a magic dance. Of course, SMM is a different execution environment than flashrom userspace, but the datasheet doesn't mention anything about availability only in SMM. Regards, Michael Karcher

1 0

[patch] more NetBSD fixes (w/ patch)
by Jonathan A. Kollasch 16 Feb '10

16 Feb '10

Cast input to tolower() to unsigned char to work around how tolower() is implemented on NetBSD. Also, use CPPFLAGS (rather than overriding CFLAGS) for the NetBSD/DragonFly build example. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> ---

2 2

[commit] r905 - trunk
by repository service 16 Feb '10

16 Feb '10

Author: mkarcher Date: Tue Feb 16 01:49:50 2010 New Revision: 905 URL: http://flashrom.org/trac/coreboot/changeset/905 Log: more NetBSD fixes (w/ patch) Cast input to tolower() to unsigned char to work around how tolower() is implemented on NetBSD. Also, use CPPFLAGS (rather than overriding CFLAGS) for the NetBSD/DragonFly build example. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/README trunk/dummyflasher.c Modified: trunk/README ============================================================================== --- trunk/README Sun Feb 14 02:20:28 2010 (r904) +++ trunk/README Tue Feb 16 01:49:50 2010 (r905) @@ -68,7 +68,7 @@ To compile on NetBSD or DragonFly BSD, use: ln -s /usr/pkg/include/pciutils pci - gmake CFLAGS=-I. LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" + gmake CPPFLAGS=-I. LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" To compile and run on Darwin/Mac OS X: Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Sun Feb 14 02:20:28 2010 (r904) +++ trunk/dummyflasher.c Tue Feb 16 01:49:50 2010 (r905) @@ -38,7 +38,8 @@ programmer_param = strdup("parallel,lpc,fwh,spi"); /* Convert the parameters to lowercase. */ for (i = 0; programmer_param[i] != '\0'; i++) - programmer_param[i] = (char)tolower(programmer_param[i]); + programmer_param[i] = + (char)tolower((unsigned char)programmer_param[i]); buses_supported = CHIP_BUSTYPE_NONE; if (strstr(programmer_param, "parallel")) {

1 0

[patch] more NetBSD fixes
by Jonathan A. Kollasch 15 Feb '10

15 Feb '10

Cast input to tolower() to unsigned char to work around how tolower() is implemented on NetBSD. Also, use CPPFLAGS (rather than overriding CFLAGS) for the NetBSD/DragonFly build example. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> ---

1 0

Asus A6000... nevermind, thanks!
by Matteo Laffranchi 15 Feb '10

15 Feb '10

Nevermind, I used this: sudo flashrom -v current_image.img to do a comparison between my actual BIOS and the backup file and it was successful, so I thought my BIOS was untouched. I rebooted and it's all OK, my BIOS still works. I think I'll use the EasyFlash Utility provided in my BIOS to do the flashing, I didn't notice it existed before. I did a stupid thing. ;-) Thanks!

2 1

Problem flashing a ASUS A6000 Notebook BIOS. Can you please help me?
by Matteo Laffranchi 15 Feb '10

15 Feb '10

Hi! Sorry to bother you, but I'm having big trouble trying to flash my notebook BIOS. I have an old Asus A6000 A6VC notebook. Here is the problem: my PC cannot boot Windows anymore (viruses), in normal and safe mode RPCSS locks and I can't reach my Desktop. For an unknown reason (virus? faulty BIOS?) my PC ignores bootable CDs, even if I change the boot order in the BIOS putting CD/DVDs at the top. I tried different CDs, Windows and Linux, but nothing works. I can only manage to use bootable USB pens, so I'm triyng Xubuntu to flash my BIOS and try to solve the problem. Today I installed flashrom like this: sudo apt-get update sudo apt-get install flashrom And everything's fine. I downloaded the original BIOS from here: http://support.asus.com/download/download.aspx The problem is this: I cannot write the BIOS correctly. I used this command sudo flashrom -r current_image.img sudo flashrom -w A6VCAS.205 The result is in "terminal.txt". My notebook is still "ON". Please help me! An attachment has been stripped: current_rom.img An attachment has been stripped: A6VCAS.205 ubuntu@ubuntu:~$ sudo flashrom flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. No operations were specified. ubuntu@ubuntu:~$ man flashrom ubuntu@ubuntu:~$ man flashrom ubuntu@ubuntu:~$ sudo flashrom flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. No operations were specified. ubuntu@ubuntu:~$ sudo flashrom -V flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode disabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 493M loops per second, 100 myus = 201 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0x8d, id2 0x0f Probing for AMD Am29F002(N)BB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for AMD Am29F002(N)BT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT49F002(N), 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT49F002(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMIC A49LF040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for EMST F49B002UA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for EON EN29F002(A)(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Fujitsu MBM29F004BC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Fujitsu MBM29F004TC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Intel 28F001BX-T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: probe_29f040b: id1 0x49, id2 0x84 Probing for PMC Pm29F0002B, 256 KB: probe_29f040b: id1 0x49, id2 0x84 Probing for PMC Pm39LV010, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for PMC Pm49FL002, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for PMC Pm49FL004, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST29EE020A, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF003A/B, 384 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF004A/B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Lock status for 0x000000 (size 0x010000) is 00, full access Lock status for 0x010000 (size 0x010000) is 00, full access Lock status for 0x020000 (size 0x010000) is 00, full access Lock status for 0x030000 (size 0x010000) is 00, full access Lock status for 0x040000 (size 0x010000) is 00, full access Lock status for 0x050000 (size 0x010000) is 00, full access Lock status for 0x060000 (size 0x010000) is 00, full access Lock status for 0x070000 (size 0x010000) is 00, full access Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M29F002T/NT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M29W040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x60 Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x60 Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x49, id2 0x84 Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SyncMOS S29C51001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SyncMOS S29C51002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SyncMOS S29C51004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for TI TMS29F002RB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for TI TMS29F002RT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xbf, id2 0x60 Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W49V002FA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: id1 0xff, id2 0xff Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: id1 0xbf, id2 0x60 Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. No operations were specified. ubuntu@ubuntu:~$ man flashrom ubuntu@ubuntu:~$ cd /media ubuntu@ubuntu:/media$ ls ubuntu@ubuntu:/media$ cd .. ubuntu@ubuntu:/$ ls bin cdrom etc initrd.img media opt rofs sbin srv tmp var boot dev home lib mnt proc root selinux sys usr vmlinuz ubuntu@ubuntu:/$ cd media/ ubuntu@ubuntu:/media$ ls disk ubuntu@ubuntu:/media$ cd disk/ ubuntu@ubuntu:/media/disk$ ls BIOS Claudio Data ldlinux.sys lifeblog pb syslinux.cfg system ubninit ubnkern vesamenu.c32 ubuntu@ubuntu:/media/disk$ cd BIOS\ Claudio/ ubuntu@ubuntu:/media/disk/BIOS Claudio$ ls A6VCAS.205 AFLASH2.EXE ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom A6VCAS.205 flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. No operations were specified. ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom -r current_rom.img flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Reading flash... done. ubuntu@ubuntu:/media/disk/BIOS Claudio$ ls A6VCAS.205 AFLASH2.EXE current_rom.img ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom -w A6VCAS.205 flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x000061f8! Expected=0xff, Read=0x40, failed byte count from 0x00000000-0x0000ffff: 0x9d68 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom -w current_rom.img flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x000061f8! Expected=0xff, Read=0x40, failed byte count from 0x00000000-0x0000ffff: 0x9d68 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! ubuntu@ubuntu:/media/disk/BIOS Claudio$

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[PATCH] register_shutdown for execution on programmer shutdown
by Carl-Daniel Hailfinger 14 Feb '10

14 Feb '10

Some programmers want to run certain functions during programmer shutdown, but the function choice depends on the code path taken during programmer init. Rather than rebuilding the whole init logic in the shutdown function, it is now possible to register functions for execution on programmer shutdown. The behaviour is similar to atexit(), but the registered functions will be run on programmer shutdown instead of on exit. Registered functions must have the prototype void function(void); and will be executed in reverse registration order directly before calling the programmer-specific shutdown() function. It is recommended to have shutdown() only disable programmer/hardware access and leave all code path sensitive shutdown to functions registered with register_shutdown(). If in doubt, consult man atexit. Usage example (try running the dummy flasher with this patch applied): > --- dummyflasher.c 2010-02-12 02:35:18.000000000 +0100 > +++ dummyflasher.c 2010-02-12 03:52:59.000000000 +0100 > @@ -24,6 +24,18 @@ > #include <sys/types.h> > #include "flash.h" > > +void foo(void) > +{ > + msg_pinfo("This is %s and was added first, will be executed second.\n", > + __func__); > +} > + > +void bar(void) > +{ > + msg_pinfo("This is %s and was added second, will be executed first.\n", > + __func__); > +} > + > int dummy_init(void) > { > int i; > @@ -61,6 +73,9 @@ > if (buses_supported == CHIP_BUSTYPE_NONE) > msg_pdbg("Support for all flash bus types disabled.\n"); > free(programmer_param); > + > + register_shutdown(foo); > + register_shutdown(bar); > return 0; > } > The most prominent use case is resetting the EC after flashing on laptops. Anders, this should fit your requirements. Note: There are quite a few code paths in flashrom which proceed to terminate flashrom without any programmer shutdown. Those code paths will not get the benefit of register_shutdown() and they should be changed wherever possible. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-register_shutdown/flash.h =================================================================== --- flashrom-register_shutdown/flash.h (Revision 895) +++ flashrom-register_shutdown/flash.h (Arbeitskopie) @@ -100,6 +100,7 @@ extern const struct programmer_entry programmer_table[]; int programmer_init(void); +int register_shutdown(void (*function)(void)); int programmer_shutdown(void); void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, size_t len); Index: flashrom-register_shutdown/flashrom.c =================================================================== --- flashrom-register_shutdown/flashrom.c (Revision 895) +++ flashrom-register_shutdown/flashrom.c (Arbeitskopie) @@ -313,8 +313,28 @@ return programmer_table[programmer].init(); } +#define SHUTDOWN_MAXFN 4 +static int shutdown_fn_count = 0; +void (*shutdown_fn[SHUTDOWN_MAXFN]) (void); + +int register_shutdown(void (*function)(void)) +{ + if (shutdown_fn_count >= SHUTDOWN_MAXFN) { + msg_perr("Tried to register more than %n shutdown functions.\n", + SHUTDOWN_MAXFN); + return 1; + } + shutdown_fn[shutdown_fn_count++] = function; + + return 0; +} + int programmer_shutdown(void) { + int i; + + for (i = shutdown_fn_count - 1; i >= 0; i--) + shutdown_fn[i](); return programmer_table[programmer].shutdown(); } -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

3 11

[commit] r904 - trunk
by repository service 14 Feb '10

14 Feb '10

Author: hailfinger Date: Sun Feb 14 02:20:28 2010 New Revision: 904 URL: http://flashrom.org/trac/coreboot/changeset/904 Log: Some programmers want to run certain functions during programmer shutdown, but the function choice depends on the code path taken during programmer init. Rather than rebuilding the whole init logic in the shutdown function, it is now possible to register functions for execution on programmer shutdown. The behaviour is similar to atexit(), but the registered functions will be run on programmer shutdown instead of on exit and the functions will be called with a void * argument that is specified on registration. Registered functions must have the prototype void function(void *); and will be executed in reverse registration order directly before calling the programmer-specific shutdown() function. It is recommended to have shutdown() only disable programmer/hardware access and leave all code path sensitive shutdown to functions registered with register_shutdown(). The most prominent use case is resetting the EC after flashing on laptops. Note: There are quite a few code paths in flashrom which proceed to terminate flashrom without any programmer shutdown. Those code paths will not get the benefit of register_shutdown() and they should be changed wherever possible. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/flash.h trunk/flashrom.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun Feb 14 02:00:36 2010 (r903) +++ trunk/flash.h Sun Feb 14 02:20:28 2010 (r904) @@ -99,6 +99,8 @@ extern const struct programmer_entry programmer_table[]; +int register_shutdown(void (*function) (void *data), void *data); + int programmer_init(void); int programmer_shutdown(void); void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Feb 14 02:00:36 2010 (r903) +++ trunk/flashrom.c Sun Feb 14 02:20:28 2010 (r904) @@ -308,6 +308,35 @@ {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; +#define SHUTDOWN_MAXFN 4 +static int shutdown_fn_count = 0; +struct shutdown_func_data { + void (*func) (void *data); + void *data; +} shutdown_fn[SHUTDOWN_MAXFN]; + +/* Register a function to be executed on programmer shutdown. + * The advantage over atexit() is that you can supply a void pointer which will + * be used as parameter to the registered function upon programmer shutdown. + * This pointer can point to arbitrary data used by said function, e.g. undo + * information for GPIO settings etc. If unneeded, set data=NULL. + * Please note that the first (void *data) belongs to the function signature of + * the function passed as first parameter. + */ +int register_shutdown(void (*function) (void *data), void *data) +{ + if (shutdown_fn_count >= SHUTDOWN_MAXFN) { + msg_perr("Tried to register more than %n shutdown functions.\n", + SHUTDOWN_MAXFN); + return 1; + } + shutdown_fn[shutdown_fn_count].func = function; + shutdown_fn[shutdown_fn_count].data = data; + shutdown_fn_count++; + + return 0; +} + int programmer_init(void) { return programmer_table[programmer].init(); @@ -315,6 +344,10 @@ int programmer_shutdown(void) { + int i; + + for (i = shutdown_fn_count - 1; i >= 0; i--) + shutdown_fn[i].func(shutdown_fn[i].data); return programmer_table[programmer].shutdown(); }

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[patch] NetBSD/amd64 build fix (w/ actual patch)
by Jonathan A. Kollasch 14 Feb '10

14 Feb '10

Use uname -p instead of -m on NetBSD so we get the right architecture library name. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> ---

2 1

[commit] r903 - trunk
by repository service 14 Feb '10

14 Feb '10

Author: hailfinger Date: Sun Feb 14 02:00:36 2010 New Revision: 903 URL: http://flashrom.org/trac/coreboot/changeset/903 Log: Use uname -p instead of -m on NetBSD so we get the right architecture library name. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Feb 14 00:41:01 2010 (r902) +++ trunk/Makefile Sun Feb 14 02:00:36 2010 (r903) @@ -183,7 +183,7 @@ PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o ifeq ($(OS_ARCH), NetBSD) LIBS += -lpciutils # The libpci we want. -LIBS += -l$(shell uname -m) # For (i386|x86_64)_iopl(2). +LIBS += -l$(shell uname -p) # For (i386|x86_64)_iopl(2). endif endif

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Re: [flashrom] [coreboot] flashrom on MCP73
by Carl-Daniel Hailfinger 14 Feb '10

14 Feb '10

Hi Fabrício, [Followup to flashrom(a)flashrom.org please] some of us are interested in reverse engineering flashrom SPI support for your chipset. Do you still have that board available? On 15.01.2009 18:12, Fabrício Ceolin wrote: > On Wed, Jan 14, 2009 at 9:36 PM, Peter Stuge <peter(a)stuge.se> wrote: > >> Fabrício Ceolin wrote: >> >>> We are trying to make flashrom work on http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=858&… >>> >>> Chipset MCP73 / SPI chip Macronix MX25L8005. >>> >>> We made modifications using a enable_flash_mcp55 function, but >>> does't work. >>> >> First you have to figure out what chip is the SPI bus master. >> > We made these tests. There are a superio, but the bios chip isn't connect to > it. > The bios chip is directly connected to the chipset MCP73. > > So, I need to the datasheet of MCP73 to implement it. > Did you get any datasheets from Nvidia? Regards, Carl-Daniel -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

1 1

Erasing on Asus M2N68-VM
by Michael Karcher 14 Feb '10

14 Feb '10

Hello developers, this is from Code found in the BIOS. Enable bitbanging SPI interface: - ISA brigde (10de:0548, at 00:01.0) needs 8A.6 set and 8A.5 cleared - SMBus controller (10de:0542, at 00:01.1, so same chip) contains base address of something at register 0x74 (DWORD). Bitbanging register is at 0x530 inside that block. The base address has been seen as 0xfec80000 on one board. To select the BIOS ROM: - Set bit 0 in the bitbang register - Wait for bit 8 to be set (this is the *only* word access to the bitbang register, everything els is bytewise) - Clear bit 1 in the bitbang register To deselect the BIOS ROM: - Set bit 1 in the bitbang register - Clear bit 0 in the bitbang register To do SPI transfers: - bit 2 is clock (read/write) - bit 3 is MOSI (to flash) - bit 4 is MISO (from flash) That's basically everything. No warranty that this doesn't interfere with anything ACPI-like while the system is running, of course. Regards, Michael Karcher

5 10

[commit] r902 - trunk
by repository service 14 Feb '10

14 Feb '10

Author: hailfinger Date: Sun Feb 14 00:41:01 2010 New Revision: 902 URL: http://flashrom.org/trac/coreboot/changeset/902 Log: Add SPI mode diagnostics for all post-MCP55 (nForce 5) chipsets from Nvidia. Huge thanks to Michael Karcher for reverse engineering the MCP67 chipset and writing a spec. Due to this, we were able to use the chinese wall technique for 100% clean room reverse engineering. This patch doesn't touch any of the new registers, it only reads them. Assuming that read has no side effects, this patch is a no-op and safe. We need "flashrom -V" output from all post-MCP55 (nForce 5) chipset boards. Please indicate if your board uses SPI flash or LPC flash (if you know it). Note: That output is only helpful if it is created with patched flashrom and if is from the first run of flashrom after a cold boot (reset or Ctrl-Alt-Del is not sufficient). There is a pattern based on which we can probably detect which flash type is present on the board. Thanks to Alessandro Polverini for testing earlier iterations of this patch. Note: The MCP67 should work. I guessed that the other recent Nvidia chipsets would work in a similar way, and created a simplified do-nothing catchall chipset enable function which dumps some info and instructs the user to send more info. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Feb 13 20:22:11 2010 (r901) +++ trunk/chipset_enable.c Sun Feb 14 00:41:01 2010 (r902) @@ -1054,6 +1054,127 @@ return 0; } +/** + * The MCP67 code is guesswork based on cleanroom reverse engineering. + * Due to that, it only reads info and doesn't change any settings. + * It is assumed that LPC chips need the MCP55 code and SPI chips need the + * code provided in this function. Until we know for sure, call + * enable_flash_mcp55 from this function. Warning: enable_flash_mcp55 + * might make SPI flash inaccessible. The same caveat applies to SPI init + * for LPC flash. + */ +static int enable_flash_mcp67(struct pci_dev *dev, const char *name) +{ + int result = 0; + uint8_t byte; + uint16_t status; + uint32_t mcp_spibaraddr; + void *mcp_spibar; + struct pci_dev *smbusdev; + + /* dev is the ISA bridge. No idea what the stuff below does. */ + byte = pci_read_byte(dev, 0x8a); + msg_pdbg("ISA bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 is " + "%i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); + msg_pdbg("Guessed flash bus type is %s\n", ((byte >> 5) & 0x3) == 0x2 ? + "SPI" : "unknown, probably LPC"); + /* Disable the write code for now until we have more info. */ +#if 0 + byte |= (1 << 6); + byte &= ~(1 << 5); + pci_write_byte(dev, 0x8a, byte); +#endif + + /* Look for the SMBus device (SMBus PCI class) */ + smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); + if (!smbusdev) { + msg_perr("ERROR: SMBus device not found. Aborting.\n"); + exit(1); + } + msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", + smbusdev->vendor_id, smbusdev->device_id, + smbusdev->bus, smbusdev->dev, smbusdev->func); + + /* Locate the BAR where the SPI interface lives. */ + mcp_spibaraddr = pci_read_long(smbusdev, 0x74); + msg_pdbg("SPI BAR is at 0x%08x, ", mcp_spibaraddr); + /* We hope this has native alignment. We know the SPI interface (well, + * a set of GPIOs that is connected to SPI flash) is at offset 0x530, + * so we expect a size of at least 0x800. Clear the lower bits. + * It is entirely possible that the BAR is 64k big and the low bits are + * reserved for an entirely different purpose. + */ + mcp_spibaraddr &= ~0x7ff; + msg_pdbg("after clearing low bits BAR is at 0x%08x\n", mcp_spibaraddr); + + /* Accessing a NULL pointer BAR is evil. Don't do it. */ + if (mcp_spibaraddr) { + /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ + mcp_spibar = physmap("MCP67 SPI", mcp_spibaraddr, 0x544); + +/* Guessed. If this is correct, migrate to a separate MCP67 SPI driver. */ +#define MCP67_SPI_CS (1 << 1) +#define MCP67_SPI_SCK (1 << 2) +#define MCP67_SPI_MOSI (1 << 3) +#define MCP67_SPI_MISO (1 << 4) +#define MCP67_SPI_ENABLE (1 << 0) +#define MCP67_SPI_IDLE (1 << 8) + + status = mmio_readw(mcp_spibar + 0x530); + msg_pdbg("SPI control is 0x%04x, enable=%i, idle=%i\n", + status, status & 0x1, (status >> 8) & 0x1); + /* FIXME: Remove the physunmap once the SPI driver exists. */ + physunmap(mcp_spibar, 0x544); + } else { + msg_pdbg("Strange. MCP67 SPI BAR is invalid.\n"); + } + msg_pinfo("Please send the output of \"flashrom -V\" to " + "flashrom(a)flashrom.org to help us finish support for your " + "chipset. Thanks.\n"); + + /* Not sure if this is still correct. No docs as usual. */ + result = enable_flash_mcp55(dev, name); + + return result; +} + +/* This is a shot in the dark. Even if the code is totally bogus for some + * chipsets, users will at least start to send in reports. + */ +static int enable_flash_mcp7x(struct pci_dev *dev, const char *name) +{ + uint8_t byte; + uint32_t mcp_spibaraddr; + struct pci_dev *smbusdev; + + msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); + + /* dev is the ISA bridge. No idea what the stuff below does. */ + byte = pci_read_byte(dev, 0x8a); + msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " + "is %i\n", byte, (byte >> 6) & 0x1, (byte >> 5) & 0x1); + + /* Look for the SMBus device (SMBus PCI class) */ + smbusdev = pci_dev_find_vendorclass(0x10de, 0x0c05); + if (!smbusdev) { + msg_perr("ERROR: SMBus device not found. Aborting.\n"); + exit(1); + } + msg_pdbg("Found SMBus device %04x:%04x at %02x:%02x:%01x\n", + smbusdev->vendor_id, smbusdev->device_id, + smbusdev->bus, smbusdev->dev, smbusdev->func); + + /* Locate the BAR where the SPI interface lives. */ + mcp_spibaraddr = pci_read_long(smbusdev, 0x74); + msg_pdbg("SPI BAR is at 0x%08x, ", mcp_spibaraddr); + + msg_pinfo("Please send the output of \"flashrom -V\" to " + "flashrom(a)flashrom.org to help us finish support for your " + "chipset. Thanks.\n"); + + return 0; +} + static int enable_flash_ht1000(struct pci_dev *dev, const char *name) { uint8_t byte; @@ -1193,7 +1314,22 @@ {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, + {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, + {0x10de, 0x03e1, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, + {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, + {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp7x}, + {0x10de, 0x0440, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, + {0x10de, 0x0441, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, + {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, + {0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp7x}, + {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp67}, + {0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp7x}, + {0x10de, 0x075d, NT, "NVIDIA", "MCP78S", enable_flash_mcp7x}, + {0x10de, 0x07d7, NT, "NVIDIA", "MCP73", enable_flash_mcp7x}, + {0x10de, 0x0aac, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, + {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, + {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, + {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511},

1 0

[PATCH] Support for chip: Intel E28F004S5
by Sean Nelson 13 Feb '10

13 Feb '10

Adds support for the Intel E28F004S5 flash chip. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 4

[commit] r901 - trunk
by repository service 13 Feb '10

13 Feb '10

Author: hailfinger Date: Sat Feb 13 20:22:11 2010 New Revision: 901 URL: http://flashrom.org/trac/coreboot/changeset/901 Log: Kill an erroneous .erase introduced in r900. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Feb 13 19:41:53 2010 (r900) +++ trunk/flashchips.c Sat Feb 13 20:22:11 2010 (r901) @@ -2342,7 +2342,6 @@ .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = NULL, .block_erasers = { {

1 0

[commit] r900 - trunk
by repository service 13 Feb '10

13 Feb '10

Author: snelson Date: Sat Feb 13 19:41:53 2010 New Revision: 900 URL: http://flashrom.org/trac/coreboot/changeset/900 Log: Adds support for the Intel E28F004S5 flash chip. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Feb 12 20:37:25 2010 (r899) +++ trunk/flashchips.c Sat Feb 13 19:41:53 2010 (r900) @@ -2333,6 +2333,29 @@ { .vendor = "Intel", + .name = "28F004S5", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = INTEL_ID, + .model_id = E_28F004S5, + .total_size = 512, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_82802ab, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_82802ab_block, + }, + }, + .write = write_82802ab, + .read = read_memmapped, + }, + + { + .vendor = "Intel", .name = "82802AB", .bustype = CHIP_BUSTYPE_FWH, .manufacture_id = INTEL_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Fri Feb 12 20:37:25 2010 (r899) +++ trunk/flashchips.h Sat Feb 13 19:41:53 2010 (r900) @@ -254,6 +254,9 @@ #define INTEL_ID 0x89 /* Intel */ #define I_82802AB 0xAD #define I_82802AC 0xAC +#define E_28F004S5 0xA7 +#define E_28F008S5 0xA6 +#define E_28F016S5 0xAA #define P28F001BXT 0x94 /* 28F001BX-T */ #define P28F001BXB 0x95 /* 28F001BX-B */ #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */

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