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[commit] r1063 - trunk
by repository service 27 Jun '10

27 Jun '10

Author: mkarcher Date: Sun Jun 27 17:07:52 2010 New Revision: 1063 URL: http://flashrom.org/trac/coreboot/changeset/1063 Log: Board enable for Asus A8N-VM CSM Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Jun 27 17:07:49 2010 (r1062) +++ trunk/board_enable.c Sun Jun 27 17:07:52 2010 (r1063) @@ -159,6 +159,7 @@ enum winbond_id { WINBOND_W83627HF_ID = 0x52, + WINBOND_W83627EHF_ID = 0x88, WINBOND_W83627THF_ID = 0x82, }; @@ -179,6 +180,26 @@ UNIMPLEMENTED_PORT }; +static const struct winbond_mux w83627ehf_port2_mux[8] = { + {0x29, 0x06, 0x02}, /* or MIDI */ + {0x29, 0x06, 0x02}, + {0x24, 0x02, 0x00}, /* or SPI ROM interface */ + {0x24, 0x02, 0x00}, + {0x2A, 0x01, 0x01}, /* or keyboard/mouse interface */ + {0x2A, 0x01, 0x01}, + {0x2A, 0x01, 0x01}, + {0x2A, 0x01, 0x01} +}; + +static const struct winbond_port w83627ehf[6] = { + UNIMPLEMENTED_PORT, + {w83627ehf_port2_mux, 0x09, 0, 0xE3}, + UNIMPLEMENTED_PORT, + UNIMPLEMENTED_PORT, + UNIMPLEMENTED_PORT, + UNIMPLEMENTED_PORT +}; + static const struct winbond_mux w83627thf_port4_mux[8] = { {0x2D, 0x01, 0x01}, /* or watchdog or VID level strap */ {0x2D, 0x02, 0x02}, /* or resume reset */ @@ -200,6 +221,7 @@ static const struct winbond_chip winbond_chips[] = { {WINBOND_W83627HF_ID, ARRAY_SIZE(w83627hf), w83627hf }, + {WINBOND_W83627EHF_ID, ARRAY_SIZE(w83627ehf), w83627ehf}, {WINBOND_W83627THF_ID, ARRAY_SIZE(w83627thf), w83627thf}, }; @@ -291,6 +313,17 @@ } /** + * Winbond W83627EHF: Raise GPIO24. + * + * Suited for: + * - Asus A8N VM CSM + */ +static int w83627ehf_gpio24_raise_2e() +{ + return winbond_gpio_set(0x2e, WINBOND_W83627EHF_ID, 24, 1); +} + +/** * Winbond W83627THF: Raise GPIO 44. * * Suited for: @@ -1549,6 +1582,7 @@ {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8JM", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x0260, 0x103c, 0x2a3e, 0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI", NULL, NULL, "ASUS", "A8N-LA", 0, NT, nvidia_mcp_gpio0_raise}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, + {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N-VM CSM", 0, OK, w83627ehf_gpio24_raise_2e}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise},

1 0

[commit] r1062 - trunk
by repository service 27 Jun '10

27 Jun '10

Author: mkarcher Date: Sun Jun 27 17:07:49 2010 New Revision: 1062 URL: http://flashrom.org/trac/coreboot/changeset/1062 Log: W83627x code unification This patch unifies the code for different Winbond W83627-family chips, to be applied before I add another W83627 GPIO raise function. After the Ack I added the check for unimplemented GPIO ports, but still dared to reuse the ack. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Jun 25 15:18:48 2010 (r1061) +++ trunk/board_enable.c Sun Jun 27 17:07:49 2010 (r1062) @@ -134,86 +134,182 @@ return fdc37b787_gpio50_raise(0x3f0); } -/** - * Winbond W83627HF: Raise GPIO24. - * - * Suited for: - * - Agami Aruma - * - IWILL DK8-HTX - */ -static int w83627hf_gpio24_raise(uint16_t port) +struct winbond_mux { + uint8_t reg; /* 0 if the corresponding pin is not muxed */ + uint8_t data; /* reg/data/mask may be directly ... */ + uint8_t mask; /* ... passed to sio_mask */ +}; + +struct winbond_port { + const struct winbond_mux *mux; /* NULL or pointer to mux info for the 8 bits */ + uint8_t ldn; /* LDN this GPIO register is located in */ + uint8_t enable_bit; /* bit in 0x30 of that LDN to enable + the GPIO port */ + uint8_t base; /* base register in that LDN for the port */ +}; + +struct winbond_chip { + uint8_t device_id; /* reg 0x20 of the expected w83626x */ + uint8_t gpio_port_count; + const struct winbond_port *port; +}; + + +#define UNIMPLEMENTED_PORT {NULL, 0, 0, 0} + +enum winbond_id { + WINBOND_W83627HF_ID = 0x52, + WINBOND_W83627THF_ID = 0x82, +}; + +static const struct winbond_mux w83627hf_port2_mux[8] = { + {0x2A, 0x01, 0x01}, /* or MIDI */ + {0x2B, 0x80, 0x80}, /* or SPI */ + {0x2B, 0x40, 0x40}, /* or SPI */ + {0x2B, 0x20, 0x20}, /* or power LED */ + {0x2B, 0x10, 0x10}, /* or watchdog */ + {0x2B, 0x08, 0x08}, /* or infra red */ + {0x2B, 0x04, 0x04}, /* or infra red */ + {0x2B, 0x03, 0x03} /* or IRQ1 input */ +}; + +static const struct winbond_port w83627hf[3] = { + UNIMPLEMENTED_PORT, + {w83627hf_port2_mux, 0x08, 0, 0xF0}, + UNIMPLEMENTED_PORT +}; + +static const struct winbond_mux w83627thf_port4_mux[8] = { + {0x2D, 0x01, 0x01}, /* or watchdog or VID level strap */ + {0x2D, 0x02, 0x02}, /* or resume reset */ + {0x2D, 0x04, 0x04}, /* or S3 input */ + {0x2D, 0x08, 0x08}, /* or PSON# */ + {0x2D, 0x10, 0x10}, /* or PWROK */ + {0x2D, 0x20, 0x20}, /* or suspend LED */ + {0x2D, 0x40, 0x40}, /* or panel switch input */ + {0x2D, 0x80, 0x80} /* or panel switch output */ +}; + +static const struct winbond_port w83627thf[5] = { + UNIMPLEMENTED_PORT, /* GPIO1 */ + UNIMPLEMENTED_PORT, /* GPIO2 */ + UNIMPLEMENTED_PORT, /* GPIO3 */ + {w83627thf_port4_mux, 0x09, 1, 0xF4}, + UNIMPLEMENTED_PORT /* GPIO5 */ +}; + +static const struct winbond_chip winbond_chips[] = { + {WINBOND_W83627HF_ID, ARRAY_SIZE(w83627hf), w83627hf }, + {WINBOND_W83627THF_ID, ARRAY_SIZE(w83627thf), w83627thf}, +}; + +/* Detects which Winbond Super I/O is responding at the given base + address, but takes no effort to make sure the chip is really a + Winbond Super I/O */ + +static const struct winbond_chip * winbond_superio_detect(uint16_t base) { - w836xx_ext_enter(port); + uint8_t chipid; + const struct winbond_chip * chip = NULL; + int i; - /* Is this the W83627HF? */ - if (sio_read(port, 0x20) != 0x52) { /* Super I/O device ID reg. */ - msg_perr("\nERROR: W83627HF: Wrong ID: 0x%02X.\n", - sio_read(port, 0x20)); - w836xx_ext_leave(port); + w836xx_ext_enter(base); + chipid = sio_read(base, 0x20); + for (i = 0; i < ARRAY_SIZE(winbond_chips); i++) + if (winbond_chips[i].device_id == chipid) + { + chip = &winbond_chips[i]; + break; + } + + w836xx_ext_leave(base); + return chip; +} + +/* The chipid parameter goes away as soon as we have Super I/O matching in the + board enable table. The call to winbond_superio_detect goes away as + soon as we have generic Super I/O detection code. */ +static int winbond_gpio_set(uint16_t base, enum winbond_id chipid, + int pin, int raise) +{ + const struct winbond_chip * chip = NULL; + const struct winbond_port * gpio; + int port = pin / 10; + int bit = pin % 10; + + chip = winbond_superio_detect(base); + if (!chip) { + msg_perr("\nERROR: No supported Winbond Super I/O found\n"); + return -1; + } + if (bit >= 8 || port == 0 || port > chip->gpio_port_count) { + msg_perr("\nERROR: winbond_gpio_set: Invalid GPIO number %d\n", + pin); + return -1; + } + + gpio = &chip->port[port - 1]; + + if (gpio->ldn == 0) { + msg_perr("\nERROR: GPIO%d is not supported yet on this" + " winbond chip\n", port); return -1; } - /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ - sio_mask(port, 0x2B, 0x10, 0x10); + w836xx_ext_enter(base); - /* Select logical device 8: GPIO port 2 */ - sio_write(port, 0x07, 0x08); + /* Select logical device */ + sio_write(base, 0x07, gpio->ldn); - sio_mask(port, 0x30, 0x01, 0x01); /* Activate logical device. */ - sio_mask(port, 0xF0, 0x00, 0x10); /* GPIO24 -> output */ - sio_mask(port, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ - sio_mask(port, 0xF1, 0x10, 0x10); /* Raise GPIO24 */ + /* Activate logical device. */ + sio_mask(base, 0x30, 1 << gpio->enable_bit, 1 << gpio->enable_bit); - w836xx_ext_leave(port); + /* Select GPIO function of that pin */ + if (gpio->mux && gpio->mux[bit].reg) + sio_mask(base, gpio->mux[bit].reg, + gpio->mux[bit].data, gpio->mux[bit].mask); + + sio_mask(base, gpio->base + 0, 0, 1 << bit); /* make pin output */ + sio_mask(base, gpio->base + 2, 0, 1 << bit); /* Clear inversion */ + sio_mask(base, gpio->base + 1, raise << bit, 1 << bit); + + w836xx_ext_leave(base); return 0; } -static int w83627hf_gpio24_raise_2e(void) +/** + * Winbond W83627HF: Raise GPIO24. + * + * Suited for: + * - Agami Aruma + * - IWILL DK8-HTX + */ +static int w83627hf_gpio24_raise_2e() { - return w83627hf_gpio24_raise(0x2e); + return winbond_gpio_set(0x2e, WINBOND_W83627HF_ID, 24, 1); } /** - * Winbond W83627THF: GPIO 4, bit 4 + * Winbond W83627THF: Raise GPIO 44. * * Suited for: * - MSI K8T Neo2-F - * - MSI K8N-NEO3 */ -static int w83627thf_gpio4_4_raise(uint16_t port) -{ - w836xx_ext_enter(port); - - /* Is this the W83627THF? */ - if (sio_read(port, 0x20) != 0x82) { /* Super I/O device ID reg. */ - msg_perr("\nERROR: W83627THF: Wrong ID: 0x%02X.\n", - sio_read(port, 0x20)); - w836xx_ext_leave(port); - return -1; - } - - /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */ - - sio_write(port, 0x07, 0x09); /* Select LDN 9: GPIO port 4 */ - sio_mask(port, 0x30, 0x02, 0x02); /* Activate logical device. */ - sio_mask(port, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */ - sio_mask(port, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */ - sio_mask(port, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */ - - w836xx_ext_leave(port); - - return 0; -} - -static int w83627thf_gpio4_4_raise_2e(void) +static int w83627thf_gpio44_raise_2e() { - return w83627thf_gpio4_4_raise(0x2e); + return winbond_gpio_set(0x2e, WINBOND_W83627THF_ID, 44, 1); } -static int w83627thf_gpio4_4_raise_4e(void) +/** + * Winbond W83627THF: Raise GPIO 44. + * + * Suited for: + * - MSI K8N Neo3 + */ +static int w83627thf_gpio44_raise_4e() { - return w83627thf_gpio4_4_raise(0x4e); + return winbond_gpio_set(0x4e, WINBOND_W83627THF_ID, 44, 1); } /** @@ -1485,12 +1581,12 @@ {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio44_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, {0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio44_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, "MSI", "MS-7207 (K8N GM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, {0x1011, 0x0019, 0xaa55, 0xaa55, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, "Nokia", "IP530", 0, OK, fdc37b787_gpio50_raise_3f0}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e},

1 0

flashrom -V output for Compaq SR5413WM
by Andre Robatino 26 Jun '10

26 Jun '10

Attached is the output of the command flashrom -V > flashrom_compaq.txt for a Compaq SR5413WM.

1 0

Re: [flashrom] [PATCH] rfc: w83627 code unification
by Carl-Daniel Hailfinger 26 Jun '10

26 Jun '10

On 31.05.2010 18:17, Michael Karcher wrote: > This patch unifies the code for different Winbond W83627-family chips, > to be applied before I add another W83627 GPIO raise function. > > Pleas comment on whether this approach is too sophisticated or a good > idea. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > I think it's pretty good. There are a few stylistic changes I'd like to see, but other than that I see a huge potential for code cleanup coming from this. > diff --git a/board_enable.c b/board_enable.c > index b5eb63f..edba408 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -138,41 +138,67 @@ static int fdc37b787_gpio50_raise_3f0(const char *name) > return fdc37b787_gpio50_raise(0x3f0, name); > } > > -/** > - * Winbond W83627HF: Raise GPIO24. > - * > - * Suited for: > - * - Agami Aruma > - * - IWILL DK8-HTX > - */ > -static int w83627hf_gpio24_raise(uint16_t port, const char *name) > +struct w83627x_gpio { > + uint8_t device_id; /* reg 0x20 of the expected w83626x */ > + uint8_t ldn; /* LDN this GPIO register is located in */ > + > + uint8_t mux_reg; /* register that selects GPIO/special fn mux, > + or 0 if none */ > + uint8_t enable_bit; /* bit in 0x30 of that LDN to enable > + the GPIO port */ > + uint8_t base; /* base register in that LDN for the port */ > +}; > + > +static const struct w83627x_gpio w83627hf_2 = {0x52, 0x08, 0x2B, 0, 0xF0}; > +static const struct w83627x_gpio w83627thf_4 = {0x82, 0x09, 0, 1, 0xF4}; > + > +static int w83627x_gpio_set(uint16_t port, const struct w83627x_gpio * gpio, > Can you eliminate struct w83627x_gpio* from the parameter list? IMHO this function should take a look at the device ID it reads from the chip, and use that to pick the correct struct. > + int bit, int raise) > { > w836xx_ext_enter(port); > > - /* Is this the W83627HF? */ > - if (sio_read(port, 0x20) != 0x52) { /* Super I/O device ID reg. */ > - msg_perr("\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n", > - name, sio_read(port, 0x20)); > + /* Is this the right Super I/O chip? */ > + if (sio_read(port, 0x20) != gpio->device_id) { > + msg_perr("\nERROR: W83627x: Wrong ID: 0x%02X, expecting 0x%02X.\n", > + sio_read(port, 0x20), gpio->device_id); > w836xx_ext_leave(port); > return -1; > } > > - /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ > - sio_mask(port, 0x2B, 0x10, 0x10); > + /* Select logical device */ > + sio_write(port, 0x07, gpio->ldn); > > - /* Select logical device 8: GPIO port 2 */ > - sio_write(port, 0x07, 0x08); > + /* Activate logical device. */ > + sio_mask(port, 0x30, 1 << gpio->enable_bit, 1 << gpio->enable_bit); > > - sio_mask(port, 0x30, 0x01, 0x01); /* Activate logical device. */ > - sio_mask(port, 0xF0, 0x00, 0x10); /* GPIO24 -> output */ > - sio_mask(port, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ > - sio_mask(port, 0xF1, 0x10, 0x10); /* Raise GPIO24 */ > + /* Select GPIO function of that pin */ > + if(gpio->mux_reg) > Space after if. > + sio_mask(port, gpio->mux_reg, 1 << bit, 1 << bit); > If bit>7 this will invoke undefined behaviour, and I don't see any code checking if bit is in the range 0..7. > + > + sio_mask(port, gpio->base + 0, 0, 1 << bit); /* make pin output */ > + sio_mask(port, gpio->base + 2, 0, 1 << bit); /* Clear inversion */ > + if(raise) > + sio_mask(port, gpio->base + 1, 1 << bit, 1 << bit); > + else > + sio_mask(port, gpio->base + 1, 0, 1 << bit); > Could you replace the if/else statement with this: sio_mask(port, gpio->base + 1, raise << bit, 1 << bit); > > w836xx_ext_leave(port); > > return 0; > } > > +/** > + * Winbond W83627HF: Raise GPIO24. > + * > + * Suited for: > + * - Agami Aruma > + * - IWILL DK8-HTX > + */ > +static int w83627hf_gpio24_raise(uint16_t port, const char *name) > +{ > + return w83627x_gpio_set(port, &w83627hf_2, 4, 1); > +} > + > static int w83627hf_gpio24_raise_2e(const char *name) > { > return w83627hf_gpio24_raise(0x2e, name); > @@ -187,27 +213,7 @@ static int w83627hf_gpio24_raise_2e(const char *name) > */ > static int w83627thf_gpio4_4_raise(uint16_t port, const char *name) > { > - w836xx_ext_enter(port); > - > - /* Is this the W83627THF? */ > - if (sio_read(port, 0x20) != 0x82) { /* Super I/O device ID reg. */ > - msg_perr("\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n", > - name, sio_read(port, 0x20)); > - w836xx_ext_leave(port); > - return -1; > > - } > - > - /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */ > - > - sio_write(port, 0x07, 0x09); /* Select LDN 9: GPIO port 4 */ > - sio_mask(port, 0x30, 0x02, 0x02); /* Activate logical device. */ > - sio_mask(port, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */ > - sio_mask(port, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */ > - sio_mask(port, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */ > - > - w836xx_ext_leave(port); > - > - return 0; > + return w83627x_gpio_set(port, &w83627thf_4, 4, 1); > } > > static int w83627thf_gpio4_4_raise_2e(const char *name) > Regards, Carl-Daniel -- http://www.hailfinger.org/

2 2

zotac zbox HD-11 MCP SPI
by Craig Cook 26 Jun '10

26 Jun '10

Zotac ZBOXHD-H11 http://downloads.zotac.com/mediadrivers/mb/bios/pa140.zip # flashrom −V flashrom v0.9.1-r946 No coreboot table found. Found chipset "Intel NM10", enabling flash write... OK. This chipset supports the following protocols: SPI. Calibrating delay loop... OK. Found chip "Generic unknown SPI chip (RDID)" (0 KB, SPI) at physical address 0x0. === This flash part has status NOT WORKING for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified. # lspci -nnvvvxxx 00:00.0 Host bridge [0600]: Intel Corporation N10 Family DMI Bridge [8086:a000] (rev 02) Subsystem: Intel Corporation N10 Family DMI Bridge [8086:a000] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort+ <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information <?> Kernel modules: intel-agp 00: 86 80 00 a0 06 00 90 30 02 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 a0 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 01 90 d1 fe 00 00 00 00 00 40 d1 fe 00 00 00 00 50: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 10 11 11 00 00 33 33 00 ff 03 00 00 00 1a 39 00 a0: 20 00 00 08 00 00 00 80 00 00 00 80 00 00 f0 7f b0: 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 49 00 00 00 00 00 00 6e e0: 09 00 08 d1 02 10 11 08 00 00 00 00 00 00 00 00 f0: 00 00 00 00 01 00 00 00 ad 0f 02 00 00 00 00 00 00:1b.0 Audio device [0403]: Intel Corporation N10/ICH 7 Family High Definition Audio Controller [8086:27d8] (rev 02) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at fe9fc000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Virtual Channel <?> Capabilities: [130] Root Complex Link <?> Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: 86 80 d8 27 06 00 10 00 02 00 03 04 08 00 00 00 10: 04 c0 9f fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 40 a1 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 01 00 00 40: 01 00 00 03 00 00 00 00 00 00 00 00 00 80 00 00 50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 60: 05 70 80 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 00 91 00 00 00 00 00 00 08 10 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1c.0 PCI bridge [0604]: Intel Corporation N10/ICH 7 Family PCI Express Port 1 [8086:27d0] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fea00000-feafffff Prefetchable memory behind bridge: 00000000fbf00000-00000000fbffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 20, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Address: fee0f00c Data: 4161 Capabilities: [90] Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> Kernel driver in use: pcieport Kernel modules: shpchp 00: 86 80 d0 27 07 05 10 00 02 00 04 06 08 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 d0 d0 00 00 20: a0 fe a0 fe f1 fb f1 fb 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 06 00 40: 10 80 41 01 c0 0f 00 00 00 00 11 00 11 2c 11 01 50: 40 00 11 30 60 05 00 01 00 00 48 01 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 0c f0 e0 fe 61 41 00 00 00 00 00 00 90: 0d a0 00 00 da 19 40 a1 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 00 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1c.1 PCI bridge [0604]: Intel Corporation N10/ICH 7 Family PCI Express Port 2 [8086:27d2] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 00001000-00001fff Memory behind bridge: feb00000-febfffff Prefetchable memory behind bridge: 0000000080000000-00000000801fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 21, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Address: fee0f00c Data: 4169 Capabilities: [90] Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> Kernel driver in use: pcieport Kernel modules: shpchp 00: 86 80 d2 27 07 05 10 00 02 00 04 06 08 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 10 10 00 00 20: b0 fe b0 fe 01 80 11 80 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 06 00 40: 10 80 41 01 c0 0f 00 00 00 00 10 00 11 2c 11 02 50: 40 00 11 30 60 05 08 01 00 00 48 01 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 0c f0 e0 fe 69 41 00 00 00 00 00 00 90: 0d a0 00 00 da 19 40 a1 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 00 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1c.2 PCI bridge [0604]: Intel Corporation N10/ICH 7 Family PCI Express Port 3 [8086:27d4] (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fcf00000-fdffffff Prefetchable memory behind bridge: 00000000ce000000-00000000dfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 22, PowerLimit 10.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Address: fee0f00c Data: 4171 Capabilities: [90] Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> Kernel driver in use: pcieport Kernel modules: shpchp 00: 86 80 d4 27 07 05 10 40 02 00 04 06 08 00 81 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 e0 e0 00 00 20: f0 fc f0 fd 01 ce f1 df 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 05 03 1a 00 40: 10 80 41 01 c0 0f 00 00 00 00 12 00 11 2c 11 03 50: 40 00 11 30 60 05 10 01 00 00 48 01 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 0c f0 e0 fe 71 41 00 00 00 00 00 00 90: 0d a0 00 00 da 19 40 a1 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 00 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.0 USB Controller [0c03]: Intel Corporation N10/ICH7 Family USB UHCI Controller #1 [8086:27c8] (rev 02) Subsystem: Intel Corporation N10/ICH7 Family USB UHCI Controller #1 [8086:27c8] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 4: I/O ports at cc00 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 c8 27 05 00 80 02 02 00 03 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 cc 00 00 00 00 00 00 00 00 00 00 86 80 c8 27 30: 00 00 00 00 00 00 00 00 00 00 00 00 0e 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.1 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 [8086:27c9] (rev 02) Subsystem: Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 [8086:27c9] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 19 Region 4: I/O ports at c880 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 c9 27 05 00 80 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 c8 00 00 00 00 00 00 00 00 00 00 86 80 c9 27 30: 00 00 00 00 00 00 00 00 00 00 00 00 0f 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.2 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 [8086:27ca] (rev 02) Subsystem: Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 [8086:27ca] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at c800 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 ca 27 05 00 80 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 c8 00 00 00 00 00 00 00 00 00 00 86 80 ca 27 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.3 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 [8086:27cb] (rev 02) Subsystem: Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 [8086:27cb] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 16 Region 4: I/O ports at c480 [size=32] Kernel driver in use: uhci_hcd 00: 86 80 cb 27 05 00 80 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 c4 00 00 00 00 00 00 00 00 00 00 86 80 cb 27 30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 04 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.7 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB2 EHCI Controller [8086:27cc] (rev 02) (prog-if 20) Subsystem: Allied Telesis, Inc Device [0010:27cc] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 0: Memory at fe9fbc00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci_hcd 00: 86 80 cc 27 06 00 90 02 02 20 03 0c 00 00 00 00 10: 00 bc 9f fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 10 00 cc 27 30: 00 00 00 00 50 00 00 00 00 00 00 00 0e 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00 60: 20 20 ff 01 00 00 00 00 01 00 00 00 00 00 08 80 70: 00 00 df 3f 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 11 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 aa ff 00 ff 00 ff 00 20 00 00 88 e0: 00 00 00 00 db b6 6d 00 00 00 00 00 00 00 00 00 f0: 00 80 00 09 88 85 40 00 86 0f 02 00 0a 17 02 20 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e2) (prog-if 01) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=04, subordinate=04, sec-latency=32 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] 00: 86 80 48 24 04 01 10 00 e2 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 20 f0 00 80 22 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 06 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 50: 0d 00 00 00 da 19 40 a1 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1f.0 ISA bridge [0601]: Intel Corporation NM10 Family LPC Controller [8086:27bc] (rev 02) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information <?> 00: 86 80 bc 27 07 00 10 02 02 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 40 a1 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 01 08 00 00 80 00 00 00 81 04 00 00 10 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 8a 8b 85 8f d0 00 00 00 80 80 80 8e 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 0e 14 01 0a fc 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 20 06 00 00 38 00 00 00 13 00 00 00 00 03 00 00 b0: 00 00 f0 00 00 00 00 00 00 00 00 08 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 33 22 11 00 67 45 00 00 c0 c0 00 00 01 00 00 00 e0: 09 00 0c 10 a1 02 64 90 40 00 00 00 00 00 00 00 f0: 01 c0 d1 fe 00 00 00 00 86 0f 02 00 00 00 00 00 00:1f.2 SATA controller [0106]: Intel Corporation N10/ICH7 Family SATA AHCI Controller [8086:27c1] (rev 02) (prog-if 01) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 28 Region 0: I/O ports at b880 [size=8] Region 1: I/O ports at c400 [size=4] Region 2: I/O ports at c080 [size=8] Region 3: I/O ports at c000 [size=4] Region 4: I/O ports at bc00 [size=32] Region 5: Memory at fe9fb800 (32-bit, non-prefetchable) [size=1K] Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Address: fee0f00c Data: 4191 Capabilities: [70] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [a8] SATA HBA <?> Kernel driver in use: ahci Kernel modules: ahci 00: 86 80 c1 27 07 04 b0 02 02 01 06 01 00 00 00 00 10: 81 b8 00 00 01 c4 00 00 81 c0 00 00 01 c0 00 00 20: 01 bc 00 00 00 b8 9f fe 00 00 00 00 da 19 40 a1 30: 00 00 00 00 80 00 00 00 00 00 00 00 0f 02 00 00 40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 a8 02 40 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 70 01 00 0c f0 e0 fe 91 41 00 00 00 00 00 00 90: 40 00 0f 10 80 01 80 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 12 00 10 00 48 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1f.3 SMBus [0c05]: Intel Corporation N10/ICH 7 Family SMBus Controller [8086:27da] (rev 02) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:a140] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 15 Region 4: I/O ports at 0400 [size=32] Kernel modules: i2c-i801 00: 86 80 da 27 01 00 80 02 02 00 05 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 04 00 00 00 00 00 00 00 00 00 00 da 19 40 a1 30: 00 00 00 00 00 00 00 00 00 00 00 00 0f 02 00 00 40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 01:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 03) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:8168] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 27 Region 0: I/O ports at d800 [size=256] Region 2: Memory at fbffb000 (64-bit, prefetchable) [size=4K] Region 4: Memory at fbffc000 (64-bit, prefetchable) [size=16K] [virtual] Expansion ROM at fbf00000 [disabled] [size=128K] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+ Address: 00000000fee0f00c Data: 4189 Capabilities: [70] Express (v2) Endpoint, MSI 01 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 4096 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us ClockPM+ Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [ac] MSI-X: Enable- Mask- TabSize=4 Vector table: BAR=4 offset=00000000 PBA: BAR=4 offset=00000800 Capabilities: [cc] Vital Product Data <?> Capabilities: [100] Advanced Error Reporting <?> Capabilities: [140] Virtual Channel <?> Capabilities: [160] Device Serial Number 00-e0-4c-68-00-00-08-bc Kernel driver in use: r8169 Kernel modules: r8169 00: ec 10 68 81 07 04 10 00 03 00 00 02 08 00 00 00 10: 01 d8 00 00 00 00 00 00 0c b0 ff fb 00 00 00 00 20: 0c c0 ff fb 00 00 00 00 00 00 00 00 da 19 68 81 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 00 00 40: 01 50 c3 ff 08 00 00 00 00 00 00 00 00 00 00 00 50: 05 70 81 00 0c f0 e0 fe 00 00 00 00 89 41 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 ac 02 02 c1 8c 28 00 10 50 19 00 11 3c 07 00 80: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 11 cc 03 00 b0: 04 00 00 00 04 08 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02:00.0 Network controller [0280]: Atheros Communications Inc. AR9285 Wireless Network Adapter (PCI-Express) [168c:002b] (rev 01) Subsystem: Device [1a3b:1089] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at febf0000 (64-bit, non-prefetchable) [size=64K] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Address: 00000000 Data: 0000 Capabilities: [60] Express (v2) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Advanced Error Reporting <?> Capabilities: [140] Virtual Channel <?> Capabilities: [160] Device Serial Number 12-14-24-ff-ff-17-15-00 Capabilities: [170] Power Budgeting <?> Kernel driver in use: ath9k Kernel modules: ath9k 00: 8c 16 2b 00 07 00 10 00 01 00 80 02 08 00 00 00 10: 04 00 bf fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 3b 1a 89 10 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 00 00 40: 01 50 c3 db 00 00 00 00 00 00 00 00 00 00 00 00 50: 05 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 12 00 c0 8c 28 00 10 20 19 00 11 3c 03 00 70: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03:00.0 VGA compatible controller [0300]: nVidia Corporation GT218 [ION] [10de:0a64] (rev a2) Subsystem: PC Partner Limited Device [174b:3100] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 18 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at ce000000 (64-bit, prefetchable) [size=32M] Region 5: I/O ports at ec00 [size=128] [virtual] Expansion ROM at fcf80000 [disabled] [size=512K] Capabilities: [60] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [68] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [78] Express (v2) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM+ Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [b4] Vendor Specific Information <?> Capabilities: [100] Virtual Channel <?> Capabilities: [128] Power Budgeting <?> Capabilities: [600] Vendor Specific Information <?> Kernel driver in use: nvidia Kernel modules: nvidia-current, nvidiafb, nouveau 00: de 10 64 0a 07 00 10 00 a2 00 00 03 00 00 80 00 10: 00 00 00 fd 0c 00 00 d0 00 00 00 00 0c 00 00 ce 20: 00 00 00 00 01 ec 00 00 00 00 00 00 4b 17 00 31 30: 00 00 00 00 60 00 00 00 00 00 00 00 05 01 00 00 40: 4b 17 00 31 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 00 00 01 00 00 00 ce d6 23 00 00 00 00 00 60: 01 68 03 00 08 00 00 00 05 78 80 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 10 b4 02 00 e0 8d 28 00 80: 10 29 00 00 01 3d 05 00 48 01 11 10 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00 a0: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 b0: 00 00 00 00 09 00 14 01 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03:00.1 Audio device [0403]: nVidia Corporation High Definition Audio Controller [10de:0be3] (rev a1) Subsystem: PC Partner Limited Device [174b:3100] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at fcf7c000 (32-bit, non-prefetchable) [size=16K] Capabilities: [60] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [68] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [78] Express (v2) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <1us ClockPM+ Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: de 10 e3 0b 06 00 10 00 a1 00 03 04 08 00 80 00 10: 00 c0 f7 fc 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 4b 17 00 31 30: 00 00 00 00 60 00 00 00 00 00 00 00 05 01 00 00 40: 4b 17 00 31 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 ce d6 23 00 00 00 00 00 60: 01 68 03 00 08 00 00 00 05 78 80 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 10 00 02 00 a0 8d 28 00 80: 10 29 00 00 01 3d 04 00 08 01 11 10 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

1 0

Re: [flashrom] [PATCH] Fix AAI code
by den_m＠hotmail.ru 25 Jun '10

25 Jun '10

Additional info (didn't have possibility to include it in previous message) Log of failed write (r1060 with your patch): >> ./flashrom -V -w ../A74M0315.ROM flashrom v0.9.2-r1060 on Linux 2.6.32-gentoo-r7.den_m (i686), built with libpci 3.0.0, GCC 4.3.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1398M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1004 us, 10000 myus = 10011 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "ECS" DMI string system-product-name: "A740GM-M" DMI string system-version: "1.0 " DMI string baseboard-manufacturer: "ECS" DMI string baseboard-product-name: "A740GM-M" DMI string baseboard-version: "1.0 " DMI string chassis-type: "Desktop" Found ITE Super I/O, id 8726 Found chipset "AMD SB700/SB710/SB750", enabling flash write... chipset PCI ID is 1002:439d, SPI base address is at 0xfec10000 AltSpiCSEnable=0, SpiRomEnable=1, AbortEnable=0 PrefetchEnSPIFromIMC=0, PrefetchEnSPIFromHost=1, SpiOpEnInLpcMode=1 SpiArbEnable=1, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1, ArbWaitCount=4, SpiBridgeDisable=0, DropOneClkOnRd=0 GPIO11 used for SPI_DO GPIO12 used for SPI_DI GPIO31 used for SPI_HOLD GPIO32 used for SPI_CS GPIO47 used for SPI_CLK ROM strap override is not active OK. This chipset supports the following protocols: LPC,FWH,SPI. SuperI/O ID 8726 is not on the controller list. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for ASD AE49F2008, 256 KB: skipped. Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB011D, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB021D, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB041D, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB081D, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB161D, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB321C, 4224 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB321D, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT45DB642D, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F020, 256 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 KB: skipped. Probing for EMST F25L008A, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Chip status register is 00 Found chip "EMST F25L008A" (1024 KB, SPI) at physical address 0xfff00000. Probing for Eon EN25B05, 64 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B05T, 64 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B10, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B10T, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B20, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B20T, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B40, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B40T, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B80, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B80T, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B16, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B16T, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B32, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B32T, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B64, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25B64T, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25D16, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25F05, 64 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25F10, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25F20, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25F40, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25F80, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25F16, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN25F32, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Eon EN29F010, 128 KB: skipped. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Hyundai HY29F002T, 256 KB: skipped. Probing for Hyundai HY29F002B, 256 KB: skipped. Probing for Intel 28F001BX-B, 128 KB: skipped. Probing for Intel 28F001BX-T, 128 KB: skipped. Probing for Intel 28F004S5, 512 KB: skipped. Probing for Intel 28F004BV/BE-B, 512 KB: skipped. Probing for Intel 28F004BV/BE-T, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L1005, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L2005, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L4005, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L1635D, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L3205, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L3235D, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L6405, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX25L12805, 16384 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for Numonyx M25PE10, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Numonyx M25PE20, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Numonyx M25PE40, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Numonyx M25PE80, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Numonyx M25PE16, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC Pm25LV010, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC Pm25LV016B, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC Pm25LV020, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC Pm25LV040, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC Pm25LV080B, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC Pm25LV512, 64 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Sharp LHF00L04, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL008A, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Spansion S25FL016A, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for SST SST25VF016B, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for SST SST25VF032B, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for SST SST25VF040.REMS, 512 KB: probe_spi_rems: id1 0x8c, id2 0x13 Probing for SST SST25VF040B, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for SST SST25LF040A.RES, 512 KB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 KB: probe_spi_rems: id1 0x8c, id2 0x13 Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0x93, id2 0x3f, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 KB: probe_82802ab: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P05.RES, 64 KB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P10.RES, 128 KB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P40, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P40-old, 512 KB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P16, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P32, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P64, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M25P128, 16384 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: skipped. Probing for SyncMOS S29C51001T, 128 KB: skipped. Probing for SyncMOS S29C51002T, 256 KB: skipped. Probing for SyncMOS S29C51004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25Q16, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25Q32, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25Q64, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25x10, 128 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25x20, 256 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25x40, 512 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25x80, 1024 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25x16, 2048 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25x32, 4096 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W25x64, 8192 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Winbond W29C011, 128 KB: skipped. Probing for Winbond W29C020C, 256 KB: skipped. Probing for Winbond W29C040P, 512 KB: skipped. Probing for Winbond W29EE011, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xfd, id2 0xee, id1 is normal flash content, id2 is normal flash content Probing for Atmel unknown Atmel SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for EON unknown EON SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for SST unknown SST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for ST unknown ST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 KB: probe_spi_rdid_generic: id1 0x8c, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 KB: probe_spi_rems: id1 0x8c, id2 0x13 === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, 0x001000-0x001fff, 0x002000-0x002fff, 0x003000-0x003fff, 0x004000-0x004fff, 0x005000-0x005fff, 0x006000-0x006fff, 0x007000-0x007fff, 0x008000-0x008fff, 0x009000-0x009fff, 0x00a000-0x00afff, 0x00b000-0x00bfff, 0x00c000-0x00cfff, 0x00d000-0x00dfff, 0x00e000-0x00efff, 0x00f000-0x00ffff, 0x010000-0x010fff, 0x011000-0x011fff, 0x012000-0x012fff, 0x013000-0x013fff, 0x014000-0x014fff, 0x015000-0x015fff, 0x016000-0x016fff, 0x017000-0x017fff, 0x018000-0x018fff, 0x019000-0x019fff, 0x01a000-0x01afff, 0x01b000-0x01bfff, 0x01c000-0x01cfff, 0x01d000-0x01dfff, 0x01e000-0x01efff, 0x01f000-0x01ffff, 0x020000-0x020fff, 0x021000-0x021fff, 0x022000-0x022fff, 0x023000-0x023fff, 0x024000-0x024fff, 0x025000-0x025fff, 0x026000-0x026fff, 0x027000-0x027fff, 0x028000-0x028fff, 0x029000-0x029fff, 0x02a000-0x02afff, 0x02b000-0x02bfff, 0x02c000-0x02cfff, 0x02d000-0x02dfff, 0x02e000-0x02efff, 0x02f000-0x02ffff, 0x030000-0x030fff, 0x031000-0x031fff, 0x032000-0x032fff, 0x033000-0x033fff, 0x034000-0x034fff, 0x035000-0x035fff, 0x036000-0x036fff, 0x037000-0x037fff, 0x038000-0x038fff, 0x039000-0x039fff, 0x03a000-0x03afff, 0x03b000-0x03bfff, 0x03c000-0x03cfff, 0x03d000-0x03dfff, 0x03e000-0x03efff, 0x03f000-0x03ffff, 0x040000-0x040fff, 0x041000-0x041fff, 0x042000-0x042fff, 0x043000-0x043fff, 0x044000-0x044fff, 0x045000-0x045fff, 0x046000-0x046fff, 0x047000-0x047fff, 0x048000-0x048fff, 0x049000-0x049fff, 0x04a000-0x04afff, 0x04b000-0x04bfff, 0x04c000-0x04cfff, 0x04d000-0x04dfff, 0x04e000-0x04efff, 0x04f000-0x04ffff, 0x050000-0x050fff, 0x051000-0x051fff, 0x052000-0x052fff, 0x053000-0x053fff, 0x054000-0x054fff, 0x055000-0x055fff, 0x056000-0x056fff, 0x057000-0x057fff, 0x058000-0x058fff, 0x059000-0x059fff, 0x05a000-0x05afff, 0x05b000-0x05bfff, 0x05c000-0x05cfff, 0x05d000-0x05dfff, 0x05e000-0x05efff, 0x05f000-0x05ffff, 0x060000-0x060fff, 0x061000-0x061fff, 0x062000-0x062fff, 0x063000-0x063fff, 0x064000-0x064fff, 0x065000-0x065fff, 0x066000-0x066fff, 0x067000-0x067fff, 0x068000-0x068fff, 0x069000-0x069fff, 0x06a000-0x06afff, 0x06b000-0x06bfff, 0x06c000-0x06cfff, 0x06d000-0x06dfff, 0x06e000-0x06efff, 0x06f000-0x06ffff, 0x070000-0x070fff, 0x071000-0x071fff, 0x072000-0x072fff, 0x073000-0x073fff, 0x074000-0x074fff, 0x075000-0x075fff, 0x076000-0x076fff, 0x077000-0x077fff, 0x078000-0x078fff, 0x079000-0x079fff, 0x07a000-0x07afff, 0x07b000-0x07bfff, 0x07c000-0x07cfff, 0x07d000-0x07dfff, 0x07e000-0x07efff, 0x07f000-0x07ffff, 0x080000-0x080fff, 0x081000-0x081fff, 0x082000-0x082fff, 0x083000-0x083fff, 0x084000-0x084fff, 0x085000-0x085fff, 0x086000-0x086fff, 0x087000-0x087fff, 0x088000-0x088fff, 0x089000-0x089fff, 0x08a000-0x08afff, 0x08b000-0x08bfff, 0x08c000-0x08cfff, 0x08d000-0x08dfff, 0x08e000-0x08efff, 0x08f000-0x08ffff, 0x090000-0x090fff, 0x091000-0x091fff, 0x092000-0x092fff, 0x093000-0x093fff, 0x094000-0x094fff, 0x095000-0x095fff, 0x096000-0x096fff, 0x097000-0x097fff, 0x098000-0x098fff, 0x099000-0x099fff, 0x09a000-0x09afff, 0x09b000-0x09bfff, 0x09c000-0x09cfff, 0x09d000-0x09dfff, 0x09e000-0x09efff, 0x09f000-0x09ffff, 0x0a0000-0x0a0fff, 0x0a1000-0x0a1fff, 0x0a2000-0x0a2fff, 0x0a3000-0x0a3fff, 0x0a4000-0x0a4fff, 0x0a5000-0x0a5fff, 0x0a6000-0x0a6fff, 0x0a7000-0x0a7fff, 0x0a8000-0x0a8fff, 0x0a9000-0x0a9fff, 0x0aa000-0x0aafff, 0x0ab000-0x0abfff, 0x0ac000-0x0acfff, 0x0ad000-0x0adfff, 0x0ae000-0x0aefff, 0x0af000-0x0affff, 0x0b0000-0x0b0fff, 0x0b1000-0x0b1fff, 0x0b2000-0x0b2fff, 0x0b3000-0x0b3fff, 0x0b4000-0x0b4fff, 0x0b5000-0x0b5fff, 0x0b6000-0x0b6fff, 0x0b7000-0x0b7fff, 0x0b8000-0x0b8fff, 0x0b9000-0x0b9fff, 0x0ba000-0x0bafff, 0x0bb000-0x0bbfff, 0x0bc000-0x0bcfff, 0x0bd000-0x0bdfff, 0x0be000-0x0befff, 0x0bf000-0x0bffff, 0x0c0000-0x0c0fff, 0x0c1000-0x0c1fff, 0x0c2000-0x0c2fff, 0x0c3000-0x0c3fff, 0x0c4000-0x0c4fff, 0x0c5000-0x0c5fff, 0x0c6000-0x0c6fff, 0x0c7000-0x0c7fff, 0x0c8000-0x0c8fff, 0x0c9000-0x0c9fff, 0x0ca000-0x0cafff, 0x0cb000-0x0cbfff, 0x0cc000-0x0ccfff, 0x0cd000-0x0cdfff, 0x0ce000-0x0cefff, 0x0cf000-0x0cffff, 0x0d0000-0x0d0fff, 0x0d1000-0x0d1fff, 0x0d2000-0x0d2fff, 0x0d3000-0x0d3fff, 0x0d4000-0x0d4fff, 0x0d5000-0x0d5fff, 0x0d6000-0x0d6fff, 0x0d7000-0x0d7fff, 0x0d8000-0x0d8fff, 0x0d9000-0x0d9fff, 0x0da000-0x0dafff, 0x0db000-0x0dbfff, 0x0dc000-0x0dcfff, 0x0dd000-0x0ddfff, 0x0de000-0x0defff, 0x0df000-0x0dffff, 0x0e0000-0x0e0fff, 0x0e1000-0x0e1fff, 0x0e2000-0x0e2fff, 0x0e3000-0x0e3fff, 0x0e4000-0x0e4fff, 0x0e5000-0x0e5fff, 0x0e6000-0x0e6fff, 0x0e7000-0x0e7fff, 0x0e8000-0x0e8fff, 0x0e9000-0x0e9fff, 0x0ea000-0x0eafff, 0x0eb000-0x0ebfff, 0x0ec000-0x0ecfff, 0x0ed000-0x0edfff, 0x0ee000-0x0eefff, 0x0ef000-0x0effff, 0x0f0000-0x0f0fff, 0x0f1000-0x0f1fff, 0x0f2000-0x0f2fff, 0x0f3000-0x0f3fff, 0x0f4000-0x0f4fff, 0x0f5000-0x0f5fff, 0x0f6000-0x0f6fff, 0x0f7000-0x0f7fff, 0x0f8000-0x0f8fff, 0x0f9000-0x0f9fff, 0x0fa000-0x0fafff, 0x0fb000-0x0fbfff, 0x0fc000-0x0fcfff, 0x0fd000-0x0fdfff, 0x0fe000-0x0fefff, 0x0ff000-0x0fffff, SUCCESS. COMPLETE. Verifying flash... VERIFY FAILED at 0x00000000! Expected=0xff, Read=0x00, failed byte count from 0x00000000-0x000fffff: 0xc2d1f -- Den_M

1 0

[PATCH] Work around shadowing warnings in libpci headers
by Carl-Daniel Hailfinger 25 Jun '10

25 Jun '10

Work around shadowing warnings in libpci headers. This is needed for warning-free compilation on older gcc versions (3.x and probably older). Such a gcc version is the default on OpenBSD. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-libpci_header_shadow_warning/hwaccess.h =================================================================== --- flashrom-libpci_header_shadow_warning/hwaccess.h (Revision 1045) +++ flashrom-libpci_header_shadow_warning/hwaccess.h (Arbeitskopie) @@ -31,7 +31,14 @@ #endif #if NEED_PCI == 1 +/* + * libpci headers use the variable name "index" which triggers shadowing + * warnings on systems which have the index() function in a default #include + * or as builtin. + */ +#define index shadow_workaround_index #include <pci/pci.h> +#undef index #endif #if defined (__i386__) || defined (__x86_64__) Index: flashrom-libpci_header_shadow_warning/Makefile =================================================================== --- flashrom-libpci_header_shadow_warning/Makefile (Revision 1045) +++ flashrom-libpci_header_shadow_warning/Makefile (Arbeitskopie) @@ -289,7 +289,9 @@ ifeq ($(CHECK_LIBPCI), yes) pciutils: compiler @printf "Checking for libpci headers... " - @$(shell ( echo "#include <pci/pci.h>"; \ + @# Avoid a failing test due to libpci header symbol shadowing breakage + @$(shell ( echo "#define index shadow_workaround_index" \ + echo "#include <pci/pci.h>"; \ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) -- http://www.hailfinger.org/

2 3

[commit] r1061 - trunk
by repository service 25 Jun '10

25 Jun '10

Author: hailfinger Date: Fri Jun 25 15:18:48 2010 New Revision: 1061 URL: http://flashrom.org/trac/coreboot/changeset/1061 Log: Work around shadowing warnings in libpci headers. This is needed for warning-free compilation on older gcc versions (3.x and probably older). Such a gcc version is the default on i386 OpenBSD. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stuart Henderson <sthen(a)openbsd.org> Modified: trunk/Makefile trunk/hwaccess.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Jun 24 13:51:12 2010 (r1060) +++ trunk/Makefile Fri Jun 25 15:18:48 2010 (r1061) @@ -310,7 +310,9 @@ ifeq ($(CHECK_LIBPCI), yes) pciutils: compiler @printf "Checking for libpci headers... " - @$(shell ( echo "#include <pci/pci.h>"; \ + @# Avoid a failing test due to libpci header symbol shadowing breakage + @$(shell ( echo "#define index shadow_workaround_index"; \ + echo "#include <pci/pci.h>"; \ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Thu Jun 24 13:51:12 2010 (r1060) +++ trunk/hwaccess.h Fri Jun 25 15:18:48 2010 (r1061) @@ -31,7 +31,14 @@ #endif #if NEED_PCI == 1 +/* + * libpci headers use the variable name "index" which triggers shadowing + * warnings on systems which have the index() function in a default #include + * or as builtin. + */ +#define index shadow_workaround_index #include <pci/pci.h> +#undef index #endif #if defined (__i386__) || defined (__x86_64__)

1 0

[PATCH] Fix AAI code
by den_m＠hotmail.ru 24 Jun '10

24 Jun '10

Hi again! Sorry, but my mail'll be greater than simply 'acking' r1060 with your patch not working Index: flashrom-spi_aai_outsize_fix/spi.h =================================================================== --- flashrom-spi_aai_outsize_fix/spi.h (Revision 1058) +++ flashrom-spi_aai_outsize_fix/spi.h (Arbeitskopie) @@ -108,15 +108,15 @@ /* JEDEC_READ_INSIZE : any length */ /* Write memory byte */ -#define JEDEC_BYTE_PROGRAM 0x02 +#define JEDEC_BYTE_PROGRAM 0x02 #define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05 #define JEDEC_BYTE_PROGRAM_INSIZE 0x00 /* Write AAI word (SST25VF080B) */ -#define JEDEC_AAI_WORD_PROGRAM 0xad -#define JEDEC_AAI_WORD_PROGRAM_OUTSIZE 0x06 -#define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x06 -#define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00 +#define JEDEC_AAI_WORD_PROGRAM 0xad +#define JEDEC_AAI_WORD_PROGRAM_OUTSIZE 0x06 +#define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x03 +#define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00 /* Error codes */ #define SPI_GENERIC_ERROR -1 r1060 with above patch and following patch also not working: Index: spi25.c =================================================================== --- spi25.c (revision 1060) +++ spi25.c (working copy) @@ -169,6 +169,7 @@ int probe_spi_rdid(struct flashchip *flash) { + spi_write_disable(); return probe_spi_rdid_generic(flash, 3); } but r1060 with all above patches and following patch working: Index: flashchips.c =================================================================== --- flashchips.c (revision 1060) +++ flashchips.c (working copy) @@ -1392,7 +1392,7 @@ .block_erase = spi_block_erase_c7, } }, - .write = spi_aai_write, + .write = spi_chip_write_1,//spi_aai_write, .read = read_memmapped, }, -- Den_M

1 0

report for AMIC A49LF040A
by Guenter 24 Jun '10

24 Jun '10

Hi, I've successfully used flashrom to read, write, verify the AMIC A49LF040A chip on a PC-Engines Alix 2C3 board. Can you please mark this chip as supported? BTW. I would like to subscribe with this email (lists(a)gknw.net) to the flashrom-devel list, but unfortunately the mailman interface doesnt work for me - I never get the confirmation mail (tried a couple of times, also with a gmx account); can you please manually subscribe me? Thanks, Günter. Attachment: flashrom verbose output.

3 11

Test Report: SST SST39SF020A
by Michael Marineau 24 Jun '10

24 Jun '10

Greetings, Flashrom is reporting the following to me, requesting a test report: Found chip "SST SST39SF020A" (256 KB, Parallel) at physical address 0xfffc0000. This flash part has status UNTESTED for operations: ERASE Erase/Write operations appear to work perfectly fine, attached is the verbose log from a write. The mainboard used is an VIA EPIA-MII. Cheers, -- Michael Marineau

2 1

[commit] r1060 - trunk
by repository service 24 Jun '10

24 Jun '10

Author: hailfinger Date: Thu Jun 24 13:51:12 2010 New Revision: 1060 URL: http://flashrom.org/trac/coreboot/changeset/1060 Log: SST39VF010 tested, works. Signed-off-by: Guenter Knauf <lists(a)gknw.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Jun 24 13:39:57 2010 (r1059) +++ trunk/flashchips.c Thu Jun 24 13:51:12 2010 (r1060) @@ -4284,7 +4284,7 @@ .total_size = 128, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers =

1 0

[Patch] Winbond W25Q64 support
by David Hendricks 24 Jun '10

24 Jun '10

This patch adds support for the W25Q64. It's similar, but has its own datasheet [Link<http://www.winbond.com.tw/hq/enu/ProductAndSales/ProductLines/FlashMemory/S…>], although it's mentioned in the W25Q{80,16,32} datasheet once. Anyway, I happen to have one and was able to successfully read, erase, and write to it using an NM10 based device. I was only able to successfully erase with D8h block erase and C7h chip erase commands, but other than that it seemed to work great. Patch attached. Signed-off by: David Hendricks (dhendrix(a)google.com) -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

2 3

[commit] r1059 - trunk
by repository service 24 Jun '10

24 Jun '10

Author: hailfinger Date: Thu Jun 24 13:39:57 2010 New Revision: 1059 URL: http://flashrom.org/trac/coreboot/changeset/1059 Log: Add Winbond W25Q64 support. Tested. Signed-off-by: David Hendricks <dhendrix(a)google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Jun 24 01:14:44 2010 (r1058) +++ trunk/flashchips.c Thu Jun 24 13:39:57 2010 (r1059) @@ -5839,6 +5839,40 @@ { .vendor = "Winbond", + .name = "W25Q64", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = W_25Q64, + .total_size = 8192, + .page_size = 256, + .tested = TEST_OK_PRW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Winbond", .name = "W25x10", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = WINBOND_NEX_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Thu Jun 24 01:14:44 2010 (r1058) +++ trunk/flashchips.h Thu Jun 24 13:39:57 2010 (r1059) @@ -512,6 +512,7 @@ #define W_25Q80 0x4014 #define W_25Q16 0x4015 #define W_25Q32 0x4016 +#define W_25Q64 0x4017 #define W_29C011 0xC1 #define W_29C020C 0x45 /* Same as W29C020 and ASD AE29F2008 */ #define W_29C040P 0x46 /* Same as W29C040 */

1 0

[PATCH] Native DMI parser and cross checking with dmidecode
by Sean Nelson 24 Jun '10

24 Jun '10

The DMI Parser is based on dmidecode 2.10's dmidecode.c Stripped to bare minimums and only parses the System, Baseboard, and Chassis tables. Uses our physmap calls for hardware access. All of the cross-check code is contained in '#if 1' to easily find and shut off usage. Added my copyright line. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

1 0

[Patch] add support for SiS963
by David Borg 24 Jun '10

24 Jun '10

Patch to enable sis963 southbridge and W83697HF/F SuperIO. DO NOT APPLY IT, as it needs to be finalised, (tomorrow probably). Please comment on what else needs to be done (which variables need to be initialised for example). Yes, it's a bit too verbose, but I'm still learning hehe. Probe works and detects the flash chip. Regards, David

1 0

Re: [flashrom] Provide DMI stub for no-OS environments
by Patrick Georgi 24 Jun '10

24 Jun '10

Hi, just wanted to note that the DMI stub patch by Carl-Daniel works fine with flashrom on libpayload. > If flashrom is standalone and has no OS below, it can't call > dmidecode. Provide empty DMI stubs for that case until someone > implements our own dmidecode subset. > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Patrick

2 1

[commit] r1058 - trunk
by repository service 24 Jun '10

24 Jun '10

Author: hailfinger Date: Thu Jun 24 01:14:44 2010 New Revision: 1058 URL: http://flashrom.org/trac/coreboot/changeset/1058 Log: If flashrom is standalone and has no OS below, it can't call dmidecode. Provide empty DMI stubs for that case until someone implements our own dmidecode subset. Tested by Patrick Georgi on top of libpayload. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/dmi.c Modified: trunk/dmi.c ============================================================================== --- trunk/dmi.c Tue Jun 22 01:20:15 2010 (r1057) +++ trunk/dmi.c Thu Jun 24 01:14:44 2010 (r1058) @@ -24,6 +24,26 @@ #include "flash.h" +int has_dmi_support = 0; + +#if STANDALONE + +/* Stub to indicate missing DMI functionality. + * has_dmi_support is 0 by default, so nothing to do here. + * Because dmidecode is not available on all systems, the goal is to implement + * the DMI subset we need directly in this file. + */ +void dmi_init(void) +{ +} + +int dmi_match(const char *pattern) +{ + return 0; +} + +#else /* STANDALONE */ + const char *dmidecode_names[] = { "system-manufacturer", "system-product-name", @@ -36,7 +56,6 @@ #define DMI_COMMAND_LEN_MAX 260 const char *dmidecode_command = "dmidecode"; -int has_dmi_support = 0; char *dmistrings[ARRAY_SIZE(dmidecode_names)]; /* Strings longer than 4096 in DMI are just insane. */ @@ -172,3 +191,5 @@ return 0; } + +#endif /* STANDALONE */

1 0

Re: [flashrom] [PATCH 1/2] Add hp xw9400 board enable.
by Cristian Grimaldo Macias 23 Jun '10

23 Jun '10

Hi. I need flash mi xw9400 mobo, but the flashrom cannot find mis system, I don't know how to use your patch, could yo say me how can I integrate it? Thank you

1 0

[PATCH] Provide DMI stub for no-OS environments
by Carl-Daniel Hailfinger 22 Jun '10

22 Jun '10

If flashrom is standalone and has no OS below, it can't call dmidecode. Provide empty DMI stubs for that case until someone implements our own dmidecode subset. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-dmi_stub/dmi.c =================================================================== --- flashrom-dmi_stub/dmi.c (Revision 1056) +++ flashrom-dmi_stub/dmi.c (Arbeitskopie) @@ -24,6 +24,26 @@ #include "flash.h" +int has_dmi_support = 0; + +#if STANDALONE + +/* Stub to indicate missing DMI functionality. + * has_dmi_support is 0 by default, so nothing to do here. + * Because dmidecode is not available on all systems, the goal is to implement + * the DMI subset we need directly in this file. + */ +void dmi_init(void) +{ +} + +int dmi_match(const char *pattern) +{ + return 0; +} + +#else /* STANDALONE */ + const char *dmidecode_names[] = { "system-manufacturer", "system-product-name", @@ -36,7 +56,6 @@ #define DMI_COMMAND_LEN_MAX 260 const char *dmidecode_command = "dmidecode"; -int has_dmi_support = 0; char *dmistrings[ARRAY_SIZE(dmidecode_names)]; /* Strings longer than 4096 in DMI are just insane. */ @@ -172,3 +191,5 @@ return 0; } + +#endif /* STANDALONE */ -- http://www.hailfinger.org/

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[PATCH] Kill unneeded #include
by Carl-Daniel Hailfinger 22 Jun '10

22 Jun '10

Kill unneeded #include wherever possible. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-include_cleanup/hwaccess.c =================================================================== --- flashrom-include_cleanup/hwaccess.c (Revision 1056) +++ flashrom-include_cleanup/hwaccess.c (Arbeitskopie) @@ -21,10 +21,12 @@ #include <stdint.h> #include <string.h> #include <stdlib.h> +#include <sys/types.h> +#if !defined (__DJGPP__) #include <unistd.h> #include <fcntl.h> -#include <sys/types.h> #include <errno.h> +#endif #include "flash.h" #if defined(__i386__) || defined(__x86_64__) @@ -42,12 +44,14 @@ void get_io_perms(void) { +#if defined(__DJGPP__) + /* We have full permissions by default. */ + return; +#else #if defined (__sun) && (defined(__i386) || defined(__amd64)) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif defined(__FreeBSD__) || defined (__DragonFly__) if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#elif __DJGPP__ - if (0) { #else if (iopl(3) != 0) { #endif @@ -55,6 +59,7 @@ "You need to be root.\n", strerror(errno)); exit(1); } +#endif } void release_io_perms(void) Index: flashrom-include_cleanup/physmap.c =================================================================== --- flashrom-include_cleanup/physmap.c (Revision 1056) +++ flashrom-include_cleanup/physmap.c (Arbeitskopie) @@ -23,13 +23,17 @@ #include <unistd.h> #include <stdio.h> #include <sys/types.h> -#include <sys/stat.h> -#include <fcntl.h> #include <stdlib.h> #include <string.h> -#include <errno.h> #include "flash.h" +/* Do we need any file access or ioctl for physmap or MSR? */ +#if !defined(__DJGPP__) +#include <sys/stat.h> +#include <fcntl.h> +#include <errno.h> +#endif + #ifdef __DJGPP__ #include <dpmi.h> #include <sys/nearptr.h> Index: flashrom-include_cleanup/chipset_enable.c =================================================================== --- flashrom-include_cleanup/chipset_enable.c (Revision 1056) +++ flashrom-include_cleanup/chipset_enable.c (Arbeitskopie) @@ -27,12 +27,10 @@ #define _LARGEFILE64_SOURCE -#include <unistd.h> #include <stdlib.h> #include <string.h> #include <sys/types.h> -#include <sys/stat.h> -#include <fcntl.h> +#include <unistd.h> #include "flash.h" #if defined(__i386__) || defined(__x86_64__) Index: flashrom-include_cleanup/internal.c =================================================================== --- flashrom-include_cleanup/internal.c (Revision 1056) +++ flashrom-include_cleanup/internal.c (Arbeitskopie) @@ -21,10 +21,7 @@ #include <stdint.h> #include <string.h> #include <stdlib.h> -#include <fcntl.h> #include <sys/types.h> -#include <sys/stat.h> -#include <errno.h> #include "flash.h" #if NEED_PCI == 1 -- http://www.hailfinger.org/

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[commit] r1057 - trunk
by repository service 22 Jun '10

22 Jun '10

Author: hailfinger Date: Tue Jun 22 01:20:15 2010 New Revision: 1057 URL: http://flashrom.org/trac/coreboot/changeset/1057 Log: Kill unneeded #include wherever possible. Tested on Linux, FreeBSD, NetBSD, OpenBSD, DOS. Thanks to Jonathan A. Kollasch and Idwer Vollering for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer+lists.flashrom(a)gmail.com> Modified: trunk/chipset_enable.c trunk/hwaccess.c trunk/internal.c trunk/physmap.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Mon Jun 21 18:12:22 2010 (r1056) +++ trunk/chipset_enable.c Tue Jun 22 01:20:15 2010 (r1057) @@ -27,12 +27,10 @@ #define _LARGEFILE64_SOURCE -#include <unistd.h> #include <stdlib.h> #include <string.h> #include <sys/types.h> -#include <sys/stat.h> -#include <fcntl.h> +#include <unistd.h> #include "flash.h" #if defined(__i386__) || defined(__x86_64__) Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Mon Jun 21 18:12:22 2010 (r1056) +++ trunk/hwaccess.c Tue Jun 22 01:20:15 2010 (r1057) @@ -21,10 +21,12 @@ #include <stdint.h> #include <string.h> #include <stdlib.h> +#include <sys/types.h> +#if !defined (__DJGPP__) #include <unistd.h> #include <fcntl.h> -#include <sys/types.h> #include <errno.h> +#endif #include "flash.h" #if defined(__i386__) || defined(__x86_64__) @@ -42,12 +44,14 @@ void get_io_perms(void) { +#if defined(__DJGPP__) + /* We have full permissions by default. */ + return; +#else #if defined (__sun) && (defined(__i386) || defined(__amd64)) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif defined(__FreeBSD__) || defined (__DragonFly__) if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#elif __DJGPP__ - if (0) { #else if (iopl(3) != 0) { #endif @@ -55,6 +59,7 @@ "You need to be root.\n", strerror(errno)); exit(1); } +#endif } void release_io_perms(void) Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Mon Jun 21 18:12:22 2010 (r1056) +++ trunk/internal.c Tue Jun 22 01:20:15 2010 (r1057) @@ -21,10 +21,7 @@ #include <stdint.h> #include <string.h> #include <stdlib.h> -#include <fcntl.h> #include <sys/types.h> -#include <sys/stat.h> -#include <errno.h> #include "flash.h" #if NEED_PCI == 1 Modified: trunk/physmap.c ============================================================================== --- trunk/physmap.c Mon Jun 21 18:12:22 2010 (r1056) +++ trunk/physmap.c Tue Jun 22 01:20:15 2010 (r1057) @@ -23,13 +23,17 @@ #include <unistd.h> #include <stdio.h> #include <sys/types.h> -#include <sys/stat.h> -#include <fcntl.h> #include <stdlib.h> #include <string.h> -#include <errno.h> #include "flash.h" +/* Do we need any file access or ioctl for physmap or MSR? */ +#if !defined(__DJGPP__) +#include <sys/stat.h> +#include <fcntl.h> +#include <errno.h> +#endif + #ifdef __DJGPP__ #include <dpmi.h> #include <sys/nearptr.h>

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Support for HY29F002TC-90 rom
by David Borg 21 Jun '10

21 Jun '10

Hey all, I have the HY29F002TC-90 ( http://www.alldatasheet.com/datasheet-pdf/pdf/82789/HYNIX/HY29F002TC-90.html) rom on a Gigabyte motherboard (GA-6VX7-4X) but flashrom is not detecting it. What can I do to have it recognized and enable reading and re-flashing? Output of flashrom -V is attached (flashrom.txt). Thanks, David

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[commit] r1056 - trunk
by repository service 21 Jun '10

21 Jun '10

Author: hailfinger Date: Mon Jun 21 18:12:22 2010 New Revision: 1056 URL: http://flashrom.org/trac/coreboot/changeset/1056 Log: Add support for Hyundai HY29F002 and HY29F002B. Signed-off-by: David Borg <borg.db(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Jun 20 13:04:26 2010 (r1055) +++ trunk/flashchips.c Mon Jun 21 18:12:22 2010 (r1056) @@ -2363,6 +2363,68 @@ }, { + .vendor = "Hyundai", + .name = "HY29F002T", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = HYUNDAI_ID, + .model_id = HY_29F002T, + .total_size = 256, + .page_size = 256 * 1024, + .feature_bits = FEATURE_EITHER_RESET, /* Some revisions may need FEATURE_ADDR_2AA */ + .tested = TEST_OK_PREW, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "Hyundai", + .name = "HY29F002B", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = HYUNDAI_ID, + .model_id = HY_29F002B, + .total_size = 256, + .page_size = 256 * 1024, + .feature_bits = FEATURE_EITHER_RESET, /* Some revisions may need FEATURE_ADDR_2AA */ + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 3}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { .vendor = "Intel", .name = "28F001BX-B", .bustype = CHIP_BUSTYPE_PARALLEL, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Jun 20 13:04:26 2010 (r1055) +++ trunk/flashchips.h Mon Jun 21 18:12:22 2010 (r1056) @@ -242,7 +242,8 @@ #define HY_29LV800B 0x5B #define HY_29F040A 0xA4 #define HY_29F400B 0xAB /* Same as HY_29F400AB */ -#define HY_29F002 0xB0 +#define HY_29F002B 0x34 +#define HY_29F002T 0xB0 #define HY_29LV400T 0xB9 #define HY_29LV400B 0xBA #define HY_29F080 0xD5

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probe for SST20EE010 fails
by Guenter 21 Jun '10

21 Jun '10

Hi, I've a chip which is from SST and labeled as PH29EE010 150-3CF. flashrom doesnt detect this chip although it should as -L stats: flashrom -L | grep 29EE010 SST SST29EE010 P R W 128 Parallel if I check for the chip it still fails and reads flash content: flashrom -V -c SST29EE010 flashrom v0.9.2-r1039 on Linux 2.6.27-3 (i586), built with libpci 2.2.4-pre4, GCC 4.1.2 20061115 (prerelease) (Debian 4.1.1-21), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 9 usecs, 200M loops per second, 10 myus = 17 us, 100 myus = 231 us, 1000 myus = 1042 us, 10000 myus = 10133 us, 36 myus = 45 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System Manufacturer" DMI string system-product-name: "System Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "P5A-B" DMI string baseboard-version: "REV 1.XX" DMI string chassis-type: "Unknown" Found chipset "ALi M1533", enabling flash write... chipset PCI ID is 10b9:1533, OK. This chipset supports the following protocols: Non-SPI. Probing for SST SST29EE010, 128 KB: probe_jedec_common: id1 0x25, id2 0xfb, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. but if I now probe for Winbond W29C011 then flashrom of course fails but shows the right flash ID: flashrom -V -c W29EE011 flashrom v0.9.2-r1039 on Linux 2.6.27-3 (i586), built with libpci 2.2.4-pre4, GCC 4.1.2 20061115 (prerelease) (Debian 4.1.1-21), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 8 usecs, 29M loops per second, delay more than 10% too short (got 24% of expected delay), recalculating... 32M loops per second, delay more than 10% too short (got 25% of expected delay), recalculating... 34M loops per second, delay more than 10% too short (got 27% of expected delay), recalculating... 33M loops per second, delay more than 10% too short (got 25% of expected delay), recalculating... 32M loops per second, delay loop is unreliable, trying to continue 10 myus = 11 us, 100 myus = 24 us, 1000 myus = 285 us, 10000 myus = 1605 us, 32 myus = 14 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System Manufacturer" DMI string system-product-name: "System Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "P5A-B" DMI string baseboard-version: "REV 1.XX" DMI string chassis-type: "Unknown" Found chipset "ALi M1533", enabling flash write... chipset PCI ID is 10b9:1533, OK. This chipset supports the following protocols: Non-SPI. Probing for Winbond W29EE011, 128 KB: probe_w29ee011: id1 0xbf, id2 0x07 No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. so what is obvious is the huge difference with the calibrating loop, and then that the probe for W29EE011 gives "id1 0xbf, id2 0x07" which is exactly what the datasheet from SST outlines for the SST29EE010 ... I really wonder what goes on there sine - as -L shows - this chip is marked as "P R W" ... Gün.

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