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[PATCH] Print supported flash chips as narrow as possible
by Carl-Daniel Hailfinger 18 Jul '10

18 Jul '10

Print supported flash chips as narrow as possible. Fix a bug where 4 GB of spaces would be printed per line if a vendor name was longer than 10 chars. This patch (or a smaller version) is needed to commit MoselVitelic chip support. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-chiplist_narrow/print.c =================================================================== --- flashrom-chiplist_narrow/print.c (Revision 1087) +++ flashrom-chiplist_narrow/print.c (Arbeitskopie) @@ -76,26 +76,33 @@ static void print_supported_chips(void) { int okcol = 0, pos = 0, i, chipcount = 0; + int maxchiplen = 0, maxvendorlen = 0; struct flashchip *f; for (f = flashchips; f->name != NULL; f++) { - if (GENERIC_DEVICE_ID == f->model_id) + /* Ignore "unknown XXXX SPI chip" entries. */ + if (!strncmp(f->name, "unknown", 7)) continue; - okcol = max(okcol, strlen(f->vendor) + 1 + strlen(f->name)); + chipcount++; + maxvendorlen = max(maxvendorlen, strlen(f->vendor)); + maxchiplen = max(maxchiplen, strlen(f->name)); } - okcol = (okcol + 7) & ~7; + maxvendorlen++; + maxchiplen++; + okcol = maxvendorlen + maxchiplen; - for (f = flashchips; f->name != NULL; f++) - chipcount++; - printf("\nSupported flash chips (total: %d):\n\n", chipcount); - POS_PRINT("Vendor: Device:"); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); - } + printf("Vendor"); + for (i = strlen("Vendor"); i < maxvendorlen; i++) + printf(" "); + printf("Device"); + for (i = strlen("Device"); i < maxchiplen; i++) + printf(" "); - printf("Tested OK:\tKnown BAD: Size/KB: Type:\n\n"); + printf("Tested Known Size/KB: Type:\n"); + for (i = 0; i < okcol; i++) + printf(" "); + printf("OK Broken\n\n"); printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { @@ -104,15 +111,13 @@ continue; printf("%s", f->vendor); - for (i = 0; i < 10 - strlen(f->vendor); i++) + for (i = strlen(f->vendor); i < maxvendorlen; i++) printf(" "); printf("%s", f->name); + for (i = strlen(f->name); i < maxchiplen; i++) + printf(" "); - pos = 10 + strlen(f->name); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); - } + pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { if ((f->tested & TEST_OK_PROBE)) POS_PRINT("P "); @@ -124,21 +129,25 @@ POS_PRINT("W "); } while (pos < okcol + 9) { - printf("\t"); - pos += 8 - (pos % 8); + printf(" "); + pos++; } if ((f->tested & TEST_BAD_MASK)) { if ((f->tested & TEST_BAD_PROBE)) - printf("P "); + POS_PRINT("P "); if ((f->tested & TEST_BAD_READ)) - printf("R "); + POS_PRINT("R "); if ((f->tested & TEST_BAD_ERASE)) - printf("E "); + POS_PRINT("E "); if ((f->tested & TEST_BAD_WRITE)) - printf("W "); + POS_PRINT("W "); } - printf("\t %d", f->total_size); + while (pos < okcol + 18) { + printf(" "); + pos++; + } + printf("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) printf(" "); printf("%s\n", flashbuses_to_text(f->bustype)); -- http://www.hailfinger.org/

2 2

[commit] r1090 - trunk
by repository service 18 Jul '10

18 Jul '10

Author: hailfinger Date: Sun Jul 18 01:21:12 2010 New Revision: 1090 URL: http://flashrom.org/trac/coreboot/changeset/1090 Log: Print supported flash chips as narrow as possible. Fix a bug where 4 GB of spaces would be printed per line if a vendor name was longer than 10 chars. This patch is needed to commit MoselVitelic chip support. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/print.c Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Jul 18 00:42:33 2010 (r1089) +++ trunk/print.c Sun Jul 18 01:21:12 2010 (r1090) @@ -76,26 +76,33 @@ static void print_supported_chips(void) { int okcol = 0, pos = 0, i, chipcount = 0; + int maxchiplen = 0, maxvendorlen = 0; struct flashchip *f; for (f = flashchips; f->name != NULL; f++) { - if (GENERIC_DEVICE_ID == f->model_id) + /* Ignore "unknown XXXX SPI chip" entries. */ + if (!strncmp(f->name, "unknown", 7)) continue; - okcol = max(okcol, strlen(f->vendor) + 1 + strlen(f->name)); - } - okcol = (okcol + 7) & ~7; - - for (f = flashchips; f->name != NULL; f++) chipcount++; - - printf("\nSupported flash chips (total: %d):\n\n", chipcount); - POS_PRINT("Vendor: Device:"); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); + maxvendorlen = max(maxvendorlen, strlen(f->vendor)); + maxchiplen = max(maxchiplen, strlen(f->name)); } + maxvendorlen++; + maxchiplen++; + okcol = maxvendorlen + maxchiplen; - printf("Tested OK:\tKnown BAD: Size/KB: Type:\n\n"); + printf("\nSupported flash chips (total: %d):\n\n", chipcount); + printf("Vendor"); + for (i = strlen("Vendor"); i < maxvendorlen; i++) + printf(" "); + printf("Device"); + for (i = strlen("Device"); i < maxchiplen; i++) + printf(" "); + + printf("Tested Known Size/KB: Type:\n"); + for (i = 0; i < okcol; i++) + printf(" "); + printf("OK Broken\n\n"); printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { @@ -104,15 +111,13 @@ continue; printf("%s", f->vendor); - for (i = 0; i < 10 - strlen(f->vendor); i++) + for (i = strlen(f->vendor); i < maxvendorlen; i++) printf(" "); printf("%s", f->name); + for (i = strlen(f->name); i < maxchiplen; i++) + printf(" "); - pos = 10 + strlen(f->name); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); - } + pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { if ((f->tested & TEST_OK_PROBE)) POS_PRINT("P "); @@ -124,21 +129,25 @@ POS_PRINT("W "); } while (pos < okcol + 9) { - printf("\t"); - pos += 8 - (pos % 8); + printf(" "); + pos++; } if ((f->tested & TEST_BAD_MASK)) { if ((f->tested & TEST_BAD_PROBE)) - printf("P "); + POS_PRINT("P "); if ((f->tested & TEST_BAD_READ)) - printf("R "); + POS_PRINT("R "); if ((f->tested & TEST_BAD_ERASE)) - printf("E "); + POS_PRINT("E "); if ((f->tested & TEST_BAD_WRITE)) - printf("W "); + POS_PRINT("W "); } - printf("\t %d", f->total_size); + while (pos < okcol + 18) { + printf(" "); + pos++; + } + printf("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) printf(" "); printf("%s\n", flashbuses_to_text(f->bustype));

1 0

[PATCH] Use struct pointer instead of enum to set bitbang adapter
by Michael Karcher 18 Jul '10

18 Jul '10

Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- bitbang_spi.c | 23 ++++++----------------- flash.h | 11 ++++++----- flashrom.c | 6 ------ 3 files changed, 12 insertions(+), 28 deletions(-) diff --git a/bitbang_spi.c b/bitbang_spi.c index b543fd4..9f0e878 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -29,45 +29,34 @@ /* Length of half a clock period in usecs. */ static int bitbang_spi_half_period; -static enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID; - -static const struct bitbang_spi_master_entry bitbang_spi_master_table[] = { - {}, /* This entry corresponds to BITBANG_SPI_INVALID. */ -}; - -const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table); +static const struct bitbang_spi_master *bitbang_spi_master = NULL; /* Note that CS# is active low, so val=0 means the chip is active. */ static void bitbang_spi_set_cs(int val) { - bitbang_spi_master_table[bitbang_spi_master].set_cs(val); + bitbang_spi_master->set_cs(val); } static void bitbang_spi_set_sck(int val) { - bitbang_spi_master_table[bitbang_spi_master].set_sck(val); + bitbang_spi_master->set_sck(val); } static void bitbang_spi_set_mosi(int val) { - bitbang_spi_master_table[bitbang_spi_master].set_mosi(val); + bitbang_spi_master->set_mosi(val); } static int bitbang_spi_get_miso(void) { - return bitbang_spi_master_table[bitbang_spi_master].get_miso(); + return bitbang_spi_master->get_miso(); } -int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod) +int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod) { bitbang_spi_master = master; bitbang_spi_half_period = halfperiod; - if (bitbang_spi_master == BITBANG_SPI_INVALID) { - msg_perr("Invalid bitbang SPI master. \n" - "Please report a bug at flashrom(a)flashrom.org\n"); - return 1; - } bitbang_spi_set_cs(1); bitbang_spi_set_sck(0); bitbang_spi_set_mosi(0); diff --git a/flash.h b/flash.h index c858eba..c3302c4 100644 --- a/flash.h +++ b/flash.h @@ -127,13 +127,14 @@ uint32_t chip_readl(const chipaddr addr); void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void programmer_delay(int usecs); -enum bitbang_spi_master { - BITBANG_SPI_INVALID /* This must always be the last entry. */ +enum bitbang_spi_master_type { + BITBANG_SPI_DUMMY /* remove as soon as there is a real entry */ }; -extern const int bitbang_spi_master_count; +struct bitbang_spi_master { + enum bitbang_spi_master_type type; -struct bitbang_spi_master_entry { + /* Note that CS# is active low, so val=0 means the chip is active. */ void (*set_cs) (int val); void (*set_sck) (int val); void (*set_mosi) (int val); @@ -531,7 +532,7 @@ int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* bitbang_spi.c */ -int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod); +int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); diff --git a/flashrom.c b/flashrom.c index 2118bec..fe173a7 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1358,12 +1358,6 @@ int selfcheck(void) msg_gerr("SPI programmer table miscompilation!\n"); ret = 1; } -#if CONFIG_BITBANG_SPI == 1 - if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { - msg_gerr("Bitbanging SPI master table miscompilation!\n"); - ret = 1; - } -#endif for (flash = flashchips; flash && flash->name; flash++) if (selfcheck_eraseblocks(flash)) ret = 1; -- 1.7.1

1 0

[PATCH] Use struct pointer instead of enum to set bitbang adapter
by Michael Karcher 18 Jul '10

18 Jul '10

Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- bitbang_spi.c | 23 ++++++----------------- flash.h | 11 +++++------ 2 files changed, 11 insertions(+), 23 deletions(-) diff --git a/bitbang_spi.c b/bitbang_spi.c index b543fd4..9fd5542 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -29,45 +29,34 @@ /* Length of half a clock period in usecs. */ static int bitbang_spi_half_period; -static enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID; - -static const struct bitbang_spi_master_entry bitbang_spi_master_table[] = { - {}, /* This entry corresponds to BITBANG_SPI_INVALID. */ -}; - -const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table); +static struct bitbang_spi_master * bitbang_spi_master = NULL; /* Note that CS# is active low, so val=0 means the chip is active. */ static void bitbang_spi_set_cs(int val) { - bitbang_spi_master_table[bitbang_spi_master].set_cs(val); + bitbang_spi_master->set_cs(val); } static void bitbang_spi_set_sck(int val) { - bitbang_spi_master_table[bitbang_spi_master].set_sck(val); + bitbang_spi_master->set_sck(val); } static void bitbang_spi_set_mosi(int val) { - bitbang_spi_master_table[bitbang_spi_master].set_mosi(val); + bitbang_spi_master->set_mosi(val); } static int bitbang_spi_get_miso(void) { - return bitbang_spi_master_table[bitbang_spi_master].get_miso(); + return bitbang_spi_master->get_miso(); } -int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod) +int bitbang_spi_init(struct bitbang_spi_master * master, int halfperiod) { bitbang_spi_master = master; bitbang_spi_half_period = halfperiod; - if (bitbang_spi_master == BITBANG_SPI_INVALID) { - msg_perr("Invalid bitbang SPI master. \n" - "Please report a bug at flashrom(a)flashrom.org\n"); - return 1; - } bitbang_spi_set_cs(1); bitbang_spi_set_sck(0); bitbang_spi_set_mosi(0); diff --git a/flash.h b/flash.h index c858eba..88210db 100644 --- a/flash.h +++ b/flash.h @@ -127,13 +127,12 @@ uint32_t chip_readl(const chipaddr addr); void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void programmer_delay(int usecs); -enum bitbang_spi_master { - BITBANG_SPI_INVALID /* This must always be the last entry. */ +enum bitbang_spi_master_type { + BITBANG_SPI_DUMMY /* remove as soon as there is a real entry */ }; -extern const int bitbang_spi_master_count; - -struct bitbang_spi_master_entry { +struct bitbang_spi_master { + enum bitbang_spi_master_type type; void (*set_cs) (int val); void (*set_sck) (int val); void (*set_mosi) (int val); @@ -531,7 +530,7 @@ int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* bitbang_spi.c */ -int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod); +int bitbang_spi_init(struct bitbang_spi_master * master, int halfperiod); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); -- 1.7.1

1 0

[PATCH] drkaiser: MEM BAR fixes
by Carl-Daniel Hailfinger 18 Jul '10

18 Jul '10

Use the BAR value returned by pcidev_init which automatically uses the correct BAR mask. Truncate flash chip addresses to fit into the 128 kB memory window. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-drkaiser_pcibar_mask_mem_bounds_checking/drkaiser.c =================================================================== --- flashrom-drkaiser_pcibar_mask_mem_bounds_checking/drkaiser.c (Revision 946) +++ flashrom-drkaiser_pcibar_mask_mem_bounds_checking/drkaiser.c (Arbeitskopie) @@ -40,16 +40,13 @@ uint32_t addr; get_io_perms(); - pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2, - drkaiser_pcidev, programmer_param); + addr = pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2, + drkaiser_pcidev, programmer_param); /* Write magic register to enable flash write. */ pci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); - /* TODO: Mask lower bits? How many? 3? 7? */ - addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_2) & ~0x03; - /* Map 128KB flash memory window. */ drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", addr, 128 * 1024); @@ -70,10 +67,12 @@ void drkaiser_chip_writeb(uint8_t val, chipaddr addr) { - mmio_writeb(val, drkaiser_bar + addr); + /* Restrict flash accesses to the 128kB memory window. */ + mmio_writeb(val, drkaiser_bar + (addr & ((1 << 17) - 1))); } uint8_t drkaiser_chip_readb(const chipaddr addr) { - return mmio_readb(drkaiser_bar + addr); + /* Restrict flash accesses to the 128kB memory window. */ + return mmio_readb(drkaiser_bar + (addr & ((1 << 17) - 1))); } -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

2 4

[commit] r1089 - trunk
by repository service 18 Jul '10

18 Jul '10

Author: hailfinger Date: Sun Jul 18 00:42:33 2010 New Revision: 1089 URL: http://flashrom.org/trac/coreboot/changeset/1089 Log: Use the BAR value returned by pcidev_init which automatically applies the correct BAR mask for the drkaiser driver. Truncate flash chip addresses to fit into the 128 kB memory window for drkaiser and pick the same window size for gfxnvidia. Uwe tested all operations successfully on a Dr. Kaiser card. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/drkaiser.c trunk/gfxnvidia.c Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Sun Jul 18 00:28:05 2010 (r1088) +++ trunk/drkaiser.c Sun Jul 18 00:42:33 2010 (r1089) @@ -26,6 +26,9 @@ #define PCI_MAGIC_DRKAISER_ADDR 0x50 #define PCI_MAGIC_DRKAISER_VALUE 0xa971 +/* Mask to restrict flash accesses to the 128kB memory window. */ +#define DRKAISER_MEMMAP_MASK ((1 << 17) - 1) + const struct pcidev_status drkaiser_pcidev[] = { {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"}, {}, @@ -39,16 +42,13 @@ get_io_perms(); - pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2, - drkaiser_pcidev); + addr = pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2, + drkaiser_pcidev); /* Write magic register to enable flash write. */ pci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); - /* TODO: Mask lower bits? How many? 3? 7? */ - addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_2) & ~0x03; - /* Map 128KB flash memory window. */ drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", addr, 128 * 1024); @@ -69,10 +69,10 @@ void drkaiser_chip_writeb(uint8_t val, chipaddr addr) { - mmio_writeb(val, drkaiser_bar + addr); + mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); } uint8_t drkaiser_chip_readb(const chipaddr addr) { - return mmio_readb(drkaiser_bar + addr); + return mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); } Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Sun Jul 18 00:28:05 2010 (r1088) +++ trunk/gfxnvidia.c Sun Jul 18 00:42:33 2010 (r1089) @@ -25,6 +25,11 @@ #define PCI_VENDOR_ID_NVIDIA 0x10de +/* Mask to restrict flash accesses to a 128kB memory window. + * FIXME: Is this size a one-fits-all or card dependent? + */ +#define GFXNVIDIA_MEMMAP_MASK ((1 << 17) - 1) + uint8_t *nvidia_bar; const struct pcidev_status gfx_nvidia[] = { @@ -95,10 +100,10 @@ void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr) { - mmio_writeb(val, nvidia_bar + addr); + mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); } uint8_t gfxnvidia_chip_readb(const chipaddr addr) { - return mmio_readb(nvidia_bar + addr); + return mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); }

1 0

[PATCH] Add support for libpci older than 2.2
by Carl-Daniel Hailfinger 18 Jul '10

18 Jul '10

Add support for pciutils/libpci older than 2.2. Needed on the original Xbox running Xebian and a few other ancient systems. Alec, if this fixes compilation for you, can you please respond with > Acked-by: Your Name <your@email> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-libpci_before_2_2/board_enable.c =================================================================== --- flashrom-libpci_before_2_2/board_enable.c (Revision 1085) +++ flashrom-libpci_before_2_2/board_enable.c (Arbeitskopie) @@ -785,7 +785,14 @@ return -1; } +#if PCI_LIB_VERSION >= 0x020200 dev = pci_get_dev(pacc, dev->domain, dev->bus, dev->dev, 1); +#else + /* libpci before 2.2 */ + msg_pinfo("Your pciutils/libpci version is too old to support " + "PCI domains. Continuing anyway.\n"); + dev = pci_get_dev(pacc, dev->bus, dev->dev, 1); +#endif if (!dev) { msg_perr("MCP SMBus controller could not be found\n"); return -1; -- http://www.hailfinger.org/

3 3

[commit] r1088 - trunk
by repository service 18 Jul '10

18 Jul '10

Author: hailfinger Date: Sun Jul 18 00:28:05 2010 New Revision: 1088 URL: http://flashrom.org/trac/coreboot/changeset/1088 Log: Add support for pciutils/libpci older than 2.2. Needed on the original Xbox running Xebian and a few other ancient systems. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Alec Wright <alecjw(a)member.fsf.org> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Jul 17 16:49:30 2010 (r1087) +++ trunk/board_enable.c Sun Jul 18 00:28:05 2010 (r1088) @@ -785,7 +785,15 @@ return -1; } +#if PCI_LIB_VERSION >= 0x020200 dev = pci_get_dev(pacc, dev->domain, dev->bus, dev->dev, 1); +#else + /* pciutils/libpci before version 2.2 is too old to support + * PCI domains. Such old machines usually don't have domains + * besides domain 0, so this is not a problem. + */ + dev = pci_get_dev(pacc, dev->bus, dev->dev, 1); +#endif if (!dev) { msg_perr("MCP SMBus controller could not be found\n"); return -1;

1 0

[PATCH] SPI bitbanging core fixups
by Carl-Daniel Hailfinger 17 Jul '10

17 Jul '10

Change the SPI bitbanging core to fix a few subtle bugs (which had no effect so far) and to make integration of the RayeR SPIPGM and Nvidia MCP6x/MCP7x SPI patches easier. A big thank you to Johannes Sjölund for testing the code as part of the Nvidia MCP6x/MCP7x SPI bitbanging patch. This is the common part of the RayeR/Nvidia SPI patch. Tested on a dozen machines, works fine. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-bitbang_spi_fixup/flash.h =================================================================== --- flashrom-bitbang_spi_fixup/flash.h (Revision 1082) +++ flashrom-bitbang_spi_fixup/flash.h (Arbeitskopie) @@ -133,8 +133,6 @@ extern const int bitbang_spi_master_count; -extern enum bitbang_spi_master bitbang_spi_master; - struct bitbang_spi_master_entry { void (*set_cs) (int val); void (*set_sck) (int val); @@ -535,7 +533,7 @@ /* bitbang_spi.c */ extern int bitbang_spi_half_period; extern const struct bitbang_spi_master_entry bitbang_spi_master_table[]; -int bitbang_spi_init(void); +int bitbang_spi_init(enum bitbang_spi_master master); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); Index: flashrom-bitbang_spi_fixup/hwaccess.h =================================================================== --- flashrom-bitbang_spi_fixup/hwaccess.h (Revision 1082) +++ flashrom-bitbang_spi_fixup/hwaccess.h (Arbeitskopie) @@ -176,6 +176,10 @@ #define __DARWIN__ #endif +/* Clarification about OUTB/OUTW/OUTL argument order: + * OUT[BWL](val, port) + */ + #if defined(__FreeBSD__) || defined(__DragonFly__) #include <machine/cpufunc.h> #define off64_t off_t Index: flashrom-bitbang_spi_fixup/bitbang_spi.c =================================================================== --- flashrom-bitbang_spi_fixup/bitbang_spi.c (Revision 1082) +++ flashrom-bitbang_spi_fixup/bitbang_spi.c (Arbeitskopie) @@ -26,8 +26,8 @@ #include "chipdrivers.h" #include "spi.h" -/* Length of half a clock period in usecs */ -int bitbang_spi_half_period = 0; +/* Length of half a clock period in usecs. Default to 1 (500 kHz). */ +int bitbang_spi_half_period = 1; enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID; @@ -37,6 +37,7 @@ const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table); +/* Note that CS# is active low, so val=0 means the chip is active. */ void bitbang_spi_set_cs(int val) { bitbang_spi_master_table[bitbang_spi_master].set_cs(val); @@ -57,10 +58,18 @@ return bitbang_spi_master_table[bitbang_spi_master].get_miso(); } -int bitbang_spi_init(void) +int bitbang_spi_init(enum bitbang_spi_master master) { + bitbang_spi_master = master; + + if (bitbang_spi_master == BITBANG_SPI_INVALID) { + msg_perr("Invalid bitbang SPI master. \n" + "Please report a bug at flashrom(a)flashrom.org\n"); + return 1; + } bitbang_spi_set_cs(1); bitbang_spi_set_sck(0); + bitbang_spi_set_mosi(0); buses_supported = CHIP_BUSTYPE_SPI; return 0; } @@ -87,6 +96,7 @@ { static unsigned char *bufout = NULL; static unsigned char *bufin = NULL; + unsigned char *tmp; static int oldbufsize = 0; int bufsize; int i; @@ -98,20 +108,34 @@ bufsize = max(writecnt + readcnt, 260); /* Never shrink. realloc() calls are expensive. */ if (bufsize > oldbufsize) { - bufout = realloc(bufout, bufsize); - if (!bufout) { + tmp = realloc(bufout, bufsize); + if (!tmp) { msg_perr("Out of memory!\n"); + if (bufout) + free(bufout); + bufout = NULL; if (bufin) free(bufin); + bufin = NULL; + oldbufsize = 0; exit(1); - } - bufin = realloc(bufout, bufsize); - if (!bufin) { + } else + bufout = tmp; + + tmp = realloc(bufin, bufsize); + if (!tmp) { msg_perr("Out of memory!\n"); + if (bufin) + free(bufin); + bufin = NULL; if (bufout) free(bufout); + bufout = NULL; + oldbufsize = 0; exit(1); - } + } else + bufin = tmp; + oldbufsize = bufsize; } @@ -135,8 +159,13 @@ int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - /* Maximum read length is unlimited, use 64k bytes. */ - return spi_read_chunked(flash, buf, start, len, 64 * 1024); + /* Maximum read length is unlimited in theory. + * The current implementation can handle reads of up to 65536 bytes. + * Please note that you need two buffers of 2n+4 bytes each for a read + * of n bytes, resulting in a total memory requirement of 4n+8 bytes. + * To conserve memory, read in chunks of 256 bytes. + */ + return spi_read_chunked(flash, buf, start, len, 256); } int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -- http://www.hailfinger.org/

2 12

[PATCH] Print clang version
by Carl-Daniel Hailfinger 17 Jul '10

17 Jul '10

Newer llvm/clang versions (since r102686) have a __clang_version__ macro which can be used to print the exact clang version. Fix a case where chip_to_probe was referenced twice via extern, once at the function level and once in a global include file. Found by latest clang. Tested on old and new clang. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-clang_version/w29ee011.c =================================================================== --- flashrom-clang_version/w29ee011.c (Revision 1073) +++ flashrom-clang_version/w29ee011.c (Arbeitskopie) @@ -26,7 +26,6 @@ { chipaddr bios = flash->virtual_memory; uint8_t id1, id2; - extern char *chip_to_probe; if (!chip_to_probe || strcmp(chip_to_probe, "W29EE011")) { msg_cdbg("Probing disabled for Winbond W29EE011 because " Index: flashrom-clang_version/flashrom.c =================================================================== --- flashrom-clang_version/flashrom.c (Revision 1073) +++ flashrom-clang_version/flashrom.c (Arbeitskopie) @@ -1272,7 +1272,12 @@ #endif #endif #ifdef __clang__ - msg_ginfo(" LLVM %i/clang %i, ", __llvm__, __clang__); + msg_ginfo(" LLVM Clang"); +#ifdef __clang_version__ + msg_ginfo(" %s,", __clang_version__); +#else + msg_ginfo(" unknown version (before r102686),"); +#endif #elif defined(__GNUC__) msg_ginfo(" GCC"); #ifdef __VERSION__ -- http://www.hailfinger.org/

2 2

[commit] r1087 - trunk
by repository service 17 Jul '10

17 Jul '10

Author: hailfinger Date: Sat Jul 17 16:49:30 2010 New Revision: 1087 URL: http://flashrom.org/trac/coreboot/changeset/1087 Log: Newer llvm/clang versions (since r102686) have a __clang_version__ macro which can be used to print the exact clang version. Fix a case where chip_to_probe was referenced twice via extern, once at the function level and once in a global include file. Found by latest clang. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.c trunk/w29ee011.c Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Jul 17 15:45:42 2010 (r1086) +++ trunk/flashrom.c Sat Jul 17 16:49:30 2010 (r1087) @@ -1305,7 +1305,12 @@ #endif #endif #ifdef __clang__ - msg_ginfo(" LLVM %i/clang %i, ", __llvm__, __clang__); + msg_ginfo(" LLVM Clang"); +#ifdef __clang_version__ + msg_ginfo(" %s,", __clang_version__); +#else + msg_ginfo(" unknown version (before r102686),"); +#endif #elif defined(__GNUC__) msg_ginfo(" GCC"); #ifdef __VERSION__ Modified: trunk/w29ee011.c ============================================================================== --- trunk/w29ee011.c Sat Jul 17 15:45:42 2010 (r1086) +++ trunk/w29ee011.c Sat Jul 17 16:49:30 2010 (r1087) @@ -26,7 +26,6 @@ { chipaddr bios = flash->virtual_memory; uint8_t id1, id2; - extern char *chip_to_probe; if (!chip_to_probe || strcmp(chip_to_probe, "W29EE011")) { msg_cdbg("Probing disabled for Winbond W29EE011 because "

1 0

[PATCH] Add Winbond W49F020 (Xbox) support
by Carl-Daniel Hailfinger 17 Jul '10

17 Jul '10

Hi Alec, could you try this patch on your Xbox? If it works, please reply-to-all with the output from flashrom -V and include a line saying "Acked-by: Your Name <your@email>". Add Winbond W49F020 support. This chip is used on some Xbox versions. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-w49f020/flashchips.c =================================================================== --- flashrom-w49f020/flashchips.c (Revision 1082) +++ flashrom-w49f020/flashchips.c (Arbeitskopie) @@ -6474,6 +6474,29 @@ { .vendor = "Winbond", + .name = "W49F020", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = WINBOND_ID, + .model_id = W_49F020, + .total_size = 256, + .page_size = 128, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = 10, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "Winbond", .name = "W49V002A", .bustype = CHIP_BUSTYPE_LPC, .manufacture_id = WINBOND_ID, -- http://www.hailfinger.org/

2 3

[commit] r1086 - trunk
by repository service 17 Jul '10

17 Jul '10

Author: hailfinger Date: Sat Jul 17 15:45:42 2010 New Revision: 1086 URL: http://flashrom.org/trac/coreboot/changeset/1086 Log: Add Winbond W49F020 support. This chip is used on some Xbox versions. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Alec Wright <alecjw(a)member.fsf.org> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Jul 17 14:54:09 2010 (r1085) +++ trunk/flashchips.c Sat Jul 17 15:45:42 2010 (r1086) @@ -6505,6 +6505,29 @@ { .vendor = "Winbond", + .name = "W49F020", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = WINBOND_ID, + .model_id = W_49F020, + .total_size = 256, + .page_size = 128, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_OK_PROBE, + .probe = probe_jedec, + .probe_timing = 10, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "Winbond", .name = "W49V002A", .bustype = CHIP_BUSTYPE_LPC, .manufacture_id = WINBOND_ID,

1 0

[commit] r1085 - trunk
by repository service 17 Jul '10

17 Jul '10

Author: hailfinger Date: Sat Jul 17 14:54:09 2010 New Revision: 1085 URL: http://flashrom.org/trac/coreboot/changeset/1085 Log: Change the SPI bitbanging core to fix a subtle bug (which had no effect so far) and to make integration of the RayeR SPIPGM and Nvidia MCP6x/MCP7x SPI patches easier. Kill a few global variables and require explicit initialization of bitbanging delay. A big thank you to Johannes Sjölund for testing an earlier version of the code as part of the Nvidia MCP6x/MCP7x SPI bitbanging patch. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/bitbang_spi.c trunk/flash.h trunk/hwaccess.h Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Sat Jul 17 12:42:34 2010 (r1084) +++ trunk/bitbang_spi.c Sat Jul 17 14:54:09 2010 (r1085) @@ -26,46 +26,55 @@ #include "chipdrivers.h" #include "spi.h" -/* Length of half a clock period in usecs */ -int bitbang_spi_half_period = 0; +/* Length of half a clock period in usecs. */ +static int bitbang_spi_half_period; -enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID; +static enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID; -const struct bitbang_spi_master_entry bitbang_spi_master_table[] = { +static const struct bitbang_spi_master_entry bitbang_spi_master_table[] = { {}, /* This entry corresponds to BITBANG_SPI_INVALID. */ }; const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table); -void bitbang_spi_set_cs(int val) +/* Note that CS# is active low, so val=0 means the chip is active. */ +static void bitbang_spi_set_cs(int val) { bitbang_spi_master_table[bitbang_spi_master].set_cs(val); } -void bitbang_spi_set_sck(int val) +static void bitbang_spi_set_sck(int val) { bitbang_spi_master_table[bitbang_spi_master].set_sck(val); } -void bitbang_spi_set_mosi(int val) +static void bitbang_spi_set_mosi(int val) { bitbang_spi_master_table[bitbang_spi_master].set_mosi(val); } -int bitbang_spi_get_miso(void) +static int bitbang_spi_get_miso(void) { return bitbang_spi_master_table[bitbang_spi_master].get_miso(); } -int bitbang_spi_init(void) +int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod) { + bitbang_spi_master = master; + bitbang_spi_half_period = halfperiod; + + if (bitbang_spi_master == BITBANG_SPI_INVALID) { + msg_perr("Invalid bitbang SPI master. \n" + "Please report a bug at flashrom(a)flashrom.org\n"); + return 1; + } bitbang_spi_set_cs(1); bitbang_spi_set_sck(0); - buses_supported = CHIP_BUSTYPE_SPI; + bitbang_spi_set_mosi(0); return 0; } -uint8_t bitbang_spi_readwrite_byte(uint8_t val) +static uint8_t bitbang_spi_readwrite_byte(uint8_t val) { uint8_t ret = 0; int i; Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sat Jul 17 12:42:34 2010 (r1084) +++ trunk/flash.h Sat Jul 17 14:54:09 2010 (r1085) @@ -133,8 +133,6 @@ extern const int bitbang_spi_master_count; -extern enum bitbang_spi_master bitbang_spi_master; - struct bitbang_spi_master_entry { void (*set_cs) (int val); void (*set_sck) (int val); @@ -533,9 +531,7 @@ int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* bitbang_spi.c */ -extern int bitbang_spi_half_period; -extern const struct bitbang_spi_master_entry bitbang_spi_master_table[]; -int bitbang_spi_init(void); +int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Sat Jul 17 12:42:34 2010 (r1084) +++ trunk/hwaccess.h Sat Jul 17 14:54:09 2010 (r1085) @@ -176,6 +176,10 @@ #define __DARWIN__ #endif +/* Clarification about OUTB/OUTW/OUTL argument order: + * OUT[BWL](val, port) + */ + #if defined(__FreeBSD__) || defined(__DragonFly__) #include <machine/cpufunc.h> #define off64_t off_t

1 0

[commit] r1084 - trunk
by repository service 17 Jul '10

17 Jul '10

Author: mkarcher Date: Sat Jul 17 12:42:34 2010 New Revision: 1084 URL: http://flashrom.org/trac/coreboot/changeset/1084 Log: remove temporary buffers from bitbanging This removes the need of allocating an extra buffer, but also removes the possibility of having the data read back during the initial write phase for debugging purposes. Compile tested, no functional testing. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/bitbang_spi.c Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Sat Jul 17 00:07:20 2010 (r1083) +++ trunk/bitbang_spi.c Sat Jul 17 12:42:34 2010 (r1084) @@ -85,50 +85,17 @@ int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { - static unsigned char *bufout = NULL; - static unsigned char *bufin = NULL; - static int oldbufsize = 0; - int bufsize; int i; - /* Arbitrary size limitation here. We're only constrained by memory. */ - if (writecnt > 65536 || readcnt > 65536) - return SPI_INVALID_LENGTH; - - bufsize = max(writecnt + readcnt, 260); - /* Never shrink. realloc() calls are expensive. */ - if (bufsize > oldbufsize) { - bufout = realloc(bufout, bufsize); - if (!bufout) { - msg_perr("Out of memory!\n"); - if (bufin) - free(bufin); - exit(1); - } - bufin = realloc(bufout, bufsize); - if (!bufin) { - msg_perr("Out of memory!\n"); - if (bufout) - free(bufout); - exit(1); - } - oldbufsize = bufsize; - } - - memcpy(bufout, writearr, writecnt); - /* Shift out 0x00 while reading data. */ - memset(bufout + writecnt, 0x00, readcnt); - /* Make sure any non-read data is 0xff. */ - memset(bufin + writecnt, 0xff, readcnt); - bitbang_spi_set_cs(0); - for (i = 0; i < readcnt + writecnt; i++) { - bufin[i] = bitbang_spi_readwrite_byte(bufout[i]); - } + for (i = 0; i < writecnt; i++) + bitbang_spi_readwrite_byte(writearr[i]); + for (i = 0; i < readcnt; i++) + readarr[i] = bitbang_spi_readwrite_byte(0); + programmer_delay(bitbang_spi_half_period); bitbang_spi_set_cs(1); programmer_delay(bitbang_spi_half_period); - memcpy(readarr, bufin + writecnt, readcnt); return 0; }

1 0

[PATCH] M29F400 family fixups
by Carl-Daniel Hailfinger 17 Jul '10

17 Jul '10

Mark Fujitsu MBM29F400BC write as broken (implicit eraseblock layout in write). Use full-chip write function on Fujitsu MBM29F400TC and ST M29F400BT. Add support for ST M29F400BB. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-m29f400bt_fixup/flashchips.c =================================================================== --- flashrom-m29f400bt_fixup/flashchips.c (Revision 1082) +++ flashrom-m29f400bt_fixup/flashchips.c (Arbeitskopie) @@ -2382,7 +2382,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_BAD_WRITE, /* Implicit eraseblock layout in write_m29f400bt is broken. */ .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ .block_erasers = @@ -2400,7 +2400,7 @@ .block_erase = block_erase_chip_m29f400bt, }, }, - .write = write_coreboot_m29f400bt, + .write = NULL, .read = read_memmapped, }, @@ -2431,7 +2431,7 @@ .block_erase = block_erase_chip_m29f400bt, }, }, - .write = write_coreboot_m29f400bt, + .write = write_m29f400bt, .read = read_memmapped, }, @@ -5278,7 +5278,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -5296,6 +5296,37 @@ { /* FIXME: this has WORD/BYTE sequences; 2AA for word, 555 for byte */ .vendor = "ST", + .name = "M29F400BB", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = ST_ID, + .model_id = ST_M29F400BB, + .total_size = 512, + .page_size = 64 * 1024, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .tested = TEST_BAD_WRITE, /* Implicit eraseblock layout in write_m29f400bt is broken. */ + .probe = probe_m29f400bt, + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 7}, + }, + .block_erase = block_erase_m29f400bt, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = block_erase_chip_m29f400bt, + } + }, + .write = NULL, + .read = read_memmapped, + }, + { + /* FIXME: this has WORD/BYTE sequences; 2AA for word, 555 for byte */ + .vendor = "ST", .name = "M29F400BT", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = ST_ID, @@ -5321,7 +5352,7 @@ .block_erase = block_erase_chip_m29f400bt, } }, - .write = write_coreboot_m29f400bt, + .write = write_m29f400bt, .read = read_memmapped, }, Index: flashrom-m29f400bt_fixup/chipdrivers.h =================================================================== --- flashrom-m29f400bt_fixup/chipdrivers.h (Revision 1082) +++ flashrom-m29f400bt_fixup/chipdrivers.h (Arbeitskopie) @@ -87,7 +87,6 @@ int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len); int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len); int write_m29f400bt(struct flashchip *flash, uint8_t *buf); -int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf); void protect_m29f400bt(chipaddr bios); void write_page_m29f400bt(chipaddr bios, uint8_t *src, chipaddr dst, int page_size); Index: flashrom-m29f400bt_fixup/m29f400bt.c =================================================================== --- flashrom-m29f400bt_fixup/m29f400bt.c (Revision 1082) +++ flashrom-m29f400bt_fixup/m29f400bt.c (Arbeitskopie) @@ -204,56 +204,3 @@ return 0; } - -int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf) -{ - chipaddr bios = flash->virtual_memory; - - msg_cinfo("Programming page:\n "); - /********************************* - *Pages for M29F400BT: - * 16 0x7c000 0x7ffff TOP - * 8 0x7a000 0x7bfff - * 8 0x78000 0x79fff - * 32 0x70000 0x77fff - * 64 0x60000 0x6ffff - * 64 0x50000 0x5ffff - * 64 0x40000 0x4ffff - *--------------------------------- - * 64 0x30000 0x3ffff - * 64 0x20000 0x2ffff - * 64 0x10000 0x1ffff - * 64 0x00000 0x0ffff BOTTOM - *********************************/ - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x00000); - if (block_erase_m29f400bt(flash, 0x00000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x10000); - if (block_erase_m29f400bt(flash, 0x10000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x20000); - if (block_erase_m29f400bt(flash, 0x20000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x30000); - if (block_erase_m29f400bt(flash, 0x30000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); - - msg_cinfo("\n"); - - return 0; -} -- http://www.hailfinger.org/

2 2

[commit] r1083 - trunk
by repository service 17 Jul '10

17 Jul '10

Author: hailfinger Date: Sat Jul 17 00:07:20 2010 New Revision: 1083 URL: http://flashrom.org/trac/coreboot/changeset/1083 Log: Mark Fujitsu MBM29F400BC write as broken (implicit eraseblock layout in write). Use full-chip write function on Fujitsu MBM29F400TC and ST M29F400BT. Add support for ST M29F400BB. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/m29f400bt.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Wed Jul 14 22:21:22 2010 (r1082) +++ trunk/chipdrivers.h Sat Jul 17 00:07:20 2010 (r1083) @@ -87,7 +87,6 @@ int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len); int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len); int write_m29f400bt(struct flashchip *flash, uint8_t *buf); -int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf); void protect_m29f400bt(chipaddr bios); void write_page_m29f400bt(chipaddr bios, uint8_t *src, chipaddr dst, int page_size); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Wed Jul 14 22:21:22 2010 (r1082) +++ trunk/flashchips.c Sat Jul 17 00:07:20 2010 (r1083) @@ -2382,7 +2382,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_BAD_WRITE, /* Implicit eraseblock layout in write_m29f400bt is broken. */ .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ .block_erasers = @@ -2400,7 +2400,7 @@ .block_erase = block_erase_chip_m29f400bt, }, }, - .write = write_coreboot_m29f400bt, + .write = NULL, .read = read_memmapped, }, @@ -2431,7 +2431,7 @@ .block_erase = block_erase_chip_m29f400bt, }, }, - .write = write_coreboot_m29f400bt, + .write = write_m29f400bt, .read = read_memmapped, }, @@ -5278,7 +5278,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -5296,6 +5296,37 @@ { /* FIXME: this has WORD/BYTE sequences; 2AA for word, 555 for byte */ .vendor = "ST", + .name = "M29F400BB", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = ST_ID, + .model_id = ST_M29F400BB, + .total_size = 512, + .page_size = 64 * 1024, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .tested = TEST_BAD_WRITE, /* Implicit eraseblock layout in write_m29f400bt is broken. */ + .probe = probe_m29f400bt, + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 7}, + }, + .block_erase = block_erase_m29f400bt, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = block_erase_chip_m29f400bt, + } + }, + .write = NULL, + .read = read_memmapped, + }, + { + /* FIXME: this has WORD/BYTE sequences; 2AA for word, 555 for byte */ + .vendor = "ST", .name = "M29F400BT", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = ST_ID, @@ -5321,7 +5352,7 @@ .block_erase = block_erase_chip_m29f400bt, } }, - .write = write_coreboot_m29f400bt, + .write = write_m29f400bt, .read = read_memmapped, }, Modified: trunk/m29f400bt.c ============================================================================== --- trunk/m29f400bt.c Wed Jul 14 22:21:22 2010 (r1082) +++ trunk/m29f400bt.c Sat Jul 17 00:07:20 2010 (r1083) @@ -204,56 +204,3 @@ return 0; } - -int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf) -{ - chipaddr bios = flash->virtual_memory; - - msg_cinfo("Programming page:\n "); - /********************************* - *Pages for M29F400BT: - * 16 0x7c000 0x7ffff TOP - * 8 0x7a000 0x7bfff - * 8 0x78000 0x79fff - * 32 0x70000 0x77fff - * 64 0x60000 0x6ffff - * 64 0x50000 0x5ffff - * 64 0x40000 0x4ffff - *--------------------------------- - * 64 0x30000 0x3ffff - * 64 0x20000 0x2ffff - * 64 0x10000 0x1ffff - * 64 0x00000 0x0ffff BOTTOM - *********************************/ - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x00000); - if (block_erase_m29f400bt(flash, 0x00000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x10000); - if (block_erase_m29f400bt(flash, 0x10000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x20000); - if (block_erase_m29f400bt(flash, 0x20000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x30000); - if (block_erase_m29f400bt(flash, 0x30000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); - - msg_cinfo("\n"); - - return 0; -}

1 0

Re: [flashrom] [coreboot] gigabyte dual bios programming
by Carl-Daniel Hailfinger 16 Jul '10

16 Jul '10

Hi, On 15.07.2010 16:29, Peter Stuge wrote: > Andriy Gapon wrote: > >>> Maybe you already know this, but I would not expect the superio to be >>> involved very much in the dualbios mechanism - at most an IO pin >>> would be used for the handshake with the patented timer. >>> >> Still I would like to get the spec. >> > > Yes, fair enough. :) > > > >> It may also depend on a particular motherboard, chip, etc. Perhaps >> the "patented timer" is implemented in Super I/O. >> > > I doubt this since Gigabyte owns the patent for the dual bios > invention, and ITE is unrelated to Gigabyte. The dual bios invention > might *use* a timer within the superio though - that's possible. > > > >> At least, we see that some undocumented Super I/O register(s) are >> used to switch between the flash chips and some other related >> things. >> > > IO pins and timer on the superio could certainly be used. > Did you know that SB700 (and later) has its own Dual BIOS mechanism? If there is interest, I can help with implementing support for that feature in flashrom. Regards, Carl-Daniel -- http://www.hailfinger.org/

3 3

sudo flashrom -V
by Andreas Nagel 16 Jul '10

16 Jul '10

andy@donkey:~$ sudo flashrom -V flashrom v0.9.1-r946 No coreboot table found. DMI string system-manufacturer: "Foxconn" DMI string system-product-name: "nT-330i" DMI string system-version: "To Be Filled By O.E.M." DMI string baseboard-manufacturer: "To be filled by O.E.M." DMI string baseboard-product-name: "To be filled by O.E.M." DMI string baseboard-version: "To be filled by O.E.M." DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP79", enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Guessed flash bus type is LPC Found SMBus device 10de:0aa2 at 00:03:2 SPI BAR is at 0xfae80000, after clearing low bits BAR is at 0xfae80000 Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled. Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. LPC on this chipset is not supported yet. OK. This chipset supports the following protocols: LPC. Calibrating delay loop... 780M loops per second, 100 myus = 196 us. OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMD Am29F040B, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ASD AE49F2008, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Atmel AT29C020, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMIC A25L40PT, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for AMIC A25L40PU, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMIC A29002T, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMIC A29040B, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0x7f03, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Eon EN25B05, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B05T, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B10T, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B20T, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B40T, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B80T, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B16T, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B32T, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25B64T, 8192 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Eon EN29F010, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Intel 28F004S5, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Intel 82802AB, 512 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for Intel 82802AC, 1024 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for Macronix MX25L512, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC Pm29F002T, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for PMC Pm29F002B, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0x31, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x7f03, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Sharp LHF00L04, 1024 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for Spansion S25FL008A, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST29EE010, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST29LE010, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST29EE020A, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST29LE020, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39SF512, 64 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39SF010A, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39SF020A, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39SF040, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39VF512, 64 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39VF010, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39VF020, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39VF040, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST39VF080, 1024 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SST SST49LF002A/B, 256 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for SST SST49LF003A/B, 384 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for SST SST49LF004A/B, 512 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for SST SST49LF004C, 512 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for SST SST49LF008A, 1024 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for SST SST49LF008C, 1024 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for SST SST49LF016C, 2048 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0x31, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0x31, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0x7f03, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0x7f03, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ST M29F040B, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ST M29F400BT, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ST M29W010B, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ST M29W040B, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ST M29W512B, 64 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0x7f, id2 0xfc Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0x7f, id2 0xfc Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0x02, id2 0x00 Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0x02, id2 0x00 Probing for ST M50FW002, 256 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for ST M50FW016, 2048 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for ST M50FW040, 512 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for ST M50FW080, 1024 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Winbond W25x10, 128 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Winbond W25x32, 4096 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Winbond W25x64, 8192 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Winbond W29C020C, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Winbond W29C040P, 512 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Winbond W29EE011, 128 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0x7f03, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0x7f03, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f03, id2 0xfc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: skipped. Host bus type LPC and chip bus type Parallel are incompatible. Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0x31, id2 0x9e, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for Winbond W39V080FA, 1024 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Host bus type LPC and chip bus type FWH are incompatible. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type LPC and chip bus type SPI are incompatible. No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically.

2 1

USB - PIO based flasher
by Joseph Smith 15 Jul '10

15 Jul '10

Hello, Has anyone noticed this product? http://www.bmc-messsysteme.de/us/pr-usb-pio.html I think this would make an awesome little flasher :-) And it already supports many OS's: Windows® 7/XP as well as under MAC OS X, Free BSD and Linux -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

3 3

[PATCH] Allow bus override with forced read
by Carl-Daniel Hailfinger 15 Jul '10

15 Jul '10

If someone wants to perform a forced read of a chip via mmap, we should allow that even if the host doesn't support the bus this chip needs. Example: flashrom -p dummy:bus=spi -V -c Am29F016D -f -r foo.rom This won't work right now because -f won't override probe skipping. So far the only use of this bus override is for the internal programmer, and as such I wonder whether we should make the bus override conditional on the internal programmer. It's pointless for other programmers anyway. Comments welcome. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-force_chip_incompatible_bus/flashrom.c =================================================================== --- flashrom-force_chip_incompatible_bus/flashrom.c (Revision 1079) +++ flashrom-force_chip_incompatible_bus/flashrom.c (Arbeitskopie) @@ -1007,7 +1007,7 @@ continue; } buses_common = buses_supported & flash->bustype; - if (!buses_common) { + if (!buses_common && !force) { tmp = flashbuses_to_text(buses_supported); msg_gdbg("skipped."); msg_gspew(" Host bus type %s ", tmp); -- http://www.hailfinger.org/

3 3

[PATCH] Hook up SPI unlock to infrastructure
by Carl-Daniel Hailfinger 14 Jul '10

14 Jul '10

We have a generic unlocking infrastructure, but all SPI chips ignored it. Fix it. Actually check if the unlock worked instead of just assuming it worked. This depends on [PATCH] Convert SPI chips to partial write. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> diff -ur flashrom-partial_write_spi_intermediate/bitbang_spi.c flashrom-spi_unlock_refactor/bitbang_spi.c --- flashrom-partial_write_spi_intermediate/bitbang_spi.c 2010-07-09 19:11:10.000000000 +0200 +++ flashrom-spi_unlock_refactor/bitbang_spi.c 2010-07-10 02:55:40.000000000 +0200 @@ -141,6 +141,5 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 256); } diff -ur flashrom-partial_write_spi_intermediate/buspirate_spi.c flashrom-spi_unlock_refactor/buspirate_spi.c --- flashrom-partial_write_spi_intermediate/buspirate_spi.c 2010-07-08 12:15:05.000000000 +0200 +++ flashrom-spi_unlock_refactor/buspirate_spi.c 2010-07-10 02:53:48.000000000 +0200 @@ -311,6 +311,5 @@ int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 12); } diff -ur flashrom-partial_write_spi_intermediate/chipdrivers.h flashrom-spi_unlock_refactor/chipdrivers.h --- flashrom-partial_write_spi_intermediate/chipdrivers.h 2010-07-09 19:04:47.000000000 +0200 +++ flashrom-spi_unlock_refactor/chipdrivers.h 2010-07-10 02:53:42.000000000 +0200 @@ -47,7 +47,7 @@ int spi_chip_write_256_new(struct flashchip *flash, uint8_t *buf, int start, int len); int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); -int spi_disable_blockprotect(void); +int spi_disable_blockprotect(struct flashchip *flash); int spi_byte_program(int addr, uint8_t databyte); int spi_nbyte_program(int addr, uint8_t *bytes, int len); int spi_nbyte_read(int addr, uint8_t *bytes, int len); diff -ur flashrom-partial_write_spi_intermediate/flashchips.c flashrom-spi_unlock_refactor/flashchips.c --- flashrom-partial_write_spi_intermediate/flashchips.c 2010-07-09 19:05:21.000000000 +0200 +++ flashrom-spi_unlock_refactor/flashchips.c 2010-07-10 02:52:48.000000000 +0200 @@ -335,6 +335,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -369,6 +370,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -403,6 +405,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -437,6 +440,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -471,6 +475,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -505,6 +510,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -539,6 +545,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -573,6 +580,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -607,6 +615,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -641,6 +650,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -697,6 +707,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -731,6 +742,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -765,6 +777,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -781,6 +794,7 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, },*/ @@ -1184,6 +1198,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1215,6 +1230,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1392,6 +1408,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = read_memmapped, }, @@ -1422,6 +1439,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1452,6 +1470,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1482,6 +1501,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1512,6 +1532,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1543,6 +1564,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1574,6 +1596,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1605,6 +1628,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1636,6 +1660,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1667,6 +1692,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1698,6 +1724,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1729,6 +1756,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1760,6 +1788,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1791,6 +1820,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1822,6 +1852,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1853,6 +1884,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1884,6 +1916,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1918,6 +1951,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1952,6 +1986,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1986,6 +2021,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2020,6 +2056,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2051,6 +2088,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2082,6 +2120,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2113,6 +2152,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2144,6 +2184,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2687,6 +2728,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2718,6 +2760,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2752,6 +2795,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2786,6 +2830,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2820,6 +2865,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2854,6 +2900,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2885,6 +2932,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2916,6 +2964,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2947,6 +2996,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2978,6 +3028,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3009,6 +3060,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3189,6 +3241,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3217,6 +3270,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3245,6 +3299,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3273,6 +3328,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3301,6 +3357,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3329,6 +3386,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3363,6 +3421,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3391,6 +3450,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3419,6 +3479,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3453,6 +3514,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3481,6 +3543,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3715,6 +3778,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3772,6 +3836,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3797,6 +3862,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3831,6 +3897,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3865,6 +3932,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3893,6 +3961,7 @@ .block_erase = spi_block_erase_60, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3927,6 +3996,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3955,6 +4025,7 @@ .block_erase = spi_block_erase_60, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3989,6 +4060,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -4023,6 +4095,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -4803,6 +4876,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4833,6 +4907,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4858,6 +4933,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4884,6 +4960,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4909,6 +4986,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4934,6 +5012,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4959,6 +5038,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4984,6 +5064,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5009,6 +5090,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5034,6 +5116,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5059,6 +5142,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5084,6 +5168,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5765,6 +5850,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5799,6 +5885,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5833,6 +5920,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5867,6 +5955,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5895,6 +5984,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5923,6 +6013,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5951,6 +6042,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5979,6 +6071,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -6013,6 +6106,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -6047,6 +6141,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -6081,6 +6176,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, diff -ur flashrom-partial_write_spi_intermediate/ft2232_spi.c flashrom-spi_unlock_refactor/ft2232_spi.c --- flashrom-partial_write_spi_intermediate/ft2232_spi.c 2010-07-08 12:15:05.000000000 +0200 +++ flashrom-spi_unlock_refactor/ft2232_spi.c 2010-07-10 02:55:44.000000000 +0200 @@ -290,7 +290,6 @@ int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 256); } diff -ur flashrom-partial_write_spi_intermediate/ichspi.c flashrom-spi_unlock_refactor/ichspi.c --- flashrom-partial_write_spi_intermediate/ichspi.c 2010-07-09 19:12:42.000000000 +0200 +++ flashrom-spi_unlock_refactor/ichspi.c 2010-07-10 02:53:55.000000000 +0200 @@ -690,7 +690,6 @@ if (spi_controller == SPI_CONTROLLER_VIA) maxdata = 16; - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, maxdata); } diff -ur flashrom-partial_write_spi_intermediate/it87spi.c flashrom-spi_unlock_refactor/it87spi.c --- flashrom-partial_write_spi_intermediate/it87spi.c 2010-07-09 23:28:52.000000000 +0200 +++ flashrom-spi_unlock_refactor/it87spi.c 2010-07-10 02:55:48.000000000 +0200 @@ -355,7 +355,6 @@ spi_chip_write_1_new(flash, buf, start, len); } else { int writehere; - spi_disable_blockprotect(); if (start % 256) { /* start to the end of the page or start + len, diff -ur flashrom-partial_write_spi_intermediate/sb600spi.c flashrom-spi_unlock_refactor/sb600spi.c --- flashrom-partial_write_spi_intermediate/sb600spi.c 2010-05-31 00:36:09.000000000 +0200 +++ flashrom-spi_unlock_refactor/sb600spi.c 2010-07-10 02:53:50.000000000 +0200 @@ -50,7 +50,6 @@ int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 5); } diff -ur flashrom-partial_write_spi_intermediate/spi25.c flashrom-spi_unlock_refactor/spi25.c --- flashrom-partial_write_spi_intermediate/spi25.c 2010-07-09 23:40:22.000000000 +0200 +++ flashrom-spi_unlock_refactor/spi25.c 2010-07-10 02:56:49.000000000 +0200 @@ -436,12 +436,6 @@ .readarr = NULL, }}; - result = spi_disable_blockprotect(); - if (result) { - msg_cerr("spi_disable_blockprotect failed\n"); - return result; - } - result = spi_send_multicommand(cmds); if (result) { msg_cerr("%s failed during command execution\n", @@ -482,12 +476,6 @@ .readarr = NULL, }}; - result = spi_disable_blockprotect(); - if (result) { - msg_cerr("spi_disable_blockprotect failed\n"); - return result; - } - result = spi_send_multicommand(cmds); if (result) { msg_cerr("%s failed during command execution\n", __func__); @@ -841,7 +829,7 @@ return result; } -int spi_disable_blockprotect(void) +int spi_disable_blockprotect(struct flashchip *flash) { uint8_t status; int result; @@ -855,6 +843,11 @@ msg_cerr("spi_write_status_register failed\n"); return result; } + status = spi_read_status_register(); + if ((status & 0x3c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + /* Should we error out here? */ + } } return 0; } @@ -970,7 +963,6 @@ { int i, result = 0; - spi_disable_blockprotect(); for (i = start; i < start + len; i++) { result = spi_byte_program(i, buf[i]); if (result) @@ -984,7 +976,6 @@ int spi_chip_write_1(struct flashchip *flash, uint8_t *buf) { - spi_disable_blockprotect(); /* Erase first */ msg_cinfo("Erasing flash before programming... "); if (erase_flash(flash)) { diff -ur flashrom-partial_write_spi_intermediate/spi.c flashrom-spi_unlock_refactor/spi.c --- flashrom-partial_write_spi_intermediate/spi.c 2010-07-09 19:16:09.000000000 +0200 +++ flashrom-spi_unlock_refactor/spi.c 2010-07-10 02:54:07.000000000 +0200 @@ -215,7 +215,6 @@ { int ret; - spi_disable_blockprotect(); msg_pinfo("Erasing flash before programming... "); if (erase_flash(flash)) { msg_perr("ERASE FAILED!\n"); -- http://www.hailfinger.org/

2 7

[commit] r1082 - trunk
by repository service 14 Jul '10

14 Jul '10

Author: hailfinger Date: Wed Jul 14 22:21:22 2010 New Revision: 1082 URL: http://flashrom.org/trac/coreboot/changeset/1082 Log: We have a generic unlocking infrastructure. Use it for SPI chips. Actually check if the unlock worked instead of just assuming it worked. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/bitbang_spi.c trunk/buspirate_spi.c trunk/chipdrivers.h trunk/dummyflasher.c trunk/flashchips.c trunk/ft2232_spi.c trunk/ichspi.c trunk/it87spi.c trunk/sb600spi.c trunk/spi.c trunk/spi25.c Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/bitbang_spi.c Wed Jul 14 22:21:22 2010 (r1082) @@ -141,6 +141,5 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 256); } Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/buspirate_spi.c Wed Jul 14 22:21:22 2010 (r1082) @@ -311,6 +311,5 @@ int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 12); } Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/chipdrivers.h Wed Jul 14 22:21:22 2010 (r1082) @@ -47,7 +47,7 @@ int spi_chip_write_256_new(struct flashchip *flash, uint8_t *buf, int start, int len); int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); -int spi_disable_blockprotect(void); +int spi_disable_blockprotect(struct flashchip *flash); int spi_byte_program(int addr, uint8_t databyte); int spi_nbyte_program(int addr, uint8_t *bytes, int len); int spi_nbyte_read(int addr, uint8_t *bytes, int len); Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/dummyflasher.c Wed Jul 14 22:21:22 2010 (r1082) @@ -173,6 +173,5 @@ */ int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 256); } Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/flashchips.c Wed Jul 14 22:21:22 2010 (r1082) @@ -335,6 +335,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -369,6 +370,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -403,6 +405,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -437,6 +440,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -471,6 +475,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -505,6 +510,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -539,6 +545,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -573,6 +580,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -607,6 +615,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -641,6 +650,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -697,6 +707,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -731,6 +742,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -765,6 +777,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -781,6 +794,7 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, },*/ @@ -1184,6 +1198,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1215,6 +1230,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1246,6 +1262,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1423,6 +1440,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -1453,6 +1471,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1483,6 +1502,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1513,6 +1533,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1543,6 +1564,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1574,6 +1596,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1605,6 +1628,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1636,6 +1660,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1667,6 +1692,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1698,6 +1724,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1729,6 +1756,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1760,6 +1788,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1791,6 +1820,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1822,6 +1852,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1853,6 +1884,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1884,6 +1916,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1915,6 +1948,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1949,6 +1983,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1983,6 +2018,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2017,6 +2053,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2051,6 +2088,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2082,6 +2120,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2113,6 +2152,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2144,6 +2184,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2175,6 +2216,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2718,6 +2760,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2749,6 +2792,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2783,6 +2827,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2817,6 +2862,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2851,6 +2897,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2885,6 +2932,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2916,6 +2964,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2947,6 +2996,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2978,6 +3028,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3009,6 +3060,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3040,6 +3092,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3220,6 +3273,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3248,6 +3302,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3276,6 +3331,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3304,6 +3360,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3332,6 +3389,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3360,6 +3418,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3394,6 +3453,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3422,6 +3482,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3450,6 +3511,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3484,6 +3546,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3512,6 +3575,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3746,6 +3810,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3803,6 +3868,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3828,6 +3894,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3862,6 +3929,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3896,6 +3964,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3924,6 +3993,7 @@ .block_erase = spi_block_erase_60, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3958,6 +4028,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -3986,6 +4057,7 @@ .block_erase = spi_block_erase_60, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -4020,6 +4092,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -4054,6 +4127,7 @@ .block_erase = spi_block_erase_c7, }, }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, }, @@ -4834,6 +4908,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4864,6 +4939,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4889,6 +4965,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4915,6 +4992,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4940,6 +5018,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4965,6 +5044,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4990,6 +5070,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5015,6 +5096,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5040,6 +5122,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5065,6 +5148,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5090,6 +5174,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5115,6 +5200,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5796,6 +5882,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5830,6 +5917,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5864,6 +5952,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5898,6 +5987,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5926,6 +6016,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5954,6 +6045,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -5982,6 +6074,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -6010,6 +6103,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -6044,6 +6138,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -6078,6 +6173,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -6112,6 +6208,7 @@ .block_erase = spi_block_erase_c7, } }, + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, }, Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/ft2232_spi.c Wed Jul 14 22:21:22 2010 (r1082) @@ -290,7 +290,6 @@ int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 256); } Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/ichspi.c Wed Jul 14 22:21:22 2010 (r1082) @@ -690,7 +690,6 @@ if (spi_controller == SPI_CONTROLLER_VIA) maxdata = 16; - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, maxdata); } Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/it87spi.c Wed Jul 14 22:21:22 2010 (r1082) @@ -344,7 +344,6 @@ spi_chip_write_1_new(flash, buf, start, len); } else { int lenhere; - spi_disable_blockprotect(); if (start % 256) { /* start to the end of the page or start + len, Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/sb600spi.c Wed Jul 14 22:21:22 2010 (r1082) @@ -50,7 +50,6 @@ int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - spi_disable_blockprotect(); return spi_write_chunked(flash, buf, start, len, 5); } Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/spi.c Wed Jul 14 22:21:22 2010 (r1082) @@ -217,7 +217,6 @@ { int ret; - spi_disable_blockprotect(); msg_pinfo("Erasing flash before programming... "); if (erase_flash(flash)) { msg_perr("ERASE FAILED!\n"); Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Wed Jul 14 21:57:52 2010 (r1081) +++ trunk/spi25.c Wed Jul 14 22:21:22 2010 (r1082) @@ -436,12 +436,6 @@ .readarr = NULL, }}; - result = spi_disable_blockprotect(); - if (result) { - msg_cerr("spi_disable_blockprotect failed\n"); - return result; - } - result = spi_send_multicommand(cmds); if (result) { msg_cerr("%s failed during command execution\n", @@ -482,12 +476,6 @@ .readarr = NULL, }}; - result = spi_disable_blockprotect(); - if (result) { - msg_cerr("spi_disable_blockprotect failed\n"); - return result; - } - result = spi_send_multicommand(cmds); if (result) { msg_cerr("%s failed during command execution\n", __func__); @@ -841,7 +829,7 @@ return result; } -int spi_disable_blockprotect(void) +int spi_disable_blockprotect(struct flashchip *flash) { uint8_t status; int result; @@ -855,6 +843,11 @@ msg_cerr("spi_write_status_register failed\n"); return result; } + status = spi_read_status_register(); + if ((status & 0x3c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } } return 0; } @@ -970,7 +963,6 @@ { int i, result = 0; - spi_disable_blockprotect(); for (i = start; i < start + len; i++) { result = spi_byte_program(i, buf[i]); if (result) @@ -984,7 +976,6 @@ int spi_chip_write_1(struct flashchip *flash, uint8_t *buf) { - spi_disable_blockprotect(); /* Erase first */ msg_cinfo("Erasing flash before programming... "); if (erase_flash(flash)) {

1 0

[PATCH] Use max_rom_decode for wbsio_spi
by Carl-Daniel Hailfinger 14 Jul '10

14 Jul '10

Use the max_rom_decode infrastructure for wbsio_spi instead of open-coding a variant which only aborts after it is too late. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> diff -ur flashrom-partial_write_spi_intermediate/flash.h flashrom-wbsio_max_decode/flash.h --- flashrom-partial_write_spi_intermediate/flash.h 2010-07-11 00:05:36.000000000 +0200 +++ flashrom-wbsio_max_decode/flash.h 2010-07-11 00:15:31.000000000 +0200 @@ -716,7 +716,6 @@ int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf, int start, int len); /* serprog.c */ int serprog_init(void); diff -ur flashrom-partial_write_spi_intermediate/spi.c flashrom-wbsio_max_decode/spi.c --- flashrom-partial_write_spi_intermediate/spi.c 2010-07-11 00:09:26.000000000 +0200 +++ flashrom-wbsio_max_decode/spi.c 2010-07-11 00:16:22.000000000 +0200 @@ -80,7 +80,7 @@ .command = wbsio_spi_send_command, .multicommand = default_spi_send_multicommand, .read = wbsio_spi_read, - .write_256 = wbsio_spi_write_1, + .write_256 = spi_chip_write_1_new, }, #endif #endif diff -ur flashrom-partial_write_spi_intermediate/wbsio_spi.c flashrom-wbsio_max_decode/wbsio_spi.c --- flashrom-partial_write_spi_intermediate/wbsio_spi.c 2010-07-09 19:09:49.000000000 +0200 +++ flashrom-wbsio_max_decode/wbsio_spi.c 2010-07-11 00:18:38.000000000 +0200 @@ -69,6 +69,9 @@ buses_supported |= CHIP_BUSTYPE_SPI; spi_controller = SPI_CONTROLLER_WBSIO; + msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is " + "1024 KB!\n", __func__); + max_rom_decode.spi = 1024 * 1024; return 0; } @@ -179,24 +182,7 @@ int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - int size = flash->total_size * 1024; - - if (size > 1024 * 1024) { - msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__); - return 1; - } - return read_memmapped(flash, buf, start, len); } -int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - if (flash->total_size * 1024 > 1024 * 1024) { - msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__); - return 1; - } - - return spi_chip_write_1_new(flash, buf, start, len); -} - #endif -- http://www.hailfinger.org/

2 3

[commit] r1081 - trunk
by repository service 14 Jul '10

14 Jul '10

Author: hailfinger Date: Wed Jul 14 21:57:52 2010 New Revision: 1081 URL: http://flashrom.org/trac/coreboot/changeset/1081 Log: Use the max_rom_decode infrastructure for wbsio_spi instead of open-coding a variant which only aborts after it is too late. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/flash.h trunk/spi.c trunk/wbsio_spi.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Wed Jul 14 18:19:05 2010 (r1080) +++ trunk/flash.h Wed Jul 14 21:57:52 2010 (r1081) @@ -716,7 +716,6 @@ int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf, int start, int len); /* serprog.c */ int serprog_init(void); Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Wed Jul 14 18:19:05 2010 (r1080) +++ trunk/spi.c Wed Jul 14 21:57:52 2010 (r1081) @@ -80,7 +80,7 @@ .command = wbsio_spi_send_command, .multicommand = default_spi_send_multicommand, .read = wbsio_spi_read, - .write_256 = wbsio_spi_write_1, + .write_256 = spi_chip_write_1_new, }, #endif #endif Modified: trunk/wbsio_spi.c ============================================================================== --- trunk/wbsio_spi.c Wed Jul 14 18:19:05 2010 (r1080) +++ trunk/wbsio_spi.c Wed Jul 14 21:57:52 2010 (r1081) @@ -69,6 +69,9 @@ buses_supported |= CHIP_BUSTYPE_SPI; spi_controller = SPI_CONTROLLER_WBSIO; + msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is " + "1024 KB!\n", __func__); + max_rom_decode.spi = 1024 * 1024; return 0; } @@ -179,24 +182,7 @@ int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - int size = flash->total_size * 1024; - - if (size > 1024 * 1024) { - msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__); - return 1; - } - return read_memmapped(flash, buf, start, len); } -int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - if (flash->total_size * 1024 > 1024 * 1024) { - msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__); - return 1; - } - - return spi_chip_write_1_new(flash, buf, start, len); -} - #endif

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