- flashrom - mail.coreboot.org

[PATCH 5/7] add support for 8086:1076 (82541GI) to nicintel_spi.c
by Stefan Tauner 14 Mar '11

14 Mar '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- nicintel_spi.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/nicintel_spi.c b/nicintel_spi.c index 3882e81..5a6e04d 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -64,6 +64,7 @@ const struct pcidev_status nics_intel_spi[] = { {PCI_VENDOR_ID_INTEL, 0x105e, OK, "Intel", "82571EB Gigabit Ethernet Controller"}, {PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"}, {PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x1076, OK, "Intel", "82541GI Gigabit Ethernet Controller"}, {}, }; -- 1.7.1

1 0

[PATCH 6/7] use getpagesize() to determine physmap's length in nicintel_spi.c
by Stefan Tauner 14 Mar '11

14 Mar '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- nicintel_spi.c | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/nicintel_spi.c b/nicintel_spi.c index 5a6e04d..811ed6e 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -26,11 +26,14 @@ */ #include <stdlib.h> +#include <unistd.h> #include "flash.h" #include "programmer.h" #define PCI_VENDOR_ID_INTEL 0x8086 +#define MEMMAP_SIZE getpagesize() + #define EECD 0x10 #define FLA 0x1c @@ -148,7 +151,7 @@ int nicintel_spi_init(void) io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", - io_base_addr, 4096); + io_base_addr, MEMMAP_SIZE); tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_DISABLED; tmp |= FLASH_WRITES_ENABLED; @@ -173,7 +176,7 @@ int nicintel_spi_shutdown(void) tmp |= FLASH_WRITES_DISABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD); - physunmap(nicintel_spibar, 4096); + physunmap(nicintel_spibar, MEMMAP_SIZE); pci_cleanup(pacc); release_io_perms(); -- 1.7.1

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[PATCH 7/7] check if write enable is really set in nicintel_spi_init (and minor comment changes).
by Stefan Tauner 14 Mar '11

14 Mar '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- nicintel_spi.c | 15 +++++++++++++-- 1 files changed, 13 insertions(+), 2 deletions(-) diff --git a/nicintel_spi.c b/nicintel_spi.c index 811ed6e..88d86af 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -34,11 +34,14 @@ #define MEMMAP_SIZE getpagesize() +/* EEPROM/Flash Control & Data Register */ #define EECD 0x10 +/* Flash Access Register */ #define FLA 0x1c /* * Register bits of EECD. + * Table 13-6 * * Bit 04, 05: FWE (Flash Write Enable Control) * 00b = not allowed @@ -49,8 +52,9 @@ #define FLASH_WRITES_DISABLED 0x10 /* FWE: 10000b */ #define FLASH_WRITES_ENABLED 0x20 /* FWE: 100000b */ -/* Flash Access register bits */ -/* Table 13-9 */ +/* Flash Access register bits + * Table 13-9 + */ #define FL_SCK 0 #define FL_CS 1 #define FL_SI 2 @@ -157,6 +161,13 @@ int nicintel_spi_init(void) tmp |= FLASH_WRITES_ENABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD); + /* test if FWE is really set to allow writes */ + tmp = pci_mmio_readl(nicintel_spibar + EECD); + if ( (tmp & FLASH_WRITES_DISABLED) || !(tmp & FLASH_WRITES_ENABLED) ) { + msg_perr("Enabling flash write access failed.\n"); + return 1; + } + /* 1 usec halfperiod delay for now. */ if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1)) return 1; -- 1.7.1

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MSI MS-7309: flashrom -V
by Kevin M. Frey 10 Mar '11

10 Mar '11

flashrom v0.9.3-r1250 on Linux 2.6.35.10-74.fc14.x86_64 (x86_64), built with libpci 3.1.7, GCC 4.5.1 20100924 (Red Hat 4.5.1-4), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 666M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1003 us, 10000 myus = 10012 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "MSI" DMI string system-product-name: "MS-7309" DMI string system-version: "10" DMI string baseboard-manufacturer: "MSI" DMI string baseboard-product-name: "MS-7309" DMI string baseboard-version: "10" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP61", enabling flash write... chipset PCI ID is 10de:03e0, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Flash bus type is LPC Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0x00000000 MCP SPI is not used. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: LPC. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for AMIC A25L05PT, 64 KB: skipped. Probing for AMIC A25L05PU, 64 KB: skipped. Probing for AMIC A25L10PT, 128 KB: skipped. Probing for AMIC A25L10PU, 128 KB: skipped. Probing for AMIC A25L20PT, 256 KB: skipped. Probing for AMIC A25L20PU, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: skipped. Probing for AMIC A25L40PU, 512 KB: skipped. Probing for AMIC A25L80P, 1024 KB: skipped. Probing for AMIC A25L16PT, 2048 KB: skipped. Probing for AMIC A25L16PU, 2048 KB: skipped. Probing for AMIC A25L512, 64 KB: skipped. Probing for AMIC A25L010, 128 KB: skipped. Probing for AMIC A25L020, 256 KB: skipped. Probing for AMIC A25L040, 512 KB: skipped. Probing for AMIC A25L080, 1024 KB: skipped. Probing for AMIC A25L016, 2048 KB: skipped. Probing for AMIC A25L032, 4096 KB: skipped. Probing for AMIC A25LQ032, 4096 KB: skipped. Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT25DF021, 256 KB: skipped. Probing for Atmel AT25DF041A, 512 KB: skipped. Probing for Atmel AT25DF081, 1024 KB: skipped. Probing for Atmel AT25DF081A, 1024 KB: skipped. Probing for Atmel AT25DF161, 2048 KB: skipped. Probing for Atmel AT25DF321, 4096 KB: skipped. Probing for Atmel AT25DF321A, 4096 KB: skipped. Probing for Atmel AT25DF641, 8192 KB: skipped. Probing for Atmel AT25DQ161, 2048 KB: skipped. Probing for Atmel AT25F512B, 64 KB: skipped. Probing for Atmel AT25FS010, 128 KB: skipped. Probing for Atmel AT25FS040, 512 KB: skipped. Probing for Atmel AT26DF041, 512 KB: skipped. Probing for Atmel AT26DF081A, 1024 KB: skipped. Probing for Atmel AT26DF161, 2048 KB: skipped. Probing for Atmel AT26DF161A, 2048 KB: skipped. Probing for Atmel AT26F004, 512 KB: skipped. Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: skipped. Probing for Atmel AT45DB011D, 128 KB: skipped. Probing for Atmel AT45DB021D, 256 KB: skipped. Probing for Atmel AT45DB041D, 512 KB: skipped. Probing for Atmel AT45DB081D, 1024 KB: skipped. Probing for Atmel AT45DB161D, 2048 KB: skipped. Probing for Atmel AT45DB321C, 4224 KB: skipped. Probing for Atmel AT45DB321D, 4096 KB: skipped. Probing for Atmel AT45DB642D, 8192 KB: skipped. Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F020, 256 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for Bright BM29F040, 512 KB: skipped. Probing for EMST F49B002UA, 256 KB: skipped. Probing for EMST F25L008A, 1024 KB: skipped. Probing for Eon EN25B05, 64 KB: skipped. Probing for Eon EN25B05T, 64 KB: skipped. Probing for Eon EN25B10, 128 KB: skipped. Probing for Eon EN25B10T, 128 KB: skipped. Probing for Eon EN25B20, 256 KB: skipped. Probing for Eon EN25B20T, 256 KB: skipped. Probing for Eon EN25B40, 512 KB: skipped. Probing for Eon EN25B40T, 512 KB: skipped. Probing for Eon EN25B80, 1024 KB: skipped. Probing for Eon EN25B80T, 1024 KB: skipped. Probing for Eon EN25B16, 2048 KB: skipped. Probing for Eon EN25B16T, 2048 KB: skipped. Probing for Eon EN25B32, 4096 KB: skipped. Probing for Eon EN25B32T, 4096 KB: skipped. Probing for Eon EN25B64, 8192 KB: skipped. Probing for Eon EN25B64T, 8192 KB: skipped. Probing for Eon EN25D16, 2048 KB: skipped. Probing for Eon EN25F05, 64 KB: skipped. Probing for Eon EN25F10, 128 KB: skipped. Probing for Eon EN25F20, 256 KB: skipped. Probing for Eon EN25F40, 512 KB: skipped. Probing for Eon EN25F80, 1024 KB: skipped. Probing for Eon EN25F16, 2048 KB: skipped. Probing for Eon EN25F32, 4096 KB: skipped. Probing for Eon EN29F010, 128 KB: skipped. Probing for Eon EN29F002(A)(N)B, 256 KB: skipped. Probing for Eon EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Hyundai HY29F002T, 256 KB: skipped. Probing for Hyundai HY29F002B, 256 KB: skipped. Probing for Hyundai HY29F040A, 512 KB: skipped. Probing for Intel 28F001BN/BX-B, 128 KB: skipped. Probing for Intel 28F001BN/BX-T, 128 KB: skipped. Probing for Intel 28F002BC/BL/BV/BX-T, 256 KB: skipped. Probing for Intel 28F008S3/S5/SC, 512 KB: skipped. Probing for Intel 28F004B5/BE/BV/BX-B, 512 KB: skipped. Probing for Intel 28F004B5/BE/BV/BX-T, 512 KB: skipped. Probing for Intel 28F400BV/BX/CE/CV-B, 512 KB: skipped. Probing for Intel 28F400BV/BX/CE/CV-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: skipped. Probing for Intel 82802AC, 1024 KB: skipped. Probing for Macronix MX25L512, 64 KB: skipped. Probing for Macronix MX25L1005, 128 KB: skipped. Probing for Macronix MX25L2005, 256 KB: skipped. Probing for Macronix MX25L4005, 512 KB: skipped. Probing for Macronix MX25L8005, 1024 KB: skipped. Probing for Macronix MX25L1605, 2048 KB: skipped. Probing for Macronix MX25L1635D, 2048 KB: skipped. Probing for Macronix MX25L1635E, 2048 KB: skipped. Probing for Macronix MX25L3205, 4096 KB: skipped. Probing for Macronix MX25L3235D, 4096 KB: skipped. Probing for Macronix MX25L6405, 8192 KB: skipped. Probing for Macronix MX25L12805, 16384 KB: skipped. Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29F040, 512 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for MoselVitelic V29C51000B, 64 KB: skipped. Probing for MoselVitelic V29C51000T, 64 KB: skipped. Probing for MoselVitelic V29C51400B, 512 KB: skipped. Probing for MoselVitelic V29C51400T, 512 KB: skipped. Probing for MoselVitelic V29LC51000, 64 KB: skipped. Probing for MoselVitelic V29LC51001, 128 KB: skipped. Probing for MoselVitelic V29LC51002, 256 KB: skipped. Probing for Numonyx M25PE10, 128 KB: skipped. Probing for Numonyx M25PE20, 256 KB: skipped. Probing for Numonyx M25PE40, 512 KB: skipped. Probing for Numonyx M25PE80, 1024 KB: skipped. Probing for Numonyx M25PE16, 2048 KB: skipped. Probing for PMC Pm25LV010, 128 KB: skipped. Probing for PMC Pm25LV016B, 2048 KB: skipped. Probing for PMC Pm25LV020, 256 KB: skipped. Probing for PMC Pm25LV040, 512 KB: skipped. Probing for PMC Pm25LV080B, 1024 KB: skipped. Probing for PMC Pm25LV512, 64 KB: skipped. Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0x8c, id2 0x68, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: skipped. Probing for Sharp LHF00L04, 1024 KB: skipped. Probing for Spansion S25FL004A, 512 KB: skipped. Probing for Spansion S25FL008A, 1024 KB: skipped. Probing for Spansion S25FL016A, 2048 KB: skipped. Probing for Spansion S25FL032A, 4096 KB: skipped. Probing for Spansion S25FL064A, 8192 KB: skipped. Probing for SST SST25VF010.REMS, 128 KB: skipped. Probing for SST SST25VF016B, 2048 KB: skipped. Probing for SST SST25VF032B, 4096 KB: skipped. Probing for SST SST25VF064C, 8192 KB: skipped. Probing for SST SST25VF040.REMS, 512 KB: skipped. Probing for SST SST25VF040B, 512 KB: skipped. Probing for SST SST25LF040A.RES, 512 KB: skipped. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Probing for SST SST25VF080B, 1024 KB: skipped. Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: skipped. Probing for SST SST49LF003A/B, 384 KB: skipped. Probing for SST SST49LF004A/B, 512 KB: skipped. Probing for SST SST49LF004C, 512 KB: skipped. Probing for SST SST49LF008A, 1024 KB: skipped. Probing for SST SST49LF008C, 1024 KB: skipped. Probing for SST SST49LF016C, 2048 KB: skipped. Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0x8c, id2 0x68, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0x8c, id2 0x68, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 KB: skipped. Probing for ST M25P05.RES, 64 KB: skipped. Probing for ST M25P10-A, 128 KB: skipped. Probing for ST M25P10.RES, 128 KB: skipped. Probing for ST M25P20, 256 KB: skipped. Probing for ST M25P40, 512 KB: skipped. Probing for ST M25P40-old, 512 KB: skipped. Probing for ST M25P80, 1024 KB: skipped. Probing for ST M25P16, 2048 KB: skipped. Probing for ST M25P32, 4096 KB: skipped. Probing for ST M25P64, 8192 KB: skipped. Probing for ST M25P128, 16384 KB: skipped. Probing for ST M25PX32, 4096 KB: skipped. Probing for ST M25PX64, 8192 KB: skipped. Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BB, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: skipped. Probing for ST M50FW016, 2048 KB: skipped. Probing for ST M50FW040, 512 KB: skipped. Probing for ST M50FW080, 1024 KB: skipped. Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: skipped. Probing for Winbond W25Q16, 2048 KB: skipped. Probing for Winbond W25Q32, 4096 KB: skipped. Probing for Winbond W25Q64, 8192 KB: skipped. Probing for Winbond W25x10, 128 KB: skipped. Probing for Winbond W25x20, 256 KB: skipped. Probing for Winbond W25x40, 512 KB: skipped. Probing for Winbond W25x80, 1024 KB: skipped. Probing for Winbond W25x16, 2048 KB: skipped. Probing for Winbond W25x32, 4096 KB: skipped. Probing for Winbond W25x64, 8192 KB: skipped. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 KB: skipped. Probing for Winbond W29C020(C)/W29C022, 256 KB: skipped. Probing for Winbond W29C040/P, 512 KB: skipped. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 KB: skipped. Probing for Winbond W39V040FB, 512 KB: skipped. Probing for Winbond W39V040FC, 512 KB: skipped. Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U/N, 256 KB: skipped. Probing for Winbond W49F020, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0x8c, id2 0x68, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 KB: skipped. Probing for Winbond W39V080FA, 1024 KB: skipped. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Probing for AMIC unknown AMIC SPI chip, 0 KB: skipped. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Probing for Eon unknown Eon SPI chip, 0 KB: skipped. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Probing for SST unknown SST SPI chip, 0 KB: skipped. Probing for ST unknown ST SPI chip, 0 KB: skipped. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring PCI config space for 00:01:0 reg 0x6d Restoring PCI config space for 00:01:0 reg 0x90 Restoring PCI config space for 00:01:0 reg 0x8c Restoring PCI config space for 00:01:0 reg 0x88

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Re: [flashrom] flashrom -E
by Carl-Daniel Hailfinger 09 Mar '11

09 Mar '11

Auf 08.03.2011 03:39, Eric Konesky schrieb: > I have the BIOS I'm just not sure how I would reflash it the chip isn't > removable > Oh, wait... does that mean the machine is currently powered off? As long as the machine is still running, you can rewrite the BIOS as often as you want, but once it shuts down, you need to recover externally. Which mainboard is this, and which flash chip was detected by flashrom (or did you use another software)? Regards, Carl-Daniel > On Mon, Mar 7, 2011 at 6:34 PM, Carl-Daniel Hailfinger wrote: > >> Auf 08.03.2011 02:13, Eric Konesky schrieb: >> >>> I accidently erased my bios does this erase the boot block? >>> >> Usually yes. >> If you have a backup, just write it to the chip and everything should be >> fine. Otherwise download the correct BIOS for your board from the board >> manufacturer and write that to the chip (make ABSOLUTELY sure you pick >> the correct board and correct board revision). >> -- http://www.hailfinger.org/

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[PATCH] Remove erase_chip_stm50flw0x0x
by Michael Karcher 08 Mar '11

08 Mar '11

As the comment indicates, that function is not a chip erase function at all, but a function calling a block eraser in a loop. So it adds no extra value to what we already have in the block_eraser infrastructure. Furthermore, that function assumes a uniform sector size layout, but is referenced from flash chip with non-uniform sector size layout, which is just wrong. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- flashchips.c | 27 --------------------------- stm50flw0x0x.c | 27 --------------------------- 2 files changed, 0 insertions(+), 54 deletions(-) diff --git a/flashchips.c b/flashchips.c index 753a094..b36f6ee 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6852,9 +6852,6 @@ struct flashchip flashchips[] = { }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -6887,9 +6884,6 @@ struct flashchip flashchips[] = { }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -6922,9 +6916,6 @@ struct flashchip flashchips[] = { }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {1024 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -6957,9 +6948,6 @@ struct flashchip flashchips[] = { }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {1024 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -6989,9 +6977,6 @@ struct flashchip flashchips[] = { {16 * 1024, 1}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {256 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -7016,9 +7001,6 @@ struct flashchip flashchips[] = { { .eraseblocks = { {64 * 1024, 32}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {2 * 1024 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -7043,9 +7025,6 @@ struct flashchip flashchips[] = { { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -7070,9 +7049,6 @@ struct flashchip flashchips[] = { { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {1024 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, @@ -7103,9 +7079,6 @@ struct flashchip flashchips[] = { {16 * 1024, 1}, }, .block_erase = erase_block_82802ab, - }, { - .eraseblocks = { {2 * 1024 * 1024, 1} }, - .block_erase = erase_chip_stm50flw0x0x, } }, .unlock = unlock_stm50flw0x0x, diff --git a/stm50flw0x0x.c b/stm50flw0x0x.c index 60e5c45..726a882 100644 --- a/stm50flw0x0x.c +++ b/stm50flw0x0x.c @@ -114,30 +114,3 @@ int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsi return 0; } - -/* FIXME: This function is not a real chip erase function. */ -int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ - int i; - int total_size = flash->total_size * 1024; - int page_size = flash->page_size; - - if ((addr != 0) || (blocklen != flash->total_size * 1024)) { - msg_cerr("%s called with incorrect arguments\n", - __func__); - return -1; - } - - for (i = 0; i < total_size / page_size; i++) { - //if (unlock_block_stm50flw0x0x(flash, i * page_size)) { - // msg_cerr("UNLOCK FAILED!\n"); - // return -1; - //} - if (erase_block_82802ab(flash, i * page_size, page_size)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - } - - return 0; -} -- 1.7.2.3

1 0

Re: [flashrom] [PATCH] kill central list of SPI programmers
by Carl-Daniel Hailfinger 08 Mar '11

08 Mar '11

Auf 18.07.2010 17:20, Michael Karcher schrieb: > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Go ahead. Your code is an improvement over the current state, and I can send a followup patch with the changes I suggested in my review. Please compile-test before committing. You can activate all drivers (on a machine with libftdi) with make CONFIG_ATAHPT=yes CONFIG_NICNATSEMI=yes CONFIG_DEDIPROG=yes Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

[PATCH]Improve libpayload support, provide libflashrom.a target
by Georgi, Patrick 08 Mar '11

08 Mar '11

Hi, attached patch contains a couple of build fixes for libpayload builds, adds a "libpayload" OS_ARCH (which disables serial and usb programmers and sets up the build to use lpgcc), and provides a new make target "libflashrom.a" which combines all object files except the CLI_OBJS class into libflashrom.a. For a successful build you also need the libpayload patches on the coreboot mailing list until they're checked in. libflashrom.a still suffers from a variety of exit(1)s here and there, so it's not quite a librarified flashrom yet, but it's a start. Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> -- Patrick Georgi SINA-Development - High Security secunet Security Networks AG - Mergenthalerallee 77 - 65760 Eschborn, Germany Phone +49 201 54 54-3610 - Fax +49 201 54 54-1325 - www.secunet.com Sitz: Kronprinzenstraße 30, 45128 Essen / Amtsgericht Essen HRB 13615 Vorstand: Dr. Rainer Baumgart (Vors.), Thomas Koelzer, Thomas Pleines Aufsichtsratsvorsitzender: Dr. Karsten Ottenberg

2 2

[patch] improve termios settings on some OSes
by Jonathan A. Kollasch 08 Mar '11

08 Mar '11

Fix termios settings on, at least, NetBSD. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net>

1 0

[commit] r1280 - trunk
by repository service 08 Mar '11

08 Mar '11

Author: oxygene Date: Tue Mar 8 08:17:44 2011 New Revision: 1280 URL: http://flashrom.org/trac/flashrom/changeset/1280 Log: Fix and improve libpayload platform support - Fix various minor compile issues (eg. include necessary standard headers) - Fix compilation of libpayload code paths - Provide libpayload support in Makefile - Add make target "libflashrom.a" which links non-CLI code to static library Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> Tested-with-DOS-crosscompiler-by: Idwer Vollering <vidwer(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile trunk/physmap.c trunk/spi.c trunk/udelay.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Tue Mar 8 01:23:49 2011 (r1279) +++ trunk/Makefile Tue Mar 8 08:17:44 2011 (r1280) @@ -28,6 +28,8 @@ MANDIR ?= $(PREFIX)/share/man CFLAGS ?= -Os -Wall -Wshadow EXPORTDIR ?= . +AR ?= ar +RANLIB ?= ranlib WARNERROR ?= yes @@ -82,6 +84,39 @@ endif endif +ifeq ($(OS_ARCH), libpayload) +CC:=CC=i386-elf-gcc lpgcc +AR:=i386-elf-ar +RANLIB:=i386-elf-ranlib +CPPFLAGS += -DSTANDALONE +ifeq ($(CONFIG_DUMMY), yes) +UNSUPPORTED_FEATURES += CONFIG_DUMMY=yes +else +override CONFIG_DUMMY = no +endif +ifeq ($(CONFIG_BUSPIRATE_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_BUSPIRATE_SPI=yes +else +override CONFIG_BUSPIRATE_SPI = no +endif +ifeq ($(CONFIG_SERPROG), yes) +UNSUPPORTED_FEATURES += CONFIG_SERPROG=yes +else +override CONFIG_SERPROG = no +endif +# Dediprog and FT2232 are not supported with libpayload (missing libusb support) +ifeq ($(CONFIG_DEDIPROG), yes) +UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes +else +override CONFIG_DEDIPROG = no +endif +ifeq ($(CONFIG_FT2232_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_FT2232_SPI=yes +else +override CONFIG_FT2232_SPI = no +endif +endif + CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o @@ -335,11 +370,16 @@ # We could use PULLED_IN_LIBS, but that would be ugly. FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") -OBJS = $(CHIP_OBJS) $(CLI_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) +LIBFLASHROM_OBJS = $(CHIP_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) +OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) $(PROGRAM)$(EXEC_SUFFIX): $(OBJS) $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJS) $(FEATURE_LIBS) $(LIBS) +libflashrom.a: $(LIBFLASHROM_OBJS) + $(AR) rcs $@ $^ + $(RANLIB) $@ + # TAROPTIONS reduces information leakage from the packager's system. # If other tar programs support command line arguments for setting uid/gid of # stored files, they can be handled here as well. @@ -352,7 +392,7 @@ # This includes all frontends and libflashrom. # We don't use EXEC_SUFFIX here because we want to clean everything. clean: - rm -f $(PROGRAM) $(PROGRAM).exe *.o *.d + rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a *.o *.d distclean: clean rm -f .features .libdeps Modified: trunk/physmap.c ============================================================================== --- trunk/physmap.c Tue Mar 8 01:23:49 2011 (r1279) +++ trunk/physmap.c Tue Mar 8 08:17:44 2011 (r1280) @@ -492,6 +492,7 @@ int libpayload_wrmsr(int addr, msr_t msr) { _wrmsr(addr, msr.lo | ((unsigned long long)msr.hi << 32)); + return 0; } #else msr_t rdmsr(int addr) Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Tue Mar 8 01:23:49 2011 (r1279) +++ trunk/spi.c Tue Mar 8 08:17:44 2011 (r1280) @@ -22,6 +22,7 @@ * Contains the generic SPI framework */ +#include <strings.h> #include <string.h> #include "flash.h" #include "flashchips.h" Modified: trunk/udelay.c ============================================================================== --- trunk/udelay.c Tue Mar 8 01:23:49 2011 (r1279) +++ trunk/udelay.c Tue Mar 8 08:17:44 2011 (r1280) @@ -182,6 +182,7 @@ } #else +#include <libpayload.h> void myusec_calibrate_delay(void) {

1 0

[PATCH] IT85* cleanups/fixes
by Carl-Daniel Hailfinger 08 Mar '11

08 Mar '11

Various IT85* cleanups and fixes. Fix a few typos. Change the EC memory region mapping name. Drop unused function parameter. Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory locations instead of plain pointer access which gets optimized away by gcc. Use own it85_* SPI high-level chip read/write functions instead of relying on unrelated ICH functions. AFAICS this should be mergeable both in the chromium tree and vanilla flashrom. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-it85spi_cleanup/it85spi.c =================================================================== --- flashrom-it85spi_cleanup/it85spi.c (Revision 1263) +++ flashrom-it85spi_cleanup/it85spi.c (Arbeitskopie) @@ -37,7 +37,7 @@ #define MAX_TIMEOUT 100000 #define MAX_TRY 5 -/* Constans for I/O ports */ +/* Constants for I/O ports */ #define ITE_SUPERIO_PORT1 0x2e #define ITE_SUPERIO_PORT2 0x4e @@ -52,13 +52,14 @@ #define CHIP_CHIP_VER_REG 0x22 /* These are standard Super I/O 16-bit base address registers */ -#define SHM_IO_BAD0 0x60 /* big-endian, this is high bits */ -#define SHM_IO_BAD1 0x61 +#define SHM_IO_BAR0 0x60 /* big-endian, this is high bits */ +#define SHM_IO_BAR1 0x61 -/* 8042 keyboard controller uses an input buffer and an output buffer to - * communicate with host CPU. Both buffers are 1-byte depth. That means the - * IBF is set to 1 when host CPU sends a command to input buffer (standing on - * the EC side). IBF is cleared to 0 once the command is read by EC. */ +/* The 8042 keyboard controller uses an input buffer and an output buffer to + * communicate with the host CPU. Both buffers are 1-byte depth. That means + * IBF is set to 1 when the host CPU sends a command to the input buffer + * of the EC. IBF is cleared to 0 once the command is read by the EC. + */ #define KB_IBF (1 << 1) /* Input Buffer Full */ #define KB_OBF (1 << 0) /* Output Buffer Full */ @@ -278,8 +279,8 @@ #ifdef LPC_IO /* Get LPCPNP of SHM. That's big-endian */ sio_write(superio.port, LDNSEL, 0x0F); /* Set LDN to SHM (0x0F) */ - shm_io_base = (sio_read(superio.port, SHM_IO_BAD0) << 8) + - sio_read(superio.port, SHM_IO_BAD1); + shm_io_base = (sio_read(superio.port, SHM_IO_BAR0) << 8) + + sio_read(superio.port, SHM_IO_BAR1); msg_pdbg("%s():%d shm_io_base=0x%04x\n", __func__, __LINE__, shm_io_base); @@ -296,8 +297,8 @@ INDIRECT_A3(shm_io_base, (base >> 24)); #endif #ifdef LPC_MEMORY - base = (chipaddr)programmer_map_flash_region("flash base", 0xFFFFF000, - 0x1000); + base = (chipaddr)programmer_map_flash_region("it85 communication", + 0xFFFFF000, 0x1000); msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, (unsigned int)base); ce_high = (unsigned char*)(base + 0xE00); /* 0xFFFFFE00 */ @@ -328,7 +329,7 @@ } /* Called by internal_init() */ -int it85xx_probe_spi_flash(const char *name) +int it85xx_probe_spi_flash(void) { int ret; @@ -377,14 +378,14 @@ INDIRECT_A1(shm_io_base, (((unsigned long int)ce_low) >> 8) & 0xff); #endif #ifdef LPC_MEMORY - *ce_high = 0; + mmio_writeb(0, ce_high); #endif for (i = 0; i < writecnt; ++i) { #ifdef LPC_IO INDIRECT_WRITE(shm_io_base, writearr[i]); #endif #ifdef LPC_MEMORY - *ce_low = writearr[i]; + mmio_writeb(writearr[i], ce_low); #endif } for (i = 0; i < readcnt; ++i) { @@ -392,7 +393,7 @@ readarr[i] = INDIRECT_READ(shm_io_base); #endif #ifdef LPC_MEMORY - readarr[i] = *ce_low; + readarr[i] = mmio_readb(ce_low); #endif } #ifdef LPC_IO @@ -400,10 +401,20 @@ INDIRECT_WRITE(shm_io_base, 0xFF); /* Write anything to this address.*/ #endif #ifdef LPC_MEMORY - *ce_high = 0; + mmio_writeb(0, ce_high); #endif return 0; } +int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) +{ + return spi_read_chunked(flash, buf, start, len, 64); +} + +int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len) +{ + return spi_write_chunked(flash, buf, start, len, 64); +} + #endif Index: flashrom-it85spi_cleanup/spi.c =================================================================== --- flashrom-it85spi_cleanup/spi.c (Revision 1263) +++ flashrom-it85spi_cleanup/spi.c (Arbeitskopie) @@ -58,8 +58,8 @@ { /* SPI_CONTROLLER_IT85XX */ .command = it85xx_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = it85_spi_read, + .write_256 = it85_spi_write_256, }, { /* SPI_CONTROLLER_IT87XX */ Index: flashrom-it85spi_cleanup/programmer.h =================================================================== --- flashrom-it85spi_cleanup/programmer.h (Revision 1263) +++ flashrom-it85spi_cleanup/programmer.h (Arbeitskopie) @@ -588,9 +588,11 @@ struct superio probe_superio_ite85xx(void); int it85xx_spi_init(void); int it85xx_shutdown(void); -int it85xx_probe_spi_flash(const char *name); +int it85xx_probe_spi_flash(void); int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len); +int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); /* it87spi.c */ void enter_conf_mode_ite(uint16_t port); -- http://www.hailfinger.org/

2 4

flashrom -E
by Eric Konesky 07 Mar '11

07 Mar '11

I accidently erased my bios does this erase the boot block?

2 1

[PATCH] Initial ITE IT8500 EC support (second try)
by David Hendricks 07 Mar '11

07 Mar '11

A few months ago, ITE open sourced the initial IT8500 EC patch on this mailing list ( http://www.flashrom.org/pipermail/flashrom/2010-August/004382.html) so that we could check it in to the Chromium OS branch. It didn't quite make it upstream, and has been updated since then. The attached patch basically does the same thing and has been deployed and tested to work on the Cr-48. There are a few caveats, though: - The boot BIOS straps register must be modified to select LPC. This can be done with the attached "select_bbs.sh" script (Install iotools ( http://code.google.com/p/iotools/) before using select_bbs). We worked around this in the Chromium OS branch by adding a bus argument to the programmer option, ie "flashrom -p internal:bus=lpc". - It is very important to disable power management daemons before running Flashrom on this EC. I commented out the brute force method we use in the Chromium OS branch that disables powerd, since IIRC Carl-Daniel has a better approach in the works. - Due to dependencies which may be introduced by the OEM/ODM EC firmware, the code is not guaranteed to work for anything other than the Cr-48. - Carl-Daniel pointed out that the code might ignore the result of it87 init code. I've attempted to mitigate this in the patch (see internal.c), but I think it's just the symptom of a larger problem with how we detect and initialize IO bridges, and should probably be dealt with in a separate patch. *Here is the text from the original patch submission: The attached patch adds generalized support for IT8500/IT8502 embedded controllers. The patch was developed by Google for Flashrom r1082, but applies cleanly against r1130. It was tested for IT8500E on a Chrome OS platform and may require modification depending on ODM/OEM customization and EC firmware version. This patch is not officially supported by ITE Tech Inc.* Signed-off-by: David Hendricks <dhendrix(a)google.com> (The original patch also included a sign-off from Yung-chieh Lo @ Google and Donald Huang @ ITE). -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

2 5

[commit] r1279 - trunk
by repository service 07 Mar '11

07 Mar '11

Author: hailfinger Date: Tue Mar 8 01:23:49 2011 New Revision: 1279 URL: http://flashrom.org/trac/flashrom/changeset/1279 Log: Various IT85* cleanups and fixes. Fix a few typos. Change the EC memory region mapping name. Drop unused function parameter. Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory locations instead of plain pointer access which is optimized away by gcc. Use own it85_* SPI high-level chip read/write functions instead of relying on unrelated ICH functions. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> David writes: I applied the patch against the Chromium OS branch and successfully tested read and write operations on a Cr48. Acked-by: David Hendricks <dhendrix(a)google.com> Modified: trunk/it85spi.c trunk/programmer.h trunk/spi.c Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Tue Mar 8 01:09:11 2011 (r1278) +++ trunk/it85spi.c Tue Mar 8 01:23:49 2011 (r1279) @@ -37,7 +37,7 @@ #define MAX_TIMEOUT 100000 #define MAX_TRY 5 -/* Constans for I/O ports */ +/* Constants for I/O ports */ #define ITE_SUPERIO_PORT1 0x2e #define ITE_SUPERIO_PORT2 0x4e @@ -52,13 +52,14 @@ #define CHIP_CHIP_VER_REG 0x22 /* These are standard Super I/O 16-bit base address registers */ -#define SHM_IO_BAD0 0x60 /* big-endian, this is high bits */ -#define SHM_IO_BAD1 0x61 +#define SHM_IO_BAR0 0x60 /* big-endian, this is high bits */ +#define SHM_IO_BAR1 0x61 -/* 8042 keyboard controller uses an input buffer and an output buffer to - * communicate with host CPU. Both buffers are 1-byte depth. That means the - * IBF is set to 1 when host CPU sends a command to input buffer (standing on - * the EC side). IBF is cleared to 0 once the command is read by EC. */ +/* The 8042 keyboard controller uses an input buffer and an output buffer to + * communicate with the host CPU. Both buffers are 1-byte depth. That means + * IBF is set to 1 when the host CPU sends a command to the input buffer + * of the EC. IBF is cleared to 0 once the command is read by the EC. + */ #define KB_IBF (1 << 1) /* Input Buffer Full */ #define KB_OBF (1 << 0) /* Output Buffer Full */ @@ -278,8 +279,8 @@ #ifdef LPC_IO /* Get LPCPNP of SHM. That's big-endian */ sio_write(superio.port, LDNSEL, 0x0F); /* Set LDN to SHM (0x0F) */ - shm_io_base = (sio_read(superio.port, SHM_IO_BAD0) << 8) + - sio_read(superio.port, SHM_IO_BAD1); + shm_io_base = (sio_read(superio.port, SHM_IO_BAR0) << 8) + + sio_read(superio.port, SHM_IO_BAR1); msg_pdbg("%s():%d shm_io_base=0x%04x\n", __func__, __LINE__, shm_io_base); @@ -296,8 +297,8 @@ INDIRECT_A3(shm_io_base, (base >> 24)); #endif #ifdef LPC_MEMORY - base = (chipaddr)programmer_map_flash_region("flash base", 0xFFFFF000, - 0x1000); + base = (chipaddr)programmer_map_flash_region("it85 communication", + 0xFFFFF000, 0x1000); msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, (unsigned int)base); ce_high = (unsigned char*)(base + 0xE00); /* 0xFFFFFE00 */ @@ -328,7 +329,7 @@ } /* Called by internal_init() */ -int it85xx_probe_spi_flash(const char *name) +int it85xx_probe_spi_flash(void) { int ret; @@ -377,14 +378,14 @@ INDIRECT_A1(shm_io_base, (((unsigned long int)ce_low) >> 8) & 0xff); #endif #ifdef LPC_MEMORY - *ce_high = 0; + mmio_writeb(0, ce_high); #endif for (i = 0; i < writecnt; ++i) { #ifdef LPC_IO INDIRECT_WRITE(shm_io_base, writearr[i]); #endif #ifdef LPC_MEMORY - *ce_low = writearr[i]; + mmio_writeb(writearr[i], ce_low); #endif } for (i = 0; i < readcnt; ++i) { @@ -392,7 +393,7 @@ readarr[i] = INDIRECT_READ(shm_io_base); #endif #ifdef LPC_MEMORY - readarr[i] = *ce_low; + readarr[i] = mmio_readb(ce_low); #endif } #ifdef LPC_IO @@ -400,10 +401,20 @@ INDIRECT_WRITE(shm_io_base, 0xFF); /* Write anything to this address.*/ #endif #ifdef LPC_MEMORY - *ce_high = 0; + mmio_writeb(0, ce_high); #endif return 0; } +int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) +{ + return spi_read_chunked(flash, buf, start, len, 64); +} + +int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len) +{ + return spi_write_chunked(flash, buf, start, len, 64); +} + #endif Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Tue Mar 8 01:09:11 2011 (r1278) +++ trunk/programmer.h Tue Mar 8 01:23:49 2011 (r1279) @@ -585,9 +585,11 @@ struct superio probe_superio_ite85xx(void); int it85xx_spi_init(void); int it85xx_shutdown(void); -int it85xx_probe_spi_flash(const char *name); +int it85xx_probe_spi_flash(void); int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len); +int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); /* it87spi.c */ void enter_conf_mode_ite(uint16_t port); Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Tue Mar 8 01:09:11 2011 (r1278) +++ trunk/spi.c Tue Mar 8 01:23:49 2011 (r1279) @@ -58,8 +58,8 @@ { /* SPI_CONTROLLER_IT85XX */ .command = it85xx_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = it85_spi_read, + .write_256 = it85_spi_write_256, }, { /* SPI_CONTROLLER_IT87XX */

1 0

[PATCH] Compile fixes
by Carl-Daniel Hailfinger 07 Mar '11

07 Mar '11

Fix compilation if CONFIG_INTERNAL=no. Fix compilation if everything except CONFIG_SATAMV is no. Do not compile in PCI support for wiki printing if no PCI devices are supported. Note: The flashrom.c hunk is ugly. Suggestions how to solve the ugliness are appreciated. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-compilefixes/print_wiki.c =================================================================== --- flashrom-compilefixes/print_wiki.c (Revision 1275) +++ flashrom-compilefixes/print_wiki.c (Arbeitskopie) @@ -246,6 +246,8 @@ printf("\n|}\n\n|}\n"); } +/* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 static void print_supported_pcidevs_wiki(const struct pcidev_status *devs) { int i = 0; @@ -262,6 +264,7 @@ (devs[i].status == NT) ? "?3" : "OK"); } } +#endif void print_supported_wiki(void) { Index: flashrom-compilefixes/flashrom.c =================================================================== --- flashrom-compilefixes/flashrom.c (Revision 1275) +++ flashrom-compilefixes/flashrom.c (Arbeitskopie) @@ -1186,9 +1186,12 @@ if (!flash || !flash->name) return NULL; +#if CONFIG_INTERNAL == 1 if (programmer_table[programmer].map_flash_region == physmap) { snprintf(location, sizeof(location), "at physical address 0x%lx", base); - } else { + } else +#endif + { snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); } Index: flashrom-compilefixes/programmer.h =================================================================== --- flashrom-compilefixes/programmer.h (Revision 1275) +++ flashrom-compilefixes/programmer.h (Arbeitskopie) @@ -229,7 +229,7 @@ #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif -- http://www.hailfinger.org/

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[commit] r1278 - trunk
by repository service 07 Mar '11

07 Mar '11

Author: hailfinger Date: Tue Mar 8 01:09:11 2011 New Revision: 1278 URL: http://flashrom.org/trac/flashrom/changeset/1278 Log: Fix compilation if CONFIG_INTERNAL=no. Fix compilation if everything except CONFIG_SATAMV is no. Do not compile in PCI support for wiki printing if no PCI devices are supported. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/flashrom.c trunk/print_wiki.c trunk/programmer.h Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Mon Mar 7 16:32:58 2011 (r1277) +++ trunk/flashrom.c Tue Mar 8 01:09:11 2011 (r1278) @@ -1186,11 +1186,12 @@ if (!flash || !flash->name) return NULL; - if (programmer_table[programmer].map_flash_region == physmap) { +#if CONFIG_INTERNAL == 1 + if (programmer_table[programmer].map_flash_region == physmap) snprintf(location, sizeof(location), "at physical address 0x%lx", base); - } else { + else +#endif snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); - } msg_cinfo("%s chip \"%s %s\" (%d KB, %s) %s.\n", force ? "Assuming" : "Found", Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Mon Mar 7 16:32:58 2011 (r1277) +++ trunk/print_wiki.c Tue Mar 8 01:09:11 2011 (r1278) @@ -246,6 +246,8 @@ printf("\n|}\n\n|}\n"); } +/* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 static void print_supported_pcidevs_wiki(const struct pcidev_status *devs) { int i = 0; @@ -262,6 +264,7 @@ (devs[i].status == NT) ? "?3" : "OK"); } } +#endif void print_supported_wiki(void) { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Mon Mar 7 16:32:58 2011 (r1277) +++ trunk/programmer.h Tue Mar 8 01:09:11 2011 (r1278) @@ -229,7 +229,7 @@ #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif

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[patch] Fix compiling r1275 and higher
by Idwer Vollering 07 Mar '11

07 Mar '11

Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Index: flashchips.c =================================================================== --- flashchips.c (revision 1275) +++ flashchips.c (working copy) @@ -5567,7 +5567,7 @@ .total_size = 64, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_PREW, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers =

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[commit] r1277 - trunk
by repository service 07 Mar '11

07 Mar '11

Author: hailfinger Date: Mon Mar 7 16:32:58 2011 New Revision: 1277 URL: http://flashrom.org/trac/flashrom/changeset/1277 Log: Fix broken compilation caused by a typo in r1275. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Mar 7 11:59:06 2011 (r1276) +++ trunk/flashchips.c Mon Mar 7 16:32:58 2011 (r1277) @@ -5567,7 +5567,7 @@ .total_size = 64, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_PREW, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers =

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Re: [flashrom] [PATCH] Remove delays in JEDEC erase sequence
by Carl-Daniel Hailfinger 07 Mar '11

07 Mar '11

Auf 06.03.2011 20:11, Michael Karcher schrieb: > t is extremely unlikely that a chip not requiring delays in probe does > require them in erase. We observed unreliable erasing with a SST49LF004A > with these delays, so remove them if the are not required. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > jedec.c | 33 +++++++++++++++++++++------------ > 1 files changed, 21 insertions(+), 12 deletions(-) > > diff --git a/jedec.c b/jedec.c > index 199c64d..822de88 100644 > --- a/jedec.c > +++ b/jedec.c > @@ -242,21 +242,24 @@ static int erase_sector_jedec_common(struct flashchip *flash, unsigned int page, > unsigned int pagesize, unsigned int mask) > { > chipaddr bios = flash->virtual_memory; > + int delay_us = 10; > + if(flash->probe_timing != TIMING_ZERO) > + delay_us = 0; > Inverted logic. Could you fix the logic like this: + int delay_us = 0; + if(flash->probe_timing != TIMING_ZERO) + delay_us = 10; Default to 0 delay, and only change it if the chip is slow. > > /* Issue the Sector Erase command */ > chip_writeb(0xAA, bios + (0x5555 & mask)); > - programmer_delay(10); > + programmer_delay(delay_us); > probe_jedec goes further by making that call conditional on nonzero delay. I don't have a strong preference, but wanted to mention it. Anyway, with the logic fix this is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH] mark Erase/Write on MX25L1605 as tested
by Sven Schnelle 07 Mar '11

07 Mar '11

Hi List, i flashed my ThinkPad X60s which contains a Macronix MX25L1605D yesterday with flashrom. Erase and Write worked without problems several times, so i think it is safe to mark that Part as completely tested. Signed-off-by: Sven Schnelle <svens(a)stackframe.org>

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[commit] r1276 - trunk
by repository service 07 Mar '11

07 Mar '11

Author: hailfinger Date: Mon Mar 7 11:59:06 2011 New Revision: 1276 URL: http://flashrom.org/trac/flashrom/changeset/1276 Log: Mark Macronix MX25L1605D as fully tested. Signed-off-by: Sven Schnelle <svens(a)stackframe.org> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Mar 7 02:09:55 2011 (r1275) +++ trunk/flashchips.c Mon Mar 7 11:59:06 2011 (r1276) @@ -3829,7 +3829,7 @@ .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers =

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Re: [flashrom] [PATCH] Add mediatek_pata programmer
by Joseph Smith 07 Mar '11

07 Mar '11

On Mon, 7 Mar 2011 01:05:03 +0100, Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> wrote: > Add support for flashing using CD/DVD drives with mediatek chipsets. > > As the driver is now, it only supports parallel ATA drives with parallel > flash chips. The kind of drive access needed is not possible through IDE > drivers in the OS, flashrom has to access the IDE port directly. This will > interfere with OS drivers for the drive, so you better make sure that > the OS does not access the drive (or another drive on the same PATA > channel) > during the flash process. > > On recent linux kernels (with libata), the invocation > "-p mediatek_pata:devname=sr0" should work. It is supposed to forcibly > unregister all drives on the IDE channel sr0 is on (you better don't have > a file system mounted on a hard drive on the same channel), perform the > flash job, and, if the drive successfully reboots, re-add all detectable > IDE devices on that channel. > > This patch is known to lack a man page section and violate the flashrom > coding style in some places - I send it out to catch some early reviews > on it. > This is really cool :-) It also opens the door to another pata flasher: http://www.loet.de/flasher_en.html Great work! -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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[Patch] Add coarse-grained IPC locking mechanism to Flashrom
by David Hendricks 07 Mar '11

07 Mar '11

Hi, I have attached a patch which adds a locking mechanism to Flashrom to prevent multiple instances from running simultaneously. It may need some modification to fit different Flashrom use cases better, but I think it's a good start. The size of the patch is somewhat misleading -- The only real changes to Flashrom's current code are some of the exit points in cli_classic() and some added stuff in the Makefile. Everything else is contained in new files. The new files are: csem.{c,h}: Low-level code that interfaces with semctl(), semget(), etc. ipc_lock.{c,h}: Wrapper for csem stuff. locks.h: A listing of locks that Flashrom cares about. big_lock.{c,h}: An even higher-level wrapper around ipc_lock stuff, useful for simple, coarse-grained locking. util/use_big_lock.sh: Used by the Makefile to test for POSIX.1-2001 compliance. The advantages of this approach are: - The semaphore can be shared easily with other processes. - The semaphore is cleaned automagically in case of abnormal program termination. - Semaphore info can be viewed and managed easily using standard utilities like ipcs. - On Linux at least, a second instance of Flashrom will automatically begin immediately after the first instance is done. No busy waiting, no excessive delays. - We avoid errata with other locking mechanisms (there are known issues with flock(), for example). Disadvantages: - The current patch is very coarse-grained, which could be problematic for people who wish to flash multiple chips simultaneously. - Requires >= POSIX.1-2001 compliance. Please note that some files in this patch are BSD-licensed. Much of it is based off code which was open-sourced by Sun Microsystems, after acquiring it from Cobalt Networks. Signed-off-by: David Hendricks <dhendrix(a)google.com> -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Re: [flashrom] rtl8169 support - Final
by Mathias Krause 06 Mar '11

06 Mar '11

On 05.01.2011 18:36, Jon Shadow wrote: > I stole that static from nic3com.c file I suppose. > But there its used in nic3com_init() and nic3com_shutdown(), so needs to be a global variable. Regards, Mathias

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Re: [flashrom] [PATCH] SST39SF512 is tested
by Carl-Daniel Hailfinger 06 Mar '11

06 Mar '11

Hi Michael, thanks for your patch! Auf 07.03.2011 02:44, Michael Karcher schrieb: > flashrom -V -w: http://paste.flashrom.org/view.php?id=389 > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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