- flashrom - mail.coreboot.org

[PATCH] explain better what checks are disabled in case we detect a legacy BIOS
by Stefan Tauner 12 Apr '11

12 Apr '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- layout.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/layout.c b/layout.c index 92fe852..d719a05 100644 --- a/layout.c +++ b/layout.c @@ -76,7 +76,8 @@ int show_id(uint8_t *bios, int size, int force) mb_vendor_offset = *(walk - 2); if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. Disabling checks.\n"); + msg_pinfo("Flash image seems to be a legacy BIOS. " + "Disabling coreboot-related checks.\n"); return 0; } -- 1.7.1

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HELP! "...flash chip is in an unknown state"
by Bernard Matthews 12 Apr '11

12 Apr '11

Hi Help, I thought I did what was right, but apparently I'm missing something. System details: BioStar TA785G3 v 6.1 according to the printing on the mainboard. Athlon II X3 435. Label on factory CMOS: 88GAP901BST. But the date showing on boot is 3/31/2010. I'm trying to replace the CMOS info because of an intermittent board failure that I felt I had reduced to either a processor failure or a board failure. The mainboard comes with a built-in utility on F12 to flash the new file, but it rejects the file claiming that the BIOS ID does not match. The new file came from Biostar. I actually downloaded two copies, one from Taiwan, and one from USA, and diff'd them to make sure they were the same. So below are the results of my attempt to flash the chip :-(. Here's my initial run to check for compatibility with my board (blank spaces/lines added for legibility) ============================================================== grml@grml /mnt/2011_home/netvista % sudo flashrom flashrom v0.9.2-r1141 on Linux 2.6.36-grml (i686), built with libpci 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found ITE Super I/O, id 8718 Found chipset "AMD SB700/SB710/SB750", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. No operations were specified. ============================================================== grml@grml /mnt/2011_home/netvista % sudo flashrom -r 88GAP901_BST_20110411.BST flashrom v0.9.2-r1141 on Linux 2.6.36-grml (i686), built with libpci 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found ITE Super I/O, id 8718 Found chipset "AMD SB700/SB710/SB750", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. Block protection could not be disabled! Reading flash... done. ============================================================== At this point, I did a Google search for "Block protection could not be disabled", but did not find anything that said THIS MEANS YOU WON'T BE ABLE TO ERASE! So, I forged ahead: ============================================================== grml@grml /mnt/2011_home/netvista % ls -l *BST -r--r--r-- 1 root root 1048576 2011-04-12 05:57 88GAP901_BST_20110411.BST grml@grml /mnt/2011_home/netvista % cd Down* grml@grml /mnt/2011_home/netvista/Downloads % ls -l *BST -r--r--r-- 1 grml users 1048576 2011-04-10 07:43 88GAP804.BST ============================================================== The above lines show that the file that I'm going to write with (88GAP804.BST) is the same size as the one that I saved from the chip (88GAP901_BST_20110411.BST). ============================================================== grml@grml /mnt/2011_home/netvista/Downloads % sudo flashrom -w 88GAP804.BST flashrom v0.9.2-r1141 on Linux 2.6.36-grml (i686), built with libpci 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found ITE Super I/O, id 8718 Found chipset "AMD SB700/SB710/SB750", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. Block protection could not be disabled! Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... Erasing flash chip... ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte count from 0x00000000-0x00000fff: 0xf9d ERASE FAILED! ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte count from 0x00000000-0x0000ffff: 0xf8fa ERASE FAILED! ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte count from 0x00000000-0x0000ffff: 0xf8fa ERASE FAILED! ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte count from 0x00000000-0x000fffff: 0xdc5ed ERASE FAILED! ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte count from 0x00000000-0x000fffff: 0xdc5ed ERASE FAILED! FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! sudo flashrom -w 88GAP804.BST 8.37s user 0.07s system 99% cpu 8.489 total ============================================================== So, since the erase failed, shouldn't I be okay? Unless my cats press a button or pull a wire, I will leave the machine on for a response. Thank you very much for your help in advance! ----- bernard

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Re: [flashrom] HELP! "...flash chip is in an unknown state"
by Idwer Vollering 12 Apr '11

12 Apr '11

2011/4/12 Bernard Matthews <philoscience(a)gmail.com>: > Thank you very, very much for getting in touch with me! > > I solved the problem before I got your email, but didn't have a chance > to email an update yet. > > On my system, it appears flashrom cannot be run from an Xterm window. > If that is in the documentation somewhere, I apologize for missing it. No, it's not. This sounds weird. > > I first verified with "flashrom -v 88GAP901_BST_20110411.BST" that > the image currently in the rom matched my backup file, in case I had > to reboot. > > I cannot recall if I did reboot first, or if I had just closed X windows. > > Using flashrom from a text terminal CLI worked perfectly! I see the > new file and date on my boot screen now, and so far no problems. > > Thank you folks very much for such a wonderful program. > > ----- bernard > > On Tue, Apr 12, 2011 at 2:16 PM, Idwer Vollering <vidwer(a)gmail.com> wrote: >> 2011/4/12 Bernard Matthews <philoscience(a)gmail.com>: >>> Hi Help, >>> >>> I thought I did what was right, but apparently I'm missing something. >>> >>> System details: >>> >>> BioStar TA785G3 v 6.1 according to the printing on the mainboard. >>> >>> Athlon II X3 435. >>> >>> Label on factory CMOS: 88GAP901BST. But the date showing on boot is 3/31/2010. >>> >>> I'm trying to replace the CMOS info because of an intermittent board >>> failure that I felt I had reduced to either a processor failure or a >>> board failure. >>> >>> The mainboard comes with a built-in utility on F12 to flash the new >>> file, but it rejects the file claiming that the BIOS ID does not >>> match. >>> >>> The new file came from Biostar. I actually downloaded two copies, one >>> from Taiwan, and one from USA, and diff'd them to make sure they were >>> the same. >>> >>> So below are the results of my attempt to flash the chip :-(. >>> >>> >>> Here's my initial run to check for compatibility with my board (blank >>> spaces/lines added for legibility) >>> ============================================================== >>> grml@grml /mnt/2011_home/netvista % sudo flashrom >>> >>> flashrom v0.9.2-r1141 on Linux 2.6.36-grml (i686), built with libpci >>> 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian >>> flashrom is free software, get the source code at http://www.flashrom.org >>> >>> Calibrating delay loop... OK. >>> No coreboot table found. >>> Found ITE Super I/O, id 8718 >>> Found chipset "AMD SB700/SB710/SB750", enabling flash write... OK. >>> This chipset supports the following protocols: LPC,FWH,SPI. >>> Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. >>> No operations were specified. >>> ============================================================== >>> >>> grml@grml /mnt/2011_home/netvista % sudo flashrom -r 88GAP901_BST_20110411.BST >> >> This is your backup file... >> >>> >>> flashrom v0.9.2-r1141 on Linux 2.6.36-grml (i686), built with libpci >>> 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian >>> flashrom is free software, get the source code at http://www.flashrom.org >>> >>> Calibrating delay loop... OK. >>> No coreboot table found. >>> Found ITE Super I/O, id 8718 >>> Found chipset "AMD SB700/SB710/SB750", enabling flash write... OK. >>> This chipset supports the following protocols: LPC,FWH,SPI. >>> Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. >>> Block protection could not be disabled! >>> Reading flash... done. >>> >>> ============================================================== >>> >>> At this point, I did a Google search for "Block protection could not >>> be disabled", but did not find anything that said THIS MEANS YOU WON'T >>> BE ABLE TO ERASE! >>> >>> So, I forged ahead: >>> >>> ============================================================== >>> >>> grml@grml /mnt/2011_home/netvista % ls -l *BST >>> >>> -r--r--r-- 1 root root 1048576 2011-04-12 05:57 88GAP901_BST_20110411.BST >>> grml@grml /mnt/2011_home/netvista % cd Down* >>> >>> >>> grml@grml /mnt/2011_home/netvista/Downloads % ls -l *BST >>> >>> -r--r--r-- 1 grml users 1048576 2011-04-10 07:43 88GAP804.BST >>> >>> ============================================================== >>> >>> The above lines show that the file that I'm going to write with >>> (88GAP804.BST) is the same size as the one that I saved from the chip >>> (88GAP901_BST_20110411.BST). >>> >>> ============================================================== >>> >>> grml@grml /mnt/2011_home/netvista/Downloads % sudo flashrom -w 88GAP804.BST >> >> and this is the new file. >> >>> flashrom v0.9.2-r1141 on Linux 2.6.36-grml (i686), built with libpci >>> 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian >>> flashrom is free software, get the source code at http://www.flashrom.org >>> >>> Calibrating delay loop... OK. >>> No coreboot table found. >>> Found ITE Super I/O, id 8718 >>> Found chipset "AMD SB700/SB710/SB750", enabling flash write... OK. >>> This chipset supports the following protocols: LPC,FWH,SPI. >>> Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. >>> Block protection could not be disabled! >>> Flash image seems to be a legacy BIOS. Disabling checks. >>> Writing flash chip... Erasing flash before programming... Erasing flash chip... >>> >>> ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte >>> count from 0x00000000-0x00000fff: 0xf9d >>> ERASE FAILED! >>> ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte >>> count from 0x00000000-0x0000ffff: 0xf8fa >>> ERASE FAILED! >>> ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte >>> count from 0x00000000-0x0000ffff: 0xf8fa >>> ERASE FAILED! >>> ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte >>> count from 0x00000000-0x000fffff: 0xdc5ed >>> ERASE FAILED! >>> ERASE FAILED at 0x0000000c! Expected=0xff, Read=0xec, failed byte >>> count from 0x00000000-0x000fffff: 0xdc5ed >>> ERASE FAILED! >>> FAILED! >>> ERASE FAILED! >>> FAILED! >>> Your flash chip is in an unknown state. >>> Get help on IRC at irc.freenode.net (channel #flashrom) or >>> mail flashrom(a)flashrom.org! >>> ------------------------------------------------------------------------------- >>> DO NOT REBOOT OR POWEROFF! >> >> Can you re-run flashrom like above, but with the "-V" (--verbose) parameter ? >> Like this: sudo flashrom -V -w 88GAP804.BST >> >>> sudo flashrom -w 88GAP804.BST 8.37s user 0.07s system 99% cpu 8.489 total >>> >>> ============================================================== >>> >>> So, since the erase failed, shouldn't I be okay? Unless my cats press >>> a button or pull a wire, I will leave the machine on for a response. >>> >>> Thank you very much for your help in advance! >>> >>> ----- bernard >>> >>> _______________________________________________ >>> flashrom mailing list >>> flashrom(a)flashrom.org >>> http://www.flashrom.org/mailman/listinfo/flashrom >>> >> >

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Toshiba C655D
by Julian Shulika 12 Apr '11

12 Apr '11

Hi,I have laptop Toshiba C655D-S5136. I attached lspci -wnnxxx log, flashrom verbose log and dmidecode log files. Thank you for your time

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Re: [flashrom] Gigabyte GA AMD E350N USB3 Board
by Marek 12 Apr '11

12 Apr '11

Hi, I recently got a response from official GA support team and the chips used on this board are: MX25L1606EM2I-12G iTE8720 Marek On 1.4.2011, at 21:37, Marek <mlf.conv(a)gmail.com> wrote: > Hi, > > with regards to recent AMD patches, I'd like to ask whether it would be possible to install coreboot on Gigabyte GA AMD E350N USB3 board (AMD E350, chipset FCH A50 Hudson M1, iTE 8720). > > thanks > > Marek

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help me!!
by Marcelino Casado Clemente 10 Apr '11

10 Apr '11

Hi, I wonderifyou canhelp,notto updatemyBIOS withthisinformation,Iwould appreciateif you couldevertell mewhereand howtodownloadtheromupdate.Thanks. flashrom v0.9.2-r1028 on Linux 2.6.35-28-generic (i686), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 517M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 508M loops per second, delay more than 10% too short (got 85% of expected delay), recalculating... 528M loops per second, delay more than 10% too short (got 88% of expected delay), recalculating... 589M loops per second, delay more than 10% too short (got 85% of expected delay), recalculating... 589M loops per second, delay loop is unreliable, trying to continue 10 myus = 12 us, 100 myus = 85 us, 1000 myus = 832 us, 10000 myus = 9748 us, 8 myus = 10 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "AVERATEC" DMI string system-product-name: "1500 Series" DMI string system-version: "By O.E.M." DMI string baseboard-manufacturer: "AVERATEC" DMI string baseboard-product-name: "1500 Series" DMI string baseboard-version: "by O.E.M." DMI string chassis-type: "Desktop" Found chipset "Intel ICH7M", enabling flash write... chipset PCI ID is 8086:27b9, 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x3 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 Root Complex Register Block address = 0xfed1c000 GCS = 0xb00460: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x0004 (SPIS) 0x02: 0x4140 (SPIC) 0x04: 0x00000000 (SPIA) 0x08: 0xc21413c2 (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x00000000 (SPID2+4) 0x20: 0x00000000 (SPID3) 0x24: 0x53544224 (SPID3+4) 0x28: 0x59313146 (SPID4) 0x2c: 0x30303030 (SPID4+4) 0x30: 0x02040720 (SPID5) 0x34: 0x00442617 (SPID5+4) 0x38: 0x00ffaaea (SPID6) 0x3c: 0x2f3430f0 (SPID6+4) 0x40: 0x302f3230 (SPID7) 0x44: 0x00fc0037 (SPID7+4) 0x50: 0x00000000 (BBAR) 0x54: 0x5006 (PREOP) 0x56: 0x463b (OPTYPE) 0x58: 0x05d80302 (OPMENU) 0x5c: 0xc79f0190 (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) 0x6c: 0x00000000 (PBR3) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: SPI. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for ASD AE49F2008, 256 KB: skipped. Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: skipped. Probing for EMST F49B002UA, 256 KB: skipped. Probing for Eon EN25B05, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25D16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN29F010, 128 KB: skipped. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Intel 28F001BX-B, 128 KB: skipped. Probing for Intel 28F001BX-T, 128 KB: skipped. Probing for Intel 28F004S5, 512 KB: skipped. Probing for Intel 28F004BV/BE-B, 512 KB: skipped. Probing for Intel 28F004BV/BE-T, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: skipped. Probing for Intel 82802AC, 1024 KB: skipped. Probing for Macronix MX25L512, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for Numonyx M25PE10, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: skipped. Probing for PMC Pm49FL004, 512 KB: skipped. Probing for Sanyo LF25FW203A, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sharp LHF00L04, 1024 KB: skipped. Probing for Spansion S25FL008A, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF016B, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040.REMS, 512 KB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040B.REMS, 512 KB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: skipped. Probing for SST SST49LF003A/B, 384 KB: skipped. Probing for SST SST49LF004A/B, 512 KB: skipped. Probing for SST SST49LF004C, 512 KB: skipped. Probing for SST SST49LF008A, 1024 KB: skipped. Probing for SST SST49LF008C, 1024 KB: skipped. Probing for SST SST49LF016C, 2048 KB: skipped. Probing for SST SST49LF020, 256 KB: skipped. Probing for SST SST49LF020A, 256 KB: skipped. Probing for SST SST49LF040, 512 KB: skipped. Probing for SST SST49LF040B, 512 KB: skipped. Probing for SST SST49LF080A, 1024 KB: skipped. Probing for SST SST49LF160C, 2048 KB: skipped. Probing for ST M25P05-A, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05.RES, 64 KB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10.RES, 128 KB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 KB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: skipped. Probing for ST M50FLW040B, 512 KB: skipped. Probing for ST M50FLW080A, 1024 KB: skipped. Probing for ST M50FLW080B, 1024 KB: skipped. Probing for ST M50FW002, 256 KB: skipped. Probing for ST M50FW016, 2048 KB: skipped. Probing for ST M50FW040, 512 KB: skipped. Probing for ST M50FW080, 1024 KB: skipped. Probing for ST M50LPW116, 2048 KB: skipped. Probing for SyncMOS S29C31004T, 512 KB: skipped. Probing for SyncMOS S29C51001T, 128 KB: skipped. Probing for SyncMOS S29C51002T, 256 KB: skipped. Probing for SyncMOS S29C51004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x10, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x20, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x40, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x32, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x64, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W29C011, 128 KB: skipped. Probing for Winbond W29C020C, 256 KB: skipped. Probing for Winbond W29C040P, 512 KB: skipped. Probing for Winbond W29EE011, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: skipped. Probing for Winbond W39V040B, 512 KB: skipped. Probing for Winbond W39V040C, 512 KB: skipped. Probing for Winbond W39V040FA, 512 KB: skipped. Probing for Winbond W39V080A, 1024 KB: skipped. Probing for Winbond W49F002U, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: skipped. Probing for Winbond W49V002FA, 256 KB: skipped. Probing for Winbond W39V080FA, 1024 KB: skipped. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Probing for Atmel unknown Atmel SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EON unknown EON SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 KB: probe_spi_rems: id1 0xc2, id2 0x13 === This flash part has status UNTESTED for operations: ERASE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified.

2 1

3Com Corporation 3c905C-TX/TX-M - problems
by Tadas 10 Apr '11

10 Apr '11

I have problems flashing this card. Behavior is unpredictable. Sometimes it erases flash memory, sometimes - not. Sometimes it writes, sometimes - not. Failure of erase: http://paste.flashrom.org/view.php?id=448 Sucess of erase: http://paste.flashrom.org/view.php?id=447 Failure of write: http://paste.flashrom.org/view.php?id=449 Success of write: http://paste.flashrom.org/view.php?id=450\ Tried it with 0.9.3 version, and latest trunk. Tadas Barzdžius +370695 92533

1 0

SST SST49LF003A/B Write failed
by - - 09 Apr '11

09 Apr '11

First try: http://paste.flashrom.org/view.php?id=457 http://paste.flashrom.org/view.php?id=459 http://paste.flashrom.org/view.php?id=460 i hope after reboot my computer can working. http://paste.flashrom.org/view.php?id=461 A binary attachment has been deleted: readout.rom

2 1

Winbond W29C011A-15
by Marcos Felipe Rasia de Mello 08 Apr '11

08 Apr '11

3Com 3C905B-TXNM [10b7:9055] + Winbond W29C011A-15 Erase, write: OK (flashrom v0.9.3-r1285) If I erase the chip first (flashrom -E), sometimes a subsequent write operation show an error ("VERIFY FAILED"), but retry and complete (look the attached file). On the other hand, if the chip has something recorded on it, the write operation complete without errors. In both cases, it works fine. Marcos

1 0

Macronix MX29F001TPC-12
by Marcos Felipe Rasia de Mello 08 Apr '11

08 Apr '11

3Com 3C905B-TXNM [10b7:9055] + Macronix MX29F001TPC-12 Probe, read, erase, write: OK (flashrom v0.9.3-r1285) Marcos

2 1

Dell Adamo XPS
by Marek 07 Apr '11

07 Apr '11

Hi, I'd like to ask whether someone would be so kind to take a look at Dell Adamo XPS logs and give me some advice as to whether there is any chance to flashrom & coreboot this device: http://ul.to/fiyfu9so I'd be glad if anyone could give me further instructions on how to find out more information. thanks, Marek

2 2

Fwd: Asus L1N64WS/B
by Julian Shulika 06 Apr '11

06 Apr '11

> Hi,Stefan. Thank you for answer,see log file verbose.log 2011/4/5 Stefan Reinauer <stefan.reinauer(a)coreboot.org>: > * Julian Shulika <hercares(a)gmail.com> [110404 01:30]: >> Any news about adding support of Asus L1N64? > > Looks like the chipset should be supported. Can you attach a verbose > flashrom run log? > >

1 0

Oops!
by Brandon Dowdy 06 Apr '11

06 Apr '11

I forgot to add the attachments! here they are.

1 0

Re: [flashrom] [PATCH 3/6] changes macros for SSFS and SSFC bits: - introduce mask macros - add comments - change SSFS_CDS to SSFS_FDONE (abbr. used in datasheet not in SSFS but HSFS) - use those for refactoring and magic number elemination. - following patch uses them for pretty printing
by Stefan Reinauer 05 Apr '11

05 Apr '11

* Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> [110401 14:33]: > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > ichspi.c | 56 ++++++++++++++++++++++++++++++++++---------------------- > 1 files changed, 34 insertions(+), 22 deletions(-) > > diff --git a/ichspi.c b/ichspi.c > index 4e303d7..9491604 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -43,32 +43,44 @@ > #include "spi.h" > > /* ICH9 controller register definition */ > +#define ICH9_REG_FADDR 0x08 /* 32 Bits */ > +#define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ > > -#define ICH9_REG_SSFS 0x90 /* 08 Bits */ > -#define SSFS_SCIP 0x00000001 > -#define SSFS_CDS 0x00000004 > -#define SSFS_FCERR 0x00000008 > -#define SSFS_AEL 0x00000010 > +#define ICH9_REG_SSFS 0x90 /* 08 Bits */ > +#define SSFS_SCIP 0x00000001 /* SPI Cycle In Progress */ > +#define SSFS_SCIP_OFF 0 > +#define SSFS_FDONE 0x00000004 /* Cycle Done Status */ > +#define SSFS_FDONE_OFF 2 > +#define SSFS_FCERR 0x00000008 /* Flash Cycle Error */ > +#define SSFS_FCERR_OFF 3 > +#define SSFS_AEL 0x00000010 /* Access Error Log */ > +#define SSFS_AEL_OFF 4 Would be nice to #define SSFS_AEL (1 << SSFS_AEL_OFF) and so on. If both are needed. It would be nicer to get rid of either.

2 1

Re: [flashrom] [PATCH 2/6] some additional comments for ichspi.c
by Paul Menzel 05 Apr '11

05 Apr '11

Am Freitag, den 01.04.2011, 14:33 +0200 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > ichspi.c | 8 ++++++-- > 1 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/ichspi.c b/ichspi.c > index 0b9db20..4e303d7 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -62,6 +62,9 @@ > #define SSFC_SCF 0x01000000 > #define SSFC_SCF_20MHZ 0x00000000 > #define SSFC_SCF_33MHZ 0x01000000 > +/* We combine SSFS and SSFC to one lword, > + * therefore SSFC bits are off by 8. > + * This bits are reserved SSFC: 23-19,7,0; SSFS: 5-7. */ »These bits …« or »The following bits are …«. > #define SSFC_RESERVED_MASK 0xf8008100 > > #define ICH9_REG_FADDR 0x08 /* 32 Bits */ > @@ -116,7 +119,7 @@ static void *ich_spibar = NULL; > typedef struct _OPCODE { > uint8_t opcode; //This commands spi opcode > uint8_t spi_type; //This commands spi type > - uint8_t atomic; //Use preop: (0: none, 1: preop0, 2: preop1 > + uint8_t atomic; //Use preop: (0: none, 1: preop0 only, 2: both) Also put space a after the comment characters `//`? > } OPCODE; > > /* Suggested opcode definition: > @@ -679,7 +682,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, > > /* Assemble SSFS + SSFC */ > temp32 = REGREAD32(ICH9_REG_SSFS); > - /* keep reserved bits */ > + /* Keep reserved bits only */ > temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; > /* clear error status registers */ > temp32 |= (SSFS_CDS + SSFS_FCERR); > @@ -688,6 +691,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, > /* Use 20 MHz */ > temp32 |= SSFC_SCF_20MHZ; > > + /* Set data byte count (DBC) and data cycle bit (DS) */ I do not know if the common rule is to add full stops at the end of sentences or not. > if (datalength != 0) { > uint32_t datatemp; > temp32 |= SSFC_DS; Thanks, Paul

2 1

Fwd: Asus L1N64WS/B
by Julian Shulika 05 Apr '11

05 Apr '11

I have Asus L1N64WS/B (SST49LF080A) and L1N64WS-Sli (Winbond W39V080APZ) motherboards. It's not supported by flashrom I attached the dmi output and an "lspci -vvnnxxx" output. ---------- Forwarded message ---------- From: Julian Shulika <hercares(a)gmail.com> Date: 2011/3/29 Subject: Re: [flashrom] Asus L1N64WS/B To: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>

2 2

I found another laptop. (with a link to the disassembled acpi code.)
by Brandon Dowdy 05 Apr '11

05 Apr '11

Company: Advent Laptop model: U40SI1 CPU: Intel Pentium T2370 CPU Socket: mPGA479M Northbridge: SiS 671MX Southbridge: SiS 968 Super I/O: ITE IT8512E EC: Same as Super I/O Flash chip: Winbond W25X80* Flash chip size: 1MB (1024 KB) Flash chip is supported by flashrom. Flash Type: SPI Owner: kiddyshaq34 (me) *The flash chip is according to Phlash. Disassembled ACPI code is here: http://www.decashare.com/?id=GErsWP7FN

1 0

Re: [flashrom] [PATCH 6/6] introduce a global variable to save the maximum number of bytes in an SPI transaction supported by this programmer and use that to simplify code
by Stefan Reinauer 05 Apr '11

05 Apr '11

* Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> [110401 14:33]: > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > ichspi.c | 59 +++++++++++++++++++++++------------------------------------ > 1 files changed, 23 insertions(+), 36 deletions(-) > > diff --git a/ichspi.c b/ichspi.c > index 0ad4f20..b22cf4b 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -124,6 +124,9 @@ > /* ICH SPI configuration lock-down. May be set during chipset enabling. */ > static int ichspi_lock = 0; > > +/* Indicates maximum number of data bytes for each SPI transaction. */ > +static int ichspi_maxdata = -1; > + > uint32_t ichspi_bbar = 0; > > static void *ich_spibar = NULL; > @@ -824,57 +827,38 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, > static int run_opcode(OPCODE op, uint32_t offset, > uint8_t datalength, uint8_t * data) > { > + if (spi_controller == SPI_CONTROLLER_NONE){ curly brackets for command blocks want an additional space. Stefan

1 0

Re: [flashrom] [PATCH 4/6] add pretty printing functions for SSFS+SSFC and the OPCODE struct and use them
by Stefan Reinauer 05 Apr '11

05 Apr '11

* Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> [110401 14:33]: > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > ichspi.c | 47 +++++++++++++++++++++++++++++++++++++++++------ > 1 files changed, 41 insertions(+), 6 deletions(-) > > diff --git a/ichspi.c b/ichspi.c > index 9491604..b24b6a0 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -242,6 +242,41 @@ static OPCODE POSSIBLE_OPCODES[] = { > > static OPCODES O_EXISTING = {}; > > +/* pretty printing functions */ > +static void pretty_print_opcodes(OPCODES *ops){ curly brakes for functions should go on a new line. Stefan

1 0

Re: [flashrom] [PATCH 2/6] some additional comments for ichspi.c
by Stefan Reinauer 05 Apr '11

05 Apr '11

* Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> [110401 14:33]: > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > ichspi.c | 8 ++++++-- > 1 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/ichspi.c b/ichspi.c > index 0b9db20..4e303d7 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -62,6 +62,9 @@ > #define SSFC_SCF 0x01000000 > #define SSFC_SCF_20MHZ 0x00000000 > #define SSFC_SCF_33MHZ 0x01000000 > +/* We combine SSFS and SSFC to one lword, What's an lword?

1 0

One more student would like to participate in GSoC
by Tadas Slotkus 04 Apr '11

04 Apr '11

Hello, I am a student at Kaunas University of Technology in Lithuania, studying Informatics Engineering second course and I would love to participate in GSoC. I have received some datasheets from VIA for unsupported chipsets, I would like port them. I have good soldering skills and am able to make small printed circuit boards. Some of my homemade art PCBs: http://www.papile.projektas.lt/imgs/usb/ So I have to setup a convenient flashing system for future development which would be brick unaware. I am interested in these ideas: 1) flashrom remote flashing with modified SerialICE - needs to add flashing functionality. With SerialICE we won't need RAM working, so it will help developing chipset code. After reset SerialICE flashing part will be activated with dosens of bytes receiveid through serial port, and communication with HOST system will be initiated (HOST system then will send commands for flashing). If SerialICE won't get any bytes from serial port in a few milliseconds it will let the coreboot to run. We would use flashrom's codebase for flashing protocols... 2) flashrom as payload - for such implementation we should make a config system where we would choose which flash chip(s) are needed to be included in our payload's build. The rom image might be transferred through serial port. But payload needs RAM, so this idea is in discussion list. The first idea would be the primary objective for me. What do you think? Thanks, Tadas Slotkus P.S. I have been around coreboot for some time. My earlier email in mailing-lists: mrtadis(a)gmail.com, current irc nick: mrtadis)

2 1

flashrom output
by Aaron Thomas 03 Apr '11

03 Apr '11

see attached, thanks. also included dmidecode file if helpful. Aaron

1 0

SPI motherboard support request - Intel DP67DE/DP67BA
by stiff the 02 Apr '11

02 Apr '11

Hi. A have bricked motherboard and need support Intel DP67DE or Intel DP67BA (it same, I think) for read flash from non-bricked motherboard. mainboard name — Intel DP67DE bios flash — W25Q32 (Winbond 4096k SPI) Output from ./flashrom -V lspci -nnvvvxxx in attached files. Thx.

1 0

Re: [flashrom] [PATCH 1/2] add "support" for SB850 (it has the same pci id as SB700 etc)
by Idwer Vollering 02 Apr '11

02 Apr '11

2011/4/1 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer(a)gmail.com> > --- > chipset_enable.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 838d321..0bb46bb 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1011,7 +1011,7 @@ const struct penable chipset_enables[] = { > {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, > {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, > {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, > - {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750", enable_flash_sb600}, > + {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, For reference/proof: http://flashrom.org/pipermail/flashrom/2011-March/006072.html > {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, > {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, > {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, > -- > 1.7.1 > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom >

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[commit] r1285 - trunk
by repository service 02 Apr '11

02 Apr '11

Author: hailfinger Date: Sat Apr 2 13:47:21 2011 New Revision: 1285 URL: http://flashrom.org/trac/flashrom/changeset/1285 Log: List AMD SB850 as supported (it has the same PCI ID as SB700). Success report at http://flashrom.org/pipermail/flashrom/2011-March/006072.html Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri Apr 1 20:05:20 2011 (r1284) +++ trunk/chipset_enable.c Sat Apr 2 13:47:21 2011 (r1285) @@ -1011,7 +1011,7 @@ {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, - {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750", enable_flash_sb600}, + {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4},

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