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[commit] r1346 - trunk
by repository service 19 Jun '11

19 Jun '11

Author: uwe Date: Sun Jun 19 18:52:48 2011 New Revision: 1346 URL: http://flashrom.org/trac/flashrom/changeset/1346 Log: Add ASRock K7S41GX board-enable. Tested reading, writing and verification, all worked fine. Signed-off-by: Pawel Rozanski <rozie(a)poczta.onet.pl> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Jun 19 00:56:14 2011 (r1345) +++ trunk/board_enable.c Sun Jun 19 18:52:48 2011 (r1346) @@ -391,6 +391,7 @@ * - MSI MS-6561 (745 Ultra): SiS 745 + W83697HF * - MSI MS-6787 (P4MAM-V/P4MAM-L): VIA P4M266 + VT8235 * - ASRock K7S41: SiS 741 + SiS 963 + W83697HF + * - ASRock K7S41GX: SiS 741GX + SiS 963L + W83697HF */ static int w836xx_memw_enable_2e(void) { @@ -1980,6 +1981,7 @@ {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", P3, "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x8086, 0x277c, 0xa0a0, 0x060b, 0x8086, 0x27da, 0xa0a0, 0x060b, NULL, NULL, NULL, P3, "AOpen", "i975Xa-YDG", 0, OK, board_aopen_i975xa_ydg}, {0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41 $", NULL, NULL, P3, "ASRock", "K7S41", 0, OK, w836xx_memw_enable_2e}, + {0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41GX$", NULL, NULL, P3, "ASRock", "K7S41GX", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, P3, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x8086, 0x2570, 0x1849, 0x2570, 0x8086, 0x24d3, 0x1849, 0x24d0, NULL, NULL, NULL, P3, "ASRock", "775i65G", 0, OK, intel_ich_gpio23_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, P3, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Jun 19 00:56:14 2011 (r1345) +++ trunk/print.c Sun Jun 19 18:52:48 2011 (r1346) @@ -400,6 +400,7 @@ B("ASRock", "A770CrossFire", 1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire&s=AM2%%2b", NULL), B("ASRock", "ALiveNF6G-DVI", 1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL), B("ASRock", "K7S41", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL), + B("ASRock", "K7S41GX", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL), B("ASRock", "K7VT4A+", 0, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%%2b&s=", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"), B("ASRock", "K8S8X", 1, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL), B("ASRock", "M3A790GXH/128M", 1, "http://www.asrock.com/MB/overview.asp?Model=M3A790GXH/128M", NULL),

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Success flashing Supermicro X7SPA-HF
by Jochen Schulz 18 Jun '11

18 Jun '11

Hi, I just wanted to say thanks and report that I just successfully flashed the BIOS of my brand-new mainboard Supermicro X7SPA-HF¹ using flashrom. After wasting a whole evening trying to make a 4MB BIOS image fit onto a (virtual) floppy, I stumbled upon flashrom again and, without much thought, decided to give it a try. I tried reading the current BIOS first and after that worked I flashed the file X7SPA0.526 from the current zip download. I ignored the message that erasing is untested and another one that suggested that a single block or something like that couldn't be eraed. After five minutes of waiting I became a little bit nervous, but two or three minutes later flashrom was finished and I could reboot successfully. So, thanks again, flashrom saved my day. If you need any further information for your documentation, please Cc me as I am not subscribed. J. ¹ http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IP… -- When I am doing sex I wonder if my emotions can be detected by alien civilisations. [Agree] [Disagree] <http://www.slowlydownward.com/NODATA/data_enter2.html>

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Write on an ASUS M4A78-EM
by Jani Uusitalo 18 Jun '11

18 Jun '11

Hi list. Just flashed my ASUS M4A78-EM using flashrom (Ubuntu packed version 0.9.1+r946-1ubuntu1, with latest rev. 2101 ROM from ASUS), and everything went fine. Just thought I'd send this note since the motherboard isn't listed in the wiki yet. Reading the old image from chip also worked fine. -- Jani

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"ST M25P80" (1024 KB, SPI) - Tested - WORKS
by Harald Gutmann 18 Jun '11

18 Jun '11

hargut@benchvice:~/flashrom$ sudo ./flashrom -w ../coreboot.svn/build/coreboot.rom flashrom v0.9.3-r1223 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100913 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. coreboot table found at 0x7fffe000. Found ITE Super I/O, ID 0x8716. Found chipset "NVIDIA MCP55", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller 4 byte RDID not supported on this SPI controller Found chip "ST M25P80" (1024 KB, SPI) at physical address 0xfff00000. 4 byte RDID not supported on this SPI controller === This flash part has status UNTESTED for operations: ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Erasing flash chip... SUCCESS. Writing flash chip... COMPLETE. Verifying flash... VERIFIED. hargut@benchvice:~/flashrom$

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GA-6VXE7
by Justin Doiel 18 Jun '11

18 Jun '11

The attached is the output of flashrom -EV on the gigabyte GA-6VXE7. Erase worked. we verified all FFs, and wrote the contents back successfully. Juston Doiel

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Asus A8N-VM (Pm49FL004) - Flashed OK
by Dave B 18 Jun '11

18 Jun '11

Hi, Thanks loads to developers past and present for flashrom ! I collected the info from my successful attempt on an Asus A8N-VM m/b which isn't in your list at flashrom.org/Supported_hardware, if you want to add it. ( http://www.asus.com/product.aspx?P_ID=nwcuFMseNd3DhmVA ) Session summary: ===== dave@K-Matrix:~/BIOS/ASUS_AMI/ROMs/q403$ sudo flashrom -V -r 0403_flashrom-r_2010-10-23.ROM flashrom v0.9.2-r1028 on Linux 2.6.35-22-generic (i686), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 790M loops per second, delay more than 10% too short (got 73% of expected delay), recalculating... 944M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 899M loops per second, delay more than 10% too short (got 83% of expected delay), recalculating... 945M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 919M loops per second, delay loop is unreliable, trying to continue 10 myus = 10 us, 100 myus = 85 us, 1000 myus = 834 us, 10000 myus = 18535 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "A8N-VM" DMI string baseboard-version: "Rev 1.xx" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP51", enabling flash write... chipset PCI ID is 10de:0261, OK. This chipset supports the following protocols: Non-SPI. Probing for ... <CUT> Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000. Probing for ... <CUT> Reading flash... done. dave@K-Matrix:~/BIOS/ASUS_AMI/ROMs/q403$ ---------- dave@K-Matrix:/proc/driver$ sudo modprobe nvram [sudo] password for dave: ### backup nvram dave@K-Matrix:/media/SGii/MyData/BIOS$ cd /media/SGii/MyData/BIOS/ASUS_AMI/nvram dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/nvram$ sudo dd if=/dev/nvram of=2010-10-23 0+1 records in 0+1 records out 114 bytes (114 B) copied, 0.000946501 s, 120 kB/s dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/nvram$ # #----------> HERE WE GO ... WISH ME LUCK ;) # dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/ROMs/0702$ sudo flashrom -w 0702.ROM # write new flash ROM image flashrom v0.9.2-r1028 on Linux 2.6.35-22-generic (i686), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP51", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... SUCCESS. Programming page: DONE!ss: 0x0007f000 COMPLETE. Verifying flash... VERIFIED. dave@K-Matrix:/media/SGii/MyData/BIOS/ASUS_AMI/ROMs/0702$ ===== Really valuable work - thanks again ! Best regards, Dave B

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Report for successful operation: WRITE on Lanner EM-8510C V1.1B (Flash SST49LF004A/B)
by Christian Motz 18 Jun '11

18 Jun '11

To whom it may concern, I just tested the WRITE operation with the SVN r1216 version of flashrom on a Lanner EM-8510C mainboard (V1.1B, chip "SST SST49LF004A/B") with POSITIVE result. Attached find the log of the operation (flashrom -Vw) as requested. Best regards, -- Christian Motz Software Engineer Funkwerk IP-Appliances GmbH Mönchhaldenstr. 28 D-70191 Stuttgart Tel: +49 711 900300 - 66 Fax: +49 711 900300 - 90 E-Mail: christian.motz(a)funkwerk-ec.com Location: GmbH Nuernberg, Local Court Nuernberg, HRB 25481 Managing Directors: Bernd Büttner -------------------------------- The information contained in this e-mail has been carefully researched, but the possibility of it being inapplicable in individual cases cannot be ruled out. We therefore regret that we cannot accept responsibility or liability of any kind whatsoever for the correctness of the information given. Please notify us if you discover that information is inapplicable.

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Asus P5VD1-X: Instant success
by Olle Gross 18 Jun '11

18 Jun '11

Hi, just wanted to tell that i successfully flashed the bios of my old Asus P5VD1-X with flashrom, so i guess it could be added to the supported list. Attaching output of flashrom -V, lspci -nnvvvxxx, superiotool -deV. New bios version 0704 downloaded from asus.com, can't link directly cos they require captcha for download. Everything works just fine, and the bios menu reports the new version. Just one thing that might or might not be of any importance, i noted that lspci reports the board as "ASUSTeK Computer Inc. P4V800D-X Mainboard [1043:8199]". This is wrong, it's a P5VD1-X - at least it says so on the board. You think this could cause any problems, or is it just cosmetic? Regards, Olof

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SST39SF020A write ok, and message question
by Andrew Morgan 18 Jun '11

18 Jun '11

Log attached. When running 'flashrom' on its own I got this message: This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Should the text "Please mention your board in the subject line." in this case say "flash part" or "flash chp" instead of "board"? I'm assuming the board name is important for un-tested boards or board enables, whereas in this case it is the flash chip name which is important? -- Andrew.

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Success report: Tyan S2723
by Uwe Hermann 18 Jun '11

18 Jun '11

Hi, I tested flashrom on the Tyan S2723 board, works fine. Logs attached. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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Test results for flashrom on Asus P5N32-E SLI motherboard
by Paul Brookman 18 Jun '11

18 Jun '11

This is the output from flashing the bios chip on an Asus P5N32-E motherboard. Flashrom worked without a problem backing up and updating the bios. Many thanks, Paul Brookman

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Re: [flashrom] Flashrom Feedback
by Uwe Hermann 18 Jun '11

18 Jun '11

Hi, On Thu, Oct 07, 2010 at 02:00:38PM +0100, Andrew Wierzan wrote: > I have successfully flashed ASUS P7H57-D-EVO using the current trunk at svn://coreboot.org/flashrom/trunk (trunk @ 1199). I used an Ubuntu 9.1 Live USB environment and followed the guide on the downloads page. > > The latest Asus BIOS (1606) for this board disables the ability to roll-back bios version using their own utility EZFlash. Many many thanks for continuing this project, it's saved a lot of hassle :) Thanks, we marked that board as supported. Sorry for the delay. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r1345 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: uwe Date: Sun Jun 19 00:56:14 2011 New Revision: 1345 URL: http://flashrom.org/trac/flashrom/changeset/1345 Log: Various board status updates. Mark the following boards as OK: - ASUS P7H57D-V EVO (reported by Andrew Wierzan <andrew(a)emerginguk.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005042.html - Tyan S2723 (Tiger i7501) (reported by Uwe Hermann <uwe(a)hermann-uwe.de>) http://www.flashrom.org/pipermail/flashrom/2010-October/005156.html - ASUS P5VD1-X (reported by Olle Gross <gusgross(a)student.gu.se>) http://www.flashrom.org/pipermail/flashrom/2010-October/005205.html - Lanner EM-8510C (reported by Christian Motz <christian.motz(a)funkwerk-ec.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005240.html - ASUS A8N-VM (reported by Dave B <flashrom(a)d10.karoo.co.uk>) http://www.flashrom.org/pipermail/flashrom/2010-October/005247.html - GIGABYTE GA-6VXE7+ (reported by Justin Doiel <justin.doiel(a)gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005251.html - Supermicro X7SPA-HF (reported by Jochen Schulz <ml(a)well-adjusted.de>) http://www.flashrom.org/pipermail/flashrom/2010-November/005346.html - ASUS M4A78-EM (reported by Jani Uusitalo <jani(a)mummila.net>) http://www.flashrom.org/pipermail/flashrom/2010-December/005587.html - ASUS P5N32-E SLI (reported by Paul Brookman <paul_brookman(a)sky.com>) http://www.flashrom.org/pipermail/flashrom/2010-December/005559.html Mark the following chips as OK: - SST SST39SF020A (reported by Andrew Morgan <ziltro(a)ziltro.com>) http://www.flashrom.org/pipermail/flashrom/2010-October/005107.html - ST M25P80 (reported by Harald Gutmann <harald.gutmann(a)gmx.net>) http://www.flashrom.org/pipermail/flashrom/2010-November/005334.html Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashchips.c trunk/print.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Jun 18 20:45:56 2011 (r1344) +++ trunk/flashchips.c Sun Jun 19 00:56:14 2011 (r1345) @@ -5798,7 +5798,7 @@ .total_size = 256, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = @@ -6597,7 +6597,7 @@ .model_id = ST_M25P80, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Jun 18 20:45:56 2011 (r1344) +++ trunk/print.c Sun Jun 19 00:56:14 2011 (r1345) @@ -420,6 +420,7 @@ B("ASUS", "A8N-LA (Nagami-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&d…", "This is an OEM board from HP, the HP name is Nagami-GL8E."), B("ASUS", "A8N-SLI", 1, "http://www.asus.com/product.aspx?P_ID=J9FKa8z2xVId3pDK", NULL), B("ASUS", "A8N-SLI Premium", 1, "http://www.asus.com/product.aspx?P_ID=nbulqxniNmzf0mH1", NULL), + B("ASUS", "A8N-VM", 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL), B("ASUS", "A8N-VM CSM", 1, "http://www.asus.com/product.aspx?P_ID=JBqqlpj4cspbSa3s", NULL), B("ASUS", "A8NE-FM/S", 1, "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE…", NULL), B("ASUS", "A8V Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=tvpdgPNCPaABZRVU", NULL), @@ -439,6 +440,7 @@ B("ASUS", "M2V-MX", 1, "http://www.asus.com/product.aspx?P_ID=7grf8Ci4yxnqzt3z", NULL), B("ASUS", "M3A76-CM", 1, NULL, NULL), B("ASUS", "M3A78-EM", 1, "http://www.asus.com/product.aspx?P_ID=KjpYqzmAd9vsTM2D", NULL), + B("ASUS", "M4A78-EM", 1, "http://www.asus.com/product.aspx?P_ID=0KyowHKUFAQqH2DO", NULL), B("ASUS", "M4A785TD-M EVO", 1, "http://www.asus.com/product.aspx?P_ID=QHbvGVB1mXmmD8qQ", NULL), B("ASUS", "M4A79T Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=lhJiLTN5huPfCVkW", NULL), B("ASUS", "M4A87TD/USB3", 1, "http://www.asus.com/product.aspx?P_ID=nlWYrI9wlNIYHAaa", NULL), @@ -470,11 +472,14 @@ B("ASUS", "P5KC", 1, "http://www.asus.com/product.aspx?P_ID=fFZ8oUIGmLpwNMjj", NULL), B("ASUS", "P5L-MX", 1, "http://www.asus.com/product.aspx?P_ID=X70d3NCzH2DE9vWH", NULL), B("ASUS", "P5GD1 Pro", 1, "http://www.asus.com/product.aspx?P_ID=50M49xQh71EZOeM1", NULL), + B("ASUS", "P5N32-E SLI", 1, "http://www.asus.com/product.aspx?P_ID=vBZLIBtPzYB2bLcb", NULL), B("ASUS", "P5ND2-SLI Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=WY7XroDuUImVbgp5", NULL), B("ASUS", "P5PE-VM", 1, "http://www.asus.com/product.aspx?P_ID=k3h0ZFVu9Lo1dUvk", NULL), + B("ASUS", "P5VD1-X", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL), B("ASUS", "P6T SE", 1, "http://www.asus.com/product.aspx?P_ID=t4yhK6y9W9o7iQ9E", NULL), B("ASUS", "P6T Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=vXixf82co6Q5v0BZ", NULL), B("ASUS", "P6T Deluxe V2", 1, "http://www.asus.com/product.aspx?P_ID=iRlP8RG9han6saZx", NULL), + B("ASUS", "P7H57D-V EVO", 1, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL), B("ASUS", "Z8NA-D6C", 1, "http://www.asus.com/product.aspx?P_ID=k81cpN8uEB01BpQ6", NULL), B("BCOM", "WinNET100", 1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."), B("Biostar", "M6TBA", 0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), @@ -509,6 +514,7 @@ B("GIGABYTE", "GA-6BXC", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL), B("GIGABYTE", "GA-6BXDU", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL), B("GIGABYTE", "GA-6IEM", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL), + B("GIGABYTE", "GA-6VXE7+", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL), B("GIGABYTE", "GA-6ZMA", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL), B("GIGABYTE", "GA-MA785GMT-UD2H", 1, "http://www.gigabyte.de/Products/Motherboard/Products_Overview.aspx?ProductI…", NULL), B("GIGABYTE", "GA-770TA-UD3", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3272#ov", NULL), @@ -557,6 +563,7 @@ B("IWILL", "DK8-HTX", 1, "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.as…", NULL), B("Jetway", "J7F4K1G5D-PB", 1, "http://www.jetway.com.tw/jetway/system/productshow2.asp?id=389&proname=J7F4…", NULL), B("Kontron", "986LCD-M", 1, "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/…", NULL), + B("Lanner", "EM-8510C", 1, NULL, NULL), B("Lex", "CV700A", 1, "http://www.lex.com.tw/product/CV700A-spec.htm", NULL), B("Mitac", "6513WU", 1, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/produ…", NULL), B("MSI", "MS-6153", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=336", NULL), @@ -622,6 +629,7 @@ B("Sun", "Fire x4600", 0, "http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."), B("Supermicro", "H8QC8", 1, "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL), B("Supermicro", "X5DP8-G2", 1, "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL), + B("Supermicro", "X7SPA-HF", 1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IP…", NULL), B("Supermicro", "X8DT3", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL), B("Supermicro", "X8DTH-6F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL), B("Supermicro", "X8DTT-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL), @@ -637,6 +645,7 @@ B("Tyan", "S1846 (Tsunami ATX)", 1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL), B("Tyan", "S2466 (Tiger MPX)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=461", NULL), B("Tyan", "S2498 (Tomcat K7M)", 1, "http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL), + B("Tyan", "S2723 (Tiger i7501)", 1, "http://www.tyan.com/archive/products/html/tigeri7501.html", NULL), B("Tyan", "S2881 (Thunder K8SR)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=115", NULL), B("Tyan", "S2882 (Thunder K8S Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=121", NULL), B("Tyan", "S2882-D (Thunder K8SD Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),

1 0

[PATCH 4/4] add printing of chip voltage ranges to print_wiki.c
by Stefan Tauner 18 Jun '11

18 Jun '11

- add voltage ranges - center some headers (test values OK, No, ? are centered via wiki templates) - fix style error in header (align:right -> text-align:right) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print_wiki.c | 46 ++++++++++++++++++++++++++++++++-------------- 1 files changed, 32 insertions(+), 14 deletions(-) diff --git a/print_wiki.c b/print_wiki.c index 684c4e0..e2b2eca 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -29,7 +29,8 @@ static const char wiki_header[] = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ -background-color:#eeeeee; align:right; border:1px solid #aabbcc;\"><small>\n\ +background-color:#eeeeee; text-align:right; border:1px solid #aabbcc;\">\ +<small>\n\ Please do '''not''' edit these tables in the wiki directly, they are \ generated by pasting '''flashrom -z''' output.<br />\ '''Last update:''' %s(generated by flashrom %s)\n</small></div>\n"; @@ -37,12 +38,13 @@ generated by pasting '''flashrom -z''' output.<br />\ #if CONFIG_INTERNAL == 1 static const char chipset_th[] = "{| border=\"0\" style=\"font-size: smaller\"\n\ |- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Southbridge\n! align=\"left\" | PCI IDs\n\ -! align=\"left\" | Status\n\n"; +! align=\"left\" | Southbridge\n! align=\"center\" | PCI IDs\n\ +! align=\"center\" | Status\n\n"; static const char board_th[] = "{| border=\"0\" style=\"font-size: smaller\" \ valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Mainboard\n! align=\"left\" | Required option\n! align=\"left\" | Status\n\n"; +! align=\"left\" | Mainboard\n! align=\"left\" | Required option\n\ +! align=\"center\" | Status\n\n"; static const char board_intro[] = "\ \n== Supported mainboards ==\n\n\ @@ -57,20 +59,26 @@ not work (we don't know, someone has to give it a try). Please report any \ further verified mainboards on the [[Mailinglist|mailing list]].\n"; #endif -static const char chip_th[] = "{| border=\"0\" style=\"font-size: smaller\" \ -valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Device\n! align=\"left\" | Size / kB\n\ -! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\ +static const char chip_th[] = "{\ +| border=\"0\" style=\"font-size: smaller\"valign=\"top\"\n\ +|- bgcolor=\"#6699dd\"\n\ +! align=\"left\" | Vendor\n\ +! align=\"left\" | Device\n\ +! align=\"center\" | Size [kB]\n\ +! align=\"center\" | Type\n\ +! align=\"center\" colspan=\"4\" | Status\n\ +! align=\"center\" colspan=\"2\" | Voltage [V]\n\n\ |- bgcolor=\"#6699ff\"\n| colspan=\"4\" |  \n\ -| Probe\n| Read\n| Erase\n| Write\n\n"; +| Probe\n| Read\n| Erase\n| Write\n\ +| align=\"center\" | min \n| align=\"center\" | max\n\n"; static const char programmer_section[] = "\ \n== Supported programmers ==\n\nThis is a list \ of supported PCI devices flashrom can use as programmer:\n\n{| border=\"0\" \ valign=\"top\"\n| valign=\"top\"|\n\n{| border=\"0\" style=\"font-size: \ smaller\" valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Device\n! align=\"left\" | PCI IDs\n\ -! align=\"left\" | Status\n\n"; +! align=\"left\" | Device\n! align=\"center\" | PCI IDs\n\ +! align=\"center\" | Status\n\n"; #if CONFIG_INTERNAL == 1 static const char laptop_intro[] = "\n== Supported laptops/notebooks ==\n\n\ @@ -204,6 +212,9 @@ static void print_supported_chips_wiki(int cols) const struct flashchip *f, *old = NULL; uint32_t t; char *tmp_bus_str; + char tmp_max_str[6]; + char tmp_min_str[6]; + const char *na = "N/A"; for (f = flashchips; f->name != NULL; f++) chipcount++; @@ -223,8 +234,13 @@ static void print_supported_chips_wiki(int cols) t = f->tested; tmp_bus_str = flashbuses_to_text(f->bustype); - printf("|- bgcolor=\"#%s\"\n| %s || %s || %d " - "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}\n", + sprintf(tmp_min_str, "%0.03f", f->voltage.min/(double)1000); + sprintf(tmp_max_str, "%0.03f", f->voltage.max/(double)1000); + /* '{{%s}}' is used in combination with 'OK', 'No' and '?3' to + * select special formatting templates for the bg color. */ + printf("|- bgcolor=\"#%s\"\n| %s || %s || align=\"right\" | %d " + "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}" + "|| %s || %s \n", (c == 1) ? "eeeeee" : "dddddd", f->vendor, f->name, f->total_size, tmp_bus_str, (t & TEST_OK_PROBE) ? "OK" : @@ -234,7 +250,9 @@ static void print_supported_chips_wiki(int cols) (t & TEST_OK_ERASE) ? "OK" : (t & TEST_BAD_ERASE) ? "No" : "?3", (t & TEST_OK_WRITE) ? "OK" : - (t & TEST_BAD_WRITE) ? "No" : "?3"); + (t & TEST_BAD_WRITE) ? "No" : "?3", + f->voltage.min ? tmp_min_str : na, + f->voltage.min ? tmp_max_str : na); free(tmp_bus_str); /* Split table into 'cols' columns. */ -- 1.7.1

1 0

[PATCH 3/4] reformat -L output and add printing of chip voltage ranges to print.c
by Stefan Tauner 18 Jun '11

18 Jun '11

besides adding output for the voltage ranges, this patch also changes various aspects of the -L output: - sizes are right aligned now with a fixed length of 5 - test results are always shown in the same column ("PR" and " R" instead of "PR" and "R ") - get rid of POS_PRINT and digits - wideness reductions on the whole with a remarkable detail: vendor names are split on '/' and spread over mutliple lines while all other columns are printed on the first line. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 149 +++++++++++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 102 insertions(+), 47 deletions(-) diff --git a/print.c b/print.c index 80316cb..b110ff9 100644 --- a/print.c +++ b/print.c @@ -59,27 +59,16 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -#define POS_PRINT(x) do { pos += strlen(x); msg_ginfo(x); } while (0) - -static int digits(int n) -{ - int i; - - if (!n) - return 1; - - for (i = 0; n; ++i) - n /= 10; - - return i; -} - static void print_supported_chips(void) { - int okcol = 0, pos = 0, i, chipcount = 0; + int i, chipcount = 0; int maxvendorlen = strlen("Vendor") + 1; int maxchiplen = strlen("Device") + 1; + int maxtypelen = strlen("Type") + 1; const struct flashchip *f; + const char *delim ="/"; + char *tmp_ven_str; + int tmp_ven_len; char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) { @@ -87,12 +76,22 @@ static void print_supported_chips(void) if (!strncmp(f->name, "unknown", 7)) continue; chipcount++; - maxvendorlen = max(maxvendorlen, strlen(f->vendor)); + tmp_ven_str = (char *)f->vendor; + do { + tmp_ven_len = strcspn(tmp_ven_str, delim); + maxvendorlen = max(maxvendorlen, tmp_ven_len); + tmp_ven_str += tmp_ven_len; + } while (tmp_ven_len != 0); + maxchiplen = max(maxchiplen, strlen(f->name)); + tmp_bus_str = flashbuses_to_text(f->bustype); + maxtypelen = max(maxtypelen, + strlen(flashbuses_to_text(f->bustype))); + free(tmp_bus_str); } - maxvendorlen++; - maxchiplen++; - okcol = maxvendorlen + maxchiplen; + maxvendorlen += 1; + maxchiplen += 1; + maxtypelen += 1; msg_ginfo("Supported flash chips (total: %d):\n\n", chipcount); msg_ginfo("Vendor"); @@ -102,10 +101,21 @@ static void print_supported_chips(void) for (i = strlen("Device"); i < maxchiplen; i++) msg_ginfo(" "); - msg_ginfo("Tested Known Size/kB: Type:\n"); - for (i = 0; i < okcol; i++) + msg_ginfo("Test Known Size "); + + msg_ginfo("Type"); + for (i = strlen("Type"); i < maxtypelen; i++) + msg_ginfo(" "); + msg_gdbg("Voltage"); + msg_ginfo("\n"); + + for (i = 0; i < maxvendorlen + maxchiplen; i++) + msg_ginfo(" "); + msg_ginfo("OK Broken [kB]"); + for (i = 0; i < maxtypelen; i++) msg_ginfo(" "); - msg_ginfo("OK Broken\n\n"); + msg_gdbg("range [V]"); + msg_ginfo("\n\n"); msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { @@ -113,50 +123,95 @@ static void print_supported_chips(void) if (!strncmp(f->name, "unknown", 7)) continue; - msg_ginfo("%s", f->vendor); - for (i = strlen(f->vendor); i < maxvendorlen; i++) + /* support for multiline vendor names: + * - make a copy of the original vendor name + * - use strok to put the next token in tmp_ven_str repeatedly + * - keep track of the last token's length for ' '-padding + */ + tmp_ven_str = malloc(strlen(f->vendor) + 1); + if (tmp_ven_str == NULL) { + msg_gerr("Out of memory!\n"); + exit(1); + } + strcpy(tmp_ven_str, f->vendor); + + tmp_ven_str = strtok(tmp_ven_str, delim); + tmp_ven_len = strlen(tmp_ven_str); + msg_ginfo("%s", tmp_ven_str); + tmp_ven_str = strtok(NULL, delim); + if (tmp_ven_str != NULL) { + msg_ginfo("%s", delim); + tmp_ven_len++; + } + + for (i = tmp_ven_len; i < maxvendorlen; i++) msg_ginfo(" "); + msg_ginfo("%s", f->name); for (i = strlen(f->name); i < maxchiplen; i++) msg_ginfo(" "); - pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { if ((f->tested & TEST_OK_PROBE)) - POS_PRINT("P "); + msg_ginfo("P"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_READ)) - POS_PRINT("R "); + msg_ginfo("R"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_ERASE)) - POS_PRINT("E "); + msg_ginfo("E"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_WRITE)) - POS_PRINT("W "); - } - while (pos < okcol + 9) { - msg_ginfo(" "); - pos++; - } + msg_ginfo("W "); + else + msg_ginfo(" "); + } else + msg_ginfo(" "); + if ((f->tested & TEST_BAD_MASK)) { if ((f->tested & TEST_BAD_PROBE)) - POS_PRINT("P "); + msg_ginfo("P"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_READ)) - POS_PRINT("R "); + msg_ginfo("R"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_ERASE)) - POS_PRINT("E "); + msg_ginfo("E"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_WRITE)) - POS_PRINT("W "); - } + msg_ginfo("W "); + else + msg_ginfo(" "); + } else + msg_ginfo(" "); - while (pos < okcol + 18) { - msg_ginfo(" "); - pos++; - } - msg_ginfo("%d", f->total_size); - for (i = 0; i < 10 - digits(f->total_size); i++) - msg_ginfo(" "); + msg_ginfo("%5d ", f->total_size); tmp_bus_str = flashbuses_to_text(f->bustype); msg_ginfo("%s", tmp_bus_str); + for (i = strlen(tmp_bus_str); + i < maxtypelen; + i++) + msg_ginfo(" "); free(tmp_bus_str); + + if (f->voltage.min == 0 && f->voltage.max == 0) + msg_gdbg("no info"); + else + msg_gdbg("%0.02f;%0.02f", + f->voltage.min/(double)1000, + f->voltage.max/(double)1000); + + while (tmp_ven_str != NULL) { + msg_ginfo("\n%s", tmp_ven_str); + tmp_ven_str = strtok(NULL, delim); + } msg_ginfo("\n"); } } -- 1.7.1

1 0

[PATCH 2/4] fix memleaks due to incorrect usage of flashbuses_to_text
by Stefan Tauner 18 Jun '11

18 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 5 ++++- flashrom.c | 18 ++++++++++-------- print.c | 9 +++++++-- print_wiki.c | 5 ++++- 4 files changed, 25 insertions(+), 12 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 0c77f07..70c9bae 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1206,6 +1206,7 @@ int chipset_flash_enable(void) struct pci_dev *dev = NULL; int ret = -2; /* Nothing! */ int i; + char *tmp_bus_str; /* Now let's try to find the chipset we have... */ for (i = 0; chipset_enables[i].vendor_name != NULL; i++) { @@ -1244,8 +1245,10 @@ int chipset_flash_enable(void) msg_pinfo("PROBLEMS, continuing anyway\n"); } + tmp_bus_str = flashbuses_to_text(buses_supported); msg_pinfo("This chipset supports the following protocols: %s.\n", - flashbuses_to_text(buses_supported)); + tmp_bus_str); + free(tmp_bus_str); return ret; } diff --git a/flashrom.c b/flashrom.c index cfee1a1..3e400d1 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1119,7 +1119,7 @@ int probe_flash(int startchip, struct flashchip *fill_flash, int force) char location[64]; uint32_t size; enum chipbustype buses_common; - char *tmp; + char *tmp_bus_str; for (flash = flashchips + startchip; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) @@ -1128,13 +1128,13 @@ int probe_flash(int startchip, struct flashchip *fill_flash, int force) if (!buses_common) { msg_gspew("Probing for %s %s, %d kB: skipped. ", flash->vendor, flash->name, flash->total_size); - tmp = flashbuses_to_text(buses_supported); - msg_gspew("Host bus type %s ", tmp); - free(tmp); - tmp = flashbuses_to_text(flash->bustype); + tmp_bus_str = flashbuses_to_text(buses_supported); + msg_gspew("Host bus type %s ", tmp_bus_str); + free(tmp_bus_str); + tmp_bus_str = flashbuses_to_text(flash->bustype); msg_gspew("and chip bus type %s are incompatible.", - tmp); - free(tmp); + tmp_bus_str); + free(tmp_bus_str); msg_gspew("\n"); continue; } @@ -1186,10 +1186,12 @@ notfound: #endif snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); + tmp_bus_str = flashbuses_to_text(flash->bustype); msg_cinfo("%s chip \"%s %s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", flash->vendor, flash->name, flash->total_size, - flashbuses_to_text(flash->bustype), location); + tmp_bus_str, location); + free(tmp_bus_str); /* Flash registers will not be mapped if the chip was forced. Lock info * may be stored in registers, so avoid lock info printing. diff --git a/print.c b/print.c index af3edc1..80316cb 100644 --- a/print.c +++ b/print.c @@ -28,7 +28,7 @@ /* * Return a string corresponding to the bustype parameter. - * Memory is obtained with malloc() and can be freed with free(). + * Memory is obtained with malloc() and must be freed with free() by the caller. */ char *flashbuses_to_text(enum chipbustype bustype) { @@ -80,6 +80,7 @@ static void print_supported_chips(void) int maxvendorlen = strlen("Vendor") + 1; int maxchiplen = strlen("Device") + 1; const struct flashchip *f; + char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) { /* Ignore "unknown XXXX SPI chip" entries. */ @@ -152,7 +153,11 @@ static void print_supported_chips(void) msg_ginfo("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) msg_ginfo(" "); - msg_ginfo("%s\n", flashbuses_to_text(f->bustype)); + + tmp_bus_str = flashbuses_to_text(f->bustype); + msg_ginfo("%s", tmp_bus_str); + free(tmp_bus_str); + msg_ginfo("\n"); } } diff --git a/print_wiki.c b/print_wiki.c index e9ccc8b..684c4e0 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -203,6 +203,7 @@ static void print_supported_chips_wiki(int cols) int i = 0, c = 1, chipcount = 0; const struct flashchip *f, *old = NULL; uint32_t t; + char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) chipcount++; @@ -221,10 +222,11 @@ static void print_supported_chips_wiki(int cols) c = !c; t = f->tested; + tmp_bus_str = flashbuses_to_text(f->bustype); printf("|- bgcolor=\"#%s\"\n| %s || %s || %d " "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}\n", (c == 1) ? "eeeeee" : "dddddd", f->vendor, f->name, - f->total_size, flashbuses_to_text(f->bustype), + f->total_size, tmp_bus_str, (t & TEST_OK_PROBE) ? "OK" : (t & TEST_BAD_PROBE) ? "No" : "?3", (t & TEST_OK_READ) ? "OK" : @@ -233,6 +235,7 @@ static void print_supported_chips_wiki(int cols) (t & TEST_BAD_ERASE) ? "No" : "?3", (t & TEST_OK_WRITE) ? "OK" : (t & TEST_BAD_WRITE) ? "No" : "?3"); + free(tmp_bus_str); /* Split table into 'cols' columns. */ if (i >= (chipcount / cols + 1)) { -- 1.7.1

1 0

[PATCH 1/4] change all occurrences of printf to msg_ginfo in print.c
by Stefan Tauner 18 Jun '11

18 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 140 +++++++++++++++++++++++++++++++------------------------------- 1 files changed, 70 insertions(+), 70 deletions(-) diff --git a/print.c b/print.c index 8e6a187..af3edc1 100644 --- a/print.c +++ b/print.c @@ -59,7 +59,7 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -#define POS_PRINT(x) do { pos += strlen(x); printf(x); } while (0) +#define POS_PRINT(x) do { pos += strlen(x); msg_ginfo(x); } while (0) static int digits(int n) { @@ -93,31 +93,31 @@ static void print_supported_chips(void) maxchiplen++; okcol = maxvendorlen + maxchiplen; - printf("Supported flash chips (total: %d):\n\n", chipcount); - printf("Vendor"); + msg_ginfo("Supported flash chips (total: %d):\n\n", chipcount); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); - printf("Device"); + msg_ginfo(" "); + msg_ginfo("Device"); for (i = strlen("Device"); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); - printf("Tested Known Size/kB: Type:\n"); + msg_ginfo("Tested Known Size/kB: Type:\n"); for (i = 0; i < okcol; i++) - printf(" "); - printf("OK Broken\n\n"); - printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); + msg_ginfo(" "); + msg_ginfo("OK Broken\n\n"); + msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { /* Don't print "unknown XXXX SPI chip" entries. */ if (!strncmp(f->name, "unknown", 7)) continue; - printf("%s", f->vendor); + msg_ginfo("%s", f->vendor); for (i = strlen(f->vendor); i < maxvendorlen; i++) - printf(" "); - printf("%s", f->name); + msg_ginfo(" "); + msg_ginfo("%s", f->name); for (i = strlen(f->name); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { @@ -131,7 +131,7 @@ static void print_supported_chips(void) POS_PRINT("W "); } while (pos < okcol + 9) { - printf(" "); + msg_ginfo(" "); pos++; } if ((f->tested & TEST_BAD_MASK)) { @@ -146,13 +146,13 @@ static void print_supported_chips(void) } while (pos < okcol + 18) { - printf(" "); + msg_ginfo(" "); pos++; } - printf("%d", f->total_size); + msg_ginfo("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) - printf(" "); - printf("%s\n", flashbuses_to_text(f->bustype)); + msg_ginfo(" "); + msg_ginfo("%s\n", flashbuses_to_text(f->bustype)); } } @@ -172,26 +172,26 @@ static void print_supported_chipsets(void) maxvendorlen++; maxchipsetlen++; - printf("Supported chipsets (total: %d):\n\n", chipsetcount); + msg_ginfo("Supported chipsets (total: %d):\n\n", chipsetcount); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Chipset"); + msg_ginfo("Chipset"); for (i = strlen("Chipset"); i < maxchipsetlen; i++) - printf(" "); + msg_ginfo(" "); - printf("PCI IDs State\n\n"); + msg_ginfo("PCI IDs State\n\n"); for (c = chipset_enables; c->vendor_name != NULL; c++) { - printf("%s", c->vendor_name); + msg_ginfo("%s", c->vendor_name); for (i = 0; i < maxvendorlen - strlen(c->vendor_name); i++) - printf(" "); - printf("%s", c->device_name); + msg_ginfo(" "); + msg_ginfo("%s", c->device_name); for (i = 0; i < maxchipsetlen - strlen(c->device_name); i++) - printf(" "); - printf("%04x:%04x%s\n", c->vendor_id, c->device_id, + msg_ginfo(" "); + msg_ginfo("%04x:%04x%s\n", c->vendor_id, c->device_id, (c->status == OK) ? "" : " (untested)"); } } @@ -216,39 +216,39 @@ static void print_supported_boards_helper(const struct board_info *boards, maxvendorlen++; maxboardlen++; - printf("Known %s (good: %d, bad: %d):\n\n", + msg_ginfo("Known %s (good: %d, bad: %d):\n\n", devicetype, boardcount_good, boardcount_bad); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Board"); + msg_ginfo("Board"); for (i = strlen("Board"); i < maxboardlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Status Required option\n\n"); + msg_ginfo("Status Required option\n\n"); for (b = boards; b->vendor != NULL; b++) { - printf("%s", b->vendor); + msg_ginfo("%s", b->vendor); for (i = 0; i < maxvendorlen - strlen(b->vendor); i++) - printf(" "); - printf("%s", b->name); + msg_ginfo(" "); + msg_ginfo("%s", b->name); for (i = 0; i < maxboardlen - strlen(b->name); i++) - printf(" "); - printf((b->working) ? "OK " : "BAD "); + msg_ginfo(" "); + msg_ginfo((b->working) ? "OK " : "BAD "); for (e = board_pciid_enables; e->vendor_name != NULL; e++) { if (strcmp(e->vendor_name, b->vendor) || strcmp(e->board_name, b->name)) continue; if (e->lb_vendor == NULL) - printf("(autodetected)"); + msg_ginfo("(autodetected)"); else - printf("-m %s:%s", e->lb_vendor, + msg_ginfo("-m %s:%s", e->lb_vendor, e->lb_part); } - printf("\n"); + msg_ginfo("\n"); } } #endif @@ -257,104 +257,104 @@ void print_supported(void) { print_supported_chips(); - printf("\nSupported programmers:\n"); + msg_ginfo("\nSupported programmers:\n"); list_programmers_linebreak(0, 80, 0); #if CONFIG_INTERNAL == 1 - printf("\nSupported devices for the %s programmer:\n\n", + msg_ginfo("\nSupported devices for the %s programmer:\n\n", programmer_table[PROGRAMMER_INTERNAL].name); print_supported_chipsets(); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(boards_known, "boards"); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(laptops_known, "laptops"); #endif #if CONFIG_DUMMY == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DUMMY].name); /* FIXME */ - printf("Dummy device, does nothing and logs all accesses\n"); + msg_ginfo("Dummy device, does nothing and logs all accesses\n"); #endif #if CONFIG_NIC3COM == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NIC3COM].name); print_supported_pcidevs(nics_3com); #endif #if CONFIG_NICREALTEK == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICREALTEK].name); print_supported_pcidevs(nics_realtek); #endif #if CONFIG_NICNATSEMI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICNATSEMI].name); print_supported_pcidevs(nics_natsemi); #endif #if CONFIG_GFXNVIDIA == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_GFXNVIDIA].name); print_supported_pcidevs(gfx_nvidia); #endif #if CONFIG_DRKAISER == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DRKAISER].name); print_supported_pcidevs(drkaiser_pcidev); #endif #if CONFIG_SATASII == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATASII].name); print_supported_pcidevs(satas_sii); #endif #if CONFIG_ATAHPT == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif #if CONFIG_FT2232_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); print_supported_usbdevs(devs_ft2232spi); #endif #if CONFIG_SERPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SERPROG].name); /* FIXME */ - printf("All programmer devices speaking the serprog protocol\n"); + msg_ginfo("All programmer devices speaking the serprog protocol\n"); #endif #if CONFIG_BUSPIRATE_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_BUSPIRATE_SPI].name); /* FIXME */ - printf("Dangerous Prototypes Bus Pirate\n"); + msg_ginfo("Dangerous Prototypes Bus Pirate\n"); #endif #if CONFIG_DEDIPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DEDIPROG].name); /* FIXME */ - printf("Dediprog SF100\n"); + msg_ginfo("Dediprog SF100\n"); #endif #if CONFIG_RAYER_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_RAYER_SPI].name); /* FIXME */ - printf("RayeR parallel port programmer\n"); + msg_ginfo("RayeR parallel port programmer\n"); #endif #if CONFIG_NICINTEL == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL].name); print_supported_pcidevs(nics_intel); #endif #if CONFIG_NICINTEL_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL_SPI].name); print_supported_pcidevs(nics_intel_spi); #endif #if CONFIG_OGP_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_OGP_SPI].name); print_supported_pcidevs(ogp_spi); #endif #if CONFIG_SATAMV == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATAMV].name); print_supported_pcidevs(satas_mv); #endif -- 1.7.1

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[PATCH 0/4] voltage printing 2.1
by Stefan Tauner 18 Jun '11

18 Jun '11

no real changes since 2.0. i have only rebased to r1344 and squashed the additional commit. i would really like to get this in soon to... well... to get rid of pending patches only, but i think this is a very good reason TBH :) Stefan Tauner (4): change all occurrences of printf to msg_ginfo in print.c fix memleaks due to incorrect usage of flashbuses_to_text reformat -L output and add printing of chip voltage ranges to print.c add printing of chip voltage ranges to print_wiki.c chipset_enable.c | 5 +- flashrom.c | 18 ++-- print.c | 278 +++++++++++++++++++++++++++++++++--------------------- print_wiki.c | 51 +++++++--- 4 files changed, 219 insertions(+), 133 deletions(-)

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Re: [flashrom] [PATCH 3/3] add intel 6 series pci ids to chipset_enables
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:44PM +0200, Stefan Tauner wrote: > as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; > document number 324646-005, April 2011. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 14 ++++++++++++++ > 1 files changed, 14 insertions(+), 0 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 5907b86..a3ce942 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1121,6 +1121,20 @@ const struct penable chipset_enables[] = { > {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, > {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, > {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, > + {0x8086, 0x1C46, NT, "Intel", "P67", enable_flash_ich10}, > + {0x8086, 0x1C47, NT, "Intel", "UM67", enable_flash_ich10}, > + {0x8086, 0x1C49, NT, "Intel", "HM65", enable_flash_ich10}, > + {0x8086, 0x1C4A, NT, "Intel", "H67", enable_flash_ich10}, > + {0x8086, 0x1C4B, NT, "Intel", "HM67", enable_flash_ich10}, > + {0x8086, 0x1C4C, NT, "Intel", "Q65", enable_flash_ich10}, > + {0x8086, 0x1C4D, NT, "Intel", "QS67", enable_flash_ich10}, > + {0x8086, 0x1C4E, NT, "Intel", "Q67", enable_flash_ich10}, > + {0x8086, 0x1C4F, NT, "Intel", "QM67", enable_flash_ich10}, > + {0x8086, 0x1C50, NT, "Intel", "B65", enable_flash_ich10}, > + {0x8086, 0x1C52, NT, "Intel", "C202", enable_flash_ich10}, > + {0x8086, 0x1C54, NT, "Intel", "C204", enable_flash_ich10}, > + {0x8086, 0x1C56, NT, "Intel", "C206", enable_flash_ich10}, > + {0x8086, 0x1C5C, NT, "Intel", "H61", enable_flash_ich10}, All hexnumbers lower-case, please (e.g. 0x1c46, not 0x1C46). The entry for 0x1c44 (Z68) is missing (contained in the May 2011 PDF). With the above changes: Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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Re: [flashrom] [PATCH 2/3] fix and add a few chipset_enables entries
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:43PM +0200, Stefan Tauner wrote: > Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 12 +++++++++--- > 1 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 3a2febc..5907b86 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1115,8 +1115,8 @@ const struct penable chipset_enables[] = { > {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, > {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, > {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, > - {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, > - {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, > + {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, > + {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, > {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, > {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, > {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, > @@ -1125,14 +1125,17 @@ const struct penable chipset_enables[] = { > {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, > {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, > {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, > +// {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, /* http://download.intel.com/design/chipsets/datashts/27359901.pdf */ Correct, but please drop the comment. You could also uncomment the line (but leave NT) as chances are very high it will work. > {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, > {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, > {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, > {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, > {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, > +// {0x8086, 0x24dc, NT, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, /* http://www.intel.com/assets/pdf/datasheet/252516.pdf */ This is a duplicate entry? I cannot find 0x24dc in the datasheet, 0x24d0 is the correct device ID for ICH5/ICH5R. I'd rather drop this entry for now (and the comment). > {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, > {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, > {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, > +// {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, /* bios_cntl is at 0xdc? http://www3.intel.com/Assets/PDF/datasheet/301473.pdf, pci id: http://cateee.net/lkddb/web-lkddb/ITCO_WDT.html */ PCI ID is correct, 0xdc for BIOS_CTNL is also correct according to the ICH6W/ICH6RW datasheet. Please remove the comments. You could also uncomment this entry, it's very likely to be correct and work (but leave it as NT for now). > {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, > {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, > {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, > @@ -1151,10 +1154,12 @@ const struct penable chipset_enables[] = { > {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, > {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, > {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, > +// {0x8086, 0x3a10, NT, "Intel", "ICH10R", enable_flash_ich10}, /* engineering sample http://pci-ids.ucw.cz/read/PC/8086/3a10 and http://www.radisys.com/files/support_downloads/03292-00_ATCA-4500_CPM_Refer… */ IDs are OK, but please drop the comments. At most "/* ES */" or so, if you want. > {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, > {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, > {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, > {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, > +// {0x8086, 0x3a1e, NT, "Intel", "ICH10", enable_flash_ich10}, /* ICH10 engineering sample. http://pci-ids.ucw.cz/read/PC/8086/3a1e */ /* ES */ or no comment IMHO, see above. > {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, > {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, > {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, > @@ -1176,7 +1181,8 @@ const struct penable chipset_enables[] = { > {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, > {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, > {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, > - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, > + {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, > +// {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo?}, /* document number 324208 */ IDs are correct, comment can be dropped. The "?" from enable_flash_poulsbo can also be dropped I guess, the register bits used in enable_flash_poulsbo() are the same for "Atom E6xx(T)/Tunnel Creek", thus chances are good that it might work. You could also uncomment the line for that reason (but leave NT). With the above changes: Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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Re: [flashrom] [PATCH 1/3] resort chipset_enables array by pci ids
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:42PM +0200, Stefan Tauner wrote: > Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 210 +++++++++++++++++++++++++++--------------------------- > 1 files changed, 105 insertions(+), 105 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 60d5d4d..3a2febc 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1009,80 +1009,50 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name) > > #endif > > -/* Please keep this list alphabetically sorted by vendor/device. */ > +/* Please keep this list numerically sorted by vendor/device. */ ^^^^^^^^^^^^^ Make this "vendor/device ID" please. Other than that this is Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r1344 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:56 2011 New Revision: 1344 URL: http://flashrom.org/trac/flashrom/changeset/1344 Log: add intel 6 series pci ids to chipset_enables as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; document number 324646-006, May 2011. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 20:45:50 2011 (r1343) +++ trunk/chipset_enable.c Sat Jun 18 20:45:56 2011 (r1344) @@ -1121,6 +1121,21 @@ {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_ich10}, + {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_ich10}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_ich10}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_ich10}, + {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_ich10}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_ich10}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_ich10}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_ich10}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_ich10}, + {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_ich10}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_ich10}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_ich10}, + {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_ich10}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_ich10}, + {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_ich10}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e},

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[commit] r1343 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:50 2011 New Revision: 1343 URL: http://flashrom.org/trac/flashrom/changeset/1343 Log: fix and add a few chipset_enables entries Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 20:45:41 2011 (r1342) +++ trunk/chipset_enable.c Sat Jun 18 20:45:50 2011 (r1343) @@ -1013,7 +1013,7 @@ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, + {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, @@ -1052,7 +1052,7 @@ {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, + {0x10b9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ @@ -1115,8 +1115,8 @@ {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, - {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, + {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, + {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, @@ -1125,6 +1125,7 @@ {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, @@ -1133,6 +1134,7 @@ {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, @@ -1151,10 +1153,12 @@ {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a10, NT, "Intel", "ICH10R Engineering Sample", enable_flash_ich10}, {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, @@ -1176,7 +1180,8 @@ {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo}, #endif {}, };

1 0

[commit] r1342 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:41 2011 New Revision: 1342 URL: http://flashrom.org/trac/flashrom/changeset/1342 Log: resort chipset_enables array by pci ids Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 00:38:53 2011 (r1341) +++ trunk/chipset_enable.c Sat Jun 18 20:45:41 2011 (r1342) @@ -1009,80 +1009,50 @@ #endif -/* Please keep this list alphabetically sorted by vendor/device. */ +/* Please keep this list numerically sorted by vendor/device ID. */ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, - {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, - {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, - {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, - {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, - {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, - {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, - {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, - {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, - {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, - {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, - {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, - {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, - {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, - {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, - {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, - {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, - {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, - {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, - {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, - {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, - {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, - {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, - {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, - {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, - {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, - {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, - {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, - {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, - {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, - {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, - {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, - {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, - {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, - {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, - {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, - {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, - {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, - {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, - {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, - {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, - {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, - {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, - {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, - {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, - {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, - {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, - {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, - {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, - {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, - {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, - {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, + {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, + {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, + {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, + {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, + {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, + {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, + {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, + {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, + {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, + {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, + {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, + {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, + {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, + {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, + {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, + {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, + {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, + {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, + {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, + {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, + {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, + {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, + {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, + {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, + {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, + {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, + {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ @@ -1126,57 +1096,87 @@ {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, - {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, - {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, - {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, - {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, - {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, - {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, - {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, - {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, - {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, - {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, - {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, - {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, - {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, - {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, - {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, - {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, - {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, - {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, - {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, - {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, - {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, - {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, - {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, - {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, - {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, - {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, - {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, - {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, - {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, - {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, /* VIA northbridges */ {0x1106, 0x0585, NT, "VIA", "VT82C585VPX", via_no_byte_merge}, {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, - {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, + {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, /* VIA southbridges */ - {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, + {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, + {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, + {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, - {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, - {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, - {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, + {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, + {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, + {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, + {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, + {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, + {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, + {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, + {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, + {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, + {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, + {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, + {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, + {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, + {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, + {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, + {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, + {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, + {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, + {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, + {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, + {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, + {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, + {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, + {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, + {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, + {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, + {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, + {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, + {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, + {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, + {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, + {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, + {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, + {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, + {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, + {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, + {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, + {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, + {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, + {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, + {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, #endif {}, };

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[PATCH] Update the flashrom udev rules file with new programmers
by Uwe Hermann 17 Jun '11

17 Jun '11

See patch. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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