- flashrom - mail.coreboot.org

Fwd: output of flashrom -V
by Michael Pihlblad 19 Aug '11

19 Aug '11

---------- Forwarded message ---------- From: "Michael Pihlblad" <michael.pihlblad(a)gmail.com> Date: Aug 18, 2011 10:19 PM Subject: output of flashrom -V To: <flashrom(a)flashrom.org> Attaching output of flashrom -V regards Michael -- Michael Pihlblad Tel: 073-3561840 e-post: michael.pihlblad(a)gmail.com

1 0

Re: [flashrom] report for Intel QM67 | Winbond W25Q64 ([PATCH] (not for merge) ichspi: print BFPR (BIOS Flash Primary Region Register))
by Stefan Tauner 19 Aug '11

19 Aug '11

On Tue, 16 Aug 2011 15:06:32 +0200 "Frei, Thomas (GE Germany)" <Thomas.Frei(a)ge.com> wrote: hello thomas and thanks for your report! sorry for the lengthy mail... especially because it does not contain a real solution yet, but maybe there will be one when we are done with this thread :) > - Intel QM67 is supported but untested. the basic SPI interface of the 6 series intel chipsets is not different from the earlier series. they have changed a few things behind the curtain though, which we don't understand fully yet. that could be the cause here. > - Mainboard flash write protection is not existant i beg to differ. there is a chipset protection in place, but we don't know how it works exactly. :) > […] > > First I tried to read the flashcontent -> ERROR!!! > > I didn't try to write jet - and I will not until the read is solved. good idea, because it most certainly will fail. > Please help me - I will provide you all information you will need. that would be great, but i fear you just don't have the information we need, or if you do you would be violating an NDA. :) > flashrom v0.9.4-r1395 on Linux 2.6.34-TSW (i686), built with libpci 3.1.7, GCC 4.5.0 20100604 [gcc-4_5-branch revision 160292], little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OS timer resolution is 1 usecs, 1496M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus = 10005 us, 4 myus = 4 us, OK. > Initializing internal programmer > No coreboot table found. > DMI string system-manufacturer: "" > DMI string system-product-name: "" > DMI string system-version: "" > DMI string baseboard-manufacturer: "" > DMI string baseboard-product-name: "" > DMI string baseboard-version: "" > DMI string chassis-type: "" > DMI chassis-type is not specific enough. > Found chipset "Intel QM67" with PCI ID 8086:1c4f. > This chipset is marked as untested. If you are using an up-to-date version > of flashrom please email a report to flashrom(a)flashrom.org including a > verbose (-V) log. Thank you! i guess you are working on a prototype for GE? in general we try to detect laptops because we don't support them very well yet. please see http://flashrom.org/Laptops for details why we care to detect them. your DMI table seems to not indicate explicitly enough if it is a laptop or not. that is not necessarily a problem in general, i just wanted to mention it in case you are involved in the firmware design. in case you know it, could you please tell us a bit about the hardware design regarding the chipset<->flash connection? main question: is the flash chip directly connected to the qm67? are there any (external) ECs involved? > Enabling flash write... > […] > BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x8 > > Root Complex Register Block address = 0xfed1c000 > GCS = 0xc21: BIOS Interface Lock-Down: enabled, BOOT BIOS Straps: 0x3 (LPC) that's actually a bug. intel has changed the meaning of the bits in the GCS *again*. i'll look into it. afaics it is cosmetic only on all chipsets except ICH7, so it is not a problem for you thomas. > Top Swap : not enabled > SPIBAR = 0xfed1c000 + 0x3800 > 0x04: 0xe008 (HSFS) > HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 > WARNING: SPI Configuration Lockdown activated. this is the first sign of the real problem. FDV=1 means the descriptor in the flash is valid and FLOCKDN=1 means that we are restricted in changing most of the relevant SPI settings. this is (officially) required since at least ibex peak (5 series). alone, it is not a problem. FDOPSS=1 is an override bit (Flash Descriptor Override Pin-Strap Status), that is set by a hardware strap. is this accessible to you by a switch of some sort (e.g. jumper)? > 0x06: 0x0f00 (HSFC) > HSFC: FGO=0, FCYCLE=0, FDBC=15, SME=0 > 0x08: 0x00400000 (FADDR) > 0x50: 0x0000ffff (FRAP) > BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0xffff comes from the FDOPSS=1 and (should) indicate that we are allowed to access all regions of the flash (read and write). > 0x54: 0x00000000 (FREG0: Flash Descriptor) > 0x00000000-0x00000fff is read-write > 0x58: 0x03ff0200 (FREG1: BIOS) > 0x00200000-0x003fffff is read-write > 0x5C: 0x01ff0001 (FREG2: Management Engine) > 0x00001000-0x001fffff is read-write > 0x60: 0x00000fff (FREG3: Gigabit Ethernet) > Gigabit Ethernet region is unused. > 0x64: 0x00000fff (FREG4: Platform Data) > Platform Data region is unused. the following registers indicate no protected address regions either. > 0x74: 0x00000000 (PR0) > 0x78: 0x00000000 (PR1) > 0x7C: 0x00000000 (PR2) > 0x80: 0x00000000 (PR3) > 0x84: 0x00000000 (PR4) > 0x90: 0x84 (SSFS) > SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 > 0x91: 0xf80000 (SSFC) > SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 > 0x94: 0x0006 (PREOP) > 0x96: 0x043b (OPTYPE) > 0x98: 0x05200302 (OPMENU) > 0x9C: 0x0000019f (OPMENU+4) > 0xA0: 0x00000000 (BBAR) > 0xD0: 0x00000000 (FPB) > Reading OPCODES... done > preop0=0x06, preop1=0x00 > op[0]=0x02, 3, 0 > op[1]=0x03, 2, 0 > op[2]=0x20, 3, 0 > op[3]=0x05, 0, 0 > op[4]=0x9f, 0, 0 > op[5]=0x01, 1, 0 > op[6]=0x00, 0, 0 > op[7]=0x00, 0, 0 > > SPI Read Configuration: prefetching enabled, caching enabled, OK. > This chipset supports the following protocols: FWH, SPI. > […] > Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 > Chip status register is 00 > […] > Reading flash... SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 > SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 > Running OPCODE 0x03 failed at address 0x400000 (payload length was 64). > FAILED. now the interesting part. let's repeat the output of the FREGs ordered by address range: > 0x54: 0x00000000 (FREG0: Flash Descriptor) > 0x00000000-0x00000fff is read-write > 0x5C: 0x01ff0001 (FREG2: Management Engine) > 0x00001000-0x001fffff is read-write > 0x58: 0x03ff0200 (FREG1: BIOS) > 0x00200000-0x003fffff is read-write transaction err.@400000 so the first transaction after the bios region fails. not that this is also the first address that is not described by any FREG. i can't remember right now if this was ever a problem. my suspicion is that the chipset prohibits any access to addresses that are not mentioned/described by the FREGs. i have "only" two (retail) boards with intel chipsets for testing. both have the whole address range covered by the FREGs (but have other problems.. namely the known write protection by FRAP/PR*). i will need to look into this further (searching for other reports). how big is the image you want to write? (it is obviously 8MB because else flashrom would not continue, but did you modify it and was it 4MB before?) are you able to write the flash with intel's tool (iirc it is called FIT) under windows/dos? do you have access to the firmware modules that are combined to the full image and can you modify the descriptor part? if so it would be interesting to see what happens when you increase the FREG1.limit bits from 0x003fffff to 0x007fffff so that the bios region covers the second half of the flash too (this can be done by modifying the descriptor afaik). if i am right this would allow flashrom to access the whole flash. another thing you could test are my hardware sequencing patches posted to this list and also accessible via http://patchwork.coreboot.org/bundle/stefanct/hwseq/). but i doubt that hwseq will behave different from swseq in this case. OTOH it would be nice to confirm this. if it is not too inconvenient i would like to see the verbose output of a flashrom version modified by the attached patch to output BFPR. this should be equal to FREG1 and therefor we do not print it normally. it will certainly not change the general behavior in your case, i just want to be sure we know every possible detail. a workaround for your problem would be to change flashrom in a way that it does not try to access addresses > 0x003fffff. currently this is only possible while writing (see layout option in the manpage). so you would probably want to hardcode the limit in flashrom to solve the problem quickly but ugly. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 3

MSI H55-GD65 (MS-7637) (H55, locked ME region, FLOCKDN=0(!))
by Stefan Tauner 18 Aug '11

18 Aug '11

hi there i have read the log on IRC. thanks for your report! ICH/PCH boards are problematic due to their locks which can't be unlocked by flashrom (yet). please see my mails and blog posts of the last months for details. that said, your board is a bit special because although it has a locked (and a r/o) region, these locks are not locked (as indicated by FLOCKDN=0. if that sounds a bit complicated then you got it ;). this means that we could (try to) just set the correct access rights (something which is usually impossible due to the lock down). OTOH we had also reports in the past where the access rights SEEMED to be correct, but accessing the flash failed nonetheless. this is still a bit of too much guesswork... blame intel, sorry :) i will put a "set PR* to read/write if FLOCKDN==0" on my todo list and will inform you about its progress. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 1

Intel 82557/8/9/0/1 Ethernet Pro 100 - TESTED
by Антон Кочков 18 Aug '11

18 Aug '11

Intel 82557/8/9/0/1 Ethernet Pro 100 flashrom v0.9.4-r1395 on MS-DOS 8 (i786), built with libpci 3.1.5, GCC 4.3.2, little endian PROBE TESTED http://paste.flashrom.org/view.php?id=761 Best regards, Anton Kochkov.

1 0

flashrom accepts its command line parameters as a file name to read to
by Idwer Vollering 18 Aug '11

18 Aug '11

2011/8/18 Christophe Poncy <cp(a)canaxis.org>: > Hi, > ... > # ./flashrom -r -L This shouldn't be allowed. What about disallowing the creation of files that have a name listed in cli_classic.c's optstring[] and/or long_options[] ? What's funny (or not..) is that running "flashrom -r -r" is allowed as well.

1 0

Re: [flashrom] [PATCH 1/3] layout: change return type and name of find_next_included_romentry
by Tadas Slotkus 18 Aug '11

18 Aug '11

On Pr, 2011-08-15 at 06:43 +0200, Stefan Tauner wrote: > - rename from find_next_included_romentry to get_next_included_romentry > - return a pointer to a rom_entry instead of just its index > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Tadas Slotkus <devtadas(a)gmail.com>

2 2

ASUS P5N-D
by Guillaume Poirier-Morency 18 Aug '11

18 Aug '11

I've been told, after an unsuccessful flashing, to send you these outputs about my motherboard. My board remained intact! If you are interested into enabling it and developing patches to make it compatible, I do not mind giving you feedback. Regards, Arteymis

1 0

Zotac GeForce 8200: flashrom -V
by LukenShiro 18 Aug '11

18 Aug '11

I've used successfully flashrom 0.9.4 with my mainboard, reading (with -r) and writing (with -w) Zotac stock BIOS (updating it to last available version). No special flag were needed. # ./flashrom -V (results are attached) Best regards. -- GNU/Linux * Slackware64 current LU #210970 SU #12583 LM #98222/#412913

2 2

Re: [flashrom] flashrom post from info@mingtaofurniture.com requires approval
by Stefan Tauner 17 Aug '11

17 Aug '11

On Thu, 18 Aug 2011 06:53:29 +0200 flashrom-owner(a)flashrom.org wrote: > As list administrator, your authorization is requested for the > following mailing list posting: > > List: flashrom(a)flashrom.org > From: info(a)mingtaofurniture.com > Subject: 3819289?$?$?$?$?$?$?$?uhmms > Reason: Post by non-member to a members-only list > > At your convenience, visit: > > http://www.flashrom.org/mailman/admindb/flashrom > > to approve or deny the request. let's hope mailman does the right thing. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] [PATCH 1/3] layout: change return type and name of find_next_included_romentry
by Stefan Tauner 17 Aug '11

17 Aug '11

On Mon, 15 Aug 2011 06:43:36 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > -typedef struct { > +static struct rom_entry { > unsigned int start; > unsigned int end; > unsigned int included; > char name[256]; > -} romlayout_t; > - > -static romlayout_t rom_entries[MAX_ROMLAYOUT]; > +} rom_entries[MAX_ROMLAYOUT]; this was a big mistake. this type is very useful - not necessarily in this setup, but in general we want a rom_entry type to pass around functions that operate on parts of the flash only (i am working on making reads obey layouts atm). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] [PATCH] Makefile: fix and simplify test program compilations
by Carl-Daniel Hailfinger 17 Aug '11

17 Aug '11

Am 12.08.2011 21:38 schrieb Stefan Tauner: > this was totally broken due to the time behavior of make's shell > function's temporal behavior. > quote from the gnu make documentation > http://www.gnu.org/s/hello/manual/make/Shell-Function.html): > "The commands run by calls to the shell function are run when the > function calls are expanded" > we have used the shell function to echo the test programs to a file. > the file name used was equal for all tests and was overwritten for > each test. the result was that all tests (in a single target?) used > the last test program because the echoing of the test programs was > done before all test compilations(!) > Thanks for opening that bug report. Apparently the gnu make documentation was incorrect. > also the branching for testing ifeq ($(CONFIG_FT2232_SPI), yes) was > unnecessary. > Branching never worked for me inside a target, but I also never tried it your way. > in my approach here i am using verbatim variables (allows to define > even complex test programs in the makefile without jumping through > hoops) that get exported to environment variables (via "export", > reference afterwards with "$$<varname>"). > > i have also added the missing redirection of stderr to the compiler test. > Good. > alternatively one could just use different file names of course, but > i think my approach is superior due to the separation and > readability of the tested code and the fact that the temporal > behavior is MUCH clearer now (else this bug would have not crept in > in the first place :P) > > if line count is an issue one could of course compress the test > programs to something unreadable again :) > Haha. > side note: we use $(CC) all over the place before we even check if > it is there. e.g.: > override ARCH = $(strip $(shell LC_ALL=C $(CC) -E arch.h|grep -v '^\#')) > > this creates unwanted output like: > make -j1 CC=eiugthes > /bin/sh: eiugthes: not found > /bin/sh: eiugthes: not found > /bin/sh: eiugthes: not found > /bin/sh: eiugthes: not found > Checking for a C compiler... not found. > Hm yes. > make: *** [compiler] Error 1 > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > Makefile | 91 ++++++++++++++++++++++++++++++++++++++++---------------------- > 1 files changed, 59 insertions(+), 32 deletions(-) > > diff --git a/Makefile b/Makefile > index c72d10a..672a0df 100644 > --- a/Makefile > +++ b/Makefile > @@ -531,11 +531,62 @@ distclean: clean > strip: $(PROGRAM)$(EXEC_SUFFIX) > $(STRIP) $(STRIP_ARGS) $(PROGRAM)$(EXEC_SUFFIX) > > +# below are the definitions of test programs as verbatim variables, which get > +# exported to environment variables and are referenced with $$<varname> later > +define COMPILER_TEST > +int main(int argc, char **argv) > +{ > + (void) argafc; > Typo? > +define UTSNAME_TEST > +#include <sys/utsname.h> > +struct utsname osinfo; > +int main(int argc, char **argv) > +{ > + (void) argc; > + (void) argv; > + uname (&osinfo); > + return 0; > +} > +endef > +export UTSNAME_TEST > Hm... the alternative would be to have each of those C programs in a separate file in a config/ directory or somesuch. I don't have a strong preference either way. Given that you think verbatim variables are superior, please move them directly above the targets which use them. > + > compiler: featuresavailable > @printf "Checking for a C compiler... " > - @$(shell ( echo "int main(int argc, char **argv)"; \ > - echo "{ (void) argc; (void) argv; return 0; }"; ) > .test.c ) > - @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null && \ > + @echo "$$COMPILER_TEST" > .test.c > + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null 2>&1 && \ > echo "found." || ( echo "not found."; \ > rm -f .test.c .test$(EXEC_SUFFIX); exit 1) > @rm -f .test.c .test$(EXEC_SUFFIX) > @@ -548,12 +599,7 @@ compiler: featuresavailable > ifeq ($(CHECK_LIBPCI), yes) > pciutils: compiler > @printf "Checking for libpci headers... " > - @# Avoid a failing test due to libpci header symbol shadowing breakage > - @$(shell ( echo "#define index shadow_workaround_index"; \ > - echo "#include <pci/pci.h>"; \ > - echo "struct pci_access *pacc;"; \ > - echo "int main(int argc, char **argv)"; \ > - echo "{ (void) argc; (void) argv; pacc = pci_alloc(); return 0; }"; ) > .test.c ) > + @echo "$$LIBPCI_TEST" > .test.c > @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ > echo "found." || ( echo "not found."; echo; \ > echo "Please install libpci headers (package pciutils-devel)."; \ > @@ -588,41 +634,22 @@ featuresavailable: > @false > endif > > -ifeq ($(CONFIG_FT2232_SPI), yes) > features: compiler > @echo "FEATURES := yes" > .features.tmp > +ifeq ($(CONFIG_FT2232_SPI), yes) > I'm really surprised that ifeq inside a target works. IIRC I tried this some time ago on my older machine and it did not work. However, if this works reliably, the code is indeed a lot more readable. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Even if we ever decide to use another build system, we need this fix now. Regards, Carl-Daniel

2 1

[commit] r1416 - trunk
by repository service 17 Aug '11

17 Aug '11

Author: stefanct Date: Thu Aug 18 04:27:19 2011 New Revision: 1416 URL: http://flashrom.org/trac/flashrom/changeset/1416 Log: Makefile: fix and simplify test program compilations this was totally broken due to the make's shell function's temporal behavior. quote from the gnu make documentation (http://www.gnu.org/s/hello/manual/make/Shell-Function.html): "The commands run by calls to the shell function are run when the function calls are expanded" we have used the shell function to echo the test programs to a file. the file name used was equal for all tests and was overwritten for each test. the result was that all tests (in a single target?) used the last test program because the echoing of the test programs was done before all test compilations(!) see my mail for details: http://lists.gnu.org/archive/html/bug-make/2011-08/msg00010.html also the branching for testing ifeq ($(CONFIG_FT2232_SPI), yes) was unnecessarily complicated. in my approach here i am using verbatim variables (allows to define even complex test programs in the makefile without jumping through hoops) that get exported to environment variables (via "export", reference afterwards with "$$<varname>"). i have also added the missing redirection of stderr to the compiler test and changed the definition of ARCH to use simple expansion (:=). the latter is still wrong, because it uses $(CC) before we check if a compiler is installed... makes the compiler check pretty much useless. The simple expansion just reduces the number of errors printed to 1. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Aug 17 11:50:11 2011 (r1415) +++ trunk/Makefile Thu Aug 18 04:27:19 2011 (r1416) @@ -38,7 +38,7 @@ endif # Determine the destination processor architecture -override ARCH = $(strip $(shell LC_ALL=C $(CC) -E arch.h|grep -v '^\#')) +override ARCH := $(strip $(shell LC_ALL=C $(CC) -E arch.h|grep -v '^\#')) # FIXME We have to differentiate between host and target OS architecture. OS_ARCH ?= $(shell uname) @@ -531,11 +531,23 @@ strip: $(PROGRAM)$(EXEC_SUFFIX) $(STRIP) $(STRIP_ARGS) $(PROGRAM)$(EXEC_SUFFIX) +# to define test programs we use verbatim variables, which get exported +# to environment variables and are referenced with $$<varname> later + +define COMPILER_TEST +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + return 0; +} +endef +export COMPILER_TEST + compiler: featuresavailable @printf "Checking for a C compiler... " - @$(shell ( echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; return 0; }"; ) > .test.c ) - @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null && \ + @echo "$$COMPILER_TEST" > .test.c + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; \ rm -f .test.c .test$(EXEC_SUFFIX); exit 1) @rm -f .test.c .test$(EXEC_SUFFIX) @@ -545,15 +557,25 @@ ( echo "unknown. Aborting."; exit 1) @printf "%s\n" '$(ARCH)' +define LIBPCI_TEST +/* Avoid a failing test due to libpci header symbol shadowing breakage */ +#define index shadow_workaround_index +#include <pci/pci.h> +struct pci_access *pacc; +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + pacc = pci_alloc(); + return 0; +} +endef +export LIBPCI_TEST + ifeq ($(CHECK_LIBPCI), yes) pciutils: compiler @printf "Checking for libpci headers... " - @# Avoid a failing test due to libpci header symbol shadowing breakage - @$(shell ( echo "#define index shadow_workaround_index"; \ - echo "#include <pci/pci.h>"; \ - echo "struct pci_access *pacc;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; pacc = pci_alloc(); return 0; }"; ) > .test.c ) + @echo "$$LIBPCI_TEST" > .test.c @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci headers (package pciutils-devel)."; \ @@ -588,41 +610,47 @@ @false endif -ifeq ($(CONFIG_FT2232_SPI), yes) +define FTDI_TEST +#include <ftdi.h> +struct ftdi_context *ftdic = NULL; +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + return ftdi_init(ftdic); +} +endef +export FTDI_TEST + +define UTSNAME_TEST +#include <sys/utsname.h> +struct utsname osinfo; +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + uname (&osinfo); + return 0; +} +endef +export UTSNAME_TEST + features: compiler @echo "FEATURES := yes" > .features.tmp +ifeq ($(CONFIG_FT2232_SPI), yes) @printf "Checking for FTDI support... " - @$(shell ( echo "#include <ftdi.h>"; \ - echo "struct ftdi_context *ftdic = NULL;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; return ftdi_init(ftdic); }"; ) > .featuretest.c ) + @echo "$$FTDI_TEST" > .featuretest.c @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ ( echo "found."; echo "FTDISUPPORT := yes" >> .features.tmp ) || \ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) +endif @printf "Checking for utsname support... " - @$(shell ( echo "#include <sys/utsname.h>"; \ - echo "struct utsname osinfo;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; uname (&osinfo); return 0; }"; ) > .featuretest.c ) - @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) >/dev/null 2>&1 && \ - ( echo "found."; echo "UTSNAME := yes" >> .features.tmp ) || \ - ( echo "not found."; echo "UTSNAME := no" >> .features.tmp ) - @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features - @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX) -else -features: compiler - @echo "FEATURES := yes" > .features.tmp - @printf "Checking for utsname support... " - @$(shell ( echo "#include <sys/utsname.h>"; \ - echo "struct utsname osinfo;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; uname (&osinfo); return 0; }"; ) > .featuretest.c ) + @echo "$$UTSNAME_TEST" > .featuretest.c @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) >/dev/null 2>&1 && \ ( echo "found."; echo "UTSNAME := yes" >> .features.tmp ) || \ ( echo "not found."; echo "UTSNAME := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX) -endif install: $(PROGRAM)$(EXEC_SUFFIX) mkdir -p $(DESTDIR)$(PREFIX)/sbin

1 0

qflashrom dutch (nl-NL) translation
by Bernd Blaauw 17 Aug '11

17 Aug '11

I'm currently delaying things I should be doing, so in a boring moment decided to translate qflashrom language file. [ https://gitorious.org/qflashrom/qflashrom/blobs/master/locale/qflashrom_de_… ]. (btw lines 169..171 are confusing, mentioning 'read' but german part says 'write') Textfile attached, no idea if FireFox and MetaPad kept it as UTF8. Entirely untested ofcourse due to running Windows and no development platforms whatsoever (besides VMware for emulation/virtualisation). Likely usable as well for [nl-BE] but who can tell.. Consider it my €0,02 to this project :) with best regards, Bernd Blaauw (license stuff: whatever the original had, or public domain, at your convenience, giving up all rights to copyright, do as you please).

2 1

[Patch] Added SST25LF080A Flash Chip
by Zeus Castro 17 Aug '11

17 Aug '11

Added support for SST25LF080A flash chip, based on public datasheet available here: http://www.sst.com/dotAsset/40316.pdf

2 5

[commit] r1415 - trunk
by repository service 17 Aug '11

17 Aug '11

Author: stefanct Date: Wed Aug 17 11:50:11 2011 New Revision: 1415 URL: http://flashrom.org/trac/flashrom/changeset/1415 Log: Add support for the SST25LF080A flash chip Based on the definition of SST25LF040A and the public datasheet available here: http://www.sst.com/dotAsset/40316.pdf Also, move the SST25LF040A up to keep the list ordered alphabetically (while removing the ".RES" suffix). Signed-off-by: Zeus Castro <thezeusjuice(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Aug 16 14:08:22 2011 (r1414) +++ trunk/flashchips.c Wed Aug 17 11:50:11 2011 (r1415) @@ -5547,6 +5547,66 @@ { .vendor = "SST", + .name = "SST25LF040A", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST25VF040_REMS, + .total_size = 512, + .page_size = 256, + .tested = TEST_OK_PROBE, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ + .read = spi_chip_read, + .voltage = {3000, 3600}, + }, + + { + .vendor = "SST", + .name = "SST25LF080A", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST25VF080_REMS, + .total_size = 1024, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ + .read = spi_chip_read, + .voltage = {3000, 3600}, + }, + + { + .vendor = "SST", .name = "SST25VF010.REMS", .bustype = BUS_SPI, .manufacture_id = SST_ID, @@ -5750,36 +5810,6 @@ }, { - .vendor = "SST", - .name = "SST25LF040A.RES", - .bustype = BUS_SPI, - .manufacture_id = SST_ID, - .model_id = SST_SST25VF040_REMS, - .total_size = 512, - .page_size = 256, - .tested = TEST_OK_PROBE, - .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, - .block_erasers = - { - { - .eraseblocks = { {4 * 1024, 128} }, - .block_erase = spi_block_erase_20, - }, { - .eraseblocks = { {32 * 1024, 16} }, - .block_erase = spi_block_erase_52, - }, { - .eraseblocks = { {512 * 1024, 1} }, - .block_erase = spi_block_erase_60, - }, - }, - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ - .read = spi_chip_read, - .voltage = {3000, 3600}, - }, - - { .vendor = "SST", .name = "SST25VF040B.REMS", .bustype = BUS_SPI,

1 0

Re: [flashrom] report for Intel QM67 | Winbond W25Q64
by Stefan Tauner 17 Aug '11

17 Aug '11

On Wed, 17 Aug 2011 09:16:05 +0200 "Frei, Thomas (GE Germany)" <Thomas.Frei(a)ge.com> wrote: > Hi Stefan, > > First of all: thank you for the quick response. > Yes I work on a prototype from GE :-) > > OK - now to your questions: > - the flashchip is connected as follows: SPI_CLK + SPI_MOSI are connected via a FET_busswitch, and SPI_MISI is connected directly to the chipset. > - I can use FPT.EXE from intel, and it successfully reads the content of the flashchip - but only 4MB!!! > - the file, I got from the hardware development, that should be used here, also has 4MB!!!??? moin! very interesting. this endorses my theory somewhat that the chipset prohibits writes outside the address ranges of the regions defined by the FREGs completely. this is rather bad because it does not work well with the current concept of flashrom, which basically is founded on the idea that we can access the whole under normal circumstances - or at least that the programmer (in your case the chipset) does not get in our way by unexpected means. this would be a very good use case for a layout file... if it would work for reading :/ or a parameter that would tell flashrom to not throw away the data read, if there is an error later... which does not exist either. that said, writing could work quite normally with a layout file. you would need to make the image match the size of the chip though, so that flashrom accepts it in the first place. i think cp image.bin test.bin ; cat image.bin >> test.bin would work. even without a layout file this would probably write correctly... but flashrom would scream when accessing the second half of the chip. please see the manpage for details about the layout file option. i will work on this in one way or another, but please don't expect it to be committed or even working soon. i guess that you know helge wagner at GE? he may be able to help you (in hacking something together) too. if you test the method outlined above i would really like to hear if it works. please note though that it may also brick your setup... dont blame me then please :) if you want to help us and have a method to recover bricked boards (i.e. if you have an external programmer that works with your boards), you could also try to play with the FREG1 values in the descriptor with fit.exe (or fitw.exe). that said, i just read an interesting paragraph in the ibex peak SPI programming guide: "Flash Space Allocation FIT/Ftoolc allocates SPI flash space allocation for each region as follows: 1. 2. If after allocation for all regions there is still space left in flash, then the ME region expands to fill the remaining space. 3. If there is leftover space and the ME region is not implemented, then the BIOS region is expands to use the remaining space. 4. If there is leftover space and the BIOS region is not implemented, then the GbE region is expands to contain the remaining space." not sure if that still applies to cougar point, but i would guess so. in this case i am wondering if your hardware engineering team has created the image correctly (or if they have set up the total size incorrectly to 4MB instead of 8). > P.S.: Bist Du etwa ein Student an der TU Wien - sprichst Du also Deutsch? yes i am, but since this is public and some of us do not speak german, we use english exclusively on the mailing list. you can mail me directly though, if it is important. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[PATCH] Fix printing of the Boot BIOS Straps on Intel chipsets
by Stefan Tauner 16 Aug '11

16 Aug '11

The meaning of the bits involved has changed several times in the past. This patch takes these changes into account and hence fixes the output of the pretty printing of GCS on all SPI-supported Intel chipsets that are not ICH7 or NM10 (the latter were unaffected, because the defaults were correct). This patch also allows to differentiate Ibex Peak and Cougar Point chipsets from the earlier chipset series (ICH10) by adding new wrapper functions that set "ich_generation" to 11 and 12 respectively. This should not change behavior outside of enable_flash_ich_dc_spi, because the code path for ich_generation >=9 is equal. --- defining all those arrays is not very elegant, but i think it is at least very readable this way. improvements are welcome! reviewers should have an eye on the codepaths for ich_generation >= 9. i did not spot a problem, but it should be checked again. alternatively we could just remove the pretty printing of GCS and just output the bits involved. i would like to keep the pch differentiation anyway though, because i feel it will become handy in the future. tested on my QS57-based thinkpad (probe + partial read) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 129 ++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 81 insertions(+), 48 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 687682a..662273b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -440,11 +440,6 @@ static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) return 0; } -#define ICH_STRAP_RSVD 0x00 -#define ICH_STRAP_SPI 0x01 -#define ICH_STRAP_PCI 0x02 -#define ICH_STRAP_LPC 0x03 - static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) { /* Do we really need no write enable? */ @@ -458,13 +453,39 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, uint8_t bbs, buc; uint32_t tmp, gcs; void *rcrb; - - /* - * TODO: These names are incorrect for EP80579. For that, the solution - * would look like the commented line below. - */ - // static const char *straps_names[] = {"SPI", "reserved", "reserved", "LPC" }; - static const char *straps_names[] = { "reserved", "SPI", "PCI", "LPC" }; + const char *const *straps_names; + + static const char *const straps_names_EP80579[] = { "SPI", "reserved", "reserved", "LPC" }; + static const char *const straps_names_ich7_nm10[] = { "reserved", "SPI", "PCI", "LPC" }; + static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" }; + static const char *const straps_names_pch56[] = { "LPC", "reserved", "PCI", "SPI" }; + static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" }; + + switch (ich_generation) { + case 7: + /* EP80579 may need further changes, but this is the least + * intrusive way to get correct BOOT Strap printing without + * changing the rest of its code path) */ + if (strcmp(name, "EP80579") == 0) + straps_names = straps_names_EP80579; + else + straps_names = straps_names_ich7_nm10; + break; + case 8: + case 9: + case 10: + straps_names = straps_names_ich8910; + break; + case 11: + case 12: + straps_names = straps_names_pch56; + break; + default: + msg_gerr("%s: unknown ICH generation. Please report!\n", + __func__); + straps_names = straps_names_unknown; + break; + } /* Enable Flash Writes */ ret = enable_flash_ich_dc(dev, name); @@ -481,7 +502,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, msg_pdbg("BIOS Interface Lock-Down: %sabled, ", (gcs & 0x1) ? "en" : "dis"); bbs = (gcs >> 10) & 0x3; - msg_pdbg("BOOT BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); + msg_pdbg("Boot BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); buc = mmio_readb(rcrb + 0x3414); msg_pdbg("Top Swap : %s\n", @@ -491,11 +512,11 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, * time. At least not with our current code. So we prevent searching * on ICH7 when the southbridge is strapped to LPC */ - buses_supported = BUS_FWH; if (ich_generation == 7) { - if (bbs == ICH_STRAP_LPC) { - /* No further SPI initialization required */ + if (bbs == 0x03) { + /* If strapped to LPC, no further SPI initialization is + * required. */ return ret; } else { /* Disable LPC/FWH if strapped to PCI or SPI */ @@ -532,6 +553,18 @@ static int enable_flash_ich10(struct pci_dev *dev, const char *name) return enable_flash_ich_dc_spi(dev, name, 10); } +/* Ibex Peak aka. 5 series & 3400 series */ +static int enable_flash_pch5(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 11); +} + +/* Cougar Point aka. 6 series & c200 series */ +static int enable_flash_pch6(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 12); +} + static int via_no_byte_merge(struct pci_dev *dev, const char *name) { uint8_t val; @@ -1158,21 +1191,21 @@ const struct penable chipset_enables[] = { {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_ich10}, - {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_ich10}, - {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_ich10}, - {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_ich10}, - {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_ich10}, - {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_ich10}, - {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_ich10}, - {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_ich10}, - {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_ich10}, - {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_ich10}, - {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_ich10}, - {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_ich10}, - {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_ich10}, - {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_ich10}, - {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_ich10}, + {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_pch6}, + {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_pch6}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_pch6}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_pch6}, + {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_pch6}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_pch6}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_pch6}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_pch6}, + {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_pch6}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_pch6}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6}, + {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, + {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_pch6}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, @@ -1211,23 +1244,23 @@ const struct penable chipset_enables[] = { {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, - {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, - {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, - {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, - {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, - {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, - {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, - {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, - {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, - {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, - {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, - {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, - {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, - {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, - {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, - {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_pch5}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_pch5}, + {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_pch5}, + {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_pch5}, + {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_pch5}, + {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_pch5}, + {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, + {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_pch5}, + {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_pch5}, + {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_pch5}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_pch5}, + {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_pch5}, + {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_pch5}, + {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_pch5}, + {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_pch5}, + {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_pch5}, + {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_pch5}, {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, -- 1.7.1

1 0

Advent MT22: flashrom -V
by simon jenkins 16 Aug '11

16 Aug '11

Here is the flashrom -V output for the Advent MT22 system: [root@simon ~]# flashrom -V flashrom v0.9.3-r1368 on Linux 2.6.40-4.fc15.i686.PAE (i686), built with libpci 3.1.7, GCC 4.6.0 20110530 (Red Hat 4.6.0-9), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2183M loops per second, 10 myus = 10 us, 100 myus = 114 us, 1000 myus = 999 us, 10000 myus = 9987 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Advent" DMI string system-product-name: "MT22" DMI string system-version: "100" DMI string baseboard-manufacturer: "To be filled by O.E.M." DMI string baseboard-product-name: "To be filled by O.E.M." DMI string baseboard-version: "To be filled by O.E.M." DMI string chassis-type: "" Found chipset "NVIDIA MCP79", enabling flash write... chipset PCI ID is 10de:0aae, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Write is unsupported! Found SMBus device 10de:0aa2 at 00:03:2 MCP SPI BAR is at 0xfae80000 Mapping NVIDIA MCP6x SPI at 0xfae80000, unaligned size 0x544. SPI control is 0xc105, req=1, gnt=1 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25D16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x13 No operations were specified.

1 0

SPI. RDID, REMS, RES and other probe variants
by Carl-Daniel Hailfinger 16 Aug '11

16 Aug '11

Hi, Stefan Tauner mentioned that we use probe methods inconsistently: Some SPI chips use RDID, some use REMS, some use RES, and then there are various variants (mostly varied response length) of those probe functions. The reason is that we originally had exactly one possible probe function per chip. With SPI chips, there are up to 5 different probe functions for the same chip, each with a different ID. Fun! We need to revamp the probing architecture, preferably in a future-proof way. Possible solutions: - Handle probing like erase, i.e. an array of ID+function pairs. - Add n variants of each chip, one per probe function. That's what works with the current architecture and what has been done for a few chips in the past. - Something completely different which I haven't thought of. Comments? I once had a prototype patch for the first solution, but it bitrotted and I was not happy with the design back then, but nowadays the flashrom architecture is better and this could be done in a non-ugly way. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

report for Intel QM67 | Winbond W25Q64
by Frei, Thomas (GE Germany) 16 Aug '11

16 Aug '11

Hello, to step through the FAQ: - Winbond W25Q64 is supported - Intel QM67 is supported but untested. - Mainboard flash write protection is not existant - BIOS flash write protection is disabled - Kernel is 2.6.34 - CONFIG_X86_PAT is set - reset with kernel parameter "nopat" does not change anything - CONFIG_STRICT_DEVMEM is not set First I tried to read the flashcontent -> ERROR!!! I didn't try to write jet - and I will not until the read is solved. Please help me - I will provide you all information you will need. Best regards Thomas Frei

1 0

Re: [flashrom] [PATCH] remove unneeded inclusions of chipdrivers.h
by Stefan Tauner 16 Aug '11

16 Aug '11

On Sun, 10 Jul 2011 14:01:44 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > this is related to the spi split patch as discussed in: > http://www.flashrom.org/pipermail/flashrom/2010-February/thread.html#2364 > the old commit (r914) log notes: > "Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c" > > there still remain a few cases where chipdrivers.h is needed: > dediprog.c > it87spi.c > wbsio_spi.c (spi_programmer registration only) > > besides that, there are also non-spi files that do not need it. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> self-acked and committed in r1414 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[patch] Include "flash.h" and <inttypes.h> in chipdrivers.h
by David Hendricks 16 Aug '11

16 Aug '11

This patch is intended to avoid compilation issues caused by the ordering of #includes in source files that use chipdrivers.h. Signed-off-by: David Hendricks <dhendrix(a)google.com> -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

2 3

[commit] r1414 - trunk
by repository service 16 Aug '11

16 Aug '11

Author: stefanct Date: Tue Aug 16 14:08:22 2011 New Revision: 1414 URL: http://flashrom.org/trac/flashrom/changeset/1414 Log: Remove unneeded inclusions of chipdrivers.h this is related to the spi split patch as discussed in: http://www.flashrom.org/pipermail/flashrom/2010-February/thread.html#2364 the old commit (r914) log notes: "Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c" there still remain a few cases where chipdrivers.h is needed: dediprog.c (spi_read_chunked and spi_write_chunked) it87spi.c (due to spi_write_enable and spi_read_status_register) wbsio_spi.c (spi_programmer registration only) besides that, there are also non-spi files that do not need it. also, add flash.h to chipdrivers.h because it uses some types of it and remove flashchips.h from print.c Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/bitbang_spi.c trunk/buspirate_spi.c trunk/chipdrivers.h trunk/ft2232_spi.c trunk/ichspi.c trunk/it85spi.c trunk/jedec.c trunk/pm49fl00x.c trunk/print.c trunk/sb600spi.c trunk/sst_fwhub.c trunk/w29ee011.c trunk/w39.c Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/bitbang_spi.c Tue Aug 16 14:08:22 2011 (r1414) @@ -22,7 +22,6 @@ #include <stdlib.h> #include <ctype.h> #include "flash.h" -#include "chipdrivers.h" #include "programmer.h" #include "spi.h" Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/buspirate_spi.c Tue Aug 16 14:08:22 2011 (r1414) @@ -23,7 +23,6 @@ #include <ctype.h> #include <unistd.h> #include "flash.h" -#include "chipdrivers.h" #include "programmer.h" #include "spi.h" Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/chipdrivers.h Tue Aug 16 14:08:22 2011 (r1414) @@ -25,6 +25,8 @@ #ifndef __CHIPDRIVERS_H__ #define __CHIPDRIVERS_H__ 1 +#include "flash.h" /* for chipaddr and flashchip */ + /* spi.c, should probably be in spi_chip.c */ int probe_spi_rdid(struct flashchip *flash); int probe_spi_rdid4(struct flashchip *flash); Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/ft2232_spi.c Tue Aug 16 14:08:22 2011 (r1414) @@ -25,7 +25,6 @@ #include <stdlib.h> #include <ctype.h> #include "flash.h" -#include "chipdrivers.h" #include "programmer.h" #include "spi.h" #include <ftdi.h> Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/ichspi.c Tue Aug 16 14:08:22 2011 (r1414) @@ -27,7 +27,6 @@ #include <string.h> #include "flash.h" -#include "chipdrivers.h" #include "programmer.h" #include "spi.h" Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/it85spi.c Tue Aug 16 14:08:22 2011 (r1414) @@ -30,7 +30,6 @@ #include <stdio.h> #include <stdlib.h> #include "flash.h" -#include "chipdrivers.h" #include "spi.h" #include "programmer.h" Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/jedec.c Tue Aug 16 14:08:22 2011 (r1414) @@ -23,7 +23,6 @@ */ #include "flash.h" -#include "chipdrivers.h" #define MAX_REFLASH_TRIES 0x10 #define MASK_FULL 0xffff Modified: trunk/pm49fl00x.c ============================================================================== --- trunk/pm49fl00x.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/pm49fl00x.c Tue Aug 16 14:08:22 2011 (r1414) @@ -21,7 +21,6 @@ */ #include "flash.h" -#include "chipdrivers.h" static void write_lockbits_49fl00x(chipaddr bios, int size, unsigned char bits, int block_size) Modified: trunk/print.c ============================================================================== --- trunk/print.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/print.c Tue Aug 16 14:08:22 2011 (r1414) @@ -23,7 +23,6 @@ #include <string.h> #include <stdlib.h> #include "flash.h" -#include "flashchips.h" #include "programmer.h" /* Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/sb600spi.c Tue Aug 16 14:08:22 2011 (r1414) @@ -24,7 +24,6 @@ #if defined(__i386__) || defined(__x86_64__) #include "flash.h" -#include "chipdrivers.h" #include "programmer.h" #include "spi.h" Modified: trunk/sst_fwhub.c ============================================================================== --- trunk/sst_fwhub.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/sst_fwhub.c Tue Aug 16 14:08:22 2011 (r1414) @@ -23,7 +23,6 @@ /* Adapted from the Intel FW hub stuff for 82802ax parts. */ #include "flash.h" -#include "chipdrivers.h" static int check_sst_fwhub_block_lock(struct flashchip *flash, int offset) { Modified: trunk/w29ee011.c ============================================================================== --- trunk/w29ee011.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/w29ee011.c Tue Aug 16 14:08:22 2011 (r1414) @@ -20,7 +20,6 @@ #include <string.h> #include "flash.h" -#include "chipdrivers.h" /* According to the Winbond W29EE011, W29EE012, W29C010M, W29C011A * datasheets this is the only valid probe function for those chips. Modified: trunk/w39.c ============================================================================== --- trunk/w39.c Mon Aug 15 21:54:20 2011 (r1413) +++ trunk/w39.c Tue Aug 16 14:08:22 2011 (r1414) @@ -20,7 +20,6 @@ */ #include "flash.h" -#include "chipdrivers.h" static int printlock_w39_fwh_block(struct flashchip *flash, int offset) {

1 0

[PATCH] internal dmi decoder
by Sean Nelson 16 Aug '11

16 Aug '11

Here is a new version of the internal dmi decoding. To use the new decoder, the user needs to use "-p internal:dmi=new", to cross-check with the external dmidecode use "-p internal:dmi=check". Hopefully if this is comitted, it will make it easier for people to test the new internal decoder. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

5 8

[commit] r1413 - trunk
by repository service 15 Aug '11

15 Aug '11

Author: hailfinger Date: Mon Aug 15 21:54:20 2011 New Revision: 1413 URL: http://flashrom.org/trac/flashrom/changeset/1413 Log: Fixup of r1397: - Mixing uninitialized and initialized local variables leads to confusion. - ft2232_spi error cases should have gotten some error handling, and that's the reason the curly braces were there. - Fixing typos/wording in some places would have been nice given that those places were touched anyway. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/buspirate_spi.c trunk/chipset_enable.c trunk/cli_classic.c trunk/dediprog.c trunk/dmi.c trunk/flashrom.c trunk/ft2232_spi.c trunk/it85spi.c trunk/it87spi.c trunk/physmap.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/board_enable.c Mon Aug 15 21:54:20 2011 (r1413) @@ -860,7 +860,7 @@ return -1; } - /* First, check the ISA bridge */ + /* Check for the ISA bridge first. */ dev = pci_dev_find_vendorclass(0x10DE, 0x0601); switch (dev->device_id) { case 0x0030: /* CK804 */ @@ -1129,8 +1129,8 @@ struct pci_dev *dev; uint32_t tmp, base; - /* GPPO {0,8,27,28,30} are always available */ - static const uint32_t nonmuxed_gpos = 0x58000101; + /* GPO{0,8,27,28,30} are always available. */ + static const uint32_t nonmuxed_gpos = 0x58000101; static const struct {unsigned int reg, mask, value; } piix4_gpo[] = { {0}, @@ -1179,10 +1179,9 @@ } if ((((1 << gpo) & nonmuxed_gpos) == 0) && - (pci_read_word(dev, piix4_gpo[gpo].reg) - & piix4_gpo[gpo].mask) != piix4_gpo[gpo].value) { - msg_perr("\nERROR: PIIX4 GPO%d not programmed for output.\n", - gpo); + ((pci_read_word(dev, piix4_gpo[gpo].reg) & piix4_gpo[gpo].mask) != + piix4_gpo[gpo].value)) { + msg_perr("\nERROR: PIIX4 GPO%d not programmed for output.\n", gpo); return -1; } Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/buspirate_spi.c Mon Aug 15 21:54:20 2011 (r1413) @@ -150,9 +150,11 @@ int buspirate_spi_init(void) { unsigned char buf[512]; - int ret = 0, i, spispeed = 0x7; char *dev = NULL; char *speed = NULL; + int spispeed = 0x7; + int ret = 0; + int i; dev = extract_programmer_param("dev"); if (!dev || !strlen(dev)) { Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/chipset_enable.c Mon Aug 15 21:54:20 2011 (r1413) @@ -309,8 +309,9 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) { uint32_t fwh_conf; + int i, tmp; char *idsel = NULL; - int i, tmp, max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; + int max_decode_fwh_idsel = 0, max_decode_fwh_decode = 0; int contiguous = 1; idsel = extract_programmer_param("fwh_idsel"); @@ -1035,7 +1036,7 @@ } } else { msg_pinfo("AMD Elan SC520 detected, but no BOOTCS. " - "Assuming flash at 4G\n"); + "Assuming flash at 4G.\n"); } /* 4. Clean up */ Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/cli_classic.c Mon Aug 15 21:54:20 2011 (r1413) @@ -104,13 +104,14 @@ struct flashchip flashes[3]; struct flashchip *fill_flash; const char *name; - int startchip = 0, chipcount = 0, namelen, opt, option_index = 0; - int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; - int dont_verify_it = 0, list_supported = 0, force = 0; + int namelen, opt, i; + int startchip = 0, chipcount = 0, option_index = 0, force = 0; #if CONFIG_PRINT_WIKI == 1 int list_supported_wiki = 0; #endif - int operation_specified = 0, i, ret = 0; + int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; + int dont_verify_it = 0, list_supported = 0, operation_specified = 0; + int ret = 0; static const char optstring[] = "r:Rw:v:nVEfc:m:l:i:p:Lzh"; static const struct option long_options[] = { Modified: trunk/dediprog.c ============================================================================== --- trunk/dediprog.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/dediprog.c Mon Aug 15 21:54:20 2011 (r1413) @@ -496,7 +496,8 @@ static int parse_voltage(char *voltage) { char *tmp = NULL; - int i, millivolt, fraction = 0; + int i; + int millivolt = 0, fraction = 0; if (!voltage || !strlen(voltage)) { msg_perr("Empty voltage= specified.\n"); @@ -574,7 +575,8 @@ { struct usb_device *dev; char *voltage; - int millivolt = 3500, ret; + int millivolt = 3500; + int ret; msg_pspew("%s\n", __func__); Modified: trunk/dmi.c ============================================================================== --- trunk/dmi.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/dmi.c Mon Aug 15 21:54:20 2011 (r1413) @@ -196,7 +196,8 @@ */ static int dmi_compare(const char *value, const char *pattern) { - int anchored = 0, patternlen; + int anchored = 0; + int patternlen; msg_pspew("matching %s against %s\n", value, pattern); /* The empty string is part of all strings! */ Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/flashrom.c Mon Aug 15 21:54:20 2011 (r1413) @@ -600,8 +600,7 @@ size_t size = flash->total_size * 1024; /* Flash registers live 4 MByte below the flash. */ /* FIXME: This is incorrect for nonstandard flashbase. */ - flash->virtual_registers = (chipaddr)programmer_map_flash_region( - "flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size); + flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size); } int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len) @@ -753,8 +752,9 @@ int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, const char *message) { - int i, ret = 0, failcount = 0; + int i; uint8_t *readbuf = malloc(len); + int ret = 0, failcount = 0; if (!len) goto out_free; @@ -832,7 +832,8 @@ */ int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran) { - int result = 0, i, j, limit; + int result = 0; + int i, j, limit; switch (gran) { case write_gran_1bit: @@ -898,7 +899,8 @@ static int get_next_write(uint8_t *have, uint8_t *want, int len, int *first_start, enum write_granularity gran) { - int need_write = 0, rel_start = 0, first_len = 0, i, limit, stride; + int need_write = 0, rel_start = 0, first_len = 0; + int i, limit, stride; switch (gran) { case write_gran_1bit: @@ -1326,7 +1328,8 @@ */ static int selfcheck_eraseblocks(const struct flashchip *flash) { - int i, j, k, ret = 0; + int i, j, k; + int ret = 0; for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { unsigned int done = 0; @@ -1451,7 +1454,8 @@ void *param1, void *param2) { int i, j; - unsigned int start = 0, len; + unsigned int start = 0; + unsigned int len; struct block_eraser eraser = flash->block_erasers[erasefunction]; for (i = 0; i < NUM_ERASEREGIONS; i++) { @@ -1603,8 +1607,10 @@ void list_programmers_linebreak(int startcol, int cols, int paren) { const char *pname; - int pnamelen, remaining = 0, firstline = 1, i; + int pnamelen; + int remaining = 0, firstline = 1; enum programmer p; + int i; for (p = 0; p < PROGRAMMER_INVALID; p++) { pname = programmer_table[p].name; Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/ft2232_spi.c Mon Aug 15 21:54:20 2011 (r1413) @@ -252,17 +252,21 @@ ftdic->error_str); } - if (ftdi_usb_reset(ftdic) < 0) + if (ftdi_usb_reset(ftdic) < 0) { msg_perr("Unable to reset FTDI device\n"); + } - if (ftdi_set_latency_timer(ftdic, 2) < 0) + if (ftdi_set_latency_timer(ftdic, 2) < 0) { msg_perr("Unable to set latency timer\n"); + } - if (ftdi_write_data_set_chunksize(ftdic, 256)) + if (ftdi_write_data_set_chunksize(ftdic, 256)) { msg_perr("Unable to set chunk size\n"); + } - if (ftdi_set_bitmode(ftdic, 0x00, BITMODE_BITBANG_SPI) < 0) + if (ftdi_set_bitmode(ftdic, 0x00, BITMODE_BITBANG_SPI) < 0) { msg_perr("Unable to set bitmode to SPI\n"); + } if (clock_5x) { msg_pdbg("Disable divide-by-5 front stage\n"); @@ -329,7 +333,8 @@ struct ftdi_context *ftdic = &ftdic_context; static unsigned char *buf = NULL; /* failed is special. We use bitwise ops, but it is essentially bool. */ - int i = 0, ret = 0, failed = 0, bufsize; + int i = 0, ret = 0, failed = 0; + int bufsize; static int oldbufsize = 0; if (writecnt > 65536 || readcnt > 65536) Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/it85spi.c Mon Aug 15 21:54:20 2011 (r1413) @@ -84,15 +84,15 @@ static int it85xx_scratch_rom_reenter = 0; /* This function will poll the keyboard status register until either - * an expected value shows up, or - * timeout reaches. + * an expected value shows up, or the timeout is reached. + * timeout is in usec. * - * Returns: 0 -- the expected value has shown. - * 1 -- timeout reached. + * Returns: 0 -- the expected value showed up. + * 1 -- timeout. */ static int wait_for(const unsigned int mask, const unsigned int expected_value, - const int timeout /* in usec */, const char *error_message, - const char *function_name, const int lineno) + const int timeout, const char * error_message, + const char * function_name, const int lineno) { int time_passed; @@ -317,8 +317,9 @@ int i; it85xx_enter_scratch_rom(); - /* exit scratch ROM ONLY when programmer shuts down. Otherwise, the - * temporary flash state may halt EC. */ + /* Exit scratch ROM ONLY when programmer shuts down. Otherwise, the + * temporary flash state may halt the EC. + */ #ifdef LPC_IO INDIRECT_A1(shm_io_base, (((unsigned long int)ce_high) >> 8) & 0xff); Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/it87spi.c Mon Aug 15 21:54:20 2011 (r1413) @@ -203,7 +203,8 @@ int init_superio_ite(void) { - int i, ret = 0; + int i; + int ret = 0; for (i = 0; i < superio_count; i++) { if (superios[i].vendor != SUPERIO_VENDOR_ITE) Modified: trunk/physmap.c ============================================================================== --- trunk/physmap.c Fri Aug 12 03:19:32 2011 (r1412) +++ trunk/physmap.c Mon Aug 15 21:54:20 2011 (r1413) @@ -76,7 +76,7 @@ mi.address = phys_addr; mi.size = len; - ret = __dpmi_physical_address_mapping (&mi); + ret = __dpmi_physical_address_mapping(&mi); if (ret != 0) return ERROR_PTR;

2 1

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom