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Re: [flashrom] Verified working on Gigabyte 880GMA-USB3
by Stefan Tauner 17 Feb '12

17 Feb '12

On Mon, 13 Feb 2012 12:09:53 +0200 Shahar Or <mightyiampresence(a)gmail.com> wrote: > Dear ones, > > I'm not subscribed to the list so please reply directly. > > I've tested read and write on Gigabyte GA-880GMA-USB3 (rev 3.1). > > Thanks so much for enabling me to flash my BIOS ROM from Linux! > > Here's the link to the mainboard's page in Gigabyte: > http://www.gigabyte.com/products/product-page.aspx?pid=3817 Hello Shahar, thanks for your report! I have marked the mainboard as tested and will commit that later together with other small changes. It would be appreciated if you could upload verbose logs of flashrom with such reports (at least a verbose probing with flashrom -V). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Add a bunch of new/tested stuff and various small changes 10
by Stefan Tauner 16 Feb '12

16 Feb '12

was committed with some additional changes in r1499. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Add support for SFDP (JESD216).
by Carl-Daniel Hailfinger 16 Feb '12

16 Feb '12

And here's the rest of the review, as promised. Please note that I do not have the stgandard at hand, so this is not a correctness review, but a code review. Am 31.01.2012 06:59 schrieb Stefan Tauner: > --- /dev/null > +++ b/sfdp.c > @@ -0,0 +1,355 @@ [...] > +static int sfdp_fill_flash(struct flashctx *f, uint8_t *buf, uint16_t len) *flash instead of *f, please. > +{ > + uint32_t tmp32; > + uint8_t tmp8; > + uint32_t total_size; /* in bytes */ > + uint32_t bsize; > + uint8_t opcode_4k = 0xFF; > + int dw, j; > + > + msg_cdbg("Parsing JEDEC SFDP parameter table... "); ... JEDEC flash parameter table... > + if (len != 9 * 4 && len != 4 * 4) { > + msg_cerr("%s: len out of spec\n", __func__); > + return 1; > + } > + msg_cdbg2("\n"); > + > + /* 1. double word */ > + dw = 0; > + tmp32 = buf[(4 * dw) + 0]; > + tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8; > + tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16; > + tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24; > + > + tmp8 = (tmp32 >> 17) & 0x3; > + switch (tmp8) { > + case 0x0: > + msg_cdbg2(" 3-Byte only addressing.\n"); > + break; > + case 0x1: > + msg_cdbg2(" 3-Byte (and optionally 4-Byte) addressing.\n"); > + break; > + case 0x2: > + msg_cdbg(" 4-Byte only addressing not supported.\n"); > + return 1; > + default: > + msg_cdbg(" Required addressing mode (0x%x) not supported.\n", > + tmp8); > + return 1; > + } > + > + msg_cdbg2(" Writes to the status register have "); > + if (tmp32 & (1 << 3)) { > + msg_cdbg2("to be enabled with "); > + if (tmp32 & (1 << 4)) { > + f->feature_bits = FEATURE_WRSR_WREN; > + msg_cdbg2("WREN (0x06).\n"); > + } else { > + f->feature_bits = FEATURE_WRSR_EWSR; > + msg_cdbg2("EWSR (0x50).\n"); > + } > + } else > + msg_cdbg2("not to be especially enabled.\n"); The "Writing to Volatile Status Register" part of JESD216 is one of the most confusing wordings I ever saw in a standard. I expect some flash chip vendors to conform to the letter of the spec which will cause pretty explosions: If the status register is nonvolatile and needs EWSR or WREN for writes, the standard explicitly requires the vendor to set bits 3+4 to 0 (EWSR/WREN not needed). I don't think JEDEC understood the implications of that wording. Suggestion for a standards-conforming code flow: msg_cdbg2(" Status register is "); if (tmp32 & (1 << 3)) { msg_cdbg2("volatile and writes to the status register have to be enabled with "); [your bit 4 code] } else msg_cdbg2("nonvolatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes"); > + > + msg_cdbg2(" Write granularity is "); I know they call it write granularity, but flashrom calls it writechunk size. Please use our terminology here even if the standard calls it differently. You can add a comment if you think that clarifies the code for future developers. > + if (tmp32 & (1 << 2)) { > + msg_cdbg2("at least 64 B.\n"); > + f->write = spi_chip_write_256; Please insert flash->page_size = 64; > + } else { > + msg_cdbg2("1 B only.\n"); > + f->write = spi_chip_write_1; flash->page_size = 256; (I know that page_size needs to die, but right now we use it.) > + } > + > + if ((tmp32 & 0x3) == 0x1) { > + opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */ > + } What about this instead? switch (tmp32 & 0x03) { case 0x0: case 0x2: msg_cerr("4k erase is reserved... should not happen"); return 1; break; case 0x1: opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */ break; case 0x3: if (((tmp32 >> 8) & 0xFF) != 0xFF) { msg_cdbg("wtf inconsistent 4k erase settings?!?"); return 1; } } Admittedly, the wording could be better. > + > + /* 2. double word */ > + dw = 1; > + tmp32 = buf[(4 * dw) + 0]; > + tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8; > + tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16; > + tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24; > + > + if (tmp32 & (1 << 31)) { > + msg_cerr("Flash chip size >= 4 Gb/512 MB not supported.\n"); > + return 1; > + } > + total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8; > + f->total_size = total_size / 1024; > + msg_cdbg2(" Flash chip size is %d kB.\n", f->total_size); > + > + /* FIXME: double words 3-7 contain unused fast read information */ > + > + if (len == 4 * 4) { > + msg_cdbg("It seems like this chip supports the preliminary " > + "Intel version of SFDP, skipping processing of double " > + "words 3-9.\n"); > + goto proc_4k; > + } > + > + dw = 8; > + for (j = 0; j < 4; j++) { > + /* 8 double words from the start + 2 words for every eraser */ > + tmp32 = buf[(4 * dw) + (2 * j)]; use tmp8 instead? > + if (tmp32 == 0) { > + msg_cdbg2(" Block eraser %d is unused.\n", j); > + continue; > + } > + if (tmp32 >= 31) { > + msg_cdbg2(" Block size of eraser %d (2^%d) is too big." "... too big for flashrom." > + "\n", j, tmp32); > + continue; > + } > + bsize = 1 << (tmp32); /* bsize = 2 ^ field */ > + > + tmp8 = buf[(4 * dw) + (2 * j) + 1]; > + if(sfdp_add_uniform_eraser(f, tmp8, bsize)) > + continue; > + /* If there is a valid 4k value in the last double words, > + * we want to override the value from double word 1, hence force > + * skipping its processing: */ > + if (bsize == 4 * 1024) > + opcode_4k = 0xFF; Not really. What happens if there are multiple valid opcodes for 4k erase? Such chips do exist IIRC. What about if (bsize == 4 * 1024) { if (tmp8 == opcode_4k) opcode_4k == 0xFF; else msg_cdbg("More than one 4kB eraser opcode found: 0x%02x and 0x%02x.", tmp8, opcode_4k); } > + } > + > +proc_4k: > + if (opcode_4k != 0xFF) { > + sfdp_add_uniform_eraser(f, opcode_4k, 4 * 1024); > + } > + msg_cdbg("done.\n"); > + return 0; > +} > + > +static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len) > +{ > + uint16_t i; > + if (spi_sfdp(flash, addr, buf, len)) { > + msg_cerr("Receiving SFDP parameter table failed.\n"); > + return 1; > + } > + msg_cspew(" Parameter table contents:\n"); > + for(i = 0; i < len; i++) { > + if ((i % 8) == 0) { > + msg_cspew(" 0x%03x: ", i); > + } > + msg_cspew(" 0x%02x", buf[i]); > + if ((i % 8) == 7) { > + msg_cspew("\n"); > + continue; > + } > + if ((i % 8) == 3) { > + msg_cspew(" "); > + continue; > + } > + } > + msg_cspew("\n"); Do we have some generic hexdump() function? I agree that dumping the parameter table contents may make sense, but open-coding your own hexdump is probably not the best idea. Do we want this hexdump functionality at all, and if yes, should it be factored out? > + return 0; > +} > + > +int probe_spi_sfdp(struct flashctx *flash) > +{ > + int ret = 0; > + uint8_t buf[8]; > + uint32_t tmp32; > + uint8_t nph; > + /* need to limit the table loop by comparing i to uint8_t nph hence: */ > + uint16_t i; > + struct sfdp_tbl_hdr *hdrs; > + uint8_t *hbuf; > + uint8_t *tbuf; > + > + if (spi_sfdp(flash, 0x00, buf, 4)) { > + msg_cerr("Receiving SFDP signature failed.\n"); Hmmm... should all boards with IT87/ICH SPI and unknown flash chips see an error message? While I'm often for upgrading error messages to msg_*err, I believe that this case should be rather mag_*dbg. > + return 0; > + } > + tmp32 = buf[0]; > + tmp32 |= ((unsigned int)buf[1]) << 8; > + tmp32 |= ((unsigned int)buf[2]) << 16; > + tmp32 |= ((unsigned int)buf[3]) << 24; > + > + msg_cdbg2("SFDP signature = 0x%08x (should be 0x50444653)\n", tmp32); > + if (tmp32 != 0x50444653) { > + msg_cdbg("No SFDP signature found.\n"); > + return 0; > + } > + if (spi_sfdp(flash, 0x04, buf, 3)) { > + msg_cerr("Receiving SFDP revision and number of parameter " > + "headers (NPH) failed. "); > + return 0; > + } > + msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]); return 0 if major revision is unknown (i.e. not 0x01). A new major revision may change the meaning of any field and that's why we should abort. > + nph = buf[2]; > + msg_cdbg2("SFDP number of parameter headers (NPH) = %d (+ 1 mandatory)" > + "\n", nph); > + > + /* Fetch all parameter headers, even if we don't use them all (yet). */ > + hbuf = malloc(sizeof(struct sfdp_tbl_hdr) * (nph + 1)); > + hdrs = malloc((nph + 1) * 8); Why is 8 a magic unexplained constant for hdrs allocation, but sizeof struct sfdp_tbl_hdr (which is 8 as well) is used for hbuf allocation? Did you mix up the two by accident? And why is (nph+1) the first factor in the second malloc and the second factor in the first malloc? > + if (hbuf == NULL || hdrs == NULL ) { > + msg_gerr("Out of memory!\n"); insert the following code: ret = 0; goto cleanup_hdrs; > + exit(1); /* FIXME: shutdown gracefully */ and kill the exit(1). It would be nice to change the probe interface to return 0 on success... that would allow us to return detailed errors. OTOH, we might want to use the probe interface to return match accuracy, in which case 0 would be nomatch. Comments appreciated. > + } > + if (spi_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) { > + msg_cerr("Receiving SFDP parameter table headers failed.\n"); > + goto cleanup_hdrs; > + } > + > + i = 0; > + do { for (i=0; i <=nph; i++) { > + uint16_t len; > + hdrs[i].id = hbuf[(8 * i) + 0]; > + hdrs[i].v_minor = hbuf[(8 * i) + 1]; > + hdrs[i].v_major = hbuf[(8 * i) + 2]; > + hdrs[i].len = hbuf[(8 * i) + 3]; > + hdrs[i].ptp = hbuf[(8 * i) + 4]; > + hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8; > + hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16; > + msg_cdbg2("SFDP parameter table header %d/%d:\n", i, nph); > + msg_cdbg2(" ID 0x%02x, version %d.%d\n", hdrs[i].id, > + hdrs[i].v_major, hdrs[i].v_minor); > + len = hdrs[i].len * 4; > + tmp32 = hdrs[i].ptp; > + msg_cdbg2(" Length %d B, Parameter Table Pointer 0x%06x\n", > + len, tmp32); > + > + if (len + tmp32 > UINT16_MAX) { > + msg_cerr("SFDP Parameter Table %d supposedly " > + "overflows addressable SFDP area. This most\n" > + "probably indicates a corrupt SFDP parameter " > + "table header. Aborting SFDP probe!\n", i); > + ret = 0; > + goto cleanup_hdrs; > + } > + > + tbuf = malloc(len); > + if (tbuf == NULL) { > + msg_gerr("Out of memory!\n"); insert the following code: ret = 0; goto cleanup_hdrs; > + exit(1); /* FIXME: shutdown gracefully */ and kill the exit(1) > + } > + if (sfdp_fetch_pt(flash, tmp32, tbuf, len)){ > + msg_cerr("Fetching SFDP parameter table %d failed.\n", > + i); > + free(tbuf); > + break; > + } > + if (i == 0) { /* Mandatory JEDEC SFDP parameter table */ > + if (hdrs[i].id != 0) > + msg_cdbg("ID of the mandatory JEDEC SFDP " msg_cerr, then cleanup and return 0. Maybe even ask user to report? > + "parameter table is not 0 as demanded " > + "by JESD216 (warning only).\n"); Check hdrs[i].v_major here and do the error dance for unexpected values. > + > + if (len != 9 * 4 && len != 4 * 4) { > + msg_cdbg("Length of the mandatory JEDEC SFDP " msg_cerr, then cleanup and return 0. Maybe even ask user to report? > + "parameter table is %d B instead of " > + "36 B (i.e. 9 double words) as " > + "demanded by JESD216, skipping " > + "parsing.\n", len); > + } else if (sfdp_fill_flash(flash, tbuf, len) == 0) > + ret = 1; > + } > + > + free(tbuf); > + i++; > + } while(i <= nph); > + > +cleanup_hdrs: > + free(hdrs); > + free(hbuf); > + return ret; > +} Cross-checked against the standard, looks pretty good. Next round will be acked. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1499 - trunk
by repository service 16 Feb '12

16 Feb '12

Author: stefanct Date: Thu Feb 16 22:07:07 2012 New Revision: 1499 URL: http://flashrom.org/trac/flashrom/changeset/1499 Log: Add a bunch of new/tested stuff and various small changes 10 Tested mainboards: OK: - ABIT A-S78H http://www.flashrom.org/pipermail/flashrom/2012-January/008603.html - ASRock AM2NF6G-VSTA http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html - ASUS KFSN4-DRE/SAS reported by ted on IRC - ASUS M2A-VM (HDMI variant) http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html - ASUS M4N78 PRO http://www.flashrom.org/pipermail/flashrom/2012-January/008598.html - ASUS P5K-V http://www.flashrom.org/pipermail/flashrom/2012-February/008737.html - ASUS P5KPL-CM http://www.flashrom.org/pipermail/flashrom/2012-January/008522.html - ASUS P5N7A-VM http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html - ASUS P5QPL-AM http://www.flashrom.org/pipermail/flashrom/2012-January/008557.html - ECS GF7100PVT-M3 http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html - ECS K7SEM http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html - ECS P4M800PRO-M V2.0 http://www.flashrom.org/pipermail/flashrom/2012-January/008478.html - Gigabyte 880GMA-USB3 http://www.flashrom.org/pipermail/flashrom/2012-February/008715.html - Gigabyte GA-EP31-DS3L http://www.flashrom.org/pipermail/flashrom/2012-January/008601.html - Gigabyte GA-X58A-UDR3 http://www.flashrom.org/pipermail/flashrom/2012-January/008572.html - Gigabyte GA-Z68XP-UD3 http://paste.flashrom.org/view.php?id=1058 - HP ProLiant N40L http://www.flashrom.org/pipermail/flashrom/2012-February/008650.html - MSI MS-7309 (K9N6PGM2-V2) http://www.flashrom.org/pipermail/flashrom/2011-December/008441.html - MSI MS-7548 (Aspen-GL8E used in HP Pavilion a6750f) http://www.flashrom.org/pipermail/flashrom/2012-February/008666.html - MSI MS-7676 (H67MA-ED55(B3)) http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html - PC Engines Alix.6f2 Reported by Philip Prindeville on IRC - Shuttle AV18E2 http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html - Supermicro X8DTE-F http://www.flashrom.org/pipermail/flashrom/2011-November/008304.html - Supermicro X8DTT-HIBQF http://www.flashrom.org/pipermail/flashrom/2012-January/008520.html NOT OK: - ASUS P8H61-M LE/USB3 http://www.flashrom.org/pipermail/flashrom/2012-January/008491.html - ASUS P8H67-M PRO http://www.flashrom.org/pipermail/flashrom/2011-December/008321.html - ASUS P8Z68-V PRO http://www.flashrom.org/pipermail/flashrom/2012-January/008469.html - Clevo P150HM (laptop) http://www.flashrom.org/pipermail/flashrom/2012-February/008717.html - Intel D425KT http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html - Supermicro X9SCA-F http://www.flashrom.org/pipermail/flashrom/2011-December/008313.html Tested flash chips: - mark AT29C512 as TEST_OK_PREW http://paste.flashrom.org/view.php?id=977 - mark M25P40 as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-December/008351.html - mark M25PE80 as TEST_OK_PREW http://paste.flashrom.org/view.php?id=1061 - mark MX25L6405 as TEST_OK_PREW tested myself with an MX25L6436E variant on serprog - mark W39V080A as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html Tested chipsets: - SiS 730 (:0730) http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html - NVIDIA MCP61 (:03e0) http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html - NVIDIA MCP73 (:07d7) http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html - NVIDIA MCP79 (:0aac) http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html - VIA VT82C69x (0691) and VT82C686A/B (:0686) http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html - AMD's SB950 (and presumably also SB920) have the same PCI ID as previous generations, hence change the chipset enable device string. Thanks to Christian Ruppert for the suggestion. - Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard graphics card in its pattern. Change this to the LPC controller. - Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable wrapper of it (enable_flash_pch6). - Fix two paranoid checks for address < 0 in ichspi.c which became futile (and generate clang warnings) with the unsignify patch committed in r1470. - Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could be distinguished by an extended RDID probe (Atmel's patented EDI procedure), which we do not support yet, hence handle them as one model for now. - Source format fixes and typos the addition of the ASRock AM2NF6G-VSTA to print.c is Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> everything else is Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/dediprog.c trunk/dummyflasher.c trunk/flashchips.c trunk/flashchips.h trunk/ichspi.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/board_enable.c Thu Feb 16 22:07:07 2012 (r1499) @@ -1562,7 +1562,7 @@ /* * Suited for: * - AOpen i945GMx-VFX: Intel 945GM + ICH7-M used in ... - * - FCS ESPRIMO Q5010 (SMBIOS: D2544-B1) + * - FSC ESPRIMO Q5010 (SMBIOS: D2544-B1) */ static int intel_ich_gpio38_raise(void) { @@ -2114,7 +2114,7 @@ {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, P3, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, P3, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, P3, "abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, - {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0240, 0x10de, 0x0222, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower}, + {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0260, 0x147b, 0x1c26, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, "(VA6)$", NULL, NULL, P3, "abit", "VA6", 0, OK, via_apollo_gpo4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", P3, "abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, P3, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/chipset_enable.c Thu Feb 16 22:07:07 2012 (r1499) @@ -1155,7 +1155,7 @@ #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, - {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, + {0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, @@ -1178,7 +1178,7 @@ {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540}, {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, - {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, + {0x1039, 0x0730, OK, "SiS", "730", enable_flash_sis540}, {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, @@ -1222,7 +1222,7 @@ {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x03e0, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e1, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, @@ -1233,8 +1233,8 @@ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x}, {0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, {0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, - {0x10de, 0x07d7, NT, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, - {0x10de, 0x0aac, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, + {0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, @@ -1243,12 +1243,12 @@ {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, - {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ + {0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge}, {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, /* VIA southbridges */ {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, - {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, + {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111}, {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, @@ -1279,8 +1279,8 @@ {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6}, {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_pch6}, - {0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_ich10}, /* FIXME: when datasheet is available */ - {0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_ich10}, /* FIXME: when datasheet is available */ + {0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_pch6}, + {0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_pch6}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, Modified: trunk/dediprog.c ============================================================================== --- trunk/dediprog.c Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/dediprog.c Thu Feb 16 22:07:07 2012 (r1499) @@ -299,7 +299,7 @@ return 0; } -/* Bulk write interface, will read multiple page_size byte chunks aligned to page_size bytes. +/* Bulk write interface, will write multiple page_size byte chunks aligned to page_size bytes. * @start start address * @len length * @return 0 on success, 1 on failure Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/dummyflasher.c Thu Feb 16 22:07:07 2012 (r1499) @@ -435,7 +435,7 @@ msg_perr("No command sent to the chip!\n"); return 1; } - /* spi_blacklist has precedence before spi_ignorelist. */ + /* spi_blacklist has precedence over spi_ignorelist. */ for (i = 0; i < spi_blacklist_size; i++) { if (writearr[0] == spi_blacklist[i]) { msg_pdbg("Refusing blacklisted SPI command 0x%02x\n", Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/flashchips.c Thu Feb 16 22:07:07 2012 (r1499) @@ -1579,7 +1579,7 @@ { .vendor = "Atmel", - .name = "AT25DF641", + .name = "AT25DF641(A)", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT25DF641, @@ -1967,7 +1967,7 @@ .total_size = 64, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 10000, /* 10mS, Enter=Exec */ .block_erasers = @@ -4427,7 +4427,7 @@ .total_size = 8192, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PROBE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -4957,7 +4957,7 @@ .model_id = ST_M25PE80, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -6910,7 +6910,7 @@ .model_id = ST_M25P40, .total_size = 512, .page_size = 256, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -8690,9 +8690,9 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = 10, + .probe_timing = 10, .block_erasers = { { Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/flashchips.h Thu Feb 16 22:07:07 2012 (r1499) @@ -364,7 +364,7 @@ #define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */ #define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */ #define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */ -#define MACRONIX_MX25L6405 0x2017 /* MX25L3205{,D} */ +#define MACRONIX_MX25L6405 0x2017 /* MX25L6405{,D}, MX25L6406E, MX25L6436E */ #define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/ichspi.c Thu Feb 16 22:07:07 2012 (r1499) @@ -1286,7 +1286,7 @@ uint16_t timeout = 100 * 60; uint8_t block_len; - if (addr < 0 || addr + len > flash->total_size * 1024) { + if (addr + len > flash->total_size * 1024) { msg_perr("Request to read from an inaccessible memory address " "(addr=0x%x, len=%d).\n", addr, len); return -1; @@ -1324,7 +1324,7 @@ uint16_t timeout = 100 * 60; uint8_t block_len; - if (addr < 0 || addr + len > flash->total_size * 1024) { + if (addr + len > flash->total_size * 1024) { msg_perr("Request to write to an inaccessible memory address " "(addr=0x%x, len=%d).\n", addr, len); return -1; Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Feb 16 22:00:27 2012 (r1498) +++ trunk/print.c Thu Feb 16 22:07:07 2012 (r1499) @@ -546,6 +546,7 @@ const struct board_info boards_known[] = { #if defined(__i386__) || defined(__x86_64__) B("A-Trend", "ATC-6220", 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL), + B("abit", "A-S78H", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), B("abit", "AN-M2", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), B("abit", "AV8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), B("abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), @@ -565,7 +566,7 @@ B("Advantech", "PCM-5820", 1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL), B("agami", "Aruma", 1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-600…", NULL), B("Albatron", "PM266A Pro", 1, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview…", NULL), /* FIXME */ - B("AOpen", "i945GMx-VFX", 1, NULL, "This is (also?) an OEM board from FCS (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."), + B("AOpen", "i945GMx-VFX", 1, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."), B("AOpen", "vKM400Am-S", 1, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL), B("Artec Group","DBE61", 1, "http://wiki.thincan.org/DBE61", NULL), B("Artec Group","DBE62", 1, "http://wiki.thincan.org/DBE62", NULL), @@ -576,6 +577,7 @@ B("ASRock", "A330GC", 1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL), B("ASRock", "A770CrossFire", 1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL), B("ASRock", "ALiveNF6G-DVI", 1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL), + B("ASRock", "AM2NF6G-VSTA", 1, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL), B("ASRock", "ConRoeXFire-eSATA2", 1, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL), B("ASRock", "K7S41", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL), B("ASRock", "K7S41GX", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL), @@ -594,7 +596,7 @@ B("ASUS", "A7V8X-MX", 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL), B("ASUS", "A7V8X-MX SE", 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL), B("ASUS", "A7V8X-X", 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL), - B("ASUS", "A8M2N-LA (NodusM3-GL8E)", 1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&…", "This is an OEM board from HP, the HP name is NodusM3-GL8E."), + B("ASUS", "A8M2N-LA (NodusM3-GL8E)", 1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&…", "This is an OEM board from HP, the HP name is NodusM3-GL8E."), B("ASUS", "A8N-E", 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL), B("ASUS", "A8N-LA (Nagami-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&d…", "This is an OEM board from HP, the HP name is Nagami-GL8E."), B("ASUS", "A8N-SLI", 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL), @@ -614,8 +616,9 @@ B("ASUS", "K8V SE Deluxe", 1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL), B("ASUS", "K8V-X", 1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL), B("ASUS", "K8V-X SE", 1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL), + B("ASUS", "KFSN4-DRE/SAS", 1, "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL), B("ASUS", "M2A-MX", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL), - B("ASUS", "M2A-VM", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html"), + B("ASUS", "M2A-VM (HDMI)", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL), B("ASUS", "M2N32-SLI Deluxe", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL), B("ASUS", "M2N-E", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"), B("ASUS", "M2N-E SLI", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL), @@ -629,12 +632,13 @@ B("ASUS", "M3A78-EM", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL), B("ASUS", "M3N78-VM", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL), B("ASUS", "M4A78-EM", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL), - B("ASUS", "M4A785TD-V EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL), B("ASUS", "M4A785TD-M EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL), + B("ASUS", "M4A785TD-V EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL), B("ASUS", "M4A78LT-M LE", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL), B("ASUS", "M4A79T Deluxe", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL), B("ASUS", "M4A87TD/USB3", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL), B("ASUS", "M4A89GTD PRO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL), + B("ASUS", "M4N78 PRO", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL), B("ASUS", "M5A99X EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL), B("ASUS", "MEW-AM", 0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("ASUS", "MEW-VM", 0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), @@ -670,8 +674,10 @@ B("ASUS", "P5GDC Deluxe", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL), B("ASUS", "P5GDC-V Deluxe", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL), B("ASUS", "P5GD2/C variants", 0, NULL, "Untested board enable."), + B("ASUS", "P5K-V", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL), B("ASUS", "P5K-VM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL), B("ASUS", "P5KC", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL), + B("ASUS", "P5KPL-CM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL), B("ASUS", "P5L-MX", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL), B("ASUS", "P5L-VM 1394", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), B("ASUS", "P5LD2", 0, NULL, "Untested board enable."), @@ -682,8 +688,10 @@ B("ASUS", "P5N-D", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL), B("ASUS", "P5N-E SLI", 0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."), B("ASUS", "P5N32-E SLI", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL), + B("ASUS", "P5N7A-VM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL), B("ASUS", "P5ND2-SLI Deluxe", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL), B("ASUS", "P5PE-VM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL), + B("ASUS", "P5QPL-AM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL), B("ASUS", "P5VD1-X", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL), B("ASUS", "P6T SE", 1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL), B("ASUS", "P6T Deluxe", 1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL), @@ -693,7 +701,10 @@ B("ASUS", "P8B-E/4L", 0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8B WS", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H61 PRO", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "P8H61-M LE/USB3", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "P8H67-M PRO", 0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8P67 (rev. 3.1)", 0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "P8Z68-V PRO", 0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "Z8NA-D6C", 1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL), B("ASUS", "Z8PE-D12", 1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL), B("BCOM", "WinNET100", 1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."), @@ -710,10 +721,12 @@ B("DFI", "855GME-MGF", 0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?…", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"), B("DFI", "Blood-Iron P35 T2RL", 1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWin…", NULL), B("Elitegroup", "GeForce6100SM-M ", 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&M…", NULL), + B("Elitegroup", "GF7100PVT-M3 (V1.0)", 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&C…", NULL), B("Elitegroup", "K7S5A", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&…", NULL), B("Elitegroup", "K7S6A", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&C…", NULL), + B("Elitegroup", "K7SEM (V1.0A)", 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&C…", NULL), B("Elitegroup", "K7VTA3", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&…", NULL), - B("Elitegroup", "P4M800PRO-M (V1.0A)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), + B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), B("Elitegroup", "P4VXMS (V1.0A)", 1, NULL, NULL), B("Elitegroup", "P6IWP-Fe", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), B("Elitegroup", "P6VAP-A+", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&…", NULL), @@ -743,6 +756,7 @@ B("GIGABYTE", "GA-7DXR", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL), B("GIGABYTE", "GA-7VT600", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL), B("GIGABYTE", "GA-7ZM", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."), + B("GIGABYTE", "GA-880GMA-USB3 (rev. 3.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL), B("GIGABYTE", "GA-8I945GZME-RH", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL), B("GIGABYTE", "GA-8IP775", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL), B("GIGABYTE", "GA-8IRML", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL), @@ -751,6 +765,7 @@ B("GIGABYTE", "GA-945PL-S3P (rev. 6.6)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL), B("GIGABYTE", "GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL), B("GIGABYTE", "GA-965P-DS4", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL), + B("GIGABYTE", "GA-EP31-DS3L (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL), B("GIGABYTE", "GA-EP35-DS3L", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL), B("GIGABYTE", "GA-EX58-UD4P", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL), B("GIGABYTE", "GA-K8N-SLI", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL), @@ -774,10 +789,13 @@ B("GIGABYTE", "GA-P55A-UD4 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL), B("GIGABYTE", "GA-P67A-UD3P", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL), B("GIGABYTE", "GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL), + B("GIGABYTE", "GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL), B("GIGABYTE", "GA-Z68MX-UD2H-B (rev. 1.3)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL), + B("GIGABYTE", "GA-Z68XP-UD3 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL), B("HP", "e-Vectra P2706T", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&pro…", NULL), B("HP", "ProLiant DL145 G3", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c008…", NULL), B("HP", "ProLiant DL165 G6", 1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-33…", NULL), + B("HP", "ProLiant N40L", 1, NULL, NULL), B("HP", "Puffer2-UL8E", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL), B("HP", "Vectra VL400", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c000…", NULL), B("HP", "Vectra VL420 SFF", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c000…", NULL), @@ -787,6 +805,7 @@ B("IBM", "x3455", 1, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL), B("IEI", "PICOe-9452", 1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&…", NULL), B("Intel", "D201GLY", 1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL), + B("Intel", "D425KT", 0, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/de…", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"), B("Intel", "D865GLC", 0, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"), B("Intel", "DG45ID", 0, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.h…", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("Intel", "DH67CF", 0, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"), @@ -830,6 +849,7 @@ B("MSI", "MS-7253 (K9VGM-V)", 1, "http://www.msi.com/product/mb/K9VGM-V.html", NULL), B("MSI", "MS-7255 (P4M890M)", 1, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL), B("MSI", "MS-7260 (K9N Neo PCB 1.0)", 0, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>."), + B("MSI", "MS-7309 (K9N6PGM2-V2)", 1, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL), B("MSI", "MS-7312 (K9MM-V)", 1, "http://www.msi.com/product/mb/K9MM-V.html", NULL), B("MSI", "MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL), B("MSI", "MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL), @@ -837,12 +857,14 @@ B("MSI", "MS-7376 (K9A2 Platinum V1)", 1, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL), B("MSI", "MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), B("MSI", "MS-7529 (G31TM-P21)", 1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL), + B("MSI", "MS-7548 (Aspen-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&d…", NULL), B("MSI", "MS-7596 (785GM-E51)", 1, "http://www.msi.com/product/mb/785GM-E51.html", NULL), B("MSI", "MS-7599 (870-C45)", 1, "http://www.msi.com/product/mb/870-C45.html", NULL), B("MSI", "MS-7613 (Iona-GL8E)", 0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&d…", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("MSI", "MS-7635 (H55M-ED55)", 0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("MSI", "MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL), B("MSI", "MS-7642 (890GXM-G65)", 1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL), + B("MSI", "MS-7676 (H67MA-ED55(B3))", 1, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"), B("MSI", "MS-7696 (A75MA-G55)", 1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL), B("MSI", "MS-7698 (E350IA-E45)", 1, "http://www.msi.com/product/mb/E350IA-E45.html", NULL), B("NEC", "PowerMate 2000", 1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL), @@ -855,6 +877,7 @@ B("PC Engines", "Alix.2d3", 1, "http://pcengines.ch/alix2d3.htm", NULL), B("PC Engines", "Alix.3c3", 1, "http://pcengines.ch/alix3c3.htm", NULL), B("PC Engines", "Alix.3d3", 1, "http://pcengines.ch/alix3d3.htm", NULL), + B("PC Engines", "Alix.6f2", 1, "http://pcengines.ch/alix6f2.htm", NULL), B("PC Engines", "WRAP.2E", 1, "http://pcengines.ch/wrap2e1.htm", NULL), B("Portwell", "PEB-4700VLA", 1, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL), B("RCA", "RM4100", 1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL), @@ -862,6 +885,7 @@ B("Shuttle", "AK31", 1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL), B("Shuttle", "AK38N", 1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL), B("Shuttle", "AV11V30", 1, NULL, NULL), + B("Shuttle", "AV18E2", 1, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL), B("Shuttle", "FD37", 1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL), B("Shuttle", "FH67", 1, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL), B("Shuttle", "FN25", 1, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL), @@ -880,12 +904,15 @@ B("Supermicro", "X7DBT-INF", 1, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL), B("Supermicro", "X7SPA-HF", 1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IP…", NULL), B("Supermicro", "X8DT3", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL), + B("Supermicro", "X8DTE-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&…", NULL), B("Supermicro", "X8DTH-6F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL), B("Supermicro", "X8DTT-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL), + B("Supermicro", "X8DTT-HIBQF", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL), B("Supermicro", "X8DTU-6TF+", 0, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&…", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X8DTU-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL), B("Supermicro", "X8SIE(-F)", 0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI…", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."), B("Supermicro", "X8STi", 1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL), + B("Supermicro", "X9SCA-F", 0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X9SCL", 0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("T-Online", "S-100", 1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL), B("Tekram", "P6Pro-A5", 1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL), @@ -951,11 +978,12 @@ B("ASUS", "A8Jm", 1, NULL, NULL), B("ASUS", "Eee PC 701 4G", 0, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."), B("ASUS", "M6Ne", 0, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."), + B("Clevo", "P150HM", 0, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Dell", "Latitude CPi A366XT", 0, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."), B("HP/Compaq", "nx9005", 0, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"), B("HP/Compaq", "nx9010", 0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us…", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."), B("IBM/Lenovo", "Thinkpad T40p", 0, "http://www.thinkwiki.org/wiki/Category:T40p", NULL), - B("IBM/Lenovo", "Thinkpad T410s", 0, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25x64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."), + B("IBM/Lenovo", "Thinkpad T410s", 0, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."), B("IBM/Lenovo", "240", 0, "http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."), B("Lenovo", "3000 V100 TF05Cxx", 1, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3…", NULL), #endif

1 0

[PATCH] Document and enable the linux_spi driver
by Carl-Daniel Hailfinger 16 Feb '12

16 Feb '12

The linux_spi driver is now enabled by default on Linux. A man page entry and a line in --list-supported output have been added. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-linux_spi_documentation/Makefile =================================================================== --- flashrom-linux_spi_documentation/Makefile (Revision 1495) +++ flashrom-linux_spi_documentation/Makefile (Arbeitskopie) @@ -209,6 +209,14 @@ endif endif +ifneq ($(TARGET_OS), Linux) +ifeq ($(CONFIG_LINUX_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_LINUX_SPI=yes +else +override CONFIG_LINUX_SPI = no +endif +endif + # Determine the destination processor architecture. # IMPORTANT: The following line must be placed before ARCH is ever used # (of course), but should come after any lines setting CC because the line @@ -324,16 +332,15 @@ # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATE_SPI ?= yes -# Disable Linux spidev interface support for now, until we check for a Linux -# device (not host, as DOS binaries for example are built on a Linux host). -CONFIG_LINUX_SPI ?= no - # Disable Dediprog SF100 until support is complete and tested. CONFIG_DEDIPROG ?= no # Always enable Marvell SATA controllers for now. CONFIG_SATAMV ?= yes +# Enable Linux spidev interface by default. We disable it on non-Linux targets. +CONFIG_LINUX_SPI ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -465,11 +472,6 @@ NEED_SERIAL := yes endif -ifeq ($(CONFIG_LINUX_SPI), yes) -FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1' -PROGRAMMER_OBJS += linux_spi.o -endif - ifeq ($(CONFIG_DEDIPROG), yes) FEATURE_CFLAGS += -D'CONFIG_DEDIPROG=1' FEATURE_LIBS += -lusb @@ -482,6 +484,11 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_LINUX_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1' +PROGRAMMER_OBJS += linux_spi.o +endif + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Index: flashrom-linux_spi_documentation/flashrom.8 =================================================================== --- flashrom-linux_spi_documentation/flashrom.8 (Revision 1495) +++ flashrom-linux_spi_documentation/flashrom.8 (Arbeitskopie) @@ -205,6 +205,8 @@ .sp .BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)" .sp +.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER SPECIFIC INFO @@ -607,6 +609,17 @@ .sp More information about the hardware is available at .BR http://wiki.opengraphics.org . +.TP +.BR "linux_spi " programmer +You have to specify the SPI controller to use with the +.sp +.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y" +.sp +syntax where +.B /dev/spidevX.Y +is the Linux device node for your SPI controller. +.sp +Please note that the linux_spi driver only works on Linux. .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails. Index: flashrom-linux_spi_documentation/print.c =================================================================== --- flashrom-linux_spi_documentation/print.c (Revision 1495) +++ flashrom-linux_spi_documentation/print.c (Arbeitskopie) @@ -527,6 +527,11 @@ programmer_table[PROGRAMMER_SATAMV].name); print_supported_pcidevs(satas_mv); #endif +#if CONFIG_LINUX_SPI == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_LINUX_SPI].name); + msg_ginfo("Device files /dev/spidev*.*\n"); +#endif } #if CONFIG_INTERNAL == 1 -- http://www.hailfinger.org/

2 4

[PATCH] Reenable forced read
by Carl-Daniel Hailfinger 16 Feb '12

16 Feb '12

Forced read functionality was disabled when programmer registration was merged in r. We now support registering more than one controller at once for each bus type. This can happen e.g. if one SPI controller has an attached flash chip and one controller doesn't. In such a case we rely on the probe mechanism to find exactly one chip, and the probe mechanism will remember which controller/bus the flash chip is attached to. A forced read does not have the luxury of knowing which compatible controller to use, so this case is handled by always picking the first one. That may or may not be the correct one, but there is no way (yet) to specify which controller a flash chip is attached to. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-forced_read_reenable/cli_classic.c =================================================================== --- flashrom-forced_read_reenable/cli_classic.c (Revision 1495) +++ flashrom-forced_read_reenable/cli_classic.c (Arbeitskopie) @@ -456,11 +456,27 @@ printf("Note: flashrom can never write if the flash " "chip isn't found automatically.\n"); } -#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered? if (force && read_it && chip_to_probe) { + struct registered_programmer *pgm; + int compatible_programmers = 0; printf("Force read (-f -r -c) requested, pretending " "the chip is there:\n"); - startchip = probe_flash(0, &flashes[0], 1); + /* This loop just counts compatible controllers. */ + for (j = 0; j < registered_programmer_count; j++) { + pgm = &registered_programmers[j]; + if (pgm->buses_supported & flashes[0].bustype) + compatible_programmers++; + } + if (compatible_programmers > 1) + printf("More than one compatible controller " + "found for the requested flash chip, " + "using the first one.\n"); + for (j = 0; j < registered_programmer_count; j++) { + pgm = &registered_programmers[j]; + startchip = probe_flash(pgm, 0, &flashes[0], 1); + if (startchip != -1) + break; + } if (startchip == -1) { printf("Probing for flash chip '%s' failed.\n", chip_to_probe); @@ -471,7 +487,6 @@ "contain garbage.\n"); return read_flash_to_file(&flashes[0], filename); } -#endif ret = 1; goto out_shutdown; } else if (!chip_to_probe) { -- http://www.hailfinger.org/

2 4

[commit] r1498 - trunk
by repository service 16 Feb '12

16 Feb '12

Author: hailfinger Date: Thu Feb 16 22:00:27 2012 New Revision: 1498 URL: http://flashrom.org/trac/flashrom/changeset/1498 Log: Document and enable the linux_spi driver The linux_spi driver is now enabled by default on Linux. A man page entry and a line in --list-supported output have been added. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Makefile trunk/flashrom.8 trunk/print.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Feb 16 21:55:27 2012 (r1497) +++ trunk/Makefile Thu Feb 16 22:00:27 2012 (r1498) @@ -209,6 +209,14 @@ endif endif +ifneq ($(TARGET_OS), Linux) +ifeq ($(CONFIG_LINUX_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_LINUX_SPI=yes +else +override CONFIG_LINUX_SPI = no +endif +endif + # Determine the destination processor architecture. # IMPORTANT: The following line must be placed before ARCH is ever used # (of course), but should come after any lines setting CC because the line @@ -324,16 +332,15 @@ # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATE_SPI ?= yes -# Disable Linux spidev interface support for now, until we check for a Linux -# device (not host, as DOS binaries for example are built on a Linux host). -CONFIG_LINUX_SPI ?= no - # Disable Dediprog SF100 until support is complete and tested. CONFIG_DEDIPROG ?= no # Always enable Marvell SATA controllers for now. CONFIG_SATAMV ?= yes +# Enable Linux spidev interface by default. We disable it on non-Linux targets. +CONFIG_LINUX_SPI ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -465,11 +472,6 @@ NEED_SERIAL := yes endif -ifeq ($(CONFIG_LINUX_SPI), yes) -FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1' -PROGRAMMER_OBJS += linux_spi.o -endif - ifeq ($(CONFIG_DEDIPROG), yes) FEATURE_CFLAGS += -D'CONFIG_DEDIPROG=1' FEATURE_LIBS += -lusb @@ -482,6 +484,11 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_LINUX_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1' +PROGRAMMER_OBJS += linux_spi.o +endif + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Feb 16 21:55:27 2012 (r1497) +++ trunk/flashrom.8 Thu Feb 16 22:00:27 2012 (r1498) @@ -205,6 +205,8 @@ .sp .BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)" .sp +.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER SPECIFIC INFO @@ -639,6 +641,17 @@ .sp More information about the hardware is available at .BR http://wiki.opengraphics.org . +.SS +.BR "linux_spi " programmer +You have to specify the SPI controller to use with the +.sp +.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y" +.sp +syntax where +.B /dev/spidevX.Y +is the Linux device node for your SPI controller. +.sp +Please note that the linux_spi driver only works on Linux. .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails. Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Feb 16 21:55:27 2012 (r1497) +++ trunk/print.c Thu Feb 16 22:00:27 2012 (r1498) @@ -527,6 +527,11 @@ programmer_table[PROGRAMMER_SATAMV].name); print_supported_pcidevs(satas_mv); #endif +#if CONFIG_LINUX_SPI == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_LINUX_SPI].name); + msg_ginfo("Device files /dev/spidev*.*\n"); +#endif } #if CONFIG_INTERNAL == 1

1 0

Re: [flashrom] [PATCH] Manpage improvements.
by Carl-Daniel Hailfinger 16 Feb '12

16 Feb '12

Am 16.02.2012 21:44 schrieb Stefan Tauner: > The sections describing the various options of the internal and dummy > programmers have grown out of proportions. This patch adds some headlines > to devide the unrelated topics a bit (with .TP commands). The previous indented > paragraphs for the various programmers were transformed to subsections (.SS). > > Also, rephrase the documention related to laptops completely to make it > less redundant and more informative. > Document the laptop=this_is_not_a_laptop internal programmer parameter > > Change the contact info in the bugs section by removing the trac > reference and adding IRC (and the pastebin) instead. > > Remove some superfluous white space. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1497 - trunk
by repository service 16 Feb '12

16 Feb '12

Author: stefanct Date: Thu Feb 16 21:55:27 2012 New Revision: 1497 URL: http://flashrom.org/trac/flashrom/changeset/1497 Log: Manpage improvements. The sections describing the various options of the internal and dummy programmers have grown out of proportions. This patch adds some headlines to devide the unrelated topics a bit (with .TP commands). The previous indented paragraphs for the various programmers were transformed to subsections (.SS). Also, rephrase the documention related to laptops completely to make it less redundant and more informative. Document the laptop=this_is_not_a_laptop internal programmer parameter Change the contact info in the bugs section by removing the trac reference and adding IRC (and the pastebin) instead. Remove some superfluous white space and a .RE (restore indentation) command. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashrom.8 Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Feb 16 21:31:25 2012 (r1496) +++ trunk/flashrom.8 Thu Feb 16 21:55:27 2012 (r1497) @@ -1,4 +1,4 @@ -.TH FLASHROM 8 "Jul 25, 2011" +.TH FLASHROM 8 "Feb 15, 2012" .SH NAME flashrom \- detect, read, write, verify and erase flash chips .SH SYNOPSIS @@ -223,8 +223,11 @@ colon. While some programmers take arguments at fixed positions, other programmers use a key/value interface in which the key and value is separated by an equal sign and different pairs are separated by a comma or a colon. -.TP +.SS .BR "internal " programmer +.TP +.B Board Enables +.sp Some mainboards require to run mainboard specific code to enable flash erase and write support (and probe support on old systems with parallel flash). The mainboard brand and model (if it requires specific code) is usually @@ -275,17 +278,22 @@ enable is going to fail. In any case (success or failure), please report to the flashrom mailing list, see below. .sp +.TP +.B Coreboot +.sp On systems running coreboot, flashrom checks whether the desired image matches your mainboard. This needs some special board ID to be present in the image. If flashrom detects that the image you want to write and the current board do not match, it will refuse to write the image unless you specify .sp .B " flashrom \-p internal:boardmismatch=force" +.TP +.B ITE IT87 Super I/O .sp If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus translation, flashrom should autodetect that configuration. If you want to set the I/O base port of the IT87 series SPI controller manually instead of -using the value provided by the BIOS, use the +using the value provided by the BIOS, use the .sp .B " flashrom \-p internal:it87spiport=portnum" .sp @@ -295,6 +303,9 @@ flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug report so we can diagnose the problem. .sp +.TP +.B Intel chipsets +.sp If you have an Intel chipset with an ICH8 or later southbridge with SPI flash attached, and if a valid descriptor was written to it (e.g. by the vendor), the chipset provides an alternative way to access the flash chip(s) named @@ -346,6 +357,8 @@ .sp Example: .B "flashrom \-p internal:fwh_idsel=0x001122334567" +.TP +.B Laptops .sp Using flashrom on laptops is dangerous and may easily make your hardware unusable (see also the @@ -353,21 +366,31 @@ section). The embedded controller (EC) in these machines often interacts badly with flashing. .B http://www.flashrom.org/Laptops -has more information. If flash is shared with the EC, erase is guaranteed to -brick your laptop and write is very likely to brick your laptop. -Chip read and probe may irritate your EC and cause fan failure, backlight -failure, sudden poweroff, and other nasty effects. -flashrom will attempt to detect laptops and abort immediately for safety -reasons. -If you want to proceed anyway at your own risk, use +has more information. For example the EC firmware sometimes resides on the same +flash chip as the host firmware. While flashrom tries to change the contents of +that memory the EC might need to fetch new instructions or data from it and +could stop working correctly. Probing for and reading from the chip may also +irritate your EC and cause fan failure, backlight failure, sudden poweroff, and +other nasty effects. flashrom will attempt to detect if it is running on a +laptop and abort immediately for safety reasons if it clearly identifies the +host computer as one. If you want to proceed anyway at your own risk, use .sp .B " flashrom \-p internal:laptop=force_I_want_a_brick" .sp -You have been warned. -.sp We will not help you if you force flashing on a laptop because this is a really dumb idea. -.TP +.sp +You have been warned. +.sp +Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect +laptops. Some vendors did not implement those bits correctly or set them to +generic and/or dummy values. flashrom will then issue a warning and bail out +like above. In this case you can use +.sp +.B " flashrom \-p internal:laptop=this_is_not_a_laptop" +.sp +to tell flashrom (at your own risk) that it does not running on a laptop. +.SS .BR "dummy " programmer The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various aspects of flashrom and is mainly used in @@ -409,6 +432,8 @@ .sp Example: .B "flashrom -p dummy:emulate=SST25VF040.REMS" +.TP +.B Persistent images .sp If you use flash chip emulation, flash image persistence is available as well by using the @@ -422,6 +447,8 @@ .sp Example: .B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin" +.TP +.B SPI write chunk size .sp If you use SPI flash chip emulation for a chip which supports SPI page write with the default opcode, you can set the maximum allowed write chunk size with @@ -436,6 +463,8 @@ Example: .sp .B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5" +.TP +.B SPI blacklist .sp To simulate a programmer which refuses to send certain SPI commands to the flash chip, you can specify a blacklist of SPI commands with the @@ -448,6 +477,9 @@ commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom will detect an error during command execution. .sp +.TP +.B SPI ignorelist +.sp To simulate a flash chip which ignores (doesn't support) certain SPI commands, you can specify an ignorelist of SPI commands with the .sp @@ -458,7 +490,7 @@ command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom won't detect an error during command execution. -.TP +.SS .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\ " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\ " , " satamv" ", and " atahpt " programmers @@ -480,7 +512,7 @@ .sp Example: .B "flashrom \-p nic3com:pci=05:04.0" -.TP +.SS .BR "ft2232_spi " programmer An optional parameter specifies the controller type and interface/port it should support. For that you have to use the @@ -501,7 +533,7 @@ .B 4232H and the default interface is .BR B . -.TP +.SS .BR "serprog " programmer A mandatory parameter specifies either a serial device/baud combination or an IP/port combination for communication with the @@ -517,7 +549,7 @@ instead. More information about serprog is available in .B serprog-protocol.txt in the source distribution. -.TP +.SS .BR "buspirate_spi " programmer A required .B dev @@ -533,7 +565,7 @@ can be .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M (in Hz). The default is the maximum frequency of 8 MHz. -.TP +.SS .BR "dediprog " programmer An optional .B voltage @@ -549,7 +581,7 @@ can be .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V or the equivalent in mV. -.TP +.SS .BR "rayer_spi " programmer The default I/O base address used for the parallel port is 0x378 and you can use the optional @@ -579,9 +611,9 @@ .BR "http://rayer.ic.cz/elektro/spipgm.htm " . The schematic of the Xilinx DLC 5 was published at .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " . -.TP +.SS .BR "ogp_spi " programmer -The flash ROM chip to access must be specified with the +The flash ROM chip to access must be specified with the .B rom parameter. .sp @@ -665,25 +697,37 @@ .B "/etc/rc.securelevel" and rebooting, or rebooting into single user mode. .SH BUGS -Please report any bugs at -.sp -.B " http://www.flashrom.org/trac/flashrom/newticket" -.sp -or on the flashrom mailing list at +Please report any bugs to the flashrom mailing list at .B "<flashrom(a)flashrom.org>" .sp We recommend to subscribe first at .sp .B " http://www.flashrom.org/mailman/listinfo/flashrom" .sp -Using flashrom on laptops is dangerous and may easily make your hardware -unusable unless you can desolder the flash chip and have a full flash chip -backup. This is caused by the embedded controller (EC) present in many laptops, -which interacts badly with any flash attempts. This is a hardware limitation -and flashrom will attempt to detect it and abort immediately for safety reasons. -.sp -More information about flashrom on laptops is available from +Many of the developers communicate via the +.B "#flashrom" +IRC channel on +.BR chat.freenode.net . +You are welcome to join and ask questions, send us bug and success reports there +too. Please provide a way to contact you later (e.g. a mail address) and be +patient if there is no immediate reaction. Also, we provide a pastebin service +at +.B http://paste.flashrom.org +that is very useful when you want to share logs etc. without spamming the +channel. +.SS +.B Laptops .sp +Using flashrom on laptops is dangerous and may easily make your hardware +unusable. flashrom will attempt to detect if it is running on a laptop and abort +immediately for safety reasons. Please see the detailed discussion of this topic +and associated flashrom options in the +.B Laptops +paragraph in the +.B internal programmer +subsection of the +.B PROGRAMMER SPECIFIC INFO +section. .B " http://www.flashrom.org/Laptops" .SS One-time programmable (OTP) memory and unique IDs @@ -697,7 +741,6 @@ .sp Similar to OTP memories are unique, factory programmed, unforgeable IDs. They are not modifiable by the user at all. -.RE .SH LICENSE .B flashrom is covered by the GNU General Public License (GPL), version 2. Some files are

1 0

[PATCH] Manpage improvements.
by Stefan Tauner 16 Feb '12

16 Feb '12

The sections describing the various options of the internal and dummy programmers have grown out of proportions. This patch adds some headlines to devide the unrelated topics a bit (with .TP commands). The previous indented paragraphs for the various programmers were transformed to subsections (.SS). Also, rephrase the documention related to laptops completely to make it less redundant and more informative. Document the laptop=this_is_not_a_laptop internal programmer parameter Change the contact info in the bugs section by removing the trac reference and adding IRC (and the pastebin) instead. Remove some superfluous white space. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashrom.8 | 111 +++++++++++++++++++++++++++++++++++++++++------------------ 1 files changed, 77 insertions(+), 34 deletions(-) diff --git a/flashrom.8 b/flashrom.8 index 76aacba..782f30b 100644 --- a/flashrom.8 +++ b/flashrom.8 @@ -1,4 +1,4 @@ -.TH FLASHROM 8 "Jul 25, 2011" +.TH FLASHROM 8 "Feb 15, 2012" .SH NAME flashrom \- detect, read, write, verify and erase flash chips .SH SYNOPSIS @@ -223,8 +223,11 @@ parameters. These parameters are separated from the programmer name by a colon. While some programmers take arguments at fixed positions, other programmers use a key/value interface in which the key and value is separated by an equal sign and different pairs are separated by a comma or a colon. -.TP +.SS .BR "internal " programmer +.TP +.B Board Enables +.sp Some mainboards require to run mainboard specific code to enable flash erase and write support (and probe support on old systems with parallel flash). The mainboard brand and model (if it requires specific code) is usually @@ -275,17 +278,22 @@ has been written because it is known that writing/erasing without the board enable is going to fail. In any case (success or failure), please report to the flashrom mailing list, see below. .sp +.TP +.B Coreboot +.sp On systems running coreboot, flashrom checks whether the desired image matches your mainboard. This needs some special board ID to be present in the image. If flashrom detects that the image you want to write and the current board do not match, it will refuse to write the image unless you specify .sp .B " flashrom \-p internal:boardmismatch=force" +.TP +.B ITE IT87 Super I/O .sp If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus translation, flashrom should autodetect that configuration. If you want to set the I/O base port of the IT87 series SPI controller manually instead of -using the value provided by the BIOS, use the +using the value provided by the BIOS, use the .sp .B " flashrom \-p internal:it87spiport=portnum" .sp @@ -295,6 +303,9 @@ is the I/O port number (must be a multiple of 8). In the unlikely case flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug report so we can diagnose the problem. .sp +.TP +.B Intel chipsets +.sp If you have an Intel chipset with an ICH8 or later southbridge with SPI flash attached, and if a valid descriptor was written to it (e.g. by the vendor), the chipset provides an alternative way to access the flash chip(s) named @@ -346,6 +357,8 @@ settings. The default value for ICH7 is given in the example below. .sp Example: .B "flashrom \-p internal:fwh_idsel=0x001122334567" +.TP +.B Laptops .sp Using flashrom on laptops is dangerous and may easily make your hardware unusable (see also the @@ -353,21 +366,31 @@ unusable (see also the section). The embedded controller (EC) in these machines often interacts badly with flashing. .B http://www.flashrom.org/Laptops -has more information. If flash is shared with the EC, erase is guaranteed to -brick your laptop and write is very likely to brick your laptop. -Chip read and probe may irritate your EC and cause fan failure, backlight -failure, sudden poweroff, and other nasty effects. -flashrom will attempt to detect laptops and abort immediately for safety -reasons. -If you want to proceed anyway at your own risk, use +has more information. For example the EC firmware sometimes resides on the same +flash chip as the host firmware. While flashrom tries to change the contents of +that memory the EC might need to fetch new instructions or data from it and +could stop working correctly. Probing for and reading from the chip may also +irritate your EC and cause fan failure, backlight failure, sudden poweroff, and +other nasty effects. flashrom will attempt to detect if it is running on a +laptop and abort immediately for safety reasons if it clearly identifies the +host computer as one. If you want to proceed anyway at your own risk, use .sp .B " flashrom \-p internal:laptop=force_I_want_a_brick" .sp -You have been warned. -.sp We will not help you if you force flashing on a laptop because this is a really dumb idea. -.TP +.sp +You have been warned. +.sp +Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect +laptops. Some vendors did not implement those bits correctly or set them to +generic and/or dummy values. flashrom will then issue a warning and bail out +like above. In this case you can use +.sp +.B " flashrom \-p internal:laptop=this_is_not_a_laptop" +.sp +to tell flashrom (at your own risk) that it does not running on a laptop. +.SS .BR "dummy " programmer The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various aspects of flashrom and is mainly used in @@ -409,6 +432,8 @@ vendor): .sp Example: .B "flashrom -p dummy:emulate=SST25VF040.REMS" +.TP +.B Persistent images .sp If you use flash chip emulation, flash image persistence is available as well by using the @@ -422,6 +447,8 @@ where the chip contents on flashrom shutdown are written to. .sp Example: .B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin" +.TP +.B SPI write chunk size .sp If you use SPI flash chip emulation for a chip which supports SPI page write with the default opcode, you can set the maximum allowed write chunk size with @@ -436,6 +463,8 @@ is the number of bytes (min. 1, max. 256). Example: .sp .B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5" +.TP +.B SPI blacklist .sp To simulate a programmer which refuses to send certain SPI commands to the flash chip, you can specify a blacklist of SPI commands with the @@ -448,6 +477,9 @@ controller refuses to run command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom will detect an error during command execution. .sp +.TP +.B SPI ignorelist +.sp To simulate a flash chip which ignores (doesn't support) certain SPI commands, you can specify an ignorelist of SPI commands with the .sp @@ -458,7 +490,7 @@ SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom won't detect an error during command execution. -.TP +.SS .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\ " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\ " , " satamv" ", and " atahpt " programmers @@ -480,7 +512,7 @@ is the PCI function number of the desired device. .sp Example: .B "flashrom \-p nic3com:pci=05:04.0" -.TP +.SS .BR "ft2232_spi " programmer An optional parameter specifies the controller type and interface/port it should support. For that you have to use the @@ -501,7 +533,7 @@ The default model is .B 4232H and the default interface is .BR B . -.TP +.SS .BR "serprog " programmer A mandatory parameter specifies either a serial device/baud combination or an IP/port combination for communication with the @@ -517,7 +549,7 @@ syntax and for IP, you have to use instead. More information about serprog is available in .B serprog-protocol.txt in the source distribution. -.TP +.SS .BR "buspirate_spi " programmer A required .B dev @@ -533,7 +565,7 @@ where can be .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M (in Hz). The default is the maximum frequency of 8 MHz. -.TP +.SS .BR "dediprog " programmer An optional .B voltage @@ -549,7 +581,7 @@ where can be .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V or the equivalent in mV. -.TP +.SS .BR "rayer_spi " programmer The default I/O base address used for the parallel port is 0x378 and you can use the optional @@ -579,9 +611,9 @@ More information about the RayeR hardware is available at .BR "http://rayer.ic.cz/elektro/spipgm.htm " . The schematic of the Xilinx DLC 5 was published at .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " . -.TP +.SS .BR "ogp_spi " programmer -The flash ROM chip to access must be specified with the +The flash ROM chip to access must be specified with the .B rom parameter. .sp @@ -665,25 +697,37 @@ in .B "/etc/rc.securelevel" and rebooting, or rebooting into single user mode. .SH BUGS -Please report any bugs at -.sp -.B " http://www.flashrom.org/trac/flashrom/newticket" -.sp -or on the flashrom mailing list at +Please report any bugs to the flashrom mailing list at .B "<flashrom(a)flashrom.org>" .sp We recommend to subscribe first at .sp .B " http://www.flashrom.org/mailman/listinfo/flashrom" .sp -Using flashrom on laptops is dangerous and may easily make your hardware -unusable unless you can desolder the flash chip and have a full flash chip -backup. This is caused by the embedded controller (EC) present in many laptops, -which interacts badly with any flash attempts. This is a hardware limitation -and flashrom will attempt to detect it and abort immediately for safety reasons. -.sp -More information about flashrom on laptops is available from +Many of the developers communicate via the +.B "#flashrom" +IRC channel on +.BR chat.freenode.net . +You are welcome to join and ask questions, send us bug and success reports there +too. Please provide a way to contact you later (e.g. a mail address) and be +patient if there is no immediate reaction. Also, we provide a pastebin service +at +.B http://paste.flashrom.org +that is very useful when you want to share logs etc. without spamming the +channel. +.SS +.B Laptops .sp +Using flashrom on laptops is dangerous and may easily make your hardware +unusable. flashrom will attempt to detect if it is running on a laptop and abort +immediately for safety reasons. Please see the detailed discussion of this topic +and associated flashrom options in the +.B Laptops +paragraph in the +.B internal programmer +subsection of the +.B PROGRAMMER SPECIFIC INFO +section. .B " http://www.flashrom.org/Laptops" .SS One-time programmable (OTP) memory and unique IDs @@ -697,7 +741,6 @@ printed when they are detected. .sp Similar to OTP memories are unique, factory programmed, unforgeable IDs. They are not modifiable by the user at all. -.RE .SH LICENSE .B flashrom is covered by the GNU General Public License (GPL), version 2. Some files are -- 1.7.1

1 0

[commit] r1496 - trunk
by repository service 16 Feb '12

16 Feb '12

Author: hailfinger Date: Thu Feb 16 21:31:25 2012 New Revision: 1496 URL: http://flashrom.org/trac/flashrom/changeset/1496 Log: Reenable forced read Forced read functionality was disabled when programmer registration was merged in r1475. We now support registering more than one controller at once for each bus type. This can happen e.g. if one SPI controller has an attached flash chip and one controller doesn't. In such a case we rely on the probe mechanism to find exactly one chip, and the probe mechanism will remember which controller/bus the flash chip is attached to. A forced read does not have the luxury of knowing which compatible controller to use, so this case is handled by always picking the first one. That may or may not be the correct one, but there is no way (yet) to specify which controller a flash chip is attached to. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/cli_classic.c Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Thu Feb 16 02:43:06 2012 (r1495) +++ trunk/cli_classic.c Thu Feb 16 21:31:25 2012 (r1496) @@ -168,7 +168,7 @@ struct flashctx *fill_flash; const char *name; int namelen, opt, i, j; - int startchip = 0, chipcount = 0, option_index = 0, force = 0; + int startchip = -1, chipcount = 0, option_index = 0, force = 0; #if CONFIG_PRINT_WIKI == 1 int list_supported_wiki = 0; #endif @@ -456,11 +456,27 @@ printf("Note: flashrom can never write if the flash " "chip isn't found automatically.\n"); } -#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered? if (force && read_it && chip_to_probe) { + struct registered_programmer *pgm; + int compatible_programmers = 0; printf("Force read (-f -r -c) requested, pretending " "the chip is there:\n"); - startchip = probe_flash(0, &flashes[0], 1); + /* This loop just counts compatible controllers. */ + for (j = 0; j < registered_programmer_count; j++) { + pgm = &registered_programmers[j]; + if (pgm->buses_supported & flashes[0].bustype) + compatible_programmers++; + } + if (compatible_programmers > 1) + printf("More than one compatible controller " + "found for the requested flash chip, " + "using the first one.\n"); + for (j = 0; j < registered_programmer_count; j++) { + pgm = &registered_programmers[j]; + startchip = probe_flash(pgm, 0, &flashes[0], 1); + if (startchip != -1) + break; + } if (startchip == -1) { printf("Probing for flash chip '%s' failed.\n", chip_to_probe); @@ -471,7 +487,6 @@ "contain garbage.\n"); return read_flash_to_file(&flashes[0], filename); } -#endif ret = 1; goto out_shutdown; } else if (!chip_to_probe) {

1 0

Re: [flashrom] ASUS M3N78-VM: flashrom -V
by Stefan Tauner 16 Feb '12

16 Feb '12

Hello Matthew, thanks for your report! That mainboard was already reported: http://www.flashrom.org/pipermail/flashrom/2011-May/006496.html -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

ASUS M3N78-VM: flashrom -V
by Matthew Nubbe 15 Feb '12

15 Feb '12

flashrom v0.9.4-r1395 on Linux 3.1.9-2-ARCH (x86_64), built with libpci 3.1.8, GCC 4.6.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 741M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 989 us, 10000 myus = 9909 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "M3N78-VM" DMI string baseboard-version: "Rev X.0x" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8712 on port 0x2e Found chipset "NVIDIA MCP78S" with PCI ID 10de:075c. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:0752 at 00:01:1 MCP SPI BAR is at 0xfbf80000 Mapping NVIDIA MCP6x SPI at 0xfbf80000, unaligned size 0x544. SPI control is 0xc01a, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Super I/O ID 0x8712 is not on the list of flash capable controllers. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x13 Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:EW, 0x001000-0x001fff:EW, 0x002000-0x002fff:EW, 0x003000-0x003fff:EW, 0x004000-0x004fff:EW, 0x005000-0x005fff:EW, 0x006000-0x006fff:EW, 0x007000-0x007fff:EW, 0x008000-0x008fff:EW, 0x009000-0x009fff:EW, 0x00a000-0x00afff:EW, 0x00b000-0x00bfff:EW, 0x00c000-0x00cfff:EW, 0x00d000-0x00dfff:EW, 0x00e000-0x00efff:EW, 0x00f000-0x00ffff:EW, 0x010000-0x010fff:EW, 0x011000-0x011fff:EW, 0x012000-0x012fff:EW, 0x013000-0x013fff:EW, 0x014000-0x014fff:EW, 0x015000-0x015fff:EW, 0x016000-0x016fff:EW, 0x017000-0x017fff:EW, 0x018000-0x018fff:EW, 0x019000-0x019fff:EW, 0x01a000-0x01afff:EW, 0x01b000-0x01bfff:EW, 0x01c000-0x01cfff:EW, 0x01d000-0x01dfff:EW, 0x01e000-0x01efff:EW, 0x01f000-0x01ffff:EW, 0x020000-0x020fff:EW, 0x021000-0x021fff:EW, 0x022000-0x022fff:EW, 0x023000-0x023fff:EW, 0x024000-0x024fff:EW, 0x025000-0x025fff:EW, 0x026000-0x026fff:EW, 0x027000-0x027fff:EW, 0x028000-0x028fff:EW, 0x029000-0x029fff:EW, 0x02a000-0x02afff:EW, 0x02b000-0x02bfff:EW, 0x02c000-0x02cfff:EW, 0x02d000-0x02dfff:EW, 0x02e000-0x02efff:EW, 0x02f000-0x02ffff:EW, 0x030000-0x030fff:EW, 0x031000-0x031fff:EW, 0x032000-0x032fff:EW, 0x033000-0x033fff:EW, 0x034000-0x034fff:EW, 0x035000-0x035fff:EW, 0x036000-0x036fff:EW, 0x037000-0x037fff:EW, 0x038000-0x038fff:EW, 0x039000-0x039fff:EW, 0x03a000-0x03afff:EW, 0x03b000-0x03bfff:EW, 0x03c000-0x03cfff:EW, 0x03d000-0x03dfff:EW, 0x03e000-0x03efff:EW, 0x03f000-0x03ffff:EW, 0x040000-0x040fff:EW, 0x041000-0x041fff:EW, 0x042000-0x042fff:EW, 0x043000-0x043fff:EW, 0x044000-0x044fff:EW, 0x045000-0x045fff:EW, 0x046000-0x046fff:EW, 0x047000-0x047fff:EW, 0x048000-0x048fff:EW, 0x049000-0x049fff:EW, 0x04a000-0x04afff:EW, 0x04b000-0x04bfff:EW, 0x04c000-0x04cfff:EW, 0x04d000-0x04dfff:EW, 0x04e000-0x04efff:EW, 0x04f000-0x04ffff:EW, 0x050000-0x050fff:EW, 0x051000-0x051fff:EW, 0x052000-0x052fff:EW, 0x053000-0x053fff:EW, 0x054000-0x054fff:EW, 0x055000-0x055fff:EW, 0x056000-0x056fff:EW, 0x057000-0x057fff:EW, 0x058000-0x058fff:EW, 0x059000-0x059fff:EW, 0x05a000-0x05afff:EW, 0x05b000-0x05bfff:EW, 0x05c000-0x05cfff:EW, 0x05d000-0x05dfff:EW, 0x05e000-0x05efff:EW, 0x05f000-0x05ffff:EW, 0x060000-0x060fff:EW, 0x061000-0x061fff:EW, 0x062000-0x062fff:W, 0x063000-0x063fff:W, 0x064000-0x064fff:W, 0x065000-0x065fff:W, 0x066000-0x066fff:W, 0x067000-0x067fff:W, 0x068000-0x068fff:S, 0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S, 0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S, 0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S, 0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S, 0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S, 0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S, 0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S, 0x07e000-0x07efff:S, 0x07f000-0x07ffff:S, 0x080000-0x080fff:S, 0x081000-0x081fff:S, 0x082000-0x082fff:S, 0x083000-0x083fff:S, 0x084000-0x084fff:S, 0x085000-0x085fff:S, 0x086000-0x086fff:S, 0x087000-0x087fff:S, 0x088000-0x088fff:S, 0x089000-0x089fff:S, 0x08a000-0x08afff:S, 0x08b000-0x08bfff:S, 0x08c000-0x08cfff:S, 0x08d000-0x08dfff:S, 0x08e000-0x08efff:S, 0x08f000-0x08ffff:EW, 0x090000-0x090fff:EW, 0x091000-0x091fff:EW, 0x092000-0x092fff:EW, 0x093000-0x093fff:EW, 0x094000-0x094fff:EW, 0x095000-0x095fff:EW, 0x096000-0x096fff:EW, 0x097000-0x097fff:EW, 0x098000-0x098fff:EW, 0x099000-0x099fff:EW, 0x09a000-0x09afff:EW, 0x09b000-0x09bfff:EW, 0x09c000-0x09cfff:EW, 0x09d000-0x09dfff:EW, 0x09e000-0x09efff:EW, 0x09f000-0x09ffff:EW, 0x0a0000-0x0a0fff:EW, 0x0a1000-0x0a1fff:EW, 0x0a2000-0x0a2fff:EW, 0x0a3000-0x0a3fff:EW, 0x0a4000-0x0a4fff:EW, 0x0a5000-0x0a5fff:EW, 0x0a6000-0x0a6fff:EW, 0x0a7000-0x0a7fff:EW, 0x0a8000-0x0a8fff:EW, 0x0a9000-0x0a9fff:EW, 0x0aa000-0x0aafff:EW, 0x0ab000-0x0abfff:EW, 0x0ac000-0x0acfff:EW, 0x0ad000-0x0adfff:EW, 0x0ae000-0x0aefff:EW, 0x0af000-0x0affff:EW, 0x0b0000-0x0b0fff:EW, 0x0b1000-0x0b1fff:EW, 0x0b2000-0x0b2fff:EW, 0x0b3000-0x0b3fff:EW, 0x0b4000-0x0b4fff:EW, 0x0b5000-0x0b5fff:EW, 0x0b6000-0x0b6fff:EW, 0x0b7000-0x0b7fff:EW, 0x0b8000-0x0b8fff:EW, 0x0b9000-0x0b9fff:EW, 0x0ba000-0x0bafff:EW, 0x0bb000-0x0bbfff:EW, 0x0bc000-0x0bcfff:EW, 0x0bd000-0x0bdfff:EW, 0x0be000-0x0befff:EW, 0x0bf000-0x0bffff:EW, 0x0c0000-0x0c0fff:EW, 0x0c1000-0x0c1fff:EW, 0x0c2000-0x0c2fff:EW, 0x0c3000-0x0c3fff:EW, 0x0c4000-0x0c4fff:EW, 0x0c5000-0x0c5fff:EW, 0x0c6000-0x0c6fff:EW, 0x0c7000-0x0c7fff:EW, 0x0c8000-0x0c8fff:EW, 0x0c9000-0x0c9fff:EW, 0x0ca000-0x0cafff:EW, 0x0cb000-0x0cbfff:EW, 0x0cc000-0x0ccfff:EW, 0x0cd000-0x0cdfff:EW, 0x0ce000-0x0cefff:EW, 0x0cf000-0x0cffff:EW, 0x0d0000-0x0d0fff:EW, 0x0d1000-0x0d1fff:EW, 0x0d2000-0x0d2fff:EW, 0x0d3000-0x0d3fff:EW, 0x0d4000-0x0d4fff:EW, 0x0d5000-0x0d5fff:EW, 0x0d6000-0x0d6fff:EW, 0x0d7000-0x0d7fff:EW, 0x0d8000-0x0d8fff:EW, 0x0d9000-0x0d9fff:EW, 0x0da000-0x0dafff:EW, 0x0db000-0x0dbfff:EW, 0x0dc000-0x0dcfff:E, 0x0dd000-0x0ddfff:E, 0x0de000-0x0defff:E, 0x0df000-0x0dffff:S, 0x0e0000-0x0e0fff:S, 0x0e1000-0x0e1fff:S, 0x0e2000-0x0e2fff:S, 0x0e3000-0x0e3fff:S, 0x0e4000-0x0e4fff:S, 0x0e5000-0x0e5fff:S, 0x0e6000-0x0e6fff:S, 0x0e7000-0x0e7fff:S, 0x0e8000-0x0e8fff:S, 0x0e9000-0x0e9fff:S, 0x0ea000-0x0eafff:S, 0x0eb000-0x0ebfff:S, 0x0ec000-0x0ecfff:S, 0x0ed000-0x0edfff:S, 0x0ee000-0x0eefff:S, 0x0ef000-0x0effff:S, 0x0f0000-0x0f0fff:EW, 0x0f1000-0x0f1fff:EW, 0x0f2000-0x0f2fff:EW, 0x0f3000-0x0f3fff:EW, 0x0f4000-0x0f4fff:EW, 0x0f5000-0x0f5fff:EW, 0x0f6000-0x0f6fff:EW, 0x0f7000-0x0f7fff:EW, 0x0f8000-0x0f8fff:EW, 0x0f9000-0x0f9fff:EW, 0x0fa000-0x0fafff:EW, 0x0fb000-0x0fbfff:EW, 0x0fc000-0x0fcfff:EW, 0x0fd000-0x0fdfff:EW, 0x0fe000-0x0fefff:EW, 0x0ff000-0x0fffff:EW Erase/write done. Verifying flash... VERIFIED.

1 0

Re: [flashrom] [PATCH] Workaround missing %hhx support in MinGW sscanf
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Am 16.02.2012 02:30 schrieb Idwer Vollering: > 2012/2/16 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>: >> > MinGW uses standard Windows C libraries and those apparently don't >> > support %hhx for sscanf into a uint8_t. SCNx8 isn't available either. >> > >> > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> > Acked-by: Idwer Vollering <vidwer(a)gmail.com> Thanks, committed in r1495. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

[commit] r1495 - trunk
by repository service 15 Feb '12

15 Feb '12

Author: hailfinger Date: Thu Feb 16 02:43:06 2012 New Revision: 1495 URL: http://flashrom.org/trac/flashrom/changeset/1495 Log: Workaround missing %hhx support in MinGW sscanf MinGW uses standard Windows C libraries and those apparently don't support %hhx for sscanf into a uint8_t. SCNx8 isn't available either. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/dummyflasher.c Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Thu Feb 16 02:13:00 2012 (r1494) +++ trunk/dummyflasher.c Thu Feb 16 02:43:06 2012 (r1495) @@ -199,7 +199,12 @@ } } for (i = 0; i < spi_blacklist_size; i++) { - sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]); + unsigned int tmp2; + /* SCNx8 is apparently not supported by MSVC (and thus + * MinGW), so work around it with an extra variable + */ + sscanf(tmp + i * 2, "%2x", &tmp2); + spi_blacklist[i] = (uint8_t)tmp2; } msg_pdbg("SPI blacklist is "); for (i = 0; i < spi_blacklist_size; i++) @@ -230,7 +235,12 @@ } } for (i = 0; i < spi_ignorelist_size; i++) { - sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]); + unsigned int tmp2; + /* SCNx8 is apparently not supported by MSVC (and thus + * MinGW), so work around it with an extra variable + */ + sscanf(tmp + i * 2, "%2x", &tmp2); + spi_ignorelist[i] = (uint8_t)tmp2; } msg_pdbg("SPI ignorelist is "); for (i = 0; i < spi_ignorelist_size; i++)

1 0

[PATCH] Workaround missing %hhx support in MinGW sscanf
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

MinGW uses standard Windows C libraries and those apparently don't support %hhx for sscanf into a uint8_t. SCNx8 isn't available either. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c =================================================================== --- flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c (Revision 1492) +++ flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c (Arbeitskopie) @@ -199,7 +199,12 @@ } } for (i = 0; i < spi_blacklist_size; i++) { - sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]); + unsigned int tmp2; + /* SCNx8 is apparently not supported by MSVC (and thus + * MinGW), so work around it with an extra variable + */ + sscanf(tmp + i * 2, "%2x", &tmp2); + spi_blacklist[i] = (uint8_t)tmp2; } msg_pdbg("SPI blacklist is "); for (i = 0; i < spi_blacklist_size; i++) @@ -230,7 +235,12 @@ } } for (i = 0; i < spi_ignorelist_size; i++) { - sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]); + unsigned int tmp2; + /* SCNx8 is apparently not supported by MSVC (and thus + * MinGW), so work around it with an extra variable + */ + sscanf(tmp + i * 2, "%2x", &tmp2); + spi_ignorelist[i] = (uint8_t)tmp2; } msg_pdbg("SPI ignorelist is "); for (i = 0; i < spi_ignorelist_size; i++) -- http://www.hailfinger.org/

2 1

Re: [flashrom] [PATCH] ichspi.c: warn user and disable writes when a protected address range is detected.
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Am 16.02.2012 00:58 schrieb Stefan Tauner: > This includes not only the notorious read-only flash descriptors and locked ME > regions, but also the more rarely used PRs (Protected Ranges). > The user can enforce write support by specifying ich_spi_force=yes in the > programmer options, but we don't tell him the exact syntax interactively. He > has to read it up in the man page. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> The Intel rant seems to be missing... I thought you only wanted to move it. > diff --git a/flashrom.8 b/flashrom.8 > index e5f9a29..76aacba 100644 > --- a/flashrom.8 > +++ b/flashrom.8 > @@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash > chip is attached). The other options (swseq, hwseq) select the respective mode > (if possible). > .sp > +ICH8 and later southbridges may also have locked address ranges of different > +kinds if a valid descriptor was written to it. The flash address space is then > +partitioned in multiple so called "Flash Regions" containing the host firmware, > +the ME firmware and so on respectively. The flash descriptor can also specify up > +to 5 so called "Protected Regions", which are freely chosen address ranges > +independent from the aforementioned "Flash Regions". All of them can be write > +and/or read protected individually. If flashrom detects such a lock it will > +disable write support unless the user forces it with the > +.sp > +.B " flashrom \-p internal:ich_spi_force=yes" > +.sp > +syntax. If this leads to erase or write accesses to the flash it would most > +probably bring it into an inconsistent and unbootable state and we will not > +provide any support in such a case. > +.sp > If you have an Intel chipset with an ICH6 or later southbridge and if you want > to set specific IDSEL values for a non-default flash chip or an embedded > controller (EC), you can use the > diff --git a/ichspi.c b/ichspi.c > index 163ecf1..711f46c 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -1444,11 +1445,16 @@ static void do_ich9_spi_frap(uint32_t frap, int i) > if (base > limit) { > /* this FREG is disabled */ > msg_pdbg("%s region is unused.\n", region_names[i]); > - return; > + return 0; > } > > - msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff), > + msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff), > access_names[rwperms]); > + if (rwperms == 0x3) > + return 0; > + > + msg_pinfo("WARNING: %s region is not fully accessible.\n", region_names[i]); Odd. For FRAP, the _pinfo message just says "not fully accessible", but for PR, the _pinfo message mentions the actual read/write protection. Not terribly important to fix, just a small inconsistency I noticed. > + return 1; > } > > /* In contrast to FRAP and the master section of the descriptor the bits > @@ -1460,21 +1466,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i) > #define ICH_PR_PERMS(pr) (((~((pr) >> PR_RP_OFF) & 1) << 0) | \ > ((~((pr) >> PR_WP_OFF) & 1) << 1)) > > -static void prettyprint_ich9_reg_pr(int i) > +/* returns 0 if range is unused (i.e. r/w) */ > +static int ich9_handle_pr(int i) > { > - static const char *const access_names[4] = { > - "locked", "read-only", "write-only", "read-write" > + static const char *const access_names[3] = { > + "locked", "read-only", "write-only" > }; > uint8_t off = ICH9_REG_PR0 + (i * 4); > uint32_t pr = mmio_readl(ich_spibar + off); > - int rwperms = ICH_PR_PERMS(pr); > + unsigned int rwperms = ICH_PR_PERMS(pr); > > - msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i); > - if (rwperms != 0x3) > - msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr), > - ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); > - else > - msg_pdbg2(", unused)\n"); > + if (rwperms == 0x3) { > + msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i); > + return 0; > + } > + > + msg_pdbg("0x%02X: 0x%08x ", off, pr); > + msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), > + ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); > + return 1; > } > > /* Set/Clear the read and write protection enable bits of PR register @i > @@ -1537,6 +1547,8 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > uint16_t spibar_offset, tmp2; > uint32_t tmp; > char *arg; > + int ich_spi_force = 0; > + int ich_spi_has_locks = 0; Rename to ich_spi_has_region_locks or ich_spi_has_locked_regions or somesuch. Otherwise there is possibility for confusion between ich_spi_has_locks and ichspi_lock. > int desc_valid = 0; > struct ich_descriptors desc = {{ 0 }}; > enum ich_spi_mode { > @@ -1665,17 +1693,36 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp)); > msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp)); > > - /* Decode and print FREGx and FRAP registers */ > + /* Handle FREGx and FRAP registers */ > for (i = 0; i < 5; i++) > - do_ich9_spi_frap(tmp, i); > + ich_spi_has_locks |= ich9_handle_frap(tmp, i); > } > > - /* try to disable PR locks before printing them */ > - if (!ichspi_lock) > - for (i = 0; i < 5; i++) > + for (i = 0; i < 5; i++) { > + /* if not locked down try to disable PR locks first */ > + if (!ichspi_lock) > ich9_set_pr(i, 0, 0); > - for (i = 0; i < 5; i++) > - prettyprint_ich9_reg_pr(i); > + ich_spi_has_locks |= ich9_handle_pr(i); > + } > + > + if (ich_spi_has_locks) { > Thanks for working tirelessly to get this code into an excellent shape! Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1494 - trunk
by repository service 15 Feb '12

15 Feb '12

Author: stefanct Date: Thu Feb 16 02:13:00 2012 New Revision: 1494 URL: http://flashrom.org/trac/flashrom/changeset/1494 Log: ichspi.c: warn user and disable writes when a protected address range is detected. This includes not only the notorious read-only flash descriptors and locked ME regions, but also the more rarely used PRs (Protected Ranges). The user can enforce write support by specifying ich_spi_force=yes in the programmer options, but we don't tell him the exact syntax interactively. He has to read it up in the man page. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashrom.8 trunk/ichspi.c Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Feb 16 00:40:23 2012 (r1493) +++ trunk/flashrom.8 Thu Feb 16 02:13:00 2012 (r1494) @@ -315,6 +315,21 @@ chip is attached). The other options (swseq, hwseq) select the respective mode (if possible). .sp +ICH8 and later southbridges may also have locked address ranges of different +kinds if a valid descriptor was written to it. The flash address space is then +partitioned in multiple so called "Flash Regions" containing the host firmware, +the ME firmware and so on respectively. The flash descriptor can also specify up +to 5 so called "Protected Regions", which are freely chosen address ranges +independent from the aforementioned "Flash Regions". All of them can be write +and/or read protected individually. If flashrom detects such a lock it will +disable write support unless the user forces it with the +.sp +.B " flashrom \-p internal:ich_spi_force=yes" +.sp +syntax. If this leads to erase or write accesses to the flash it would most +probably bring it into an inconsistent and unbootable state and we will not +provide any support in such a case. +.sp If you have an Intel chipset with an ICH6 or later southbridge and if you want to set specific IDSEL values for a non-default flash chip or an embedded controller (EC), you can use the Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Thu Feb 16 00:40:23 2012 (r1493) +++ trunk/ichspi.c Thu Feb 16 02:13:00 2012 (r1494) @@ -1421,7 +1421,8 @@ #define ICH_BRWA(x) ((x >> 8) & 0xff) #define ICH_BRRA(x) ((x >> 0) & 0xff) -static void do_ich9_spi_frap(uint32_t frap, int i) +/* returns 0 if region is unused or r/w */ +static int ich9_handle_frap(uint32_t frap, int i) { static const char *const access_names[4] = { "locked", "read-only", "write-only", "read-write" @@ -1436,19 +1437,26 @@ int offset = ICH9_REG_FREG0 + i * 4; uint32_t freg = mmio_readl(ich_spibar + offset); - msg_pdbg("0x%02X: 0x%08x (FREG%i: %s)\n", - offset, freg, i, region_names[i]); - base = ICH_FREG_BASE(freg); limit = ICH_FREG_LIMIT(freg); if (base > limit) { /* this FREG is disabled */ - msg_pdbg("%s region is unused.\n", region_names[i]); - return; + msg_pdbg2("0x%02X: 0x%08x FREG%i: %s region is unused.\n", + offset, freg, i, region_names[i]); + return 0; + } + msg_pdbg("0x%02X: 0x%08x ", offset, freg); + if (rwperms == 0x3) { + msg_pdbg("FREG%i: %s region (0x%08x-0x%08x) is %s.\n", i, + region_names[i], base, (limit | 0x0fff), + access_names[rwperms]); + return 0; } - msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff), - access_names[rwperms]); + msg_pinfo("FREG%i: WARNING: %s region (0x%08x-0x%08x) is %s.\n", i, + region_names[i], base, (limit | 0x0fff), + access_names[rwperms]); + return 1; } /* In contrast to FRAP and the master section of the descriptor the bits @@ -1460,21 +1468,25 @@ #define ICH_PR_PERMS(pr) (((~((pr) >> PR_RP_OFF) & 1) << 0) | \ ((~((pr) >> PR_WP_OFF) & 1) << 1)) -static void prettyprint_ich9_reg_pr(int i) +/* returns 0 if range is unused (i.e. r/w) */ +static int ich9_handle_pr(int i) { - static const char *const access_names[4] = { - "locked", "read-only", "write-only", "read-write" + static const char *const access_names[3] = { + "locked", "read-only", "write-only" }; uint8_t off = ICH9_REG_PR0 + (i * 4); uint32_t pr = mmio_readl(ich_spibar + off); - int rwperms = ICH_PR_PERMS(pr); + unsigned int rwperms = ICH_PR_PERMS(pr); - msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i); - if (rwperms != 0x3) - msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr), - ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); - else - msg_pdbg2(", unused)\n"); + if (rwperms == 0x3) { + msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i); + return 0; + } + + msg_pdbg("0x%02X: 0x%08x ", off, pr); + msg_pinfo("PR%u: WARNING: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), + ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); + return 1; } /* Set/Clear the read and write protection enable bits of PR register @i @@ -1537,6 +1549,8 @@ uint16_t spibar_offset, tmp2; uint32_t tmp; char *arg; + int ich_spi_force = 0; + int ich_spi_rw_restricted = 0; int desc_valid = 0; struct ich_descriptors desc = {{ 0 }}; enum ich_spi_mode { @@ -1631,6 +1645,22 @@ } free(arg); + arg = extract_programmer_param("ich_spi_force"); + if (arg && !strcmp(arg, "yes")) { + ich_spi_force = 1; + msg_pspew("ich_spi_force enabled.\n"); + } else if (arg && !strlen(arg)) { + msg_perr("Missing argument for ich_spi_force.\n"); + free(arg); + return ERROR_FATAL; + } else if (arg) { + msg_perr("Unknown argument for ich_spi_force: \"%s\" " + "(not \"yes\").\n", arg); + free(arg); + return ERROR_FATAL; + } + free(arg); + tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); prettyprint_ich9_reg_hsfs(tmp2); @@ -1665,17 +1695,36 @@ msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp)); msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp)); - /* Decode and print FREGx and FRAP registers */ + /* Handle FREGx and FRAP registers */ for (i = 0; i < 5; i++) - do_ich9_spi_frap(tmp, i); + ich_spi_rw_restricted |= ich9_handle_frap(tmp, i); } - /* try to disable PR locks before printing them */ - if (!ichspi_lock) - for (i = 0; i < 5; i++) + for (i = 0; i < 5; i++) { + /* if not locked down try to disable PR locks first */ + if (!ichspi_lock) ich9_set_pr(i, 0, 0); - for (i = 0; i < 5; i++) - prettyprint_ich9_reg_pr(i); + ich_spi_rw_restricted |= ich9_handle_pr(i); + } + + if (ich_spi_rw_restricted) { + msg_pinfo("Please send a verbose log to " + "flashrom(a)flashrom.org if this board is not " + "listed on\n" + "http://flashrom.org/Supported_hardware#Supported_mainboards " + "yet.\n"); + if (!ich_spi_force) + programmer_may_write = 0; + msg_pinfo("Writes have been disabled. You can enforce " + "write support with the\nich_spi_force " + "programmer option, but it will most likely " + "harm your hardware!\nIf you force flashrom " + "you will get no support if something " + "breaks.\n"); + if (ich_spi_force) + msg_pinfo("Continuing with write support " + "because the user forced us to!\n"); + } tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS); msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff);

1 0

Re: [flashrom] [PATCH] ichspi.c: warn user and disable writes when a protected address range is detected.
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Am 14.02.2012 16:39 schrieb Stefan Tauner: > This includes not only the notorious read-only flash descriptors and locked ME > regions, but also the more rarely used PRs (Protected Ranges). > The user can enforce write support by specifying ich_spi_force=yes in the Can you rename ich_spi_force to ich_ignore_locks or something similar? The PR stuff is not limited to SPI IIRC. > programmer options, but we don't tell him the exact syntax interactively. He > has to read it up in the man page. > --- > non-verbose sample output from my laptop (that contains both protection types): > […] > Found chipset "Intel QS57". Enabling flash write... WARNING: SPI Configuration Lockdown activated. > WARNING: Flash Descriptor region is not fully accessible and flashrom can > not deal with this correctly yet. > Intel does not provide us the necessary documention to support this. > Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on > http://flashrom.org/Supported_hardware#Supported_mainboards yet. > Writes have been disabled. You can enforce write support with the > ich_spi_force programmer option, but it will most likely harm your hardware! > If you force flashrom you will get no support if something breaks. > WARNING: Management Engine region is not fully accessible and flashrom can > not deal with this correctly yet. > WARNING: PR0: 0x007d0000-0x01ffffff is read-only. > OK. > […] Ugh. This is the non-verbose version? I had trouble parsing that message flood on the first attempt. May I suggest an alternative wording? WARNING: Flash Descriptor region is not fully accessible. WARNING: Management Engine region is not fully accessible. WARNING: PR0: 0x007d0000-0x01ffffff is read-only. Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled. You can force writing with the ich_ignore_locks programmer option, but it will most likely brick your mainboard. The idea of my wording is to postpone the explanatory message until all "not accessible"/"read-only" messages have been printed. The complaint about Intel belongs to the man page or to intel_mysteries.txt (if you choose the latter, just mention intel_mysteries.txt at the relevant location in the man page). For the override case, just print the message above and additionally "You have been warned. We will not support you if write/erase bricks your mainboard. Proceeding anyway because user specified ich_ignore_locks." or something similar. > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > flashrom.8 | 15 ++++++++++ > ichspi.c | 90 +++++++++++++++++++++++++++++++++++++++++++++++------------ > 2 files changed, 86 insertions(+), 19 deletions(-) > > diff --git a/flashrom.8 b/flashrom.8 > index 2f23cb8..0ca4fdb 100644 > --- a/flashrom.8 > +++ b/flashrom.8 > @@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash > chip is attached). The other options (swseq, hwseq) select the respective mode > (if possible). > .sp > +ICH8 and later southbridges may also have locked address ranges of different > +kinds if a valid descriptor was written to it. The flash address space is then > +partitioned in multiple so called "Flash Regions" containing the host firmware, > +the ME firmware and so on respectively. The flash descriptor can also specify up > +to 5 so called "Protected Regions", which are freely chosen address ranges > +independent from the aforementioned "Flash Regions". All of them can be write > +and/or read protected individually. If flashrom detects such a lock it will > +disable write support unless the user forces it with the > +.sp > +.B " flashrom \-p internal:ich_spi_force=yes" > +.sp > +syntax. If this leads to erase or write accesses to the flash it would most > +probably bring it into an inconsistent and unbootable state and we will not > +provide any support in such a case. > +.sp > If you have an Intel chipset with an ICH6 or later southbridge and if you want > to set specific IDSEL values for a non-default flash chip or an embedded > controller (EC), you can use the > diff --git a/ichspi.c b/ichspi.c > index 163ecf1..f21bb35 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -1416,12 +1416,36 @@ static int ich_spi_send_multicommand(struct flashctx *flash, > return ret; > } > > +static void ich9_disable_writes(int force, const char * const msg) > +{ > + /* Don't scare and spam the user even more if write support was already > + * disabled */ > + if (!programmer_may_write) > + return; > + > + msg_pinfo("%s", msg); > + msg_pinfo("Please send a verbose log to flashrom(a)flashrom.org if this " > + "board is not listed on\n" > + "http://flashrom.org/Supported_hardware#Supported_mainboards " > + "yet.\n"); > + if (!force) { > + programmer_may_write = 0; > + msg_pinfo("Writes have been disabled. You can enforce write " > + "support with the\nich_spi_force programmer option, " > + "but it will most likely harm your hardware!\n"); > + } > + msg_pinfo("If you force flashrom you will get no support if something " > + "breaks.\n"); > + if (force) > + msg_pinfo("Continuing anyway because the user forced us to!\n"); > +} > + > #define ICH_BMWAG(x) ((x >> 24) & 0xff) > #define ICH_BMRAG(x) ((x >> 16) & 0xff) > #define ICH_BRWA(x) ((x >> 8) & 0xff) > #define ICH_BRRA(x) ((x >> 0) & 0xff) > > -static void do_ich9_spi_frap(uint32_t frap, int i) > +static void ich9_handle_frap(uint32_t frap, int i, int force) > { > static const char *const access_names[4] = { > "locked", "read-only", "write-only", "read-write" > @@ -1447,8 +1471,15 @@ static void do_ich9_spi_frap(uint32_t frap, int i) > return; > } > > - msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff), > + msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff), > access_names[rwperms]); > + if (rwperms == 0x3) > + return; > + > + msg_pinfo("WARNING: %s region is not fully accessible and flashrom " > + "can\nnot deal with this correctly yet.\n", region_names[i]); > + ich9_disable_writes(force, "Intel does not provide us the necessary " > + "documention to support this.\n"); > } > > /* In contrast to FRAP and the master section of the descriptor the bits > @@ -1460,21 +1491,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i) > #define ICH_PR_PERMS(pr) (((~((pr) >> PR_RP_OFF) & 1) << 0) | \ > ((~((pr) >> PR_WP_OFF) & 1) << 1)) > > -static void prettyprint_ich9_reg_pr(int i) > +static void ich9_handle_pr(int i, int force) > { > - static const char *const access_names[4] = { > - "locked", "read-only", "write-only", "read-write" > + static const char *const access_names[3] = { > + "locked", "read-only", "write-only" > }; > uint8_t off = ICH9_REG_PR0 + (i * 4); > uint32_t pr = mmio_readl(ich_spibar + off); > - int rwperms = ICH_PR_PERMS(pr); > + unsigned int rwperms = ICH_PR_PERMS(pr); > > - msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i); > - if (rwperms != 0x3) > - msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr), > - ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); > - else > - msg_pdbg2(", unused)\n"); > + if (rwperms >= 0x3) { Why >= 0x3? AFAICS the ICH_PR_PERMS macro can only have values between 0x0 and 0x3. > + msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i); > + return; > + } > + > + msg_pdbg("0x%02X: 0x%08x ", off, pr); > + msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), > + ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); > + ich9_disable_writes(force, "There is no way to change this from within " > + "the system.\n"); > } > > /* Set/Clear the read and write protection enable bits of PR register @i > @@ -1537,6 +1572,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > uint16_t spibar_offset, tmp2; > uint32_t tmp; > char *arg; > + int ich_spi_force = 0; > int desc_valid = 0; > struct ich_descriptors desc = {{ 0 }}; > enum ich_spi_mode { > @@ -1631,6 +1667,22 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > } > free(arg); > > + arg = extract_programmer_param("ich_spi_force"); > + if (arg && !strcmp(arg, "yes")) { > + ich_spi_force = 1; > + msg_pspew("ich_spi_force enabled.\n"); > + } else if (arg && !strlen(arg)) { > + msg_perr("Missing argument for ich_spi_force.\n"); > + free(arg); > + return ERROR_FATAL; > + } else if (arg) { > + msg_perr("Unknown argument for ich_spi_force: \"%s\" " > + "(not \"yes\").\n", arg); > + free(arg); > + return ERROR_FATAL; > + } > + free(arg); > + > tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS); > msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); > prettyprint_ich9_reg_hsfs(tmp2); > @@ -1665,17 +1717,17 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp)); > msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp)); > > - /* Decode and print FREGx and FRAP registers */ > + /* Handle FREGx and FRAP registers */ > for (i = 0; i < 5; i++) > - do_ich9_spi_frap(tmp, i); > + ich9_handle_frap(tmp, i, ich_spi_force); > } > > - /* try to disable PR locks before printing them */ > - if (!ichspi_lock) > - for (i = 0; i < 5; i++) > + for (i = 0; i < 5; i++) { > + /* if not locked down try to disable PR locks first */ > + if (!ichspi_lock) > ich9_set_pr(i, 0, 0); > - for (i = 0; i < 5; i++) > - prettyprint_ich9_reg_pr(i); > + ich9_handle_pr(i, ich_spi_force); > + } > > tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS); > msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff); Looks good otherwise. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] Warn of one-time programmable (OTP) memory
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Hi Stefan, I have waited very long to comment on this patch, but I simply don't have a good answer for it. I do think that OTP/security memory is outside the scope of flashrom because it behaves totally different (and testing could easily kill a dozen chips during inital implementation, and a few chips each time someone wants to retest). Now if something is outside the scope of flashrom, should flashrom care at all? Some flash chips have GPI pins (GPIO without output) and those are readable with commands very similar to those used by flashrom. Should we tell the user about that feature as well? We had such requests in the past, and I was not really happy about them. Am 14.08.2011 05:36 schrieb Stefan Tauner: > Some flash chips contain OTP memory that we cannot read or write (yet). This > prohibits us from cloning them, hence warn the user if we detect it. Not all > variations of the tagged chips contain OTP memory. They are often only > enabled on request or have there own ordering numbers. There is usually no > way to distinguish them afaict. Well, it's worse than that. I've seen datasheets for flash chips with the following features: - OTP memory, fully readable, fully writable once in one block (no partial writes) - OTP memory, fully readable, fully writable once per byte (partial writes work just fine) - OTP memory, fully readable, fully writable once per 2^n-byte block - OTP memory, fully readable, only half of it writable, the other half is programmed at the factory - OTP memory, fully readable, completely pre-written at the factory (so it's rather ROM than OTP) - Hidden OTP memory which can only be read if you know the correct security ID which is part of the OTP - (The complete flash chip behaves like OTP (well, like ROM) once a specific write-once status register is set)... not relevant here And then you have the problem that multiple chip generations often share the same device ID, so probing can't differentiate between a chip with OTP and one without unless you're extremely lucky. Do we want FEATURE_OTP and FEATURE_MAYBE_OTP? Do we warn if a chip has a readonly serial number? That means the chip can't be cloned. People who care about OTP for clonability reasons probably care about other readonly contents as well. OTOH, other people who don't use the OTP at all (for them, OTP is just an accidental feature of a cheap flash chip) don't want to be bothered by yet another line of output from flashrom which has no relevancy for them. > The manpage is extended to describe the backgrounds a bit. While i touched > that section, i also reformatted it a bit and removed the reference to the trac > bug reporting facility. > > This patch is based on the idea and code of Daniel Lenski. > --- > the reason i removed the trac reference is that it is not used, i have no (working) > login and it does not really fits our work flow anyway. the only user that used it > in my active flashrom time ranted about it. would anyone miss it? To be honest, trac is something I never got along with. Even if I'm logged in there is no way for me to read the email address of the person who opened the bug, so communication is pretty difficult. I'm all for checking all old trac tickets, closing what can be closed, and moving all other tickets in some way or another to the mailing list. However, we should mention that it's OK to report bugs via IRC as well as long as the reporter mentions a way to contact hi/her (i.e. email address). Removing the trac reference and adding the IRC reference should be a separate patch, though, which is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> One comment about the man page formatting: This part of the patch may conflict with the other man page formatting patch you sent. By the way, do you know any good reference about man page formatting? I had trouble finding out what .RE and .RS do. > the new default verbosity output is: > This chip may contain one-time programmable memory (see man page for details). > > the new dbg1/-V output is: > This chip may contain one-time programmable memory. > flashrom cannot read, and may never be able to write it. flashrom may not be > able to completely clone the contents of this chip (see man page for details). > > there are certainly more chips with OTP memories out there. additions are > welcome! > i have only tagged chips with user modifiably OTP/security memories. there > are some chips out there which have factory written IDs, but no OTP memory. > a similar warning could/should be printed for those, but i did not want to > abuse the OTP tag for this. also, there is nothing we can do, but read those IDs. > duplicating chips using them is not possible, so a warning in the man page might > suffice? > > since OTP memory (or any other data outside the linear address range of the > "main" memory) can not be handled very well in flashrom right now, it is not > clear how OTP memory access could be developed further. of course one could > start to implement the basic methods needed to read them, but how they > should be integrated then is not clear. > one could start by adding an otp_print field to the struct flashchip and just > dump the bytes on probing similar to the lock printing (not on default verbosity > and possibly only if there are bytes different from 0x00 and 0xff). > > carl-daniel seems to be quite sceptical regarding handling OTP at all in flashrom. > he stated "it does not really fit our device model at all", which is right, but could > be changed. > he also asked "should we really handle all features present in flash chips?" > and the answer is probably "no", although i don't see a reason why we should > not, if the effort is not too much and the architectural changes needed aren't > obvious NOGOs. > but OTP regions are somewhat special, they are not just *some* feature. Indeed. > one argument is the one stated in the message printed by this patch. flashrom > is not able to clone chips that have some kind of OTP memory written right now. > imo "cloning" a flash chip seems to be a valid use case for a tool like flashrom as > long as it is feasible (which is not for chips with unique, preconfigured IDs). > > the other more theoretical argument i have is: OTP memory is just some > memory in the flash chip. it may need other access patterns, but it is not much > different from other write protected memories apart from that. > some chips implement it in a way that it is even possible to erase the OTP > regions. those regions are just normal flash and are made unwriteable by fuses > in a register or another addressable byte. > > Signed-off-by: Daniel Lenski <dlenski(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Stefan: I don't want to veto this patch, and although I think that OTP handling is not really a flashrom feature, I think that this implementation satisfies the quality criteria for merging, so the patch is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 3

[commit] r1493 - trunk
by repository service 15 Feb '12

15 Feb '12

Author: stefanct Date: Thu Feb 16 00:40:23 2012 New Revision: 1493 URL: http://flashrom.org/trac/flashrom/changeset/1493 Log: Warn of one-time programmable (OTP) memory Some flash chips contain OTP memory that we cannot read or write (yet). This prohibits us from cloning them, hence warn the user if we detect it. Not all variations of the tagged chips contain OTP memory. They are often only enabled on request or have there own ordering numbers. There is usually no way to distinguish them. Because this is a supposedly seldomly used feature the warning is shown in with dbg verbosity. The manpage is extended to describe the backgrounds a bit. This patch is based on the idea and code of Daniel Lenski. Signed-off-by: Daniel Lenski <dlenski(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flash.h trunk/flashchips.c trunk/flashrom.8 trunk/flashrom.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Mon Feb 13 01:35:35 2012 (r1492) +++ trunk/flash.h Thu Feb 16 00:40:23 2012 (r1493) @@ -83,6 +83,7 @@ #define FEATURE_ADDR_SHIFTED (1 << 5) #define FEATURE_WRSR_EWSR (1 << 6) #define FEATURE_WRSR_WREN (1 << 7) +#define FEATURE_OTP (1 << 8) #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) struct flashctx; Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Feb 13 01:35:35 2012 (r1492) +++ trunk/flashchips.c Thu Feb 16 00:40:23 2012 (r1493) @@ -1120,7 +1120,8 @@ .model_id = AMIC_A25L032, .total_size = 4096, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 64B total; read 0x4B, 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1158,7 +1159,8 @@ .model_id = AMIC_A25LQ032, .total_size = 4096, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 64B total; read 0x4B, 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1315,7 +1317,8 @@ .model_id = ATMEL_AT25DF021, .total_size = 256, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1543,7 +1546,8 @@ .model_id = ATMEL_AT25DF321A, .total_size = 4096, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1619,7 +1623,8 @@ .model_id = ATMEL_AT25DQ161, .total_size = 2048, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1657,7 +1662,8 @@ .model_id = ATMEL_AT25F512B, .total_size = 64, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2168,6 +2174,8 @@ .model_id = ATMEL_AT45DB321D, .total_size = 4096 /* Size can only be determined from status register */, .page_size = 512 /* Size can only be determined from status register */, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3236,8 +3244,8 @@ .model_id = EON_EN25Q40, .total_size = 512, .page_size = 256, - /* TODO: chip features 256-byte one-time programmable region */ - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 256B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3271,8 +3279,8 @@ .model_id = EON_EN25Q80, .total_size = 1024, .page_size = 256, - /* TODO: chip features 256-byte one-time programmable region */ - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 256B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3308,9 +3316,8 @@ .model_id = EON_EN25Q16, .total_size = 2048, .page_size = 256, - /* TODO: EN25D16 features 512-byte one-time programmable region, - * EN25Q16 features a 128-byte one-time programmable region */ - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: D16 512B/Q16 128B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3348,8 +3355,8 @@ .model_id = EON_EN25Q32, .total_size = 4096, .page_size = 256, - /* TODO: chip features 512-byte one-time programmable region */ - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 512B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3383,8 +3390,8 @@ .model_id = EON_EN25Q64, .total_size = 8192, .page_size = 256, - /* TODO: chip features 512-byte one-time programmable region */ - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 512B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3418,8 +3425,8 @@ .model_id = EON_EN25Q128, .total_size = 16384, .page_size = 256, - /* TODO: chip features 512-byte one-time programmable region */ - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 512B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3452,10 +3459,9 @@ .model_id = EON_EN25QH16, .total_size = 2048, .page_size = 256, - /* TODO: chip features 512-byte one-time programmable region - * and supports SFDP. - */ - .feature_bits = FEATURE_WRSR_WREN, + /* supports SFDP */ + /* OTP: 512B total; enter 0x3A */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7092,6 +7098,8 @@ .model_id = ST_M25PX16, .total_size = 2048, .page_size = 256, + /* OTP: 64B total; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7960,7 +7968,8 @@ .model_id = WINBOND_NEX_W25Q80, .total_size = 1024, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7997,7 +8006,8 @@ .model_id = WINBOND_NEX_W25Q16, .total_size = 2048, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -8034,7 +8044,8 @@ .model_id = WINBOND_NEX_W25Q32, .total_size = 4096, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -8071,7 +8082,8 @@ .model_id = WINBOND_NEX_W25Q64, .total_size = 8192, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -8107,7 +8119,8 @@ .model_id = WINBOND_NEX_W25Q128, .total_size = 16384, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Mon Feb 13 01:35:35 2012 (r1492) +++ trunk/flashrom.8 Thu Feb 16 00:40:23 2012 (r1493) @@ -670,6 +670,19 @@ More information about flashrom on laptops is available from .sp .B " http://www.flashrom.org/Laptops" +.SS +One-time programmable (OTP) memory and unique IDs +.sp +Some flash chips contain OTP memory often denoted as "security registers". +They usually have a capacity in the range of some bytes to a few hundred +bytes and can be used to give devices unique IDs etc. flashrom is not able +to read or write these memories and may therefore not be able to duplicate a +chip completely. For chip types known to include OTP memories a warning is +printed when they are detected. +.sp +Similar to OTP memories are unique, factory programmed, unforgeable IDs. +They are not modifiable by the user at all. +.RE .SH LICENSE .B flashrom is covered by the GNU General Public License (GPL), version 2. Some files are Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Mon Feb 13 01:35:35 2012 (r1492) +++ trunk/flashrom.c Thu Feb 16 00:40:23 2012 (r1493) @@ -1560,6 +1560,13 @@ void check_chip_supported(const struct flashctx *flash) { + if (flash->feature_bits & FEATURE_OTP) { + msg_cdbg("This chip may contain one-time programmable memory. " + "flashrom cannot read\nand may never be able to write " + "it, hence it may not be able to completely\n" + "clone the contents of this chip (see man page for " + "details).\n"); + } if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { msg_cinfo("===\n"); if (flash->tested & TEST_BAD_MASK) {

1 0

Re: [flashrom] successful BIOS flash report
by John-Paul Vanderjagt 15 Feb '12

15 Feb '12

Hello Stefan. Thanks for your reply. Much appreciated. As requested, please find below the output of actual writing of the BIOS and below that the output of "flashrom -V". The link to the mainboard: http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/ The link to the mainboard manual: http://dlcdnet.asus.com/pub/ASUS/mb/socket775/P5K-V/e3269_p5k-v_manual.zip I don't know the exact revision of the board. The board was purchased in Oct 2007. Kind regards. John-Paul Vanderjagt (Wellington, New Zealand) -- > On Wed, 15 Feb 2012 20:40:10 +1300 > John-Paul Vanderjagt <flashrom(a)vanderjagt.co.nz> wrote: > > > Dear maintainers at flashrom(a)flashrom.org. > > > > FYI, I'd like to report a successful BIOS flash on an Asus P5K-V > > main board. See relevant info below. You may update your list > > http://flashrom.org/Supported_hardware with this info. Thanks for > > producing flashrom. > > […] > > Hello John-Paul, > > thanks for your report! > I have marked the mainboard as supported and will commit that later > together with other small changes. > Your report contains quite some information we actually don't care much > about. More important than anything else is the (verbose/-V) output of > the actual write operation of flashrom (or if that is no longer > available just the verbose output of a probe (i.e. just flashrom -V). > Apart from that a link to the vendor website is handy and the exact > revision of the board if applicable might be of interest sometimes. I > write this because you seem to have invested quite some time on your > report (which i really appreciate). > > -- > Kind regards/Mit freundlichen Grüßen, Stefan Tauner -- # flashrom -w P5K-V-1002.ROM flashrom v0.9.3-r1246 on Linux 2.6.37.6-0.11-default (i686), built with libpci 3.1.7, GCC 4.5.1 20101208 [gcc-4_5-branch revision 167585], little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH9", enabling flash write... OK. This chipset supports the following protocols: FWH,SPI. Found chip "Winbond W25x80" (1024 KB, SPI) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Flash image seems to be a legacy BIOS. Disabling checks. Erasing and writing flash chip... Done. Verifying flash... VERIFIED. # -- # flashrom -V flashrom v0.9.3-r1246 on Linux 2.6.37.6-0.11-default (i686), built with libpci 3.1.7, GCC 4.5.1 20101208 [gcc-4_5-branch revision 167585], little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 3000M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1004 us, 10000 myus = 10001 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "P5K-V" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "P5K-V" DMI string baseboard-version: "Rev 1.xx" DMI string chassis-type: "Desktop" Found chipset "Intel ICH9", enabling flash write... chipset PCI ID is 8086:2918, 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x1464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x2008 (HSFS) FLOCKDN 0, FDV 0, FDOPSS 1, SCIP 0, BERASE 1, AEL 0, FCERR 0, FDONE 0 0x50: 0x00000202 (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x02, BRRA 0x02 0x54: 0x00001fff (FREG0: Flash Descriptor) Flash Descriptor region is unused. 0x58: 0x00001fff (FREG1: BIOS) BIOS region is unused. 0x5C: 0x00001fff (FREG2: Management Engine) Management Engine region is unused. 0x60: 0x00001fff (FREG3: Gigabit Ethernet) Gigabit Ethernet region is unused. 0x64: 0x00001fff (FREG4: Platform Data) Platform Data region is unused. 0x74: 0x00000000 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x00420000 (SSFS, SSFC) 0x94: 0x0000 (PREOP) 0x96: 0x543b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0x0006019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xB0: 0x00000000 (FDOC) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: FWH,SPI. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for AMIC A25L05PT, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L05PU, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PT, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PU, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PT, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PU, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L80P, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PT, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PU, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L020, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L080, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L016, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L032, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25LQ032, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: skipped. Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DQ161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB011D, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB021D, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB041D, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB081D, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB161D, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321C, 4224 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321D, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB642D, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F020, 256 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for Bright BM29F040, 512 KB: skipped. Probing for EMST F49B002UA, 256 KB: skipped. Probing for EMST F25L008A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05T, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10T, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20T, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40T, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80T, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16T, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32T, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64T, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25D16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F05, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN29F010, 128 KB: skipped. Probing for Eon EN29F002(A)(N)B, 256 KB: skipped. Probing for Eon EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Hyundai HY29F002T, 256 KB: skipped. Probing for Hyundai HY29F002B, 256 KB: skipped. Probing for Hyundai HY29F040A, 512 KB: skipped. Probing for Intel 28F001BN/BX-B, 128 KB: skipped. Probing for Intel 28F001BN/BX-T, 128 KB: skipped. Probing for Intel 28F002BC/BL/BV/BX-T, 256 KB: skipped. Probing for Intel 28F008S3/S5/SC, 512 KB: skipped. Probing for Intel 28F004B5/BE/BV/BX-B, 512 KB: skipped. Probing for Intel 28F004B5/BE/BV/BX-T, 512 KB: skipped. Probing for Intel 28F400BV/BX/CE/CV-B, 512 KB: skipped. Probing for Intel 28F400BV/BX/CE/CV-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1005, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L2005, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L4005, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635D, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635E, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3205, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3235D, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L6405, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L12805, 16384 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29F040, 512 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for MoselVitelic V29C51000B, 64 KB: skipped. Probing for MoselVitelic V29C51000T, 64 KB: skipped. Probing for MoselVitelic V29C51400B, 512 KB: skipped. Probing for MoselVitelic V29C51400T, 512 KB: skipped. Probing for MoselVitelic V29LC51000, 64 KB: skipped. Probing for MoselVitelic V29LC51001, 128 KB: skipped. Probing for MoselVitelic V29LC51002, 256 KB: skipped. Probing for Numonyx M25PE10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV016B, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV020, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV080B, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sharp LHF00L04, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL004A, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL008A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL016A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL032A, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL064A, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF010.REMS, 128 KB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF016B, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF032B, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF064C, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF040.REMS, 512 KB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF040B, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25LF040A.RES, 512 KB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 KB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0x7c, id2 0xc1, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 KB: skipped. Probing for SST SST49LF020A, 256 KB: skipped. Probing for SST SST49LF040, 512 KB: skipped. Probing for SST SST49LF040B, 512 KB: skipped. Probing for SST SST49LF080A, 1024 KB: skipped. Probing for SST SST49LF160C, 2048 KB: skipped. Probing for ST M25P05-A, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P05.RES, 64 KB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P10.RES, 128 KB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40-old, 512 KB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P128, 16384 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BB, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25x10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25x20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25x40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25x80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Chip status register is 00 Found chip "Winbond W25x80" (1024 KB, SPI) at physical address 0xfff00000. Probing for Winbond W25x16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25x32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25x64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 KB: skipped. Probing for Winbond W29C020(C)/W29C022, 256 KB: skipped. Probing for Winbond W29C040/P, 512 KB: skipped. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: skipped. Probing for Winbond W39V040B, 512 KB: skipped. Probing for Winbond W39V040C, 512 KB: skipped. Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 KB: skipped. Probing for Winbond W49F002U/N, 256 KB: skipped. Probing for Winbond W49F020, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: skipped. Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 KB: probe_jedec_common: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC unknown AMIC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel unknown Atmel SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon unknown Eon SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix unknown Macronix SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC unknown PMC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST unknown SST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST unknown ST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sanyo unknown Sanyo SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (RDID), 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (REMS), 0 KB: probe_spi_rems: id1 0xef, id2 0x13 === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! No operations were specified. Restoring PCI config space for 00:1f:0 reg 0xdc # --

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Re: [flashrom] [PATCH] Manpage improvements.
by Bernd Blaauw 15 Feb '12

15 Feb '12

Op 15-2-2012 16:23, Stefan Tauner schreef: > Also, rephrase the documention related to laptops completely to make it > less redundant and more informative. > Document the laptop=this_is_not_a_laptop internal programmer parameter Whatever happened to flashrom's semi-dependency on DMIDECODE? I thought flashrom implemented its own dmi-calls since 0.9.4, but trying Idwer's DOS-port (rev1452) and not having DMIDECOD.EXE (yep, 8.3 naming, sorry) all I end up with in VMware/FreeDOS is a "hey can't identify anything, so this must be a laptop..if not, please override". Overriding still produces the same 'please override' output followed by a message that you're overriding, and continues. Ofcourse no single emulation platform seems to have a flashrom anyway, so stuff happily aborts. I guess flashrom could at least continue to try reading without needing an override. Erasing and writing ofcourse do require overrides if anything is uncertain in advance.

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flashrom output for Asus M3N-HT DELUXE/HDMI.
by Caronte Estigia 15 Feb '12

15 Feb '12

Hello! As requested in the flashrom -V output, here is what I get running the command on a M3N-HT Deluxe MoBo. If you need anything else, don't hesitate contacting me. Regards. flashrom v0.9.2-r1028 on Linux 2.6.35-32-generic (x86_64), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1507M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1003 us, 10000 myus = 10003 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "M3N-HT DELUXE" DMI string baseboard-version: "1.XX" DMI string chassis-type: "Desktop" Found ITE Super I/O, id 8716 Found chipset "NVIDIA MCP78S", enabling flash write... chipset PCI ID is 10de:07 5d, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Guessed flash bus type is SPI Found SMBus device 10de:0752 at 00:01:1 SPI BAR is at 0xfdf80000, after clearing low bits BAR is at 0xfdf80000 SPI control is 0xc01a, enable=0, idle=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. SPI on this chipset is not supported yet. OK. This chipset supports the following protocols: None. No IT87* serial flash segment enabled. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for ASD AE49F2008, 256 KB: skipped. Probing for Atmel AT25DF021, 256 KB: skipped. Probing for Atmel AT25DF041A, 512 KB: skipped. Probing for Atmel AT25DF081, 1024 KB: skipped. Probing for Atmel AT25DF161, 2048 KB: skipped. Probing for Atmel AT25DF321, 4096 KB: skipped. Probing for Atmel AT25DF321A, 4096 KB: skipped. Probing for Atmel AT25DF641, 8192 KB: skipped. Probing for Atmel AT25F512B, 64 KB: skipped. Probing for Atmel AT25FS010, 128 KB: skipped. Probing for Atmel AT25FS040, 512 KB: skipped. Probing for Atmel AT26DF041, 512 KB: skipped. Probing for Atmel AT26DF081A, 1024 KB: skipped. Probing for Atmel AT26DF161, 2048 KB: skipped. Probing for Atmel AT26DF161A, 2048 KB: skipped. Probing for Atmel AT26F004, 512 KB: skipped. Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: skipped. Probing for Atmel AT45DB011D, 128 KB: skipped. Probing for Atmel AT45DB021D, 256 KB: skipped. Probing for Atmel AT45DB041D, 512 KB: skipped. Probing for Atmel AT45DB081D, 1024 KB: skipped. Probing for Atmel AT45DB161D, 2048 KB: skipped. Probing for Atmel AT45DB321C, 4224 KB: skipped. Probing for Atmel AT45DB321D, 4096 KB: skipped. Probing for Atmel AT45DB642D, 8192 KB: skipped. Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: skipped. Probing for AMIC A25L40PU, 512 KB: skipped. Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: skipped. Probing for EMST F49B002UA, 256 KB: skipped. Probing for Eon EN25B05, 64 KB: skipped. Probing for Eon EN25B05T, 64 KB: skipped. Probing for Eon EN25B10, 128 KB: skipped. Probing for Eon EN25B10T, 128 KB: skipped. Probing for Eon EN25B20, 256 KB: skipped. Probing for Eon EN25B20T, 256 KB: skipped. Probing for Eon EN25B40, 512 KB: skipped. Probing for Eon EN25B40T, 512 KB: skipped. Probing for Eon EN25B80, 1024 KB: skipped. Probing for Eon EN25B80T, 1024 KB: skipped. Probing for Eon EN25B16, 2048 KB: skipped. Probing for Eon EN25B16T, 2048 KB: skipped. Probing for Eon EN25B32, 4096 KB: skipped. Probing for Eon EN25B32T, 4096 KB: skipped. Probing for Eon EN25B64, 8192 KB: skipped. Probing for Eon EN25B64T, 8192 KB: skipped. Probing for Eon EN25D16, 2048 KB: skipped. Probing for Eon EN25F05, 64 KB: skipped. Probing for Eon EN25F10, 128 KB: skipped. Probing for Eon EN25F20, 256 KB: skipped. Probing for Eon EN25F40, 512 KB: skipped. Probing for Eon EN25F80, 1024 KB: skipped. Probing for Eon EN25F16, 2048 KB: skipped. Probing for Eon EN25F32, 4096 KB: skipped. Probing for Eon EN29F010, 128 KB: skipped. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Intel 28F001BX-B, 128 KB: skipped. Probing for Intel 28F001BX-T, 128 KB: skipped. Probing for Intel 28F004S5, 512 KB: skipped. Probing for Intel 28F004BV/BE-B, 512 KB: skipped. Probing for Intel 28F004BV/BE-T, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: skipped. Probing for Intel 82802AC, 1024 KB: skipped. Probing for Macronix MX25L512, 64 KB: skipped. Probing for Macronix MX25L1005, 128 KB: skipped. Probing for Macronix MX25L2005, 256 KB: skipped. Probing for Macronix MX25L4005, 512 KB: skipped. Probing for Macronix MX25L8005, 1024 KB: skipped. Probing for Macronix MX25L1605, 2048 KB: skipped. Probing for Macronix MX25L1635D, 2048 KB: skipped. Probing for Macronix MX25L3205, 4096 KB: skipped. Probing for Macronix MX25L3235D, 4096 KB: skipped. Probing for Macronix MX25L6405, 8192 KB: skipped. Probing for Macronix MX25L12805, 16384 KB: skipped. Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for Numonyx M25PE10, 128 KB: skipped. Probing for Numonyx M25PE20, 256 KB: skipped. Probing for Numonyx M25PE40, 512 KB: skipped. Probing for Numonyx M25PE80, 1024 KB: skipped. Probing for Numonyx M25PE16, 2048 KB: skipped. Probing for PMC Pm25LV010, 128 KB: skipped. Probing for PMC Pm25LV016B, 2048 KB: skipped. Probing for PMC Pm25LV020, 256 KB: skipped. Probing for PMC Pm25LV040, 512 KB: skipped. Probing for PMC Pm25LV080B, 1024 KB: skipped. Probing for PMC Pm25LV512, 64 KB: skipped. Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: skipped. Probing for PMC Pm49FL004, 512 KB: skipped. Probing for Sanyo LF25FW203A, 2048 KB: skipped. Probing for Sharp LHF00L04, 1024 KB: skipped. Probing for Spansion S25FL008A, 1024 KB: skipped. Probing for Spansion S25FL016A, 2048 KB: skipped. Probing for SST SST25VF016B, 2048 KB: skipped. Probing for SST SST25VF032B, 4096 KB: skipped. Probing for SST SST25VF040.REMS, 512 KB: skipped. Probing for SST SST25VF040B, 512 KB: skipped. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Probing for SST SST25VF080B, 1024 KB: skipped. Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: skipped. Probing for SST SST49LF003A/B, 384 KB: skipped. Probing for SST SST49LF004A/B, 512 KB: skipped. Probing for SST SST49LF004C, 512 KB: skipped. Probing for SST SST49LF008A, 1024 KB: skipped. Probing for SST SST49LF008C, 1024 KB: skipped. Probing for SST SST49LF016C, 2048 KB: skipped. Probing for SST SST49LF020, 256 KB: skipped. Probing for SST SST49LF020A, 256 KB: skipped. Probing for SST SST49LF040, 512 KB: skipped. Probing for SST SST49LF040B, 512 KB: skipped. Probing for SST SST49LF080A, 1024 KB: skipped. Probing for SST SST49LF160C, 2048 KB: skipped. Probing for ST M25P05-A, 64 KB: skipped. Probing for ST M25P05.RES, 64 KB: skipped. Probing for ST M25P10-A, 128 KB: skipped. Probing for ST M25P10.RES, 128 KB: skipped. Probing for ST M25P20, 256 KB: skipped. Probing for ST M25P40, 512 KB: skipped. Probing for ST M25P40-old, 512 KB: skipped. Probing for ST M25P80, 1024 KB: skipped. Probing for ST M25P16, 2048 KB: skipped. Probing for ST M25P32, 4096 KB: skipped. Probing for ST M25P64, 8192 KB: skipped. Probing for ST M25P128, 16384 KB: skipped. Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: skipped. Probing for ST M50FLW040B, 512 KB: skipped. Probing for ST M50FLW080A, 1024 KB: skipped. Probing for ST M50FLW080B, 1024 KB: skipped. Probing for ST M50FW002, 256 KB: skipped. Probing for ST M50FW016, 2048 KB: skipped. Probing for ST M50FW040, 512 KB: skipped. Probing for ST M50FW080, 1024 KB: skipped. Probing for ST M50LPW116, 2048 KB: skipped. Probing for SyncMOS S29C31004T, 512 KB: skipped. Probing for SyncMOS S29C51001T, 128 KB: skipped. Probing for SyncMOS S29C51002T, 256 KB: skipped. Probing for SyncMOS S29C51004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: skipped. Probing for Winbond W25Q16, 2048 KB: skipped. Probing for Winbond W25Q32, 4096 KB: skipped. Probing for Winbond W25x10, 128 KB: skipped. Probing for Winbond W25x20, 256 KB: skipped. Probing for Winbond W25x40, 512 KB: skipped. Probing for Winbond W25x80, 1024 KB: skipped. Probing for Winbond W25x16, 2048 KB: skipped. Probing for Winbond W25x32, 4096 KB: skipped. Probing for Winbond W25x64, 8192 KB: skipped. Probing for Winbond W29C011, 128 KB: skipped. Probing for Winbond W29C020C, 256 KB: skipped. Probing for Winbond W29C040P, 512 KB: skipped. Probing for Winbond W29EE011, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: skipped. Probing for Winbond W39V040B, 512 KB: skipped. Probing for Winbond W39V040C, 512 KB: skipped. Probing for Winbond W39V040FA, 512 KB: skipped. Probing for Winbond W39V080A, 1024 KB: skipped. Probing for Winbond W49F002U, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: skipped. Probing for Winbond W49V002FA, 256 KB: skipped. Probing for Winbond W39V080FA, 1024 KB: skipped. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Probing for EON unknown EON SPI chip, 0 KB: skipped. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Probing for SST unknown SST SPI chip, 0 KB: skipped. Probing for ST unknown ST SPI chip, 0 KB: skipped. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically.

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successful BIOS flash report
by John-Paul Vanderjagt 15 Feb '12

15 Feb '12

Dear maintainers at flashrom(a)flashrom.org. FYI, I'd like to report a successful BIOS flash on an Asus P5K-V main board. See relevant info below. You may update your list http://flashrom.org/Supported_hardware with this info. Thanks for producing flashrom. Kind regards. John-Paul Vanderjagt. Wellington, New Zealand. <flashrom at vanderjagt dot co dot nz> -- Manual of main board: http://dlcdnet.asus.com/pub/ASUS/mb/socket775/P5K-V/e3269_p5k-v_manual.zip % rpm -qa flashrom flashrom-0.9.3_r1246-3.1.i586 % uname -a Linux server 2.6.37.6-0.11-default #1 SMP 2011-12-19 23:39:38 +0100 i686 i686 i386 GNU/Linux % cat /etc/SuSE-release openSUSE 11.4 (i586) VERSION = 11.4 CODENAME = Celadon % cat dmidecode.out_after_bios_upgrade # dmidecode 2.11 SMBIOS 2.4 present. 70 structures occupying 2500 bytes. Table at 0x000F06F0. Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: American Megatrends Inc. Version: 1002 Release Date: 06/18/2008 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 1024 kB Characteristics: [...] BIOS Revision: 8.12 Handle 0x0001, DMI type 1, 27 bytes System Information Manufacturer: System manufacturer Product Name: P5K-V Version: System Version Serial Number: System Serial Number UUID: 00020003-0004-0005-0006-000700080009 Wake-up Type: Power Switch SKU Number: To Be Filled By O.E.M. Family: To Be Filled By O.E.M. Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: ASUSTeK Computer INC. Product Name: P5K-V Version: Rev 1.xx Serial Number: MB-1234567890 Asset Tag: To Be Filled By O.E.M. Features: Board is a hosting board Board is replaceable Location In Chassis: To Be Filled By O.E.M. Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 [...] % diff dmidecode.out_after_bios_upgrade dmidecode.out_before_bios_upgrade 3,4c3,4 < 70 structures occupying 2500 bytes. < Table at 0x000F06F0. --- > 70 structures occupying 2492 bytes. > Table at 0x000F06E0. 9,10c9,10 < Version: 1002 < Release Date: 06/18/2008 --- > Version: 0212 > Release Date: 05/24/2007 48c48 < UUID: 00020003-0004-0005-0006-000700080009 --- > UUID: A095EBCD-CBFE-D511-B2E2-001BFC90E48F 58c58 < Serial Number: MB-1234567890 --- > Serial Number: MS1C75B79Y01238 80c80 < OEM Information: 0x00000004 --- > OEM Information: 0x00000001 590c590 < String 1: To Be Filled By O.E.M. --- > String 1: 001BFC90E48F [...] --

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