flashrom

flashrom@flashrom.org

3 participants
9188 discussions

[PATCH] ST M25P RES support
by Carl-Daniel Hailfinger 22 Jul '09

22 Jul '09

Add support for old ST M25P05/M25P10 chips which only respond to the RES command and not the RDID command. Unfortunately, either the datasheets are wrong or both chips have exactly the same ID. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-sst25_res/flashchips.c =================================================================== --- flashrom-sst25_res/flashchips.c (Revision 659) +++ flashrom-sst25_res/flashchips.c (Arbeitskopie) @@ -2249,8 +2249,29 @@ .read = spi_chip_read, }, + /* The ST M25P05 is a bit of a problem. It has the same ID as the + * ST M25P05-A in RES mode, but supports only 128 byte writes instead + * of 256 byte writes. We rely heavily on the fact that probe_spi_res + * only is successful if RDID does not work. + */ { .vendor = "ST", + .name = "M25P05.RES", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25P05_RES, + .total_size = 64, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_res, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_1, /* 128 */ + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25P10-A", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, @@ -2265,8 +2286,25 @@ .read = spi_chip_read, }, + /* The ST M25P10 has the same problem as the M25P05. */ { .vendor = "ST", + .name = "M25P10.RES", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25P10_RES, + .total_size = 128, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_res, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_1, /* 128 */ + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25P20", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, Index: flashrom-sst25_res/flashchips.h =================================================================== --- flashrom-sst25_res/flashchips.h (Revision 659) +++ flashrom-sst25_res/flashchips.h (Arbeitskopie) @@ -322,7 +322,9 @@ */ #define ST_ID 0x20 /* ST / SGS/Thomson */ #define ST_M25P05A 0x2010 +#define ST_M25P05_RES 0x10 /* Same code as M25P10. */ #define ST_M25P10A 0x2011 +#define ST_M25P10_RES 0x10 /* Same code as M25P05. */ #define ST_M25P20 0x2012 #define ST_M25P40 0x2013 #define ST_M25P40_RES 0x12 -- http://www.hailfinger.org/

2 2

[commit] r662 - trunk
by svn＠flashrom.org 22 Jul '09

22 Jul '09

Author: hailfinger Date: 2009-07-23 03:40:20 +0200 (Thu, 23 Jul 2009) New Revision: 662 Modified: trunk/flashchips.c trunk/flashchips.h Log: Add support for old ST M25P05/M25P10 chips which only respond to the RES command and not the RDID command. Unfortunately, either the datasheets are wrong or both chips have exactly the same ID. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-07-23 01:36:08 UTC (rev 661) +++ trunk/flashchips.c 2009-07-23 01:40:20 UTC (rev 662) @@ -2249,8 +2249,29 @@ .read = spi_chip_read, }, + /* The ST M25P05 is a bit of a problem. It has the same ID as the + * ST M25P05-A in RES mode, but supports only 128 byte writes instead + * of 256 byte writes. We rely heavily on the fact that probe_spi_res + * only is successful if RDID does not work. + */ { .vendor = "ST", + .name = "M25P05.RES", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25P05_RES, + .total_size = 64, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_res, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_1, /* 128 */ + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25P10-A", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, @@ -2265,8 +2286,25 @@ .read = spi_chip_read, }, + /* The ST M25P10 has the same problem as the M25P05. */ { .vendor = "ST", + .name = "M25P10.RES", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25P10_RES, + .total_size = 128, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_res, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_1, /* 128 */ + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25P20", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, Modified: trunk/flashchips.h =================================================================== --- trunk/flashchips.h 2009-07-23 01:36:08 UTC (rev 661) +++ trunk/flashchips.h 2009-07-23 01:40:20 UTC (rev 662) @@ -322,7 +322,9 @@ */ #define ST_ID 0x20 /* ST / SGS/Thomson */ #define ST_M25P05A 0x2010 +#define ST_M25P05_RES 0x10 /* Same code as M25P10. */ #define ST_M25P10A 0x2011 +#define ST_M25P10_RES 0x10 /* Same code as M25P05. */ #define ST_M25P20 0x2012 #define ST_M25P40 0x2013 #define ST_M25P40_RES 0x12

1 0

[PATCH] SB600 SPI off-by-one read count workaround
by Carl-Daniel Hailfinger 22 Jul '09

22 Jul '09

This is a workaround for a bug in SB600 and SB700. If we only send an opcode and no additional data/address, the SPI controller will read one byte too few from the chip. Basically, the last byte of the chip response is discarded and will not end up in the FIFO. It is unclear if the CS# line is set high too early as well. That hardware bug is undocumented as of now, but I'm working with AMD to add a detailed description of it to the errata. Add loads of additional debugging to SB600/SB700 init. Add explanatory comments for unintuitive code flow. Thanks go to Uwe for testing quite a few iterations of the patch. As a side benefit, we can now kill the SB600 flash chip status register special case, which was a somewhat misguided workaround for that hardware erratum. Note for future added features in the SB600 SPI driver: It may be possible to read up to 15 bytes of command response with overlapping reads due to the ring buffer design of the FIFO if the command can be repeated without ill effects. Same for skipping up to 7 bytes between command and response. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_sb600_offbyone_workaround/chipset_enable.c =================================================================== --- flashrom-spi_sb600_offbyone_workaround/chipset_enable.c (Revision 653) +++ flashrom-spi_sb600_offbyone_workaround/chipset_enable.c (Arbeitskopie) @@ -692,25 +692,49 @@ /* Read SPI_BaseAddr */ tmp = pci_read_long(dev, 0xa0); - tmp &= 0xfffffff0; /* remove low 4 bits (reserved) */ + tmp &= 0xffffffe0; /* remove bits 4-0 (reserved) */ printf_debug("SPI base address is at 0x%x\n", tmp); /* If the BAR has address 0, it is unlikely SPI is used. */ if (!tmp) has_spi = 0; - /* Physical memory can only be mapped at page (4k) boundaries */ - sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, 0x1000); - /* The low bits of the SPI base address are used as offset into the mapped page */ - sb600_spibar += tmp & 0xfff; + if (has_spi) { + /* Physical memory has to be mapped at page (4k) boundaries. */ + sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, + 0x1000); + /* The low bits of the SPI base address are used as offset into + * the mapped page. + */ + sb600_spibar += tmp & 0xfff; + tmp = pci_read_long(dev, 0xa0); + printf_debug("AltSpiCSEnable=%i, SpiRomEnable=%i, " + "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1, + (tmp & 0x4) >> 2); + tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2; + printf_debug("PrefetchEnSPIFromIMC=%i, ", tmp); + + tmp = pci_read_byte(dev, 0xbb); + printf_debug("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", + tmp & 0x1, (tmp & 0x20) >> 5); + tmp = mmio_readl(sb600_spibar); + printf_debug("SpiArbEnable=%i, SpiAccessMacRomEn=%i, " + "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " + "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", + (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, + (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, + (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); + } + /* Look for the SMBus device. */ smbus_dev = pci_dev_find(0x1002, 0x4385); - if (!smbus_dev) { + if (has_spi && !smbus_dev) { fprintf(stderr, "ERROR: SMBus device not found. Not enabling SPI.\n"); has_spi = 0; - } else { + } + if (has_spi) { /* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */ /* GPIO11/SPI_DO and GPIO12/SPI_DI status */ reg = pci_read_byte(smbus_dev, 0xAB); Index: flashrom-spi_sb600_offbyone_workaround/sb600spi.c =================================================================== --- flashrom-spi_sb600_offbyone_workaround/sb600spi.c (Revision 653) +++ flashrom-spi_sb600_offbyone_workaround/sb600spi.c (Arbeitskopie) @@ -38,7 +38,7 @@ *}; */ -uint8_t *sb600_spibar; +uint8_t *sb600_spibar = NULL; int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { @@ -106,6 +106,7 @@ int count; /* First byte is cmd which can not being sent through FIFO. */ unsigned char cmd = *writearr++; + unsigned int readoffby1; writecnt--; @@ -124,8 +125,15 @@ return SPI_INVALID_LENGTH; } + /* This is a workaround for a bug in SB600 and SB700. If we only send + * an opcode and no additional data/address, the SPI controller will + * read one byte too few from the chip. Basically, the last byte of + * the chip response is discarded and will not end up in the FIFO. + * It is unclear if the CS# line is set high too early as well. + */ + readoffby1 = (writecnt) ? 0 : 1; + mmio_writeb((readcnt + readoffby1) << 4 | (writecnt), sb600_spibar + 1); mmio_writeb(cmd, sb600_spibar + 0); - mmio_writeb(readcnt << 4 | (writecnt), sb600_spibar + 1); /* Before we use the FIFO, reset it first. */ reset_internal_fifo_pointer(); @@ -147,17 +155,24 @@ /* * After the command executed, we should find out the index of the - * received byte. Here we just reset the FIFO pointer, skip the - * writecnt, is there anyone who have anther method to replace it? + * received byte. Here we just reset the FIFO pointer and skip the + * writecnt. + * It would be possible to increase the FIFO pointer by one instead + * of reading and discarding one byte from the FIFO. + * The FIFO is implemented on top of an 8 byte ring buffer and the + * buffer is never cleared. For every byte that is shifted out after + * the opcode, the FIFO already stores the response from the chip. + * Usually, the chip will respond with 0x00 or 0xff. */ reset_internal_fifo_pointer(); + /* Skip the bytes we sent. */ for (count = 0; count < writecnt; count++) { - cmd = mmio_readb(sb600_spibar + 0xC); /* Skip the byte we send. */ + cmd = mmio_readb(sb600_spibar + 0xC); printf_debug("[ %2x]", cmd); } - printf_debug("The FIFO pointer 6 is %d.\n", mmio_readb(sb600_spibar + 0xd) & 0x07); + printf_debug("The FIFO pointer after skipping is %d.\n", mmio_readb(sb600_spibar + 0xd) & 0x07); for (count = 0; count < readcnt; count++, readarr++) { *readarr = mmio_readb(sb600_spibar + 0xC); printf_debug("[%02x]", *readarr); -- http://www.hailfinger.org/

2 3

[commit] r661 - trunk
by svn＠flashrom.org 22 Jul '09

22 Jul '09

Author: hailfinger Date: 2009-07-23 03:36:08 +0200 (Thu, 23 Jul 2009) New Revision: 661 Modified: trunk/chipset_enable.c trunk/flash.h trunk/sb600spi.c trunk/spi.c Log: This is a workaround for a bug in SB600 and SB700. If we only send an opcode and no additional data/address, the SPI controller will read one byte too few from the chip. Basically, the last byte of the chip response is discarded and will not end up in the FIFO. It is unclear if the CS# line is set high too early as well. That hardware bug is undocumented as of now, but I'm working with AMD to add a detailed description of it to the errata. Add loads of additional debugging to SB600/SB700 init. Add explanatory comments for unintuitive code flow. Thanks go to Uwe for testing quite a few iterations of the patch. Kill the SB600 flash chip status register special case, which was a somewhat misguided workaround for that hardware erratum. Note for future added features in the SB600 SPI driver: It may be possible to read up to 15 bytes of command response with overlapping reads due to the ring buffer design of the FIFO if the command can be repeated without ill effects. Same for skipping up to 7 bytes between command and response. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-07-23 01:33:43 UTC (rev 660) +++ trunk/chipset_enable.c 2009-07-23 01:36:08 UTC (rev 661) @@ -692,25 +692,49 @@ /* Read SPI_BaseAddr */ tmp = pci_read_long(dev, 0xa0); - tmp &= 0xfffffff0; /* remove low 4 bits (reserved) */ + tmp &= 0xffffffe0; /* remove bits 4-0 (reserved) */ printf_debug("SPI base address is at 0x%x\n", tmp); /* If the BAR has address 0, it is unlikely SPI is used. */ if (!tmp) has_spi = 0; - /* Physical memory can only be mapped at page (4k) boundaries */ - sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, 0x1000); - /* The low bits of the SPI base address are used as offset into the mapped page */ - sb600_spibar += tmp & 0xfff; + if (has_spi) { + /* Physical memory has to be mapped at page (4k) boundaries. */ + sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, + 0x1000); + /* The low bits of the SPI base address are used as offset into + * the mapped page. + */ + sb600_spibar += tmp & 0xfff; + tmp = pci_read_long(dev, 0xa0); + printf_debug("AltSpiCSEnable=%i, SpiRomEnable=%i, " + "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1, + (tmp & 0x4) >> 2); + tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2; + printf_debug("PrefetchEnSPIFromIMC=%i, ", tmp); + + tmp = pci_read_byte(dev, 0xbb); + printf_debug("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", + tmp & 0x1, (tmp & 0x20) >> 5); + tmp = mmio_readl(sb600_spibar); + printf_debug("SpiArbEnable=%i, SpiAccessMacRomEn=%i, " + "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " + "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", + (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, + (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, + (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); + } + /* Look for the SMBus device. */ smbus_dev = pci_dev_find(0x1002, 0x4385); - if (!smbus_dev) { + if (has_spi && !smbus_dev) { fprintf(stderr, "ERROR: SMBus device not found. Not enabling SPI.\n"); has_spi = 0; - } else { + } + if (has_spi) { /* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */ /* GPIO11/SPI_DO and GPIO12/SPI_DI status */ reg = pci_read_byte(smbus_dev, 0xAB); Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-07-23 01:33:43 UTC (rev 660) +++ trunk/flash.h 2009-07-23 01:36:08 UTC (rev 661) @@ -511,7 +511,6 @@ const unsigned char *writearr, unsigned char *readarr); int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf); -uint8_t sb600_read_status_register(void); extern uint8_t *sb600_spibar; /* jedec.c */ Modified: trunk/sb600spi.c =================================================================== --- trunk/sb600spi.c 2009-07-23 01:33:43 UTC (rev 660) +++ trunk/sb600spi.c 2009-07-23 01:36:08 UTC (rev 661) @@ -38,7 +38,7 @@ *}; */ -uint8_t *sb600_spibar; +uint8_t *sb600_spibar = NULL; int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { @@ -46,16 +46,6 @@ return spi_read_chunked(flash, buf, start, len, 8); } -uint8_t sb600_read_status_register(void) -{ - const unsigned char cmd[0x02] = { JEDEC_RDSR, 0x00 }; - unsigned char readarr[JEDEC_RDSR_INSIZE]; - - /* Read Status Register */ - spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr); - return readarr[0]; -} - int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf) { int rc = 0, i; @@ -106,6 +96,7 @@ int count; /* First byte is cmd which can not being sent through FIFO. */ unsigned char cmd = *writearr++; + unsigned int readoffby1; writecnt--; @@ -124,8 +115,15 @@ return SPI_INVALID_LENGTH; } + /* This is a workaround for a bug in SB600 and SB700. If we only send + * an opcode and no additional data/address, the SPI controller will + * read one byte too few from the chip. Basically, the last byte of + * the chip response is discarded and will not end up in the FIFO. + * It is unclear if the CS# line is set high too early as well. + */ + readoffby1 = (writecnt) ? 0 : 1; + mmio_writeb((readcnt + readoffby1) << 4 | (writecnt), sb600_spibar + 1); mmio_writeb(cmd, sb600_spibar + 0); - mmio_writeb(readcnt << 4 | (writecnt), sb600_spibar + 1); /* Before we use the FIFO, reset it first. */ reset_internal_fifo_pointer(); @@ -147,17 +145,25 @@ /* * After the command executed, we should find out the index of the - * received byte. Here we just reset the FIFO pointer, skip the - * writecnt, is there anyone who have anther method to replace it? + * received byte. Here we just reset the FIFO pointer and skip the + * writecnt. + * It would be possible to increase the FIFO pointer by one instead + * of reading and discarding one byte from the FIFO. + * The FIFO is implemented on top of an 8 byte ring buffer and the + * buffer is never cleared. For every byte that is shifted out after + * the opcode, the FIFO already stores the response from the chip. + * Usually, the chip will respond with 0x00 or 0xff. */ reset_internal_fifo_pointer(); + /* Skip the bytes we sent. */ for (count = 0; count < writecnt; count++) { - cmd = mmio_readb(sb600_spibar + 0xC); /* Skip the byte we send. */ + cmd = mmio_readb(sb600_spibar + 0xC); printf_debug("[ %2x]", cmd); } - printf_debug("The FIFO pointer 6 is %d.\n", mmio_readb(sb600_spibar + 0xd) & 0x07); + printf_debug("The FIFO pointer after skipping is %d.\n", + mmio_readb(sb600_spibar + 0xd) & 0x07); for (count = 0; count < readcnt; count++, readarr++) { *readarr = mmio_readb(sb600_spibar + 0xC); printf_debug("[%02x]", *readarr); Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-23 01:33:43 UTC (rev 660) +++ trunk/spi.c 2009-07-23 01:36:08 UTC (rev 661) @@ -367,10 +367,6 @@ int ret; /* Read Status Register */ - if (spi_controller == SPI_CONTROLLER_SB600) { /* FIXME */ - /* Workaround for SB600 hardware bug. Can be killed later. */ - return sb600_read_status_register(); - } ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr); if (ret) fprintf(stderr, "RDSR failed!\n");

1 0

[PATCH] Verbose probe output improvements
by Carl-Daniel Hailfinger 22 Jul '09

22 Jul '09

Verbose probe output is split across multiple lines for some probe functions. This makes visual inspection and grepping a lot harder than necessary. Remove line breaks where appropriate. Output of "flashrom -V" on various chipsets and programmers is appreciated. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-verbose_probe_oneline/jedec.c =================================================================== --- flashrom-verbose_probe_oneline/jedec.c (Revision 655) +++ flashrom-verbose_probe_oneline/jedec.c (Arbeitskopie) @@ -99,7 +99,7 @@ probe_timing_enter = probe_timing_exit = 0; } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */ printf_debug("Chip lacks correct probe timing information, " - "using default 10mS/40uS\n"); + "using default 10mS/40uS. "); probe_timing_enter = 10000; probe_timing_exit = 40; } else { Index: flashrom-verbose_probe_oneline/spi.c =================================================================== --- flashrom-verbose_probe_oneline/spi.c (Revision 655) +++ flashrom-verbose_probe_oneline/spi.c (Arbeitskopie) @@ -99,7 +99,7 @@ printf_debug("RDID returned"); for (i = 0; i < bytes; i++) printf_debug(" 0x%02x", readarr[i]); - printf_debug("\n"); + printf_debug(". "); return 0; } @@ -177,12 +177,12 @@ return 0; if (!oddparity(readarr[0])) - printf_debug("RDID byte 0 parity violation.\n"); + printf_debug("RDID byte 0 parity violation. "); /* Check if this is a continuation vendor ID */ if (readarr[0] == 0x7f) { if (!oddparity(readarr[1])) - printf_debug("RDID byte 1 parity violation.\n"); + printf_debug("RDID byte 1 parity violation. "); id1 = (readarr[0] << 8) | readarr[1]; id2 = readarr[2]; if (bytes > 3) { -- http://www.hailfinger.org/

2 3

[commit] r660 - trunk
by svn＠flashrom.org 22 Jul '09

22 Jul '09

Author: hailfinger Date: 2009-07-23 03:33:43 +0200 (Thu, 23 Jul 2009) New Revision: 660 Modified: trunk/jedec.c trunk/spi.c trunk/w29ee011.c Log: Verbose probe output is split across multiple lines for some probe functions. This makes visual inspection and grepping a lot harder than necessary. Remove line breaks where appropriate. Some error messages should end up on stderr instead of just being displayed in verbose mode. Thanks to Maciej Pijanka for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2009-07-22 20:13:00 UTC (rev 659) +++ trunk/jedec.c 2009-07-23 01:33:43 UTC (rev 660) @@ -99,7 +99,7 @@ probe_timing_enter = probe_timing_exit = 0; } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */ printf_debug("Chip lacks correct probe timing information, " - "using default 10mS/40uS\n"); + "using default 10mS/40uS. "); probe_timing_enter = 10000; probe_timing_exit = 40; } else { Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-22 20:13:00 UTC (rev 659) +++ trunk/spi.c 2009-07-23 01:33:43 UTC (rev 660) @@ -163,7 +163,7 @@ printf_debug("RDID returned"); for (i = 0; i < bytes; i++) printf_debug(" 0x%02x", readarr[i]); - printf_debug("\n"); + printf_debug(". "); return 0; } @@ -184,7 +184,7 @@ } if (ret) return ret; - printf_debug("REMS returned %02x %02x.\n", readarr[0], readarr[1]); + printf_debug("REMS returned %02x %02x. ", readarr[0], readarr[1]); return 0; } @@ -205,7 +205,7 @@ } if (ret) return ret; - printf_debug("RES returned %02x.\n", readarr[0]); + printf_debug("RES returned %02x. ", readarr[0]); return 0; } @@ -218,7 +218,7 @@ result = spi_send_command(sizeof(cmd), 0, cmd, NULL); if (result) - printf_debug("%s failed\n", __func__); + fprintf(stderr, "%s failed\n", __func__); return result; } @@ -241,12 +241,12 @@ return 0; if (!oddparity(readarr[0])) - printf_debug("RDID byte 0 parity violation.\n"); + printf_debug("RDID byte 0 parity violation. "); /* Check if this is a continuation vendor ID */ if (readarr[0] == 0x7f) { if (!oddparity(readarr[1])) - printf_debug("RDID byte 1 parity violation.\n"); + printf_debug("RDID byte 1 parity violation. "); id1 = (readarr[0] << 8) | readarr[1]; id2 = readarr[2]; if (bytes > 3) { @@ -373,7 +373,7 @@ } ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr); if (ret) - printf_debug("RDSR failed!\n"); + fprintf(stderr, "RDSR failed!\n"); return readarr[0]; } @@ -506,13 +506,14 @@ result = spi_disable_blockprotect(); if (result) { - printf_debug("spi_disable_blockprotect failed\n"); + fprintf(stderr, "spi_disable_blockprotect failed\n"); return result; } result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", + __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -551,13 +552,13 @@ result = spi_disable_blockprotect(); if (result) { - printf_debug("spi_disable_blockprotect failed\n"); + fprintf(stderr, "spi_disable_blockprotect failed\n"); return result; } result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -607,7 +608,8 @@ result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", + __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -650,7 +652,7 @@ result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -678,7 +680,7 @@ for (i = 0; i < total_size / erase_size; i++) { rc = spi_block_erase_d8(flash, i * erase_size, erase_size); if (rc) { - printf("Error erasing block at 0x%x\n", i); + fprintf(stderr, "Error erasing block at 0x%x\n", i); break; } } @@ -712,7 +714,8 @@ result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", + __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -730,7 +733,8 @@ int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { if ((addr != 0) || (blocklen != flash->total_size * 1024)) { - fprintf(stderr, "%s called with incorrect arguments\n", __func__); + fprintf(stderr, "%s called with incorrect arguments\n", + __func__); return -1; } return spi_chip_erase_60(flash); @@ -739,7 +743,8 @@ int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { if ((addr != 0) || (blocklen != flash->total_size * 1024)) { - fprintf(stderr, "%s called with incorrect arguments\n", __func__); + fprintf(stderr, "%s called with incorrect arguments\n", + __func__); return -1; } return spi_chip_erase_c7(flash); @@ -754,7 +759,7 @@ result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); if (result) - printf_debug("%s failed\n", __func__); + fprintf(stderr, "%s failed\n", __func__); return result; } @@ -786,7 +791,8 @@ result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", + __func__); } return result; } @@ -814,7 +820,8 @@ result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", + __func__); } return result; } @@ -848,11 +855,11 @@ }}; if (!len) { - printf_debug ("%s called for zero-length write\n", __func__); + fprintf(stderr, "%s called for zero-length write\n", __func__); return 1; } if (len > 256) { - printf_debug ("%s called for too long a write\n", __func__); + fprintf(stderr, "%s called for too long a write\n", __func__); return 1; } @@ -860,7 +867,8 @@ result = spi_send_multicommand(spicommands); if (result) { - printf_debug("%s failed during command execution\n", __func__); + fprintf(stderr, "%s failed during command execution\n", + __func__); } return result; } @@ -876,7 +884,7 @@ printf_debug("Some block protection in effect, disabling\n"); result = spi_write_status_register(status & ~0x3c); if (result) { - printf_debug("spi_write_status_register failed\n"); + fprintf(stderr, "spi_write_status_register failed\n"); return result; } } Modified: trunk/w29ee011.c =================================================================== --- trunk/w29ee011.c 2009-07-22 20:13:00 UTC (rev 659) +++ trunk/w29ee011.c 2009-07-23 01:33:43 UTC (rev 660) @@ -28,11 +28,10 @@ extern char *chip_to_probe; if (!chip_to_probe || strcmp(chip_to_probe, "W29EE011")) { - printf_debug("\n===\n"); - printf_debug(" Probing disabled for Winbond W29EE011 because the probing sequence puts the\n"); - printf_debug(" AMIC A49LF040A in a funky state.\n"); - printf_debug(" Use 'flashrom -c W29EE011' if you have a board with this chip."); - printf_debug("\n===\n"); + printf_debug("Probing disabled for Winbond W29EE011 because " + "the probing sequence puts the AMIC A49LF040A in " + "a funky state. Use 'flashrom -c W29EE011' if you " + "have a board with this chip.\n"); return 0; }

1 0

[PATCH] Eliminate version string duplication
by Carl-Daniel Hailfinger 22 Jul '09

22 Jul '09

Eliminate version string duplication. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-versionstring_once/flash.h =================================================================== --- flashrom-versionstring_once/flash.h (Revision 657) +++ flashrom-versionstring_once/flash.h (Arbeitskopie) @@ -379,6 +379,7 @@ /* flashrom.c */ extern int verbose; +extern const char *flashrom_version; #define printf_debug(x...) { if (verbose) printf(x); } void map_flash_registers(struct flashchip *flash); int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); Index: flashrom-versionstring_once/flashrom.c =================================================================== --- flashrom-versionstring_once/flashrom.c (Revision 657) +++ flashrom-versionstring_once/flashrom.c (Arbeitskopie) @@ -30,6 +30,7 @@ #include "flash.h" #include "flashchips.h" +const char *flashrom_version = FLASHROM_VERSION; char *chip_to_probe = NULL; int verbose = 0; int programmer = PROGRAMMER_INTERNAL; @@ -503,7 +504,7 @@ void print_version(void) { - printf("flashrom v%s\n", FLASHROM_VERSION); + printf("flashrom v%s\n", flashrom_version); } int main(int argc, char *argv[]) Index: flashrom-versionstring_once/print.c =================================================================== --- flashrom-versionstring_once/print.c (Revision 657) +++ flashrom-versionstring_once/print.c (Arbeitskopie) @@ -718,7 +718,7 @@ { time_t t = time(NULL); - printf(wiki_header, ctime(&t), FLASHROM_VERSION); + printf(wiki_header, ctime(&t), flashrom_version); print_supported_chips_wiki(); print_supported_chipsets_wiki(); print_supported_boards_wiki(); -- http://www.hailfinger.org/

2 2

[commit] r659 - trunk
by svn＠flashrom.org 22 Jul '09

22 Jul '09

Author: hailfinger Date: 2009-07-22 22:13:00 +0200 (Wed, 22 Jul 2009) New Revision: 659 Modified: trunk/flash.h trunk/flashrom.c trunk/print.c Log: Eliminate version string duplication. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-07-22 20:09:28 UTC (rev 658) +++ trunk/flash.h 2009-07-22 20:13:00 UTC (rev 659) @@ -379,6 +379,7 @@ /* flashrom.c */ extern int verbose; +extern const char *flashrom_version; #define printf_debug(x...) { if (verbose) printf(x); } void map_flash_registers(struct flashchip *flash); int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-07-22 20:09:28 UTC (rev 658) +++ trunk/flashrom.c 2009-07-22 20:13:00 UTC (rev 659) @@ -30,6 +30,7 @@ #include "flash.h" #include "flashchips.h" +const char *flashrom_version = FLASHROM_VERSION; char *chip_to_probe = NULL; int verbose = 0; int programmer = PROGRAMMER_INTERNAL; @@ -503,7 +504,7 @@ void print_version(void) { - printf("flashrom v%s\n", FLASHROM_VERSION); + printf("flashrom v%s\n", flashrom_version); } int main(int argc, char *argv[]) Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-07-22 20:09:28 UTC (rev 658) +++ trunk/print.c 2009-07-22 20:13:00 UTC (rev 659) @@ -718,7 +718,7 @@ { time_t t = time(NULL); - printf(wiki_header, ctime(&t), FLASHROM_VERSION); + printf(wiki_header, ctime(&t), flashrom_version); print_supported_chips_wiki(); print_supported_chipsets_wiki(); print_supported_boards_wiki();

1 0

[PATCH] Convert SPI write status register to multicommand
by Carl-Daniel Hailfinger 22 Jul '09

22 Jul '09

Convert SPI write status register to multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_multicommand_statusreg/spi.c =================================================================== --- flashrom-spi_multicommand_statusreg/spi.c (Revision 652) +++ flashrom-spi_multicommand_statusreg/spi.c (Arbeitskopie) @@ -690,21 +690,7 @@ result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); if (result) - printf_debug("%s failed", __func__); - if (result == SPI_INVALID_OPCODE) { - switch (spi_controller) { - case SPI_CONTROLLER_ICH7: - case SPI_CONTROLLER_ICH9: - case SPI_CONTROLLER_VIA: - printf_debug(" due to SPI master limitation, ignoring" - " and hoping it will be run as PREOP\n"); - return 0; - default: - break; - } - } - if (result) - printf_debug("\n"); + printf_debug("%s failed\n", __func__); return result; } @@ -715,11 +701,30 @@ */ int spi_write_status_register(int status) { - const unsigned char cmd[JEDEC_WRSR_OUTSIZE] = - { JEDEC_WRSR, (unsigned char)status }; + int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_EWSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_EWSR }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_WRSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - /* Send WRSR (Write Status Register) */ - return spi_send_command(sizeof(cmd), 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + } + return result; } int spi_byte_program(int addr, uint8_t byte) @@ -746,7 +751,6 @@ result = spi_send_multicommand(spicommands); if (result) { printf_debug("%s failed during command execution\n", __func__); - return result; } return result; } @@ -793,7 +797,6 @@ result = spi_send_multicommand(spicommands); if (result) { printf_debug("%s failed during command execution\n", __func__); - return result; } return result; } @@ -807,11 +810,6 @@ /* If there is block protection in effect, unprotect it first. */ if ((status & 0x3c) != 0) { printf_debug("Some block protection in effect, disabling\n"); - result = spi_write_status_enable(); - if (result) { - printf_debug("spi_write_status_enable failed\n"); - return result; - } result = spi_write_status_register(status & ~0x3c); if (result) { printf_debug("spi_write_status_register failed\n"); -- http://www.hailfinger.org/

2 3

[commit] r658 - trunk
by svn＠flashrom.org 22 Jul '09

22 Jul '09

Author: hailfinger Date: 2009-07-22 22:09:28 +0200 (Wed, 22 Jul 2009) New Revision: 658 Modified: trunk/spi.c Log: Convert SPI write status register to multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-22 15:36:50 UTC (rev 657) +++ trunk/spi.c 2009-07-22 20:09:28 UTC (rev 658) @@ -754,21 +754,7 @@ result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); if (result) - printf_debug("%s failed", __func__); - if (result == SPI_INVALID_OPCODE) { - switch (spi_controller) { - case SPI_CONTROLLER_ICH7: - case SPI_CONTROLLER_ICH9: - case SPI_CONTROLLER_VIA: - printf_debug(" due to SPI master limitation, ignoring" - " and hoping it will be run as PREOP\n"); - return 0; - default: - break; - } - } - if (result) - printf_debug("\n"); + printf_debug("%s failed\n", __func__); return result; } @@ -779,11 +765,30 @@ */ int spi_write_status_register(int status) { - const unsigned char cmd[JEDEC_WRSR_OUTSIZE] = - { JEDEC_WRSR, (unsigned char)status }; + int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_EWSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_EWSR }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_WRSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - /* Send WRSR (Write Status Register) */ - return spi_send_command(sizeof(cmd), 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + } + return result; } int spi_byte_program(int addr, uint8_t byte) @@ -810,7 +815,6 @@ result = spi_send_multicommand(spicommands); if (result) { printf_debug("%s failed during command execution\n", __func__); - return result; } return result; } @@ -857,7 +861,6 @@ result = spi_send_multicommand(spicommands); if (result) { printf_debug("%s failed during command execution\n", __func__); - return result; } return result; } @@ -871,11 +874,6 @@ /* If there is block protection in effect, unprotect it first. */ if ((status & 0x3c) != 0) { printf_debug("Some block protection in effect, disabling\n"); - result = spi_write_status_enable(); - if (result) { - printf_debug("spi_write_status_enable failed\n"); - return result; - } result = spi_write_status_register(status & ~0x3c); if (result) { printf_debug("spi_write_status_register failed\n");

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom