On 20.08.2009 20:45, svn(a)flashrom.org wrote:
> Author: uwe
> New Revision: 695
>
> Mark the following boards as non-working for now:
>
> - ASRock K7VT4A+ (reported by Udu Ogah <putlinuxonit(a)gmail.com>)
> Chipset detect, but no chip.
>
Needs board enable. It's so old that it has parallel flash which
sometimes needs the write line enabled to respond to ID commands.
> - ASUS M2N68 (reported by Udu Ogah <putlinuxonit(a)gmail.com>)
> Chipset detect, but no chip.
>
Needs nForce SPI support, so it's not a board problem. Please remove again.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
First time i successfully dug one out of an AMI Bios. int16h ax=0xE0
is indeed the ticket. This one has its int16h vector at the standard
location it seems: 0xF000:0xE82E. Not sure how general this is for AMI.
It does seem that i will require dumps of the F segment for this to
work though.
Luc Verhaegen.
Hi All,
This board has it's chipset detected but the eeprom flash chip isn't even
though it's an MXIC25L8005 chip which is listed in "flashrom -L"
Just thought i'll put up the dumps. Do let me know if you need further
testing.
Udu E. Ogah
Hi, I'm new to the list.
I've been playing with flashrom some, and it's great. Thanks for the work guys.
I've put a ZIF socket on a 3com NIC, for external programming. It
seems to be working great.
I've taken a picture, maybe it would be useful for the wiki or something.
I'm not a terribly good programmer, but I'm pretty good with hardware
generally...
I'm going to be doing some more hardware work in the future.
I think I'll make an ISA card with 32 and 28pin ZIF, and PLCC socket,
on the 440BX board I have, addr is off the ISA bus, so I'll just
buffer that. Data seems to go to the superIO chip, so I'll have to
have a cheater socket under the stock BIOS ROM to steal /CS D0:7, etc.
I think I'll buffer all the lines on the card, so that the bus doesn't
get fried in case of a fried chip or whatnot. It will be a sort of
general purpose flashing board. I think I'll try and implement support
for the older 27xxx EPROMs at some point, which shouldn't be too
difficult I don't think?
anyways, here's the picture if anyone wants it:
http://electrontube.org/img/3com_prog.jpg
Mark
Hi All,
I'd like to report than an Asus A7V600-X with bios 1009 works with flashrom
0.9.0 stable. The stock version found on the latest stable realease of
systemrescuecd 1.2.3.
There are some caveats however...
find below a few dumps for your review.
root@sysresccd% ./flashrom
*flashrom v0.9.0*
No coreboot table found.
*Found chipset "VIA VT8237"*, enabling flash write... OK.
This chipset supports the following protocols: Non-SPI.
Calibrating delay loop... OK.
*Found chip "PMC Pm49FL002" (256 KB, LPC,FWH)* at physical address
0xfffc0000.
No operations were specified.
The strange thing is that when i tried using the bleeding edge r694 i get
the following
root@sysresccd /root % ./flashrom -w fimrwarea7v600-x.old
*flashrom v0.9.0-r694*
No coreboot table found.
Found chipset "VIA VT8237", enabling flash write... OK.
This chipset supports the following protocols: Non-SPI.
Calibrating delay loop... OK.
Found chip "PMC Pm49FL002" (256 KB, LPC,FWH) at physical address 0xfffc0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Writing flash chip... Programming page: ERASE FAILED at 0x00000000!
Expected=0xff, Read=0x03, failed byte count from 0x00000000-0x00003fff:
0x33a6
ERASE FAILED!
ERASE FAILED!
FAILED!
Your flash chip is in an unknown state.
Get help on IRC at irc.freenode.net channel #flashrom or
mail flashrom(a)flashrom.org
------------------------------------------------------------
DO NOT REBOOT OR POWEROFF!
i then use the stock 0.9.0 version to reprogramme and i get this
root@sysresccd /root % flashrom -w fimrwarea7v600-x.old
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "VIA VT8237", enabling flash write... OK.
Found chip "PMC Pm49FL002" (256 KB) at physical address 0xfffc0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 0015 at address: 0x0003c000
i* verify if it's written ok*
root@sysresccd /root % flashrom -v fimrwarea7v600-x.old
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "VIA VT8237", enabling flash write... OK.
Found chip "PMC Pm49FL002" (256 KB) at physical address 0xfffc0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Verifying flash... VERIFIED.
root@sysresccd /root % flashrom -R
*flashrom v0.9.0*
so basically,
When i use the stock v0.9.0 to dump and write back the firmware on my
A7v600-x, everything is fine.
when i try to use the current svn. r694, it fails.
i had to reflash with stable 0.9.0 after the r694 failed. I've successfully
rebooted and verified no damage done to motherboard.
interestingly, I downloaded the latest version of the bios (1009) off asus
website, same version as i'm running and when i unzip it yeilds an *.awd ( i
guess award) file.
This file is supposed to be the same version as the one i'm running but when
i try both stock v0.9.0 and r694 on it. they both fail. Beats me. maybe the
awardflasher file format is different from what I get when i do* "flashrom
-r firmware-old.bin"*
*
*
I've also compared md5 checksums on both the firmware-old.bin and the one
downloaded off the asus website but they both give different results even
though they are meant to be the same version (1009).
Anyway, hats-off to the devs for all the good work.
idlogin
--
Udu E. Ogah
.~~~~~~~~~~.
attachments
I've attached flashrom -V dumps for both 0.9.0 and r694
latest Asus bios for A7v600-X
Flashrom has the ability to use layout files with romentries, but this
feature was not adapted to the programmer infrastructure and had
undefined behaviour for flasher!=internal.
The romentry handling had an off-by-one error which caused all copies to
end up one byte short.
Fix these issues.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-romentries_programmer/flash.h
===================================================================
--- flashrom-romentries_programmer/flash.h (Revision 692)
+++ flashrom-romentries_programmer/flash.h (Arbeitskopie)
@@ -422,7 +422,7 @@
int show_id(uint8_t *bios, int size, int force);
int read_romlayout(char *name);
int find_romentry(char *name);
-int handle_romentries(uint8_t *buffer, uint8_t *content);
+int handle_romentries(uint8_t *buffer, struct flashchip *flash);
/* cbtable.c */
int coreboot_init(void);
Index: flashrom-romentries_programmer/flashrom.c
===================================================================
--- flashrom-romentries_programmer/flashrom.c (Revision 692)
+++ flashrom-romentries_programmer/flashrom.c (Arbeitskopie)
@@ -930,8 +930,7 @@
// This should be moved into each flash part's code to do it
// cleanly. This does the job.
- /* FIXME: Adapt to the external flasher infrastructure. */
- handle_romentries(buf, (uint8_t *) flash->virtual_memory);
+ handle_romentries(buf, flash);
// ////////////////////////////////////////////////////////////
Index: flashrom-romentries_programmer/layout.c
===================================================================
--- flashrom-romentries_programmer/layout.c (Revision 692)
+++ flashrom-romentries_programmer/layout.c (Arbeitskopie)
@@ -196,11 +196,11 @@
return -1;
}
-int handle_romentries(uint8_t *buffer, uint8_t *content)
+int handle_romentries(uint8_t *buffer, struct flashchip *flash)
{
int i;
- // This function does not safe flash write cycles.
+ // This function does not save flash write cycles.
//
// Also it does not cope with overlapping rom layout
// sections.
@@ -220,10 +220,9 @@
if (rom_entries[i].included)
continue;
- /* FIXME: Adapt to the external flasher infrastructure. */
- memcpy(buffer + rom_entries[i].start,
- content + rom_entries[i].start,
- rom_entries[i].end - rom_entries[i].start);
+ flash->read(flash, buffer + rom_entries[i].start,
+ rom_entries[i].start,
+ rom_entries[i].end - rom_entries[i].start + 1);
}
return 0;
--
http://www.hailfinger.org/