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9188 discussions

Success: flashing BIOS on MSI K9AG Neo2-Digital (MS-7368)
by christian.ch.heinz＠gmail.com 28 Sep '09

28 Sep '09

Hello flashrom people, here is a quick success report on using flashrom with the MS-7368 (revision 1.0; I don't believe there are any later revisions, but I'm not sure). The exact flashrom version used was v0.9.1, SVN revision r721. In particular, I first upgraded the BIOS from version 1.9 to 1.10 (named 1.A on the MSI website), then downgraded to 1.7 and re-upgraded to 1.8 and finally to 1.10 again, with a reboot following each flashing. I also played around with a few of the flashrom options and everything worked flawlessly OOTB. Some details: # ./flashrom -r ... flashrom v0.9.1-runknown No coreboot table found. Found chipset "AMD SB600", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Calibrating delay loop... OK. Found chip "Winbond W25x80" (1024 KB, SPI) at physical address 0xfff00000. Reading flash... done. # ./superiotool superiotool r4623 Found Fintek F71882FG/F71883FG (vid=0x3419, id=0x4105) at 0x4e Platform: Linux 2.6.30-ARCH x86_64 AMD Athlon(tm) Dual Core Processor 4850e Probably nothing more to add, except that flashrom absolutely rocks :) Thanks and kudos, ch

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flashrom works with an asus M3A78-EM
by Joshua Roys 28 Sep '09

28 Sep '09

# flashrom -w M3A78-EM-1902.ROM flashrom v0.9.1-r710 No coreboot table found. Found chipset "AMD SB700/SB710/SB750", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Calibrating delay loop... OK. Found chip "Winbond W25x80" (1024 KB, SPI) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... done. Programming flash................................ done. COMPLETE. Verifying flash... VERIFIED. Thanks, Joshua Roys

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3C905CX-TX-M not supported (But flashrom thinks it is).
by Marko Kraljevic 25 Sep '09

25 Sep '09

Hi, the other day I got a 3C905CX-TX-M NIC. I don't have the computer I tested it on up and running right now, but it is non-functional. Flashrom can not detect the AT49BV512 on it. A forced read delivers all 0xFF's, which I assume it is pulling out of the ether. I guess it *could* be blank; It seems unlikely to not autodetect and function on a forced read though. Anyways, this wouldn't be an issue, but the PCI device ID is the same as the 3C905C-TX [dev_id 0x9200] (*iirc - it might be one of the other supported 3C905 NICs*), so flashrom reports it as a supported NIC. I guess there should be a note somewhere, specifying that flashrom doesn't support 3com NICs with the newer, smaller, BGA package ASIC. Here's a photo of the card. On mine the flash is soldered on, but I believe I've seen socketed versions in the past. If they're all soldered on, I guess it doesn't matter much - apart from saving someone the time of soldering on a socket. http://electrontube.org/open/3com_mod/3C905CX-TX-M.jpg I'll try and get that computer back up this weekend and post the output. Mark

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[commit] r735 - trunk
by svn＠flashrom.org 24 Sep '09

24 Sep '09

Author: uwe Date: 2009-09-25 03:31:51 +0200 (Fri, 25 Sep 2009) New Revision: 735 Modified: trunk/print_wiki.c Log: Enable drkaiser programmer support in wiki output (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/print_wiki.c =================================================================== --- trunk/print_wiki.c 2009-09-25 01:22:42 UTC (rev 734) +++ trunk/print_wiki.c 2009-09-25 01:31:51 UTC (rev 735) @@ -541,7 +541,7 @@ print_supported_pcidevs_wiki(nics_3com); #endif #if DRKAISER_SUPPORT == 1 - /* FIXME: drkaiser_pcidev is missing here. */ + print_supported_pcidevs_wiki(drkaiser_pcidev); #endif #if SATASII_SUPPORT == 1 print_supported_pcidevs_wiki(satas_sii);

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[commit] r734 - trunk
by svn＠flashrom.org 24 Sep '09

24 Sep '09

Author: uwe Date: 2009-09-25 03:22:42 +0200 (Fri, 25 Sep 2009) New Revision: 734 Modified: trunk/board_enable.c trunk/print.c trunk/print_wiki.c Log: Mark the following boards as OK: - ASUS M3A78-EM (reported by Christian Heinz <christian.ch.heinz(a)gmail.com>) http://www.flashrom.org/pipermail/flashrom/2009-September/000629.html - MSI MS-7368 (K9AG Neo2-Digital) (reported by Joshua Roys <roysjosh(a)gmail.com>) http://www.flashrom.org/pipermail/flashrom/2009-September/000632.html - GIGABYTE GA-MA770T-UD3P (reported by Kevin Sopp <baraclese(a)googlemail.com>) http://www.flashrom.org/pipermail/flashrom/2009-September/000529.html - Elitegroup P6VAP-A+ Tested by Uwe Hermann <uwe(a)hermann-uwe.de> on hardware. Maximum supported chip size in this board is 256 KB. Small changes in print.c were required to adjust for longer board names. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-09-25 01:09:18 UTC (rev 733) +++ trunk/board_enable.c 2009-09-25 01:22:42 UTC (rev 734) @@ -1064,6 +1064,7 @@ { "ASUS", "M2A-VM", }, { "ASUS", "M2N-E", }, { "ASUS", "M2V", }, + { "ASUS", "M3A78-EM", }, { "ASUS", "P2B", }, { "ASUS", "P2B-D", }, { "ASUS", "P2B-DS", }, @@ -1075,6 +1076,7 @@ { "ASUS", "P6T Deluxe V2", }, { "A-Trend", "ATC-6220", }, { "BCOM", "WinNET100", }, + { "Elitegroup", "P6VAP-A+", }, { "GIGABYTE", "GA-6BXC", }, { "GIGABYTE", "GA-6BXDU", }, { "GIGABYTE", "GA-6ZMA", }, @@ -1083,6 +1085,7 @@ { "GIGABYTE", "GA-EX58-UD4P", }, { "GIGABYTE", "GA-MA78GPM-DS2H", }, { "GIGABYTE", "GA-MA790GP-DS4H", }, + { "GIGABYTE", "GA-MA770T-UD3P", }, { "Intel", "EP80759", }, { "Jetway", "J7F4K1G5D-PB", }, { "MSI", "MS-6570 (K7N2)", }, @@ -1091,6 +1094,7 @@ { "MSI", "MS-7236 (945PL Neo3)", }, { "MSI", "MS-7255 (P4M890M)", }, { "MSI", "MS-7345 (P35 Neo2-FIR)", }, + { "MSI", "MS-7368 (K9AG Neo2-Digital)", }, { "NEC", "PowerMate 2000", }, { "PC Engines", "Alix.1c", }, { "PC Engines", "Alix.2c2", }, Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-09-25 01:09:18 UTC (rev 733) +++ trunk/print.c 2009-09-25 01:22:42 UTC (rev 734) @@ -181,7 +181,7 @@ for (j = 0; j < 25 - strlen(b[i].vendor); j++) printf(" "); printf("%s", b[i].name); - for (j = 0; j < 23 - strlen(b[i].name); j++) + for (j = 0; j < 28 - strlen(b[i].name); j++) printf(" "); printf("\n"); } @@ -196,7 +196,7 @@ boardcount++; printf("\nSupported boards which need write-enable code (total: %d):" - "\n\nVendor: Board: " + "\n\nVendor: Board: " "Required option:\n\n", boardcount); for (i = 0; b[i].vendor_name != NULL; i++) { @@ -204,7 +204,7 @@ for (j = 0; j < 25 - strlen(b[i].vendor_name); j++) printf(" "); printf("%s", b[i].board_name); - for (j = 0; j < 25 - strlen(b[i].board_name); j++) + for (j = 0; j < 30 - strlen(b[i].board_name); j++) printf(" "); if (b[i].lb_vendor != NULL) printf("-m %s:%s\n", b[i].lb_vendor, b[i].lb_part); Modified: trunk/print_wiki.c =================================================================== --- trunk/print_wiki.c 2009-09-25 01:09:18 UTC (rev 733) +++ trunk/print_wiki.c 2009-09-25 01:22:42 UTC (rev 734) @@ -119,6 +119,7 @@ { "ASUS", "M2A-VM", "http://www.asus.com.tw/products.aspx?l1=3&l2=101&l3=496&l4=0&model=1568&mod…" }, { "ASUS", "M2N-E", "http://www.asus.com/products.aspx?l1=3&l2=101&l3=308&l4=0&model=1181&modelm…" }, { "ASUS", "M2V", "http://asus.com/Product.aspx?P_ID=OqYlEDFfF6ZqZGvp" }, + { "ASUS", "M3A78-EM", "http://www.asus.com/product.aspx?P_ID=KjpYqzmAd9vsTM2D" }, { "ASUS", "P2B", "http://www.motherboard.cz/mb/asus/P2B.htm" }, { "ASUS", "P2B-D", "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/" }, { "ASUS", "P2B-DS", "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/" }, @@ -130,6 +131,7 @@ { "ASUS", "P6T Deluxe V2", "http://www.asus.com/product.aspx?P_ID=iRlP8RG9han6saZx" }, { "A-Trend", "ATC-6220", "http://www.motherboard.cz/mb/atrend/atc6220.htm" }, { "BCOM", "WinNET100", "http://www.coreboot.org/BCOM_WINNET100" }, + { "Elitegroup", "P6VAP-A+", "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&…" }, { "GIGABYTE", "GA-6BXC", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ClassVal…" }, { "GIGABYTE", "GA-6BXDU", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ProductI…" }, { "GIGABYTE", "GA-6ZMA", "http://www.gigabyte.de/Support/Motherboard/BIOS_Model.aspx?ProductID=3289" }, @@ -137,6 +139,7 @@ { "GIGABYTE", "GA-EP35-DS3L", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Overview.aspx?Prod…" }, { "GIGABYTE", "GA-MA790GP-DS4H", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ProductI…" }, { "GIGABYTE", "GA-MA78GPM-DS2H", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ProductI…" }, + { "GIGABYTE", "GA-MA770T-UD3P", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ProductI…" }, { "Intel", "EP80759", NULL }, { "Jetway", "J7F4K1G5D-PB", "http://www.jetway.com.tw/jetway/system/productshow2.asp?id=389&proname=J7F4…" }, { "MSI", "MS-6570 (K7N2)", "http://www.msi-computer.de/index.php?func=proddesc&prod_no=519&maincat_no=1" }, @@ -145,6 +148,7 @@ { "MSI", "MS-7236 (945PL Neo3)", "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1173" }, { "MSI", "MS-7255 (P4M890M)", "http://www.tcsbahamas.com/P4M89.htm" }, { "MSI", "MS-7345 (P35 Neo2-FIR)","http://www.msi.com/index.php?func=prodcpusupport&maincat_no=1&cat2_no=170&c…" }, + { "MSI", "MS-7368 (K9AG Neo2-Digital)", "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1241" }, { "NEC", "PowerMate 2000", "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/" }, { "PC Engines", "Alix.1c", "http://pcengines.ch/alix1c.htm" }, { "PC Engines", "Alix.2c2", "http://pcengines.ch/alix2c2.htm" },

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[commit] r733 - trunk
by svn＠flashrom.org 24 Sep '09

24 Sep '09

Author: uwe Date: 2009-09-25 03:09:18 +0200 (Fri, 25 Sep 2009) New Revision: 733 Modified: trunk/flashchips.c Log: Mark the SST SST49LF003A/B as read-tested. See http://www.coreboot.org/pipermail/coreboot/2009-July/050675.html. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-09-25 01:05:06 UTC (rev 732) +++ trunk/flashchips.c 2009-09-25 01:09:18 UTC (rev 733) @@ -2132,7 +2132,7 @@ .model_id = SST_49LF003A, .total_size = 384, .page_size = 64 * 1024, - .tested = TEST_OK_PROBE, + .tested = TEST_OK_PR, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub,

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[commit] r732 - trunk
by svn＠flashrom.org 24 Sep '09

24 Sep '09

Author: uwe Date: 2009-09-25 03:05:06 +0200 (Fri, 25 Sep 2009) New Revision: 732 Modified: trunk/chipset_enable.c Log: Add chipset support for VIA VT82C596 by adding a PCI ID (trivial). This is successfully tested by me on the Elitegroup P6VAP-A+ board. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-09-23 22:01:33 UTC (rev 731) +++ trunk/chipset_enable.c 2009-09-25 01:05:06 UTC (rev 732) @@ -1046,6 +1046,7 @@ {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, + {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111},

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actual bios settings
by Bart Swinnen 24 Sep '09

24 Sep '09

Hi Does flashrom normally also reads actual BIOS setting of a board? I'm trying flashrom on IEI Wafer-LX-800 It finds PMC Pm49FL004 device and I can read it. It gives me a 512k bin file. If I write this file to another board of its kind, I still have the actual settings of that board and not the one stored in the board where I had the bin from. Am I missing something? Kind regards Bart Swinnen

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[PATCH] Switch SST49LF004A/B to blockwise erase
by Carl-Daniel Hailfinger 23 Sep '09

23 Sep '09

Switch SST49LF004A/B to block erase, remove the hack which simulated (unsupported) chip erase. Annotate SST49LF004B quirks for TBL#. Add TEST_OK_PRW which is useful when a PREW chip gets a new erase routine. Change a few erase function prototypes to use unsigned int instead of int. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-sst49lf004b_eraseblocks/flash.h =================================================================== --- flashrom-sst49lf004b_eraseblocks/flash.h (Revision 727) +++ flashrom-sst49lf004b_eraseblocks/flash.h (Arbeitskopie) @@ -225,6 +225,7 @@ #define TEST_OK_WRITE (1 << 3) #define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ) #define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE) +#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE) #define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE) #define TEST_OK_MASK 0x0f @@ -596,8 +597,8 @@ int probe_jedec(struct flashchip *flash); int erase_chip_jedec(struct flashchip *flash); int write_jedec(struct flashchip *flash, uint8_t *buf); -int erase_sector_jedec(struct flashchip *flash, unsigned int page, int pagesize); -int erase_block_jedec(struct flashchip *flash, unsigned int page, int blocksize); +int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize); +int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize); int write_sector_jedec(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size); @@ -657,6 +658,7 @@ /* sst_fwhub.c */ int probe_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub(struct flashchip *flash); +int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size); int write_sst_fwhub(struct flashchip *flash, uint8_t *buf); /* w39v040c.c */ Index: flashrom-sst49lf004b_eraseblocks/jedec.c =================================================================== --- flashrom-sst49lf004b_eraseblocks/jedec.c (Revision 727) +++ flashrom-sst49lf004b_eraseblocks/jedec.c (Arbeitskopie) @@ -175,7 +175,7 @@ return 0; } -int erase_sector_jedec(struct flashchip *flash, unsigned int page, int pagesize) +int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize) { chipaddr bios = flash->virtual_memory; @@ -204,7 +204,7 @@ return 0; } -int erase_block_jedec(struct flashchip *flash, unsigned int block, int blocksize) +int erase_block_jedec(struct flashchip *flash, unsigned int block, unsigned int blocksize) { chipaddr bios = flash->virtual_memory; Index: flashrom-sst49lf004b_eraseblocks/flashchips.c =================================================================== --- flashrom-sst49lf004b_eraseblocks/flashchips.c (Revision 727) +++ flashrom-sst49lf004b_eraseblocks/flashchips.c (Arbeitskopie) @@ -2141,6 +2141,9 @@ }, { + /* Contrary to the data sheet, TBL# on the SST49LF004B affects the top 128kB (instead of 64kB) + * and is only honored for 64k block erase, but not 4k sector erase. + */ .vendor = "SST", .name = "SST49LF004A/B", .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */ @@ -2148,10 +2151,23 @@ .model_id = SST_49LF004A, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, /* missing unlock */ + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sst_fwhub_block, /* same as erase_sector_block, but with unlock */ + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in PP mode */ + }, + }, .write = write_sst_fwhub, .read = read_memmapped, }, Index: flashrom-sst49lf004b_eraseblocks/sst_fwhub.c =================================================================== --- flashrom-sst49lf004b_eraseblocks/sst_fwhub.c (Revision 727) +++ flashrom-sst49lf004b_eraseblocks/sst_fwhub.c (Arbeitskopie) @@ -94,7 +94,7 @@ return 1; } -int erase_sst_fwhub_block(struct flashchip *flash, int offset, int page_size) +int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size) { uint8_t blockstatus = clear_sst_fwhub_block_lock(flash, offset); -- http://www.hailfinger.org/

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[commit] r731 - trunk
by svn＠flashrom.org 23 Sep '09

23 Sep '09

Author: hailfinger Date: 2009-09-24 00:01:33 +0200 (Thu, 24 Sep 2009) New Revision: 731 Modified: trunk/flash.h trunk/flashchips.c trunk/jedec.c trunk/sst_fwhub.c Log: Switch SST49LF004A/B to block erase, remove the hack which simulated (unsupported) chip erase. Annotate SST49LF004B quirks for TBL#. Add TEST_OK_PRW which is useful when a PREW chip gets a new erase routine. Change a few erase function prototypes to use unsigned int instead of int. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Luc Verhaegen <libv(a)skynet.be> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-09-23 21:58:34 UTC (rev 730) +++ trunk/flash.h 2009-09-23 22:01:33 UTC (rev 731) @@ -225,6 +225,7 @@ #define TEST_OK_WRITE (1 << 3) #define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ) #define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE) +#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE) #define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE) #define TEST_OK_MASK 0x0f @@ -596,8 +597,8 @@ int probe_jedec(struct flashchip *flash); int erase_chip_jedec(struct flashchip *flash); int write_jedec(struct flashchip *flash, uint8_t *buf); -int erase_sector_jedec(struct flashchip *flash, unsigned int page, int pagesize); -int erase_block_jedec(struct flashchip *flash, unsigned int page, int blocksize); +int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize); +int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize); int write_sector_jedec(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size); @@ -657,6 +658,7 @@ /* sst_fwhub.c */ int probe_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub(struct flashchip *flash); +int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size); int write_sst_fwhub(struct flashchip *flash, uint8_t *buf); /* w39v040c.c */ Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-09-23 21:58:34 UTC (rev 730) +++ trunk/flashchips.c 2009-09-23 22:01:33 UTC (rev 731) @@ -2141,6 +2141,9 @@ }, { + /* Contrary to the data sheet, TBL# on the SST49LF004B affects the top 128kB (instead of 64kB) + * and is only honored for 64k block erase, but not 4k sector erase. + */ .vendor = "SST", .name = "SST49LF004A/B", .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */ @@ -2151,7 +2154,20 @@ .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, /* missing unlock */ + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sst_fwhub_block, /* same as erase_sector_block, but with unlock */ + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in PP mode */ + }, + }, .write = write_sst_fwhub, .read = read_memmapped, }, Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2009-09-23 21:58:34 UTC (rev 730) +++ trunk/jedec.c 2009-09-23 22:01:33 UTC (rev 731) @@ -175,7 +175,7 @@ return 0; } -int erase_sector_jedec(struct flashchip *flash, unsigned int page, int pagesize) +int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize) { chipaddr bios = flash->virtual_memory; @@ -204,7 +204,7 @@ return 0; } -int erase_block_jedec(struct flashchip *flash, unsigned int block, int blocksize) +int erase_block_jedec(struct flashchip *flash, unsigned int block, unsigned int blocksize) { chipaddr bios = flash->virtual_memory; Modified: trunk/sst_fwhub.c =================================================================== --- trunk/sst_fwhub.c 2009-09-23 21:58:34 UTC (rev 730) +++ trunk/sst_fwhub.c 2009-09-23 22:01:33 UTC (rev 731) @@ -94,7 +94,7 @@ return 1; } -int erase_sst_fwhub_block(struct flashchip *flash, int offset, int page_size) +int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size) { uint8_t blockstatus = clear_sst_fwhub_block_lock(flash, offset);

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