flashrom

flashrom@flashrom.org

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9188 discussions

successful BIOS flash report
by John-Paul Vanderjagt 15 Feb '12

15 Feb '12

Dear maintainers at flashrom(a)flashrom.org. FYI, I'd like to report a successful BIOS flash on an Asus P5K-V main board. See relevant info below. You may update your list http://flashrom.org/Supported_hardware with this info. Thanks for producing flashrom. Kind regards. John-Paul Vanderjagt. Wellington, New Zealand. <flashrom at vanderjagt dot co dot nz> -- Manual of main board: http://dlcdnet.asus.com/pub/ASUS/mb/socket775/P5K-V/e3269_p5k-v_manual.zip % rpm -qa flashrom flashrom-0.9.3_r1246-3.1.i586 % uname -a Linux server 2.6.37.6-0.11-default #1 SMP 2011-12-19 23:39:38 +0100 i686 i686 i386 GNU/Linux % cat /etc/SuSE-release openSUSE 11.4 (i586) VERSION = 11.4 CODENAME = Celadon % cat dmidecode.out_after_bios_upgrade # dmidecode 2.11 SMBIOS 2.4 present. 70 structures occupying 2500 bytes. Table at 0x000F06F0. Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: American Megatrends Inc. Version: 1002 Release Date: 06/18/2008 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 1024 kB Characteristics: [...] BIOS Revision: 8.12 Handle 0x0001, DMI type 1, 27 bytes System Information Manufacturer: System manufacturer Product Name: P5K-V Version: System Version Serial Number: System Serial Number UUID: 00020003-0004-0005-0006-000700080009 Wake-up Type: Power Switch SKU Number: To Be Filled By O.E.M. Family: To Be Filled By O.E.M. Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: ASUSTeK Computer INC. Product Name: P5K-V Version: Rev 1.xx Serial Number: MB-1234567890 Asset Tag: To Be Filled By O.E.M. Features: Board is a hosting board Board is replaceable Location In Chassis: To Be Filled By O.E.M. Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 [...] % diff dmidecode.out_after_bios_upgrade dmidecode.out_before_bios_upgrade 3,4c3,4 < 70 structures occupying 2500 bytes. < Table at 0x000F06F0. --- > 70 structures occupying 2492 bytes. > Table at 0x000F06E0. 9,10c9,10 < Version: 1002 < Release Date: 06/18/2008 --- > Version: 0212 > Release Date: 05/24/2007 48c48 < UUID: 00020003-0004-0005-0006-000700080009 --- > UUID: A095EBCD-CBFE-D511-B2E2-001BFC90E48F 58c58 < Serial Number: MB-1234567890 --- > Serial Number: MS1C75B79Y01238 80c80 < OEM Information: 0x00000004 --- > OEM Information: 0x00000001 590c590 < String 1: To Be Filled By O.E.M. --- > String 1: 001BFC90E48F [...] --

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Re: [flashrom] Just asking some basic advice before I flash the BIOS.
by Stefan Tauner 15 Feb '12

15 Feb '12

On Wed, 15 Feb 2012 12:20:56 -0200 Sergio Cipolla <secipolla(a)gmail.com> wrote: > OK. Thank you all again. Everything is fine with the new BIOS. > So maybe just the chip info should be updated to support write? > Just to make sure again, my mobo is K7VTA3/KT333:3.1 (3.1 being the > PCB version). hello sergio and thanks for your report. The mainboard as well as the chip status have already been updated in the past (might not show up yet on the website though). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] Manpage improvements.
by Stefan Tauner 15 Feb '12

15 Feb '12

The sections describing the various options of the internal and dummy programmers have grown out of proportions. This patch adds some headlines to devide the unrelated topics a bit (with .TP commands). The previous indented paragraphs for the various programmers were transformed to subsections (.SS). Also, rephrase the documention related to laptops completely to make it less redundant and more informative. Document the laptop=this_is_not_a_laptop internal programmer parameter Change the contact info in the bugs section by removing the trac reference and adding IRC (and the pastebin) instead. Remove some superfluous white space. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashrom.8 | 111 +++++++++++++++++++++++++++++++++++++++++------------------ 1 files changed, 77 insertions(+), 34 deletions(-) diff --git a/flashrom.8 b/flashrom.8 index 2f23cb8..c4356f8 100644 --- a/flashrom.8 +++ b/flashrom.8 @@ -1,4 +1,4 @@ -.TH FLASHROM 8 "Jul 25, 2011" +.TH FLASHROM 8 "Feb 15, 2012" .SH NAME flashrom \- detect, read, write, verify and erase flash chips .SH SYNOPSIS @@ -223,8 +223,11 @@ parameters. These parameters are separated from the programmer name by a colon. While some programmers take arguments at fixed positions, other programmers use a key/value interface in which the key and value is separated by an equal sign and different pairs are separated by a comma or a colon. -.TP +.SS .BR "internal " programmer +.TP +.B Board Enables +.sp Some mainboards require to run mainboard specific code to enable flash erase and write support (and probe support on old systems with parallel flash). The mainboard brand and model (if it requires specific code) is usually @@ -275,17 +278,22 @@ has been written because it is known that writing/erasing without the board enable is going to fail. In any case (success or failure), please report to the flashrom mailing list, see below. .sp +.TP +.B Coreboot +.sp On systems running coreboot, flashrom checks whether the desired image matches your mainboard. This needs some special board ID to be present in the image. If flashrom detects that the image you want to write and the current board do not match, it will refuse to write the image unless you specify .sp .B " flashrom \-p internal:boardmismatch=force" +.TP +.B ITE IT87 Super I/O .sp If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus translation, flashrom should autodetect that configuration. If you want to set the I/O base port of the IT87 series SPI controller manually instead of -using the value provided by the BIOS, use the +using the value provided by the BIOS, use the .sp .B " flashrom \-p internal:it87spiport=portnum" .sp @@ -295,6 +303,9 @@ is the I/O port number (must be a multiple of 8). In the unlikely case flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug report so we can diagnose the problem. .sp +.TP +.B Intel chipsets +.sp If you have an Intel chipset with an ICH8 or later southbridge with SPI flash attached, and if a valid descriptor was written to it (e.g. by the vendor), the chipset provides an alternative way to access the flash chip(s) named @@ -331,6 +342,8 @@ settings. The default value for ICH7 is given in the example below. .sp Example: .B "flashrom \-p internal:fwh_idsel=0x001122334567" +.TP +.B Laptops .sp Using flashrom on laptops is dangerous and may easily make your hardware unusable (see also the @@ -338,21 +351,31 @@ unusable (see also the section). The embedded controller (EC) in these machines often interacts badly with flashing. .B http://www.flashrom.org/Laptops -has more information. If flash is shared with the EC, erase is guaranteed to -brick your laptop and write is very likely to brick your laptop. -Chip read and probe may irritate your EC and cause fan failure, backlight -failure, sudden poweroff, and other nasty effects. -flashrom will attempt to detect laptops and abort immediately for safety -reasons. -If you want to proceed anyway at your own risk, use +has more information. For example the EC firmware sometimes resides on the same +flash chip as the host firmware. While flashrom tries to change the contents of +that memory the EC might need to fetch new instructions or data from it and +could stop working correctly. Probing for and reading from the chip may also +irritate your EC and cause fan failure, backlight failure, sudden poweroff, and +other nasty effects. flashrom will attempt to detect if it is running on a +laptop and abort immediately for safety reasons if it clearly identifies the +host computer as one. If you want to proceed anyway at your own risk, use .sp .B " flashrom \-p internal:laptop=force_I_want_a_brick" .sp -You have been warned. -.sp We will not help you if you force flashing on a laptop because this is a really dumb idea. -.TP +.sp +You have been warned. +.sp +Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect +laptops. Some vendors did not implement those bits correctly or set them to +generic and/or dummy values. flashrom will then issue a warning and bail out +like above. In this case you can use +.sp +.B " flashrom \-p internal:laptop=this_is_not_a_laptop" +.sp +to tell flashrom (at your own risk) that it does not running on a laptop. +.SS .BR "dummy " programmer The dummy programmer operates on a buffer in memory only. It provides a safe and fast way to test various aspects of flashrom and is mainly used in @@ -394,6 +417,8 @@ vendor): .sp Example: .B "flashrom -p dummy:emulate=SST25VF040.REMS" +.TP +.B Persistent images .sp If you use flash chip emulation, flash image persistence is available as well by using the @@ -407,6 +432,8 @@ where the chip contents on flashrom shutdown are written to. .sp Example: .B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin" +.TP +.B SPI write chunk size .sp If you use SPI flash chip emulation for a chip which supports SPI page write with the default opcode, you can set the maximum allowed write chunk size with @@ -421,6 +448,8 @@ is the number of bytes (min. 1, max. 256). Example: .sp .B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5" +.TP +.B SPI blacklist .sp To simulate a programmer which refuses to send certain SPI commands to the flash chip, you can specify a blacklist of SPI commands with the @@ -433,6 +462,9 @@ controller refuses to run command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom will detect an error during command execution. .sp +.TP +.B SPI ignorelist +.sp To simulate a flash chip which ignores (doesn't support) certain SPI commands, you can specify an ignorelist of SPI commands with the .sp @@ -443,7 +475,7 @@ SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom won't detect an error during command execution. -.TP +.SS .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\ " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\ " , " satamv" ", and " atahpt " programmers @@ -465,7 +497,7 @@ is the PCI function number of the desired device. .sp Example: .B "flashrom \-p nic3com:pci=05:04.0" -.TP +.SS .BR "ft2232_spi " programmer An optional parameter specifies the controller type and interface/port it should support. For that you have to use the @@ -486,7 +518,7 @@ The default model is .B 4232H and the default interface is .BR B . -.TP +.SS .BR "serprog " programmer A mandatory parameter specifies either a serial device/baud combination or an IP/port combination for communication with the @@ -502,7 +534,7 @@ syntax and for IP, you have to use instead. More information about serprog is available in .B serprog-protocol.txt in the source distribution. -.TP +.SS .BR "buspirate_spi " programmer A required .B dev @@ -518,7 +550,7 @@ where can be .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M (in Hz). The default is the maximum frequency of 8 MHz. -.TP +.SS .BR "dediprog " programmer An optional .B voltage @@ -534,7 +566,7 @@ where can be .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V or the equivalent in mV. -.TP +.SS .BR "rayer_spi " programmer The default I/O base address used for the parallel port is 0x378 and you can use the optional @@ -564,9 +596,9 @@ More information about the RayeR hardware is available at .BR "http://rayer.ic.cz/elektro/spipgm.htm " . The schematic of the Xilinx DLC 5 was published at .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " . -.TP +.SS .BR "ogp_spi " programmer -The flash ROM chip to access must be specified with the +The flash ROM chip to access must be specified with the .B rom parameter. .sp @@ -650,26 +682,37 @@ in .B "/etc/rc.securelevel" and rebooting, or rebooting into single user mode. .SH BUGS -Please report any bugs at -.sp -.B " http://www.flashrom.org/trac/flashrom/newticket" -.sp -or on the flashrom mailing list at +Please report any bugs to the flashrom mailing list at .B "<flashrom(a)flashrom.org>" .sp We recommend to subscribe first at .sp .B " http://www.flashrom.org/mailman/listinfo/flashrom" .sp -Using flashrom on laptops is dangerous and may easily make your hardware -unusable unless you can desolder the flash chip and have a full flash chip -backup. This is caused by the embedded controller (EC) present in many laptops, -which interacts badly with any flash attempts. This is a hardware limitation -and flashrom will attempt to detect it and abort immediately for safety reasons. -.sp -More information about flashrom on laptops is available from +Many of the developers communicate via the +.B "#flashrom" +IRC channel on +.BR chat.freenode.net . +You are welcome to join and ask questions, send us bug and success reports there +too. Please provide a way to contact you later (e.g. a mail address) and be +patient if there is no immediate reaction. Also, we provide a pastebin service +at +.B http://paste.flashrom.org +that is very useful when you want to share logs etc. without spamming the +channel. +.SS +.B Laptops .sp -.B " http://www.flashrom.org/Laptops" +Using flashrom on laptops is dangerous and may easily make your hardware +unusable. flashrom will attempt to detect if it is running on a laptop and abort +immediately for safety reasons. Please see the detailed discussion of this topic +and associated flashrom options in the +.B Laptops +paragraph in the +.B internal programmer +subsection of the +.B PROGRAMMER SPECIFIC INFO +section. .SH LICENSE .B flashrom is covered by the GNU General Public License (GPL), version 2. Some files are -- 1.7.1

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Re: [flashrom] Just asking some basic advice before I flash the BIOS.
by Joshua Roys 15 Feb '12

15 Feb '12

On 02/15/2012 08:59 AM, Sergio Cipolla wrote: > unzip worked then flashing seems to have gone well too: > http://paste.flashrom.org/view.php?id=1079 > > I'll reboot just to check if everything is fine (and setup the BIOS) > then if it's all OK, should I report 'lspci -nnvvvxxx' and > 'superiotool -deV' ? > Should I add 'flashrom -V' again to the report? > I didn't understand what 'file read with 'flashrom -r readout.rom'' is > ( http://flashrom.org/IRC/Bot#.21summary ). > Hello, Great! It looks like your board already has the lspci output provided by someone else, and the flashrom -Vw output you put on paste.flashrom.org is good enough. The "readout.rom" part, along with the rest of that description, is actually for people who we'll need to do some reverse engineering for in order to support flashing. Since your board works, you don't need to upload it. If you like you can paste a suprtiotool output, but again, since flashing works, it is not necessary. Thanks, Josh

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Re: [flashrom] Just asking some basic advice before I flash the BIOS.
by Joshua Roys 15 Feb '12

15 Feb '12

On 02/15/2012 07:58 AM, Sergio Cipolla wrote: > Hello. First of all, thank you for flashrom. > I have an ECS k7vta3 mobo with VT8233A southbridge. > > # flashrom -r bios.old First, save this backup somewhere. If you want to be really paranoid/safe also save it on external media. > I have the latest BIOS (k7vta330d.exe) here. To write it I would simply run > > # flashrom -wv k7vta330d.exe > > right? > Should I add any -V just in case too? > You'll need to get the bios out of the exe. Try all of these: unzip cabextract unshield 7za Then find the file with an appropriate size. It will be the exact number of bytes as the backup you have made. Then, recent versions of flashrom automatically verify after writing so you do not need a little v. A big V would be nice for debugging any issues that occur. Now, make sure that you have time (at least a day, maybe more) to leave the machine running in case the flash fails. If it does fail, it is likely some software protection that can be disabled with some investigation (some reverse engineering by a developer, a patch being written, applied by you and a new flashrom being compiled by you). Also keep in mind that all flash updates have some amount of risk. So the command you'll want to run is: # flashrom -Vw $newfile where $newfile is the image you find after uncompressing/extracting the .exe provided by the bios vendor. Good luck (and please send success/failure reports to this list), Josh

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Re: [flashrom] Just asking some basic advice before I flash the BIOS.
by Idwer Vollering 15 Feb '12

15 Feb '12

2012/2/15 Sergio Cipolla <secipolla(a)gmail.com>: > Hello. First of all, thank you for flashrom. > I have an ECS k7vta3 mobo with VT8233A southbridge. It looks like your board is supported: http://www.coreboot.org/pipermail/coreboot/2009-June/050002.html http://www.coreboot.org/pipermail/coreboot/2009-June/050004.html Note that there seem to be several PCB revisions: v3.1, v5.0, v6.0, v8.0: http://www.google.nl/search?&q=site:ecs.com.tw+ECS+k7vta3 > > # flashrom -r bios.old > flashrom v0.9.4-r1394 on Linux 3.2.0-1-686-pae (i686), built with > libpci 3.1.7, GCC 4.6.1, little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OK. > Found chipset "VIA VT8233A". Enabling flash write... OK. > This chipset supports the following protocols: Non-SPI. > Found PMC flash chip "Pm29F002T" (256 kB, Parallel) at physical > address 0xfffc0000. > === > This flash part has status UNTESTED for operations: WRITE > The test status of this chip may have been updated in the latest development > version of flashrom. If you are running the latest development version, > please email a report to flashrom(a)flashrom.org if any of the above operations > work correctly for you with this flash part. Please include the flashrom > output with the additional -V option for all operations you tested (-V, -Vr, > -Vw, -VE), and mention which mainboard or programmer you tested. > Please mention your board in the subject line. Thanks for your help! > > I have the latest BIOS (k7vta330d.exe) here. To write it I would simply run > > # flashrom -wv k7vta330d.exe > > right? No: 1) that file isn't a BIOS file and 2) the filesize won't match the chip's size. Unzip that .exe file and write "K7V330D.BIN" instead. The "-v" parameter is for verifying chip content against files (on any filesystem). > Should I add any -V just in case too? Adding "-V" and saving the output would be helpful, yes. > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

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Just asking some basic advice before I flash the BIOS.
by Sergio Cipolla 15 Feb '12

15 Feb '12

Hello. First of all, thank you for flashrom. I have an ECS k7vta3 mobo with VT8233A southbridge. # flashrom -r bios.old flashrom v0.9.4-r1394 on Linux 3.2.0-1-686-pae (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "VIA VT8233A". Enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found PMC flash chip "Pm29F002T" (256 kB, Parallel) at physical address 0xfffc0000. === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! I have the latest BIOS (k7vta330d.exe) here. To write it I would simply run # flashrom -wv k7vta330d.exe right? Should I add any -V just in case too?

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Re: [flashrom] [PATCH] Reformat the internal programmer section in the man page.
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Am 14.02.2012 15:51 schrieb Stefan Tauner: > The section describing the various options of the internal programmer has grown > out of proportions and it has become confusing. This patch adds some headlines > to devide the unrelated topics a bit. > --- > I would also like to make the syntax examples non-bold so that the headlines > stick out more (TBH i don't see the point in making the examples stick out that > much by making them bold and reside on their own line at all). I don't really care about whether we make examples bold or not, but they must (in the RFC sense) be on their own line to avoid catastropical word wrapping and automatic hyphenation as much as possible. > The dummy programmer probably needs something similar rather > sooner than later. > > Opinions and other format command suggestions are very welcome! > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] dummyflasher: Add a status register to SPI chips.
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Am 31.01.2012 06:51 schrieb Stefan Tauner: > This is just a quick hack, that could be expanded. What do you think? > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Very good idea! > --- a/dummyflasher.c > +++ b/dummyflasher.c > @@ -55,6 +55,7 @@ static unsigned int emu_jedec_be_52_size = 0; > static unsigned int emu_jedec_be_d8_size = 0; > static unsigned int emu_jedec_ce_60_size = 0; > static unsigned int emu_jedec_ce_c7_size = 0; > +static uint8_t emu_status = 0; > #endif > #endif > > @@ -126,6 +127,9 @@ int dummy_init(void) > { > char *bustext = NULL; > char *tmp = NULL; > +#if EMULATE_SPI_CHIP > + char *status = NULL; > +#endif > #if EMULATE_CHIP > struct stat image_stat; > #endif > @@ -178,6 +182,14 @@ int dummy_init(void) > goto dummy_init_out; > } > #if EMULATE_SPI_CHIP > + status = extract_programmer_param("status"); > + if (status) { > + emu_status = atoi(status); > + msg_pdbg("Initial status register is set to 0x%02x.\n", > + emu_status); > + free(status); > + } > + > if (!strcmp(tmp, "M25P10.RES")) { > emu_chip = EMULATE_ST_M25P10_RES; > emu_chip_size = 128 * 1024; > @@ -385,10 +397,26 @@ static int emulate_spi_chip_response(unsigned int writecnt, > if (readcnt > 2) > readarr[2] = 0x4a; > break; > - case JEDEC_RDSR: > - memset(readarr, 0, readcnt); > + case JEDEC_RDSR: { > + uint8_t tmp_status = emu_status; > if (aai_active) > - memset(readarr, 1 << 6, readcnt); > + tmp_status |= 1 << 6; The WIP (write in progress) / WEL (write enable latch) /AIP (AAI in progress) logic should be moved to the respective commands so RDSR just does memset(readarr, emu_status, readcnt); > + memset(readarr, tmp_status, readcnt); > + break; > + } > + case JEDEC_WREN: > + emu_status |= (1 << 1); > + break; > + case JEDEC_WRSR: > + if (!(emu_status & (1 << 1))) { > + msg_perr("WRSR attempted, but WEL is 0!\n"); > + return 1; Don't return 1 because a real chip wouldn't return an error either, it would just ignore the command. > + } > + if (aai_active) { > + msg_perr("WRSR attempted during AAI sequence!\n"); > + return 1; dito. > + } > + emu_status = writearr[1] & 0xFC; /* resets WEL and WIP */ > break; > case JEDEC_READ: > offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; After the end of the switch statement we should clear WEL if the command was not WREN/EWSR. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH 5/5] Add support for Atmel's AT25F series of SPI flash chips.
by Stefan Tauner 15 Feb '12

15 Feb '12

Besides the definitions of the the chips in flashchips.c this includes - a dedicated probing method (probe_spi_at25f) - a pretty printing method (spi_prettyprint_status_register_at25f), and - an unlocking method (spi_disable_blockprotect_at25f) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- at25.c | 98 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ chipdrivers.h | 3 ++ flashchips.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 10 ++--- spi.h | 9 +++-- 5 files changed, 200 insertions(+), 10 deletions(-) diff --git a/at25.c b/at25.c index 803e7e4..d0761f7 100644 --- a/at25.c +++ b/at25.c @@ -63,6 +63,24 @@ static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status) } } +/* used for AT25F512(A), AT25F1024(A) */ +int spi_prettyprint_status_register_at25f(struct flashctx *flash) +{ + uint8_t status; + + status = spi_read_status_register(flash); + msg_cdbg("Chip status register is %02x\n", status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + /* FIXME: Bit 3 is undefined on AT25F512A */ + spi_prettyprint_status_register_bp(status, 1); + spi_prettyprint_status_register_welwip(status); + return 0; +} + int spi_prettyprint_status_register_at25df(struct flashctx *flash) { uint8_t status; @@ -154,6 +172,58 @@ int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash) return 0; } +int spi_disable_blockprotect_at25f(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled (BP0 and BP1 are 0), stop here. */ + if ((status & (3 << 2)) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Write Protect Enable (WPEN)\n"); + /* The following is used in spi_disable_blockprotect_at25df + * to check the state of the hardware lock pin. This is not + * possible with this chip, so we have to try. + if ((status & (1 << 4)) == 0) { + msg_cerr("WP# pin is active, disabling " + "write protection is impossible.\n"); + return 1; + } + */ + /* All bits except bit 7 (WPEN) are readonly. If the WP pin is + * low, WPEN is readonly and this will fail. */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if (status & (1 << 7)) { + msg_cerr("WP# pin is probably active, disabling " + "write protection is impossible.\n"); + return 1; + } + + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0x8c); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & (3 << 2)) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + int spi_disable_blockprotect_at25df(struct flashctx *flash) { uint8_t status; @@ -279,3 +349,31 @@ int spi_disable_blockprotect_at25fs040(struct flashctx *flash) msg_cdbg("done.\n"); return 0; } + +int probe_spi_at25f(struct flashctx *flash) +{ + static const unsigned char cmd[AT25F_RDID_OUTSIZE] = { AT25F_RDID }; + unsigned char readarr[AT25F_RDID_INSIZE]; + uint32_t id1; + uint32_t id2; + + if (spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr)) { + msg_cdbg("\n"); + return 0; + } + id1 = readarr[0]; + id2 = readarr[1]; + + msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); + + if (id1 == flash->manufacture_id && id2 == flash->model_id) { + /* Print the status register to tell the + * user about possible write protection. + */ + spi_prettyprint_status_register_at25f(flash); + + return 1; + } + + return 0; +} diff --git a/chipdrivers.h b/chipdrivers.h index 44eca65..9996493 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -74,15 +74,18 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash); /* at25.c */ int spi_prettyprint_status_register_at25df(struct flashctx *flash); int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash); +int spi_prettyprint_status_register_at25f(struct flashctx *flash); int spi_prettyprint_status_register_at25f512b(struct flashctx *flash); int spi_prettyprint_status_register_at25fs010(struct flashctx *flash); int spi_prettyprint_status_register_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash); int spi_disable_blockprotect_at25df(struct flashctx *flash); int spi_disable_blockprotect_at25df_sec(struct flashctx *flash); +int spi_disable_blockprotect_at25f(struct flashctx *flash); int spi_disable_blockprotect_at25f512b(struct flashctx *flash); int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); +int probe_spi_at25f(struct flashctx *flash); /* 82802ab.c */ uint8_t wait_82802ab(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index 80f29f6..b2d1fcc 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1651,6 +1651,65 @@ const struct flashchip flashchips[] = { { .vendor = "Atmel", + .name = "AT25F512", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT25F512A", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512A, + .total_size = 64, + .page_size = 128, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + /* Not correct to use this one, because the BP1 bit is N/A. */ + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25F512B", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, @@ -1693,6 +1752,37 @@ const struct flashchip flashchips[] = { { .vendor = "Atmel", + /* The A suffix indicates 33MHz instead of 20MHz clock rate. + * All other properties seem to be the same.*/ + .name = "AT25F1024(A)", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F1024, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25FS010", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, diff --git a/flashchips.h b/flashchips.h index 03efb86..888fd1a 100644 --- a/flashchips.h +++ b/flashchips.h @@ -134,13 +134,11 @@ #define ATMEL_AT25DF321A 0x4701 #define ATMEL_AT25DF641 0x4800 #define ATMEL_AT25DQ161 0x8600 -#define ATMEL_AT25F512 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F512A 0x65 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F512 0x65 /* guessed, no device ID in datasheet. + * Vendor ID can be read with AT25F_RDID */ +#define ATMEL_AT25F512A 0x65 /* Needs AT25F_RDID */ #define ATMEL_AT25F512B 0x6500 -#define ATMEL_AT25F1024 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F1024A 0x60 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F1024 0x60 /* Needs AT25F_RDID */ #define ATMEL_AT25FS010 0x6601 #define ATMEL_AT25FS040 0x6604 #define ATMEL_AT26DF041 0x4400 diff --git a/spi.h b/spi.h index adb9109..a5c3406 100644 --- a/spi.h +++ b/spi.h @@ -30,10 +30,11 @@ /* INSIZE may be 0x04 for some chips*/ #define JEDEC_RDID_INSIZE 0x03 -/* AT25F512A has bit 3 as don't care bit in commands */ -#define AT25F512A_RDID 0x15 /* 0x15 or 0x1d */ -#define AT25F512A_RDID_OUTSIZE 0x01 -#define AT25F512A_RDID_INSIZE 0x02 +/* Some Atmel AT25F* models have bit 3 as don't care bit in commands */ +/* 0x15 or 0x1d */ +#define AT25F_RDID 0x15 +#define AT25F_RDID_OUTSIZE 0x01 +#define AT25F_RDID_INSIZE 0x02 /* Read Electronic Manufacturer Signature */ #define JEDEC_REMS 0x90 -- 1.7.1

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