flashrom

flashrom@flashrom.org

3 participants
9188 discussions

flashrom -V
by Jose Montano 15 Apr '12

15 Apr '12

ZOTAC nForce 630i Supreme ################################################################### jose@xzn:~$ sudo flashrom -V [sudo] password for jose: flashrom v0.9.4-r1394 on Linux 3.0.0-17-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1979M loops per second, 10 myus = 27 us, 100 myus = 128 us, 1000 myus = 2642 us, 10000 myus = 10910 us, 4 myus = 8 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Unknow" DMI string system-product-name: "Unknow" DMI string system-version: "Unknow" DMI string baseboard-manufacturer: "Unknow" DMI string baseboard-product-name: "MCP73" DMI string baseboard-version: "Unknow" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP73" with PCI ID 10de:07d7. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:07d8 at 00:03:1 MCP SPI BAR is at 0xeff00000 Mapping NVIDIA MCP6x SPI at 0xeff00000, unaligned size 0x544. SPI control is 0xc012, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Chip status register is 00 Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x13 No operations were specified. ############################################################################# jose@xzn:~$ lspci -nnvvxxx 00:00.0 Host bridge [0600]: nVidia Corporation MCP73 Host Bridge [10de:07c0] (rev a2) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 c0 07 06 00 a0 00 a2 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.1 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07cb] (rev a2) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 cb 07 04 00 a0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.0 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07cd] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 cd 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:01.1 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07ce] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 ce 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:01.2 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07cf] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 cf 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:01.3 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d0] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d0 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:01.4 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d1] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d1 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:01.5 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d2] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d2 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:01.6 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d3] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d3 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:02.0 RAM memory [0500]: nVidia Corporation nForce 630i memory controller [10de:07d6] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d6 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:03.0 ISA bridge [0601]: nVidia Corporation MCP73 LPC Bridge [10de:07d7] (rev a2) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:0ac7] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 00: de 10 d7 07 0f 00 a0 20 a2 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 c7 0a 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:03.1 SMBus [0c05]: nVidia Corporation MCP73 SMBus [10de:07d8] (rev a1) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:0ac7] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 5 Region 0: I/O ports at ff00 [size=64] Region 4: I/O ports at 1c00 [size=64] Region 5: I/O ports at 1c80 [size=64] Capabilities: <access denied> Kernel driver in use: nForce2_smbus Kernel modules: i2c-nforce2 00: de 10 d8 07 01 00 b0 00 a1 00 05 0c 00 00 80 00 10: 01 ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 1c 00 00 81 1c 00 00 00 00 00 00 da 19 c7 0a 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 00 00 00:03.2 RAM memory [0500]: nVidia Corporation MCP73 Memory Controller [10de:07d9] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 d9 07 00 04 a0 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.3 Co-processor [0b40]: nVidia Corporation MCP73 Co-processor [10de:07da] (rev a2) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 5 Region 0: Memory at eff00000 (32-bit, non-prefetchable) [size=512K] 00: de 10 da 07 06 00 a0 00 a2 00 40 0b 00 00 80 00 10: 00 00 f0 ef 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 02 03 01 00:03.4 RAM memory [0500]: nVidia Corporation MCP73 Memory Controller [10de:07c8] (rev a1) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 c8 07 00 00 20 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:04.0 USB Controller [0c03]: nVidia Corporation GeForce 7100/nForce 630i USB [10de:07fe] (rev a1) (prog-if 10 [OHCI]) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:0ac7] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 21 Region 0: Memory at effff000 (32-bit, non-prefetchable) [size=4K] Capabilities: <access denied> Kernel driver in use: ohci_hcd 00: de 10 fe 07 07 00 b0 00 a1 10 03 0c 00 00 80 00 10: 00 f0 ff ef 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 c7 0a 30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 03 01 00:04.1 USB Controller [0c03]: nVidia Corporation MCP73 [nForce 630i] USB 2.0 Controller (EHCI) [10de:056a] (rev a1) (prog-if 20 [EHCI]) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:0ac7] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 22 Region 0: Memory at efffe000 (32-bit, non-prefetchable) [size=256] Capabilities: <access denied> Kernel driver in use: ehci_hcd 00: de 10 6a 05 06 00 b0 00 a1 20 03 0c 00 00 80 00 10: 00 e0 ff ef 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 c7 0a 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 02 03 01 00:08.0 IDE interface [0101]: nVidia Corporation MCP73 IDE [10de:056c] (rev a1) (prog-if 8a [Master SecP PriP]) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:0ac7] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1] Region 4: I/O ports at fc00 [size=16] Capabilities: <access denied> Kernel driver in use: pata_amd Kernel modules: pata_amd 00: de 10 6c 05 05 00 b0 00 a1 8a 01 01 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 fc 00 00 00 00 00 00 00 00 00 00 da 19 c7 0a 30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 03 01 00:09.0 Audio device [0403]: nVidia Corporation MCP73 High Definition Audio [10de:07fc] (rev a1) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:0ac7] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (500ns min, 1250ns max) Interrupt: pin A routed to IRQ 20 Region 0: Memory at efff4000 (32-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: de 10 fc 07 06 00 b0 00 a1 00 03 04 00 00 00 00 10: 00 40 ff ef 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 c7 0a 30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 02 05 00:0a.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056d] (rev a1) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: efb00000-efbfffff Prefetchable memory behind bridge: efa00000-efafffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr+ DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> 00: de 10 6d 05 07 00 b0 00 a1 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 20 c0 c0 80 22 20: b0 ef b0 ef a0 ef a0 ef 00 00 00 00 00 00 00 00 30: 00 00 00 00 b8 00 00 00 00 00 00 00 ff 00 00 02 00:0b.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056e] (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000b000-0000bfff Memory behind bridge: ef900000-ef9fffff Prefetchable memory behind bridge: 00000000ef800000-00000000ef8fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport Kernel modules: shpchp 00: de 10 6e 05 07 04 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 b1 b1 00 00 20: 90 ef 90 ef 81 ef 81 ef 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 00:0c.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056f] (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: ef700000-ef7fffff Prefetchable memory behind bridge: 00000000efe00000-00000000efefffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport Kernel modules: shpchp 00: de 10 6f 05 07 04 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 e1 e1 00 00 20: 70 ef 70 ef e1 ef e1 ef 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 00:0d.0 PCI bridge [0604]: nVidia Corporation MCP73 PCI Express bridge [10de:056f] (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: efd00000-efdfffff Prefetchable memory behind bridge: 00000000efc00000-00000000efcfffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport Kernel modules: shpchp 00: de 10 6f 05 07 04 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 00 d1 d1 00 00 20: d0 ef d0 ef c1 ef c1 ef 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 00:0e.0 IDE interface [0101]: nVidia Corporation MCP73 IDE [10de:07f0] (rev a2) (prog-if 85 [Master SecO PriO]) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:0ac7] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 23 Region 0: I/O ports at 09f0 [size=8] Region 1: I/O ports at 0bf0 [size=4] Region 2: I/O ports at 0970 [size=8] Region 3: I/O ports at 0b70 [size=4] Region 4: I/O ports at f700 [size=16] Region 5: Memory at efff8000 (32-bit, non-prefetchable) [size=8K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: de 10 f0 07 07 00 b0 00 a2 85 01 01 00 00 00 00 10: f1 09 00 00 f1 0b 00 00 71 09 00 00 71 0b 00 00 20: 01 f7 00 00 00 80 ff ef 00 00 00 00 da 19 c7 0a 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 03 01 00:10.0 VGA compatible controller [0300]: nVidia Corporation C73 [GeForce 7150 / nForce 630i] [10de:07e0] (rev a2) (prog-if 00 [VGA controller]) Subsystem: nVidia Corporation Device [10de:cb73] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 0: Memory at ed000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at ee000000 (64-bit, non-prefetchable) [size=16M] [virtual] Expansion ROM at 3ff00000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: nvidia Kernel modules: nvidia_current, nouveau, nvidiafb 00: de 10 e0 07 07 00 b0 00 a2 00 00 03 00 00 00 00 10: 00 00 00 ed 0c 00 00 d0 00 00 00 00 04 00 00 ee 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 73 cb 30: 00 00 00 00 48 00 00 00 00 00 00 00 0b 01 00 00 01:07.0 FireWire (IEEE 1394) [0c00]: VIA Technologies, Inc. VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller [1106:3044] (rev 80) (prog-if 10 [OHCI]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 (8000ns max), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 19 Region 0: Memory at efbff000 (32-bit, non-prefetchable) [size=2K] Region 1: I/O ports at cf00 [size=128] Capabilities: <access denied> Kernel driver in use: firewire_ohci Kernel modules: firewire-ohci 00: 06 11 44 30 87 00 10 02 80 10 00 0c 10 40 00 00 10: 00 f0 bf ef 01 cf 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 07 01 00 20 01:08.0 Ethernet controller [0200]: 3Com Corporation 3CR990-TX-97 [Typhoon 168-bit] [10b7:9903] (rev 02) Subsystem: 3Com Corporation 3CR990-TX-97 [Typhoon 168-bit] [10b7:9903] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 16 Region 0: I/O ports at ce00 [size=128] Region 1: Memory at efb80000 (32-bit, non-prefetchable) [size=256K] Capabilities: <access denied> Kernel driver in use: typhoon Kernel modules: typhoon 00: b7 10 03 99 13 00 10 02 02 00 00 02 10 40 00 00 10: 01 ce 00 00 00 00 b8 ef 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 b7 10 03 99 30: 00 00 00 00 dc 00 00 00 00 00 00 00 0a 01 0a 05 04:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 01) Subsystem: ZOTAC International (MCO) Ltd. Device [19da:8168] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 43 Region 0: I/O ports at de00 [size=256] Region 2: Memory at efdff000 (64-bit, non-prefetchable) [size=4K] [virtual] Expansion ROM at efc00000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: r8169 Kernel modules: r8169 00: ec 10 68 81 07 04 10 00 01 00 00 02 10 00 00 00 10: 01 de 00 00 00 00 00 00 04 f0 df ef 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 68 81 30: 00 00 00 00 40 00 00 00 00 00 00 00 07 01 00 00 ############################################################################# jose@xzn:~$ sudo superiotool -deV [sudo] password for jose: superiotool r6637 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x8400, id=0x23a0 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xa023, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x164e... Failed. Returned data: port=0xff, port+1=0xff Probing for Nuvoton Super I/O at 0x164e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x2e... Failed. Returned data: chip_id=0xa023 Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... Failed. Returned data: sid=0xff, id=0xa023, rev=0x00 Probing for Nuvoton Super I/O at 0x4e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Found Winbond W83627DHG (id=0xa0, rev=0x23) at 0x2e Register dump: idx 02 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val ff a0 23 ff 00 84 00 00 ff 50 00 7e 00 ea 01 00 ff def 00 a0 NA ff 00 MM 00 MM RR 50 00 00 RR e2 21 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 00 00 00 00 04 0e 00 ff 00 00 def 01 03 f0 06 02 8e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 00 00 00 00 04 38 def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 00 00 00 00 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 83 def 01 00 60 00 64 01 0c 83 LDN 0x06 (Serial peripheral interface) idx 30 62 63 val 00 ff ff def 00 00 00 LDN 0x07 (GPIO 6) idx 30 f4 f5 f6 f7 val 06 ff ff ff ff def 00 ff 00 00 00 LDN 0x08 (WDTO#, PLED) idx 30 f5 f6 f7 val 00 ff 00 ff def 00 00 00 00 LDN 0x09 (GPIO 2, GPIO 3, GPIO 4, GPIO 5) idx 30 e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 f0 f1 f2 f3 f4 f5 f6 f7 fe val 03 ff ff ff ff 0c 00 00 02 ff ff be 02 00 40 ff ff ff ff 00 def 00 ff 00 00 ff 00 00 00 00 00 00 ff 00 00 00 ff 00 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 f2 f3 f4 f6 f7 fe val 00 00 00 00 20 22 00 00 0c 00 09 00 7c 00 00 00 00 00 def 00 00 01 00 ff 08 00 RR 1c 00 RR RR 7c 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 f1 f2 val 01 02 90 00 81 ff 80 def 00 00 00 00 81 00 00 LDN 0x0c (PECI, SST) idx e0 e1 e2 e3 e4 e5 e8 f1 fe ff val 00 48 48 48 48 00 00 48 ff ff def 00 48 48 48 48 00 00 48 00 00 Hardware monitor (0x0295) Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found. Probing for Server Engines Super I/O at 0x2e... Failed. Returned data: id=0xffff, rev=0xff ############################################################################# jose@xzn:~$ sudo flashrom -w N0714WZT.BIN [sudo] password for jose: flashrom v0.9.4-r1394 on Linux 3.0.0-17-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA MCP73". This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Mapping NVIDIA MCP6x SPI at 0xeff00000, unaligned size 0x544. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED.

2 1

Re: [flashrom] UNTESTED > TESTED OK :-)
by Stefan Tauner 15 Apr '12

15 Apr '12

On Fri, 13 Apr 2012 19:41:46 +0000 Sylvain GARGASSON <sylvain.gargasson(a)gmail.com> wrote: > Found chipset "SiS 755". > This chipset is marked as untested. If you are using an up-to-date version > of flashrom please email a report to flashrom(a)flashrom.org including a > verbose (-V) log. Thank you! > […] Hello Sylvain, thanks for your report! I have marked the chipset as fully tested and will commit that later together with other small changes. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] [PATCH] Check for duplicate -i arguments.
by Uwe Hermann 15 Apr '12

15 Apr '12

On Sat, Feb 25, 2012 at 10:18:13PM +0100, Stefan Tauner wrote: > And a tiny cleanup. > --- > ./flashrom -p dummy:emulate=M25P10.RES -c M25P10 -i blub -i blub > flashrom v0.9.5-r1505 on Linux 2.6.35-32-generic (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Duplicate region name: "blub". > Please run "flashrom --help" for usage info. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Looks good and seems to work fine here. Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> > +/* returns the index of the entry (or a negative value if it is not found) */ Should start with capital letter and end with full-stop. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

2 1

[commit] r1523 - trunk
by repository service 15 Apr '12

15 Apr '12

Author: stefanct Date: Sun Apr 15 16:09:16 2012 New Revision: 1523 URL: http://flashrom.org/trac/flashrom/changeset/1523 Log: Check for duplicate -i arguments. And a tiny cleanup. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/layout.c Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Sun Apr 15 15:16:32 2012 (r1522) +++ trunk/layout.c Sun Apr 15 16:09:16 2012 (r1523) @@ -201,6 +201,17 @@ } #endif +/* returns the index of the entry (or a negative value if it is not found) */ +int find_include_arg(const char *const name) +{ + unsigned int i; + for (i = 0; i < num_include_args; i++) { + if (!strcmp(include_args[i], name)) + return i; + } + return -1; +} + /* register an include argument (-i) for later processing */ int register_include_arg(char *name) { @@ -214,6 +225,11 @@ return 1; } + if (find_include_arg(name) != -1) { + msg_gerr("Duplicate region name: \"%s\".\n", name); + return 1; + } + include_args[num_include_args] = name; num_include_args++; return 0; @@ -250,17 +266,17 @@ if (num_include_args == 0) return 0; - for (i = 0; i < num_include_args; i++) { - /* User has specified an area, but no layout file is loaded. */ - if (!romimages) { - msg_gerr("Region requested (with -i \"%s\"), " - "but no layout data is available.\n", - include_args[i]); - return 1; - } + /* User has specified an area, but no layout file is loaded. */ + if (!romimages) { + msg_gerr("Region requested (with -i \"%s\"), " + "but no layout data is available.\n", + include_args[0]); + return 1; + } + for (i = 0; i < num_include_args; i++) { if (find_romentry(include_args[i]) < 0) { - msg_gerr("Invalid region specified: \"%s\"\n", + msg_gerr("Invalid region specified: \"%s\".\n", include_args[i]); return 1; }

1 0

Re: [flashrom] [PATCH] Add Documentation regarding unlocking the ME region on Intel chipsets.
by Uwe Hermann 15 Apr '12

15 Apr '12

On Mon, Mar 12, 2012 at 03:11:13AM +0100, Stefan Tauner wrote: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> This one's trivial, as it's purely doc changes, so: Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> But see the comments below please. > --- > Documentation/mysteries_intel.txt | 81 ++++++++++++++++++++++++++++++++++++- > 1 files changed, 80 insertions(+), 1 deletions(-) > > diff --git a/Documentation/mysteries_intel.txt b/Documentation/mysteries_intel.txt > index d6d3dfb..8a9a113 100644 > --- a/Documentation/mysteries_intel.txt > +++ b/Documentation/mysteries_intel.txt > @@ -15,4 +15,83 @@ > See also http://www.flashrom.org/pipermail/flashrom/2011-August/007606.html > > = Unlocking the ME region = > -TODO > + If the ME region is locked by the FRAP register in descriptor mode, the host > + software is not allowed to read or write any address inside that region. There > + are different ways to unlock access: > + > + - a pin strap: Flash Descriptor Security Override Strap (as indicated by the "a pin" -> "A pin" > + Flash Descriptor Override Pin Strap Status (FDOPSS) in HSFS. That pin is > + probably not accessible to end users on consumer boards (every Intel doc i ^ I > + have seen stresses that this is for debugging in manufacturing only and > + should not be available for end users). > + The ME indicates this in bits [19:16] (Operation Mode) in the HFS register of > + the HECI/MEI PCI device by setting them to 4 (SECOVR_JMPR) [MODE_CTRL]. > + > + - Intel Management Engine BIOS Extension (MEBx) Disable This option may be ^ Missing full stop. > + available to end users on some boards usually accessible by hitting > + ctrl+p after BIOS POST. Quote: "???Disabling??? the Intel ME does not really > + disable it: it causes the Intel ME code to be halted at an early stage of > + the Intel ME???s booting so that the system has no traffic originating from > + the Intel ME on any of the buses." [MEBX] Kill the strange "???" above? > + The ME indicates this in bits [19:16] (Operation Mode) in the HFS register of > + the HECI/MEI PCI device by setting them to 3 (Soft Temporary Disable) > + [MODE_CTRL]. > + > + - Previous to Ibex Peak/5 Series chipsets removing the DIMM from slot (or > + channel?) #0 disables the ME completely, which may give the host access to > + the ME region. > + > + - HMRFPO (Host ME Region Flash Protection Override) Enable MEI command > + This is the most interesting one because it allows to temporarily disable > + the ME region protection by software. The ME indicates this in bits [19:16] > + (Operation Mode) in the HFS register of the HECI/MEI PCI device by setting > + them to 5 (SECOVER_MEI_MSG) [MODE_CTRL]. > + > +== MEI/HECI == > + Communication between the host software and the different services provided by > + the ME is done via a packet-based protocol that uses MMIO transfers to one or > + more virtual PCI devices. Upon this layer there exist various services that can > + be used to read out hardware management values (e.g. temperatures, fan speeds > + etc.). The lower levels of that protocol are well documented: > + The locations/offsets of the PCI MMIO registers are noted in the chipset > + datasheets. The actually communication is documented in a whitepaper [DCMI] and > + an outdated as well as a current Linux kernel implementation (currently in > + staging/ exist [KERNEL]. There exists a patch that re-implements this in user > + space (as part of flashrom). > + > +== Problems == > + The problem is that only very few higher level protocols are documented publicly, > + especially the bunch of messages that contain the HMRFPO commands is probably > + well protected and only documented in ME-specific docs and the BIOS writer's > + guides. We are aware of a few leaked documents though that give us a few hints > + about it, but nothing substantial regarding its implementation. > + > + The documents are somewhat contradicting each other in various points which > + might be due to factual changes in process of time or due to the different > + capabilities of the ME firmwares, example: > + > + Intel's Flash Programming Tool (FPT) "automatically stops ME writing to SPI > + ME Region, to prevent both writing at the same time, causing data corruption." [ME8] > + > + "FPT is not HMRFPO-capable, so needs [the help of the FDOPS pin] HDA_SDO if > + used to update the ME Region." [SPS] > + > + When looking at the various ME firmware editions (and different chipsets), things > + get very unclear. Some docs say that HMRFPO needs to be sent before End-of-POST > + (EOP), others say that the ME region can be updated in the field or that some > + vendor tools use it for updates. This needs to be investigated further before > + drawing any conclusion. > + > +[MODE_CTRL] Client Platform Enabling Tour: Platform Software > + Document Number: 439167, Revision 1.2, page 52 > +[MEBX] Intel?? Management Engine BIOS Extension (MEBX) User???s Guide Kill/fix the "???" stuff. > + Revision 1.2, Section 3.1 and 3.5 > +[DCMI] DCMI Host Interface Specification > + Revision 1.0 > +[KERNEL] http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=tree;f=d… > +[SPI_PROG] Ibex Peak SPI Programming Guide > + Document Number: 403598, Revision 1.3, page 79 > +[ME8] Manufacturing with Intel?? Management Engine (ME) Firmware 8.X on Intel 7 Series Ditto. > + Revision 2.0, page 59 > +[SPS] Manufacturing with Intel?? Management Engine (ME) on Intel?? C600 Series Chipset 1 for Romley Server 2 Platforms using Server Platform Services (SPS) Firmware Ditto. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

2 1

[commit] r1522 - trunk
by repository service 15 Apr '12

15 Apr '12

Author: uwe Date: Sun Apr 15 15:16:32 2012 New Revision: 1522 URL: http://flashrom.org/trac/flashrom/changeset/1522 Log: Add support for for the Atmel AT49F040 chip. Chip features an optional permanent boot block write protection. Signed-off-by: David Borg <borg.db(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/w39.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sun Apr 15 00:51:40 2012 (r1521) +++ trunk/chipdrivers.h Sun Apr 15 15:16:32 2012 (r1522) @@ -149,6 +149,7 @@ int printlock_w39v080fa_dual(struct flashctx *flash); int unlock_w39v040fb(struct flashctx *flash); int unlock_w39v080fa(struct flashctx *flash); +int printlock_at49f(struct flashctx *flash); /* w29ee011.c */ int probe_w29ee011(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Apr 15 00:51:40 2012 (r1521) +++ trunk/flashchips.c Sun Apr 15 15:16:32 2012 (r1522) @@ -2226,19 +2226,27 @@ { .vendor = "Atmel", - .name = "AT49F020", + .name = "AT49F002(N)", .bustype = BUS_PARALLEL, .manufacture_id = ATMEL_ID, - .model_id = ATMEL_AT49F020, + .model_id = ATMEL_AT49F002N, .total_size = 256, .page_size = 256, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {96 * 1024, 1}, + {128 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { .eraseblocks = { {256 * 1024, 1} }, .block_erase = erase_chip_block_jedec, } @@ -2250,24 +2258,24 @@ { .vendor = "Atmel", - .name = "AT49F002(N)", + .name = "AT49F002(N)T", .bustype = BUS_PARALLEL, .manufacture_id = ATMEL_ID, - .model_id = ATMEL_AT49F002N, + .model_id = ATMEL_AT49F002NT, .total_size = 256, .page_size = 256, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { .eraseblocks = { - {16 * 1024, 1}, - {8 * 1024, 2}, - {96 * 1024, 1}, {128 * 1024, 1}, + {96 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, }, .block_erase = erase_sector_jedec, }, { @@ -2282,31 +2290,61 @@ { .vendor = "Atmel", - .name = "AT49F002(N)T", + .name = "AT49F020", .bustype = BUS_PARALLEL, .manufacture_id = ATMEL_ID, - .model_id = ATMEL_AT49F002NT, + .model_id = ATMEL_AT49F020, .total_size = 256, .page_size = 256, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PR, + .tested = TEST_OK_PRE, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = { { - .eraseblocks = { - {128 * 1024, 1}, - {96 * 1024, 1}, - {8 * 1024, 2}, - {16 * 1024, 1}, - }, - .block_erase = erase_sector_jedec, - }, { .eraseblocks = { {256 * 1024, 1} }, .block_erase = erase_chip_block_jedec, } + /* Chip features an optional permanent write protection + * of the first 8 kB. The erase function is the same as + * above, but 00000H to 01FFFH will not be erased. + * FIXME: add another eraser when partial erasers are + * supported. + */ + }, + .printlock = printlock_at49f, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { + .vendor = "Atmel", + .name = "AT49F040", + .bustype = BUS_PARALLEL, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT49F040, + .total_size = 512, + .page_size = 512, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + /* Chip features an optional permanent write protection + * of the first 16 kB. The erase function is the same as + * above, but 00000H to 03FFFH will not be erased. + * FIXME: add another eraser when partial erasers are + * supported. + */ }, + .printlock = printlock_at49f, .write = write_jedec_1, .read = read_memmapped, .voltage = {4500, 5500}, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Apr 15 00:51:40 2012 (r1521) +++ trunk/flashchips.h Sun Apr 15 15:16:32 2012 (r1522) @@ -184,10 +184,11 @@ #define ATMEL_AT45DB642 /* No ID available */ #define ATMEL_AT45DB642D 0x2800 #define ATMEL_AT49BV512 0x03 -#define ATMEL_AT49F020 0x0B #define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */ -#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */ #define ATMEL_AT49LH002 0xE9 +#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */ +#define ATMEL_AT49F020 0x0B +#define ATMEL_AT49F040 0x13 /* Bright Microelectronics has the same manufacturer ID as Hyundai... */ #define BRIGHT_ID 0xAD /* Bright Microelectronics */ Modified: trunk/w39.c ============================================================================== --- trunk/w39.c Sun Apr 15 00:51:40 2012 (r1521) +++ trunk/w39.c Sun Apr 15 15:16:32 2012 (r1522) @@ -278,3 +278,11 @@ return 0; } + +int printlock_at49f(struct flashctx *flash) +{ + uint8_t lock = w39_idmode_readb(flash, 0x00002); + msg_cdbg("Hardware bootblock lockout is %sactive.\n", + (lock & 0x01) ? "" : "not "); + return 0; +}

1 0

Re: [flashrom] [PATCH] Add support for AT49F040
by Uwe Hermann 15 Apr '12

15 Apr '12

On Thu, Aug 11, 2011 at 05:59:42AM +0200, Stefan Tauner wrote: > Chip features an optional permanent boot block write protection. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Signed-off-by: David Borg <borg.db(a)gmail.com> > > --- > diff of flashchips.c looks very odd, this is because i moved AT49F020 down. > - rebased > - voltages added > - FEATURE_ADDR_FULL flag removed > - printlock_at49f040 added (location dubios, but w39_idmode_readb > implements what is needed already (and is static...) > - AT49F020 does also feature a permanent lock (8 kB boot block), which uses > the same detection method... Rebased (again) and committed in r1522, thanks. I changed 'struct flashchip *flash' to 'struct flashctx *flash' so that it compiles. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

1 0

[commit] r1521 - trunk
by repository service 14 Apr '12

14 Apr '12

Author: uwe Date: Sun Apr 15 00:51:40 2012 New Revision: 1521 URL: http://flashrom.org/trac/flashrom/changeset/1521 Log: Add support for the Eon EN29LV640B chip. This chip needs special command sequences in 8 bit mode. Also, 8 bit programming needs actually 16bit double byte program. The chip is found on the Bifferos Bifferboard, for example. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Added: trunk/en29lv640b.c Modified: trunk/Makefile trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sat Apr 14 23:59:23 2012 (r1520) +++ trunk/Makefile Sun Apr 15 00:51:40 2012 (r1521) @@ -261,7 +261,7 @@ CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \ - a25.o at25.o opaque.o sfdp.o + a25.o at25.o opaque.o sfdp.o en29lv640b.o LIB_OBJS = layout.o Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sat Apr 14 23:59:23 2012 (r1520) +++ trunk/chipdrivers.h Sun Apr 15 00:51:40 2012 (r1521) @@ -157,4 +157,10 @@ int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int block, unsigned int blocksize); int unlock_stm50flw0x0x(struct flashctx *flash); +/* en29lv640b.c */ +int probe_en29lv640b(struct flashctx *flash); +int block_erase_en29lv640b(struct flashctx *flash, unsigned int start, unsigned int len); +int block_erase_chip_en29lv640b(struct flashctx *flash, unsigned int start, unsigned int len); +int write_en29lv640b(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); + #endif /* !__CHIPDRIVERS_H__ */ Added: trunk/en29lv640b.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/en29lv640b.c Sun Apr 15 00:51:40 2012 (r1521) @@ -0,0 +1,138 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2000 Silicon Integrated System Corporation + * Copyright (C) 2012 Rudolf Marek <r.marek(a)assembler.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "flash.h" +#include "chipdrivers.h" + +/* + * WARNING! + * This chip uses the standard JEDEC addresses in 16-bit mode as word + * addresses. In byte mode, 0xAAA has to be used instead of 0x555 and + * 0x555 instead of 0x2AA. Do *not* blindly replace with standard JEDEC + * functions. + */ + +/* chunksize is 1 */ +int write_en29lv640b(struct flashctx *flash, uint8_t *src, unsigned int start, + unsigned int len) +{ + int i; + chipaddr bios = flash->virtual_memory; + chipaddr dst = flash->virtual_memory + start; + + for (i = 0; i < len; i += 2) { + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0xA0, bios + 0xAAA); + + /* Transfer data from source to destination. */ + chip_writew(flash, (*src) | ((*(src + 1)) << 8 ), dst); + toggle_ready_jedec(flash, dst); +#if 0 + /* We only want to print something in the error case. */ + msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n", + (dst - bios), chip_readb(flash, dst), *src); +#endif + dst += 2; + src += 2; + } + + /* FIXME: Ignore errors for now. */ + return 0; +} + +int probe_en29lv640b(struct flashctx *flash) +{ + chipaddr bios = flash->virtual_memory; + uint16_t id1, id2; + + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x90, bios + 0xAAA); + + programmer_delay(10); + + id1 = chip_readb(flash, bios + 0x200); + id1 |= (chip_readb(flash, bios) << 8); + + id2 = chip_readb(flash, bios + 0x02); + + chip_writeb(flash, 0xF0, bios + 0xAAA); + + programmer_delay(10); + + msg_cdbg("%s: id1 0x%04x, id2 0x%04x\n", __func__, id1, id2); + + if (id1 == flash->manufacture_id && id2 == flash->model_id) + return 1; + + return 0; +} + +int erase_en29lv640b(struct flashctx *flash) +{ + chipaddr bios = flash->virtual_memory; + + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x80, bios + 0xAAA); + + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x10, bios + 0xAAA); + + programmer_delay(10); + toggle_ready_jedec(flash, bios); + + /* FIXME: Check the status register for errors. */ + return 0; +} + +int block_erase_en29lv640b(struct flashctx *flash, unsigned int start, + unsigned int len) +{ + chipaddr bios = flash->virtual_memory; + chipaddr dst = bios + start; + + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x80, bios + 0xAAA); + + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x30, dst); + + programmer_delay(10); + toggle_ready_jedec(flash, bios); + + /* FIXME: Check the status register for errors. */ + return 0; +} + +int block_erase_chip_en29lv640b(struct flashctx *flash, unsigned int address, + unsigned int blocklen) +{ + if ((address != 0) || (blocklen != flash->total_size * 1024)) { + msg_cerr("%s called with incorrect arguments\n", __func__); + return -1; + } + return erase_en29lv640b(flash); +} Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Apr 14 23:59:23 2012 (r1520) +++ trunk/flashchips.c Sun Apr 15 00:51:40 2012 (r1521) @@ -3530,7 +3530,7 @@ .block_erasers = { { - .eraseblocks = { + .eraseblocks = { {16 * 1024, 1}, {8 * 1024, 2}, {32 * 1024, 1}, @@ -3562,7 +3562,7 @@ .block_erasers = { { - .eraseblocks = { + .eraseblocks = { {64 * 1024, 3}, {32 * 1024, 1}, {8 * 1024, 2}, @@ -3580,6 +3580,36 @@ }, { + .vendor = "Eon", + .name = "EN29LV640B", + .bustype = BUS_PARALLEL, + .manufacture_id = EON_ID, + .model_id = EON_EN29LV640B, + .total_size = 8192, + .page_size = 8192, + .feature_bits = 0, + .tested = TEST_OK_PREW, + .probe = probe_en29lv640b, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 127}, + }, + .block_erase = block_erase_en29lv640b, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = block_erase_chip_en29lv640b, + }, + }, + .write = write_en29lv640b, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { .vendor = "Fujitsu", .name = "MBM29F004BC", .bustype = BUS_PARALLEL, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Apr 14 23:59:23 2012 (r1520) +++ trunk/flashchips.h Sun Apr 15 00:51:40 2012 (r1521) @@ -256,6 +256,7 @@ #define EON_EN29F040A 0x7F04 #define EON_EN29LV010 0x7F6E #define EON_EN29LV040A 0x7F4F /* EN29LV040(A) */ +#define EON_EN29LV640B 0xCB #define EON_EN29F002T 0x7F92 /* Same as EN29F002A */ #define EON_EN29F002B 0x7F97 /* Same as EN29F002AN */

1 0

[commit] r1520 - trunk
by repository service 14 Apr '12

14 Apr '12

Author: uwe Date: Sat Apr 14 23:59:23 2012 New Revision: 1520 URL: http://flashrom.org/trac/flashrom/changeset/1520 Log: Add GigaDevice GD25QXX series support. http://www.gigadevice.com/Product/SPI.php?WebPageTypeId=98&WebPageTypeId2=1… The GD25Q80 has been successfully tested, the other ones are marked as untested for now. http://www.flashrom.org/pipermail/flashrom/2012-March/009028.html Signed-off-by: Justin Chevrier <jchevrier(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Apr 14 23:06:31 2012 (r1519) +++ trunk/flashchips.c Sat Apr 14 23:59:23 2012 (r1520) @@ -3709,6 +3709,268 @@ }, { + .vendor = "GigaDevice", + .name = "GD25Q20", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q20, + .total_size = 256, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25Q40", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q40, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25Q80", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q80, + .total_size = 1024, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25Q16", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q16, + .total_size = 2048, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25Q32", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q32, + .total_size = 4096, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25Q64", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q64, + .total_size = 8192, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "GigaDevice", + .name = "GD25Q128", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q128, + .total_size = 16384, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { .vendor = "Hyundai", .name = "HY29F002T", .bustype = BUS_PARALLEL, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Apr 14 23:06:31 2012 (r1519) +++ trunk/flashchips.h Sat Apr 14 23:59:23 2012 (r1520) @@ -290,6 +290,15 @@ #define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */ #define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */ +#define GIGADEVICE_ID 0xC8 /* GigaDevice */ +#define GIGADEVICE_GD25Q20 0x4012 +#define GIGADEVICE_GD25Q40 0x4013 +#define GIGADEVICE_GD25Q80 0x4014 +#define GIGADEVICE_GD25Q16 0x4015 +#define GIGADEVICE_GD25Q32 0x4016 +#define GIGADEVICE_GD25Q64 0x4017 +#define GIGADEVICE_GD25Q128 0x4018 + #define HYUNDAI_ID 0xAD /* Hyundai */ #define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */ #define HYUNDAI_HY29F800B 0x58 /* Same as HY29F800AB */

1 0

Re: [flashrom] [PATCH] Add GigaDevice GD25QXX Series Support
by Uwe Hermann 14 Apr '12

14 Apr '12

Hi, On Tue, Mar 27, 2012 at 09:49:45PM -0400, Justin Chevrier wrote: > Signed-off-by: Justin Chevrier <jchevrier(a)gmail.com> Thanks a lot! The patch looks good, committed in r1520. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom