flashrom

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9188 discussions

Re: [flashrom] PONY_SPI, now with Windows support
by Michael Karcher 30 Apr '12

30 Apr '12

On Mon, 2012-04-30 at 00:55 +0200, Virgil-Adrian Teaca wrote: > Then, I attached another patch, which I hope it is what we need... I just replaced eight spaces by a tab at two points in serial.c, otherwise, it really is fine. > Signed-off-by: Virgil-Adrian Teaca <darkstarlinux(a)gmail.com> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Committed in r1525. Thanks for your patch.

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[commit] r1525 - trunk
by repository service 30 Apr '12

30 Apr '12

Author: mkarcher Date: Tue May 1 01:11:06 2012 New Revision: 1525 URL: http://flashrom.org/trac/flashrom/changeset/1525 Log: Add serial port bitbanging code This adds the pony_spi driver which supports the SI_Prog adapter, which is commonly used for SPI chips with PonyProg 2000, and a custom adapter called "SERBANG" which differs in the logic of two pins. Signed-off-by: Virgil-Adrian Teaca <darkstarlinux(a)gmail.com> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Added: trunk/pony_spi.c Modified: trunk/Makefile trunk/flashrom.c trunk/print.c trunk/programmer.h trunk/serial.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Fri Apr 27 22:41:23 2012 (r1524) +++ trunk/Makefile Tue May 1 01:11:06 2012 (r1525) @@ -292,6 +292,9 @@ # RayeR SPIPGM hardware support CONFIG_RAYER_SPI ?= yes +# PonyProg2000 SPI hardware support +CONFIG_PONY_SPI ?= yes + # Always enable 3Com NICs for now. CONFIG_NIC3COM ?= yes @@ -348,6 +351,9 @@ ifeq ($(CONFIG_RAYER_SPI), yes) override CONFIG_BITBANG_SPI = yes else +ifeq ($(CONFIG_PONY_SPI), yes) +override CONFIG_BITBANG_SPI = yes +else ifeq ($(CONFIG_INTERNAL), yes) override CONFIG_BITBANG_SPI = yes else @@ -362,6 +368,7 @@ endif endif endif +endif ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' @@ -388,6 +395,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_PONY_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_PONY_SPI=1' +PROGRAMMER_OBJS += pony_spi.o +NEED_SERIAL := yes +endif + ifeq ($(CONFIG_BITBANG_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_BITBANG_SPI=1' PROGRAMMER_OBJS += bitbang_spi.o Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Apr 27 22:41:23 2012 (r1524) +++ trunk/flashrom.c Tue May 1 01:11:06 2012 (r1525) @@ -201,6 +201,16 @@ }, #endif +#if CONFIG_PONY_SPI == 1 + { + .name = "pony_spi", + .init = pony_spi_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, +}, +#endif + #if CONFIG_NICINTEL == 1 { .name = "nicintel", Added: trunk/pony_spi.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/pony_spi.c Tue May 1 01:11:06 2012 (r1525) @@ -0,0 +1,160 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2012 Virgil-Adrian Teaca + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Driver for the SI-Prog like hardware by Lancos.com. + * See http://www.lancos.com/siprogsch.html for schematics and instructions. + */ + +#include <stdlib.h> +#include <string.h> + +#include "flash.h" +#include "programmer.h" + +/* We have: + + MOSI -----> DTR + MISO -----> CTS + SCK --+--> RTS + +--> DSR + CS# -----> TXD + +*/ + +enum pony_type { + TYPE_SI_PROG, + TYPE_SERBANG, +}; + +/* The hardware programmer used. */ +static enum pony_type pony_type = TYPE_SI_PROG; + +static void pony_bitbang_set_cs(int val) +{ + if (pony_type == TYPE_SI_PROG) + { + /* CS# is negated by the SI-Prog programmer. */ + val ^= 1; + } + sp_set_pin(PIN_TXD, val); +} + +static void pony_bitbang_set_sck(int val) +{ + sp_set_pin(PIN_RTS, val); +} + +static void pony_bitbang_set_mosi(int val) +{ + sp_set_pin(PIN_DTR, val); +} + +static int pony_bitbang_get_miso(void) +{ + int tmp; + + tmp = sp_get_pin(PIN_CTS); + + if (pony_type == TYPE_SERBANG) + { + /* MISO is negated by the SERBANG programmer. */ + tmp ^= 1; + } + return tmp; +} + +static const struct bitbang_spi_master bitbang_spi_master_pony = { + .type = BITBANG_SPI_MASTER_PONY, + .set_cs = pony_bitbang_set_cs, + .set_sck = pony_bitbang_set_sck, + .set_mosi = pony_bitbang_set_mosi, + .get_miso = pony_bitbang_get_miso, + .half_period = 0, +}; + +int pony_spi_init(void) +{ + char *arg = NULL; + int i, data_in, data_out, have_device = 0; + int have_prog = 1; + + /* The parameter is on format "dev=/dev/device,type=serbang" */ + arg = extract_programmer_param("dev"); + + if (arg && strlen(arg)) { + sp_fd = sp_openserport( arg, 9600 ); + have_device++; + } + free(arg); + + if (!have_device) { + msg_perr("Error: No valid device specified.\n" + "Use flashrom -p pony_spi:dev=/dev/device\n"); + + return 1; + } + /* Register the shutdown callback. */ + if (register_shutdown(serialport_shutdown, NULL)) { + return 1; + } + arg = extract_programmer_param("type"); + + if (arg) { + if (!strcasecmp( arg, "serbang")) { + pony_type = TYPE_SERBANG; + } else if (!strcasecmp( arg, "si_prog") ) { + pony_type = TYPE_SI_PROG; + } else { + msg_perr("Error: Invalid programmer type specified.\n"); + free(arg); + return 1; + } + } + free(arg); + + msg_pdbg("Using the %s programmer.\n", ((pony_type == TYPE_SI_PROG ) ? "SI-Prog" : "SERBANG")); + /* + * Detect if there is a SI-Prog compatible programmer connected. + */ + pony_bitbang_set_cs(1); + pony_bitbang_set_mosi(1); + + /* We toggle SCK while we keep MOSI and CS# on. */ + for (i = 1; i <= 10; ++i) { + data_out = i & 1; + sp_set_pin(PIN_RTS, data_out); + programmer_delay( 1000 ); + data_in = sp_get_pin(PIN_DSR); + + if (data_out != data_in) { + have_prog = 0; + break; + } + } + + if (!have_prog) { + msg_perr( "No SI-Prog compatible hardware detected.\n" ); + return 1; + } + + if (bitbang_spi_init(&bitbang_spi_master_pony)) { + return 1; + } + return 0; +} Modified: trunk/print.c ============================================================================== --- trunk/print.c Fri Apr 27 22:41:23 2012 (r1524) +++ trunk/print.c Tue May 1 01:11:06 2012 (r1525) @@ -507,6 +507,12 @@ /* FIXME */ msg_ginfo("RayeR parallel port programmer\n"); #endif +#if CONFIG_PONY_SPI == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_PONY_SPI].name); + /* FIXME */ + msg_ginfo("SI-Prog and SERBANG serial port programmer\n"); +#endif #if CONFIG_NICINTEL == 1 msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL].name); Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Fri Apr 27 22:41:23 2012 (r1524) +++ trunk/programmer.h Tue May 1 01:11:06 2012 (r1525) @@ -69,6 +69,9 @@ #if CONFIG_RAYER_SPI == 1 PROGRAMMER_RAYER_SPI, #endif +#if CONFIG_PONY_SPI == 1 + PROGRAMMER_PONY_SPI, +#endif #if CONFIG_NICINTEL == 1 PROGRAMMER_NICINTEL, #endif @@ -110,6 +113,9 @@ #if CONFIG_RAYER_SPI == 1 BITBANG_SPI_MASTER_RAYER, #endif +#if CONFIG_PONY_SPI == 1 + BITBANG_SPI_MASTER_PONY, +#endif #if CONFIG_NICINTEL_SPI == 1 BITBANG_SPI_MASTER_NICINTEL, #endif @@ -430,6 +436,11 @@ int rayer_spi_init(void); #endif +/* pony_spi.c */ +#if CONFIG_PONY_SPI == 1 +int pony_spi_init(void); +#endif + /* bitbang_spi.c */ int bitbang_spi_init(const struct bitbang_spi_master *master); @@ -492,7 +503,7 @@ #if CONFIG_DEDIPROG == 1 SPI_CONTROLLER_DEDIPROG, #endif -#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) +#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) SPI_CONTROLLER_BITBANG, #endif #if CONFIG_LINUX_SPI == 1 @@ -636,4 +647,31 @@ int serialport_write(unsigned char *buf, unsigned int writecnt); int serialport_read(unsigned char *buf, unsigned int readcnt); +/* Serial port/pin mapping: + + 1 CD <- + 2 RXD <- + 3 TXD -> + 4 DTR -> + 5 GND -- + 6 DSR <- + 7 RTS -> + 8 CTS <- + 9 RI <- +*/ +enum SP_PIN { + PIN_CD = 1, + PIN_RXD, + PIN_TXD, + PIN_DTR, + PIN_GND, + PIN_DSR, + PIN_RTS, + PIN_CTS, + PIN_RI, +}; + +void sp_set_pin(enum SP_PIN pin, int val); +int sp_get_pin(enum SP_PIN pin); + #endif /* !__PROGRAMMER_H__ */ Modified: trunk/serial.c ============================================================================== --- trunk/serial.c Fri Apr 27 22:41:23 2012 (r1524) +++ trunk/serial.c Tue May 1 01:11:06 2012 (r1525) @@ -32,6 +32,9 @@ #include <conio.h> #else #include <termios.h> +#include <unistd.h> +#include <sys/types.h> +#include <sys/ioctl.h> #endif #include "flash.h" #include "programmer.h" @@ -172,6 +175,58 @@ #endif } +void sp_set_pin(enum SP_PIN pin, int val) { +#ifdef _WIN32 + DWORD ctl; + + if(pin == PIN_TXD) { + ctl = val ? SETBREAK: CLRBREAK; + } + else if(pin == PIN_DTR) { + ctl = val ? SETDTR: CLRDTR; + } + else { + ctl = val ? SETRTS: CLRRTS; + } + EscapeCommFunction(sp_fd, ctl); +#else + int ctl, s; + + if(pin == PIN_TXD) { + ioctl(sp_fd, val ? TIOCSBRK : TIOCCBRK, 0); + } + else { + s = (pin == PIN_DTR) ? TIOCM_DTR : TIOCM_RTS; + ioctl(sp_fd, TIOCMGET, &ctl); + + if (val) { + ctl |= s; + } + else { + ctl &= ~s; + } + ioctl(sp_fd, TIOCMSET, &ctl); + } +#endif +} + +int sp_get_pin(enum SP_PIN pin) { + int s; +#ifdef _WIN32 + DWORD ctl; + + s = (pin == PIN_CTS) ? MS_CTS_ON : MS_DSR_ON; + GetCommModemStatus(sp_fd, &ctl); +#else + int ctl; + s = (pin == PIN_CTS) ? TIOCM_CTS : TIOCM_DSR; + ioctl(sp_fd, TIOCMGET, &ctl); +#endif + + return ((ctl & s) ? 1 : 0); + +} + void sp_flush_incoming(void) { #ifdef _WIN32

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Test report Medion MD5000 V1.2 (MSI MS-6701) - Chip not detected
by Gurken Papst 30 Apr '12

30 Apr '12

Winbond W49F002UP12B is not detected on MSI MS-6701 (Branded as Medion MD5000 V1.2) with SiS 648/Winbond W83697HF. Output of flashrom -V: flashrom v0.9.5.2-r1524 on Linux 2.6.39.3 (i686), built with libpci 3.0.0, GCC 4.4.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1735M loops per second, 10 myus = 28 us, 100 myus = 267 us, 1000 myus = 2670 us, 10000 myus = 26665 us, 4 myus = 12 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "MEDIONPC" DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: "MICRO-STAR INTERNATIONAL CO., LTD" DMI string baseboard-product-name: "MS-6701" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "SiS 648" with PCI ID 1039:0648. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... Found southbridge 1039:0963 at 00:02:0 OK. The following protocols are supported: Non-SPI. Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0xffff, id2 0x00ff Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x76, id2 0x9d, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x25, id2 0x17, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring PCI config space for 00:02:0 reg 0x45 Restoring PCI config space for 00:02:0 reg 0x40 Output of lspci -nnvvxxx: 00:00.0 Host bridge [0600]: Silicon Integrated Systems [SiS] 645xx [1039:0648] (rev 03) Subsystem: Silicon Integrated Systems [SiS] 645xx [1039:0648] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 32 Region 0: Memory at d0000000 (32-bit, non-prefetchable) [size=128M] Capabilities: <access denied> Kernel driver in use: agpgart-sis 00: 39 10 48 06 07 00 10 22 03 00 00 06 00 20 80 00 10: 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 39 10 48 06 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 00:01.0 PCI bridge [0604]: Silicon Integrated Systems [SiS] SG86C202 [1039:0002] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 Memory behind bridge: d8000000-dfffffff Prefetchable memory behind bridge: e0000000-e7ffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA+ VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- 00: 39 10 02 00 07 01 00 00 00 00 04 06 00 40 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 20 f0 00 00 20 20: 00 d8 f0 df 00 e0 f0 e7 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0e 00 00:02.0 ISA bridge [0601]: Silicon Integrated Systems [SiS] SiS963 [MuTIOL Media IO] [1039:0963] (rev 14) Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: 39 10 63 09 0f 00 00 02 14 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:02.1 SMBus [0c05]: Silicon Integrated Systems [SiS] SiS961/2 SMBus Controller [1039:0016] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 0 Region 4: I/O ports at 10c0 [size=32] Kernel driver in use: sis96x_smbus 00: 39 10 16 00 01 00 80 02 00 00 05 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: c1 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00:02.3 FireWire (IEEE 1394) [0c00]: Silicon Integrated Systems [SiS] FireWire Controller [1039:7007] (prog-if 10 [OHCI]) Subsystem: Micro-Star International Co., Ltd. MS-6701 [1462:701d] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (1000ns min, 3000ns max) Interrupt: pin B routed to IRQ 17 Region 0: Memory at e8426000 (32-bit, non-prefetchable) [size=4K] [virtual] Expansion ROM at 20000000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: firewire_ohci 00: 39 10 07 70 06 00 10 02 00 10 00 0c 00 20 00 00 10: 00 60 42 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 1d 70 30: 00 00 00 00 64 00 00 00 00 00 00 00 09 02 04 0c 00:02.5 IDE interface [0101]: Silicon Integrated Systems [SiS] 5513 [IDE] [1039:5513] (prog-if 80 [Master]) Subsystem: Micro-Star International Co., Ltd. MS-6701 motherboard [1462:7010] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 128 Interrupt: pin ? routed to IRQ 16 Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1] Region 4: I/O ports at 4000 [size=16] Capabilities: <access denied> Kernel driver in use: pata_sis 00: 39 10 13 55 05 00 10 02 00 80 01 01 00 80 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 40 00 00 00 00 00 00 00 00 00 00 62 14 10 70 30: 00 00 00 00 58 00 00 00 00 00 00 00 00 00 00 00 00:02.7 Multimedia audio controller [0401]: Silicon Integrated Systems [SiS] AC'97 Sound Controller [1039:7012] (rev a0) Subsystem: Micro-Star International Co., Ltd. MS-6701 motherboard [1462:7010] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (13000ns min, 2750ns max) Interrupt: pin C routed to IRQ 18 Region 0: I/O ports at e400 [size=256] Region 1: I/O ports at e800 [size=128] Capabilities: <access denied> Kernel driver in use: Intel ICH 00: 39 10 12 70 05 00 90 02 a0 00 01 04 00 20 00 00 10: 01 e4 00 00 01 e8 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 10 70 30: 00 00 00 00 48 00 00 00 00 00 00 00 03 03 34 0b 00:03.0 USB Controller [0c03]: Silicon Integrated Systems [SiS] USB 1.1 Controller [1039:7001] (rev 0f) (prog-if 10 [OHCI]) Subsystem: Micro-Star International Co., Ltd. MS-6701 motherboard [1462:7010] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (20000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 20 Region 0: Memory at e8420000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 39 10 01 70 07 00 80 02 0f 10 03 0c 08 20 80 00 10: 00 00 42 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 10 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 09 01 00 50 00:03.1 USB Controller [0c03]: Silicon Integrated Systems [SiS] USB 1.1 Controller [1039:7001] (rev 0f) (prog-if 10 [OHCI]) Subsystem: Micro-Star International Co., Ltd. MS-6701 motherboard [1462:7010] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (20000ns max), Cache Line Size: 32 bytes Interrupt: pin B routed to IRQ 21 Region 0: Memory at e8421000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 39 10 01 70 07 00 80 02 0f 10 03 0c 08 20 00 00 10: 00 10 42 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 10 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 03 02 00 50 00:03.2 USB Controller [0c03]: Silicon Integrated Systems [SiS] USB 1.1 Controller [1039:7001] (rev 0f) (prog-if 10 [OHCI]) Subsystem: Micro-Star International Co., Ltd. MS-6701 motherboard [1462:7010] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (20000ns max), Cache Line Size: 32 bytes Interrupt: pin C routed to IRQ 22 Region 0: Memory at e8422000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00: 39 10 01 70 07 00 80 02 0f 10 03 0c 08 20 00 00 10: 00 20 42 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 10 70 30: 00 00 00 00 00 00 00 00 00 00 00 00 05 03 00 50 00:03.3 USB Controller [0c03]: Silicon Integrated Systems [SiS] USB 2.0 Controller [1039:7002] (prog-if 20 [EHCI]) Subsystem: Micro-Star International Co., Ltd. MS-6701 motherboard [1462:7010] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (20000ns max), Cache Line Size: 32 bytes Interrupt: pin D routed to IRQ 23 Region 0: Memory at e8423000 (32-bit, non-prefetchable) [size=4K] Capabilities: <access denied> Kernel driver in use: ehci_hcd 00: 39 10 02 70 06 00 90 02 00 20 03 0c 08 20 00 00 10: 00 30 42 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 10 70 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 04 00 50 00:04.0 Ethernet controller [0200]: Silicon Integrated Systems [SiS] SiS900 PCI Fast Ethernet [1039:0900] (rev 91) Subsystem: Micro-Star International Co., Ltd. MS-6701 motherboard [1462:0900] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (13000ns min, 2750ns max) Interrupt: pin A routed to IRQ 19 Region 0: I/O ports at ec00 [size=256] Region 1: Memory at e8424000 (32-bit, non-prefetchable) [size=4K] [virtual] Expansion ROM at 20020000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: sis900 00: 39 10 00 09 07 00 90 02 91 00 00 02 00 20 00 00 10: 01 ec 00 00 00 40 42 e8 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 00 09 30: 00 00 00 00 40 00 00 00 00 00 00 00 05 01 34 0b 00:08.0 Multimedia controller [0480]: Philips Semiconductors SAA7134/SAA7135HL Video Broadcast Decoder [1131:7134] (rev 01) Subsystem: Creatix Polymedia GmbH Medion 7134 [16be:0003] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (2000ns min, 8000ns max) Interrupt: pin A routed to IRQ 19 Region 0: Memory at e8425000 (32-bit, non-prefetchable) [size=1K] Capabilities: <access denied> Kernel driver in use: saa7134 00: 31 11 34 71 06 00 90 02 01 00 80 04 00 20 00 00 10: 00 50 42 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 be 16 03 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 05 01 08 20 00:0a.0 Communication controller [0780]: Intel Corporation 536EP Data Fax Modem [8086:1040] Subsystem: Creatix Polymedia GmbH V.9X DSP Data Fax Modem [16be:1040] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 9 Region 0: Memory at e8000000 (32-bit, non-prefetchable) [size=4M] Capabilities: <access denied> 00: 86 80 40 10 07 00 90 02 00 00 80 07 08 20 00 00 10: 00 00 00 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 be 16 40 10 30: 00 00 00 00 e0 00 00 00 00 00 00 00 09 01 00 00 01:00.0 VGA compatible controller [0300]: nVidia Corporation NV20 [GeForce3] [10de:0200] (rev a3) (prog-if 00 [VGA controller]) Subsystem: Elsa AG GLADIAC 920 [1048:0c70] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (1250ns min, 250ns max) Interrupt: pin A routed to IRQ 16 Region 0: Memory at d8000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at e0000000 (32-bit, prefetchable) [size=64M] Region 2: Memory at e4000000 (32-bit, prefetchable) [size=512K] [virtual] Expansion ROM at e4080000 [disabled] [size=64K] Capabilities: <access denied> Kernel driver in use: nouveau 00: de 10 00 02 07 00 b0 02 a3 00 00 03 00 20 00 00 10: 00 00 00 d8 08 00 00 e0 08 00 00 e4 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 48 10 70 0c 30: 00 00 00 00 60 00 00 00 00 00 00 00 0b 01 05 01 Output of superiotool -deV: superiotool r5050 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x10fe, id=0x1260 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x6012, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Found Winbond W83697HF/F/HG (id=0x60, rev=0x12) at 0x2e Register dump: idx 20 21 22 23 24 25 26 28 29 2a val 60 12 ff fe 10 00 00 00 00 f0 def 60 NA ff 00 00 00 00 00 00 MM LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 03 3b def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 00 00 00 00 00 00 def 01 02 f8 03 00 00 LDN 0x06 (Consumer IR) idx 30 60 61 70 val 00 00 00 00 def 00 00 00 00 LDN 0x07 (Game port, GPIO 1) idx 30 60 61 62 63 f0 f1 f2 val 01 02 01 00 00 ff 00 00 def 00 02 01 00 00 ff 00 00 LDN 0x08 (MIDI port, GPIO 5) idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 val 01 03 30 00 00 0a ff 00 00 00 00 00 def 00 03 30 00 00 09 ff 00 00 00 00 00 LDN 0x09 (GPIO 2, GPIO 3, GPIO 4) idx 30 60 61 f0 f1 f2 f3 f4 f5 f6 f7 f8 f5 val 00 00 00 ff ff ff ff ff ff ff ff ff ff def 00 00 00 ff 00 00 ff 00 00 ff 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 val 00 00 00 00 ff 00 00 00 00 af 0e 00 00 00 00 def 00 00 00 00 NA 00 00 00 00 00 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 val 01 02 90 00 def 00 00 00 00 Hardware monitor (0x0295) Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found.

1 0

Re: [flashrom] Test report Biostar M7VIQ - Chip now detected, reading works
by Gurken Papst 30 Apr '12

30 Apr '12

On Sat, Apr 28, 2012 at 01:24, Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > i have hacked it into something that might work for your board; the > generalization can happen later. i will reply to this mail with two > patches. please apply them to SVN HEAD and try to probe and read, but > not erase/write yet please. Nice job, detection and reading are working. Dumps from UniFlash and Flashrom are equal. Output of flashrom -V -r m7viq_flashrom.img: flashrom v0.9.5.2-r1524 on Linux 2.6.39.3 (i686), built with libpci 3.0.0, GCC 4.4.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 832M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 999 us, 10000 myus = 10186 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: " " DMI string baseboard-product-name: "KM266-8235" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "VIA VT8235" with PCI ID 1106:3177. Enabling flash write... OK. Disabling flash write protection for board "Biostar M7VIQ"... OK. The following protocols are supported: Non-SPI. [...] Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0xda, id2 0x0b Found Winbond flash chip "W49F002U/N" (256 kB, Parallel) at physical address 0xfffc0000. [...] Found Winbond flash chip "W49F002U/N" (256 kB, Parallel). Reading flash... done. Restoring PCI config space for 00:11:0 reg 0x40 Restoring PCI config space for 00:11:0 reg 0x41 Do you need any additional information?

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Re: [flashrom] PONY_SPI, now with Windows support
by Virgil-Adrian Teaca 30 Apr '12

30 Apr '12

And there is the latest PONY_SPI patch. Also, I think that the public api should work better with the function names as serialport_set_pin() and serialport_get_pin() ... All the best, Virgil.

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Re: [flashrom] PONY_SPI, now with Windows support
by Michael Karcher 29 Apr '12

29 Apr '12

On Sun, 2012-04-29 at 23:58 +0200, Virgil-Adrian Teaca wrote: > Then, there is attached a new patch, where code is cleaned and some > main bitbanging functions are moved to serial.c, to simplify the > pony_spi.c and to make them available to all possible serial drivers > which want bitbanging... Great! The code is now styled and designed as I expect it for flashrom code, just some minor nitpicks and one detail I missed to mention in the last review, and is a problem we can't expect you to know. Let's start with that one: In programmer.h, we have: #if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) SPI_CONTROLLER_BITBANG, #endif If the only bitbang programmer enabled is your programmer, SPI_CONTROLLER_BITBANG doesn't get defined. I hit that problem when I tried to cross-compile for Windows, as on Windows, we don't support the internal programmer or PCI-based programmers (which also means direct port I/O programmers like rayer for now), so your programmer would be the only one enabled, but is not in the list of programmers tested. In my oppion, the whole test should be replaced by #if CONFIG_BITBANG_SPI == 1 because the Makefile already handles defining CONFIG_BITBANG_SPI the right way. [Makefile] > LIBFLASHROM_OBJS = $(CHIP_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) > -OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) > +OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) This change is an white-space change (removing a space at end of line. It should not have been there in the first place, though) which is unrelated to your patch. If it doesn't take too much hassle for you, please remove this change from your patch. [pony_spi.c] > +static void pony_bitbang_set_cs(int val) > +{ > + if(pony_type == TYPE_SI_PROG) Please add a space after "if" > + if( pony_type == TYPE_SERBANG ) Please add a space after "if" and remove the inner spaces > + /* The parameter is on format "dev=/dev/device,type=serbang" */ > + arg = extract_programmer_param( "dev" ); No spaces inside the parens, please. > + } else { > + msg_perr("Error: Invalid programmer type specified.\n"); > + free( arg ); > + return 1; > + } > + } > + free( arg ); > + > + msg_pdbg("Using the %s programmer.\n", ((pony_type == TYPE_SI_PROG ) ? "SI-Prog" : "SERBANG")); In the "free" calls, remove space, too. Generally, remove the space after "!" for negation. [programmer.h] > +enum sp_pin { > + PIN_CD = 1, > + PIN_RXD, > + PIN_TXD, > + PIN_DTR, > + PIN_GND, > + PIN_DSR, > + PIN_RTS, > + PIN_CTS, > + PIN_RI, > +}; Can you rename them to SP_PIN_...? This enum is defined in programmer.h now, which is included nearly everywhere in flashrom, not only on serial port related stuff, so limiting to names starting with serialport or SP_ seems appropriate. [serial.c] > + ioctl( sp_fd, val ? TIOCSBRK : TIOCCBRK, 0 ); spacing inside parentheses. > + ioctl( sp_fd, TIOCMGET, &ctl ); dito. > + if ( val ) { dito. > + GetCommModemStatus( sp_fd, &ctl ); dito. > @@ -212,7 +266,7 @@ > } > if (!tmp) > msg_pdbg("Empty write\n"); > - writecnt -= tmp; > + writecnt -= tmp; > buf += tmp; > } unrelated whitespace change. Regards, Michael Karcher

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Re: [flashrom] PONY_SPI, now with Windows support
by Michael Karcher 29 Apr '12

29 Apr '12

On Sun, 2012-04-29 at 18:35 +0200, Virgil-Adrian Teaca wrote: > This PONY_SPI patch have also the Windows support, but, to note that > this new code is untested. Thank you very much for sharing your work! It might make sense to put the serial port pin manipulation functions into serial.c instead of pony_spi.c (of course they can't be static then, should be named sp_xxx instead of pony_xxx and the PIN_xxx enumeration should be named "SERIAL_PIN_xxx") Comments from other developers? I will start with some coding style issues, but please see the code comments below, too. I can't provide you any indent command line for flashrom, but we generally don't use spaces on the inner sider of parentheses. So inside flashrom: WRONG: ioctl( sp_fd, TIOCMGET, &ctl ); RIGHT: ioctl(sp_fd, TICMGET, &ctl); On the other hand, we *do* write a space before the opening parenthesis, but only after keywords (if, while, for), not after function names, so for code in flashrom: WRONG: if( pin == PIN_TXD ) RIGHT: if (pin == PIN_TXD) Furthermore, I noticed you are using a lot of blank lines. I appreciate structuring your code by inserting blank lines between logical blocks to make it more readable, but having every second line blank (like you do in the programmer detection loop for example) does not really add any value over not having blank lines. In that specific example, the only blank line I might leave in is the one before the "if" block. > @@ -122,6 +122,11 @@ > else > override CONFIG_RAYER_SPI = no > endif > +ifeq ($(CONFIG_PONY_SPI), yes) > +UNSUPPORTED_FEATURES += CONFIG_PONY_SPI=yes > +else > +override CONFIG_PONY_SPI = no > +endif > ifeq ($(CONFIG_NIC3COM), yes) > UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes > else > @@ -246,6 +251,11 @@ > else > override CONFIG_RAYER_SPI = no > endif > +ifeq ($(CONFIG_PONY_SPI), yes) > +UNSUPPORTED_FEATURES += CONFIG_PONY_SPI=yes > +else > +override CONFIG_PONY_SPI = no > +endif > ifeq ($(CONFIG_ATAHPT), yes) > UNSUPPORTED_FEATURES += CONFIG_ATAHPT=yes > else Drop these two hunks. They are for programmers that directly access hardware through processor I/O cycles. You don't do that, as you use the OS driver for the serial port instead. > +ifeq ($(CONFIG_PONY_SPI), yes) > +FEATURE_CFLAGS += -D'CONFIG_PONY_SPI=1' > +PROGRAMMER_OBJS += pony_spi.o > +endif Add a "NEED_SERIAL := yes" in the if block, otherwise serial.c might not get included. > +#include <stdlib.h> > +#include <string.h> > +#include <termios.h> > +#include <unistd.h> > +#include <sys/types.h> > +#include <sys/stat.h> > +#include <fcntl.h> > +#include <sys/ioctl.h> The last six headers are not needed on Windows, and some of them don't even exist. Wrap these includes by "#ifndef _WIN32" > +#ifdef _WIN32 > +#include <conio.h> > +#endif That include is useless, drop it. > +enum pony_pin { > + PIN_CD = 0, > + PIN_RXD, > + PIN_TXD, > + PIN_DTR, > + PIN_GND, > + PIN_DSR, > + PIN_RTS, > + PIN_CTS, > + PIN_RI, > +}; I wonder whether it makes sense to define all 9 pins of the socket. For example: What are you intending to use "PIN_GND" for? In the case, you just define them to have all pins defined, I would suggest to start with PIN_CD at 1, so the enumerators match the conventional pin numbers. > +static void pony_set_pin( int pin, int val ) { Why don't you use "enum pony_pin" as type for the pin? > +static int pony_get_pin( int pin ) { dito. One might even think about using two different enums, one for input pins, one for output pins. > +static void pony_bitbang_set_cs( int val ) > +{ > + if( pony_type == TYPE_SI_PROG ) > + { > + /* CS# is negated by the SI-Prog programmer. */ > + val = val ? 0 : 1; please write this as "val = !val;" or "val ^= 1;" > + } > + > + pony_set_pin( PIN_TXD, val ); > +} > +static int pony_bitbang_get_miso(void) > +{ > + int tmp; > + > + tmp = pony_get_pin( PIN_CTS ); > + > + if( pony_type == TYPE_SERBANG ) > + { > + /* MISO is negated by the SERBANG programmer. */ > + tmp = tmp ? 0 : 1; dito, use "tmp = !tmp;" here, or do it like /* MISO is negated by the SERBANG programmer, */ if (pony_type == TYPE_SERBANG) return !tmp; else return tmp; > + /* Register the shutdown callback. */ > + > + if ( register_shutdown( serialport_shutdown, NULL ) ) { > + return 1; > + } If you would register the shutdown function directly after opening the port, you would not have to call serialport_shutdown(NULL) yourself in the error cases before this line. > + > + /* Get the initial value before writing to any line. */ > + Remove this comment. It doesn't apply. > + if ( bitbang_spi_init( &bitbang_spi_master_pony ) ) { > + return 1; > + } > + > + return 0; > +} > diff -urN flashrom.orig/print.c flashrom/print.c > --- flashrom.orig/print.c 2012-03-13 16:52:50.000000000 +0100 > +++ flashrom/print.c 2012-04-24 00:50:46.329483950 +0200 > @@ -507,6 +507,12 @@ > /* FIXME */ > msg_ginfo("RayeR parallel port programmer\n"); > #endif > +#if CONFIG_PONY_SPI == 1 > + msg_ginfo("\nSupported devices for the %s programmer:\n", > + programmer_table[PROGRAMMER_PONY_SPI].name); > + /* FIXME */ > + msg_ginfo("SI-Prog serial port programmer\n"); Add serbang here, too. Regards, Michael Karcher

2 1

PONY_SPI, now with Windows support
by Virgil-Adrian Teaca 29 Apr '12

29 Apr '12

Hello, This PONY_SPI patch have also the Windows support, but, to note that this new code is untested. All the best, Virgil.

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Re: [flashrom] LGPL
by Carl-Daniel Hailfinger 29 Apr '12

29 Apr '12

Hi Jay, Am 27.04.2012 14:59 schrieb Rolette, James (Jay): >> It's easy to make requests like this, even though i find your >> explanation as to why you think VxWorks users (what vxworks users would >> even know of flashrom?) will not use flashrom rather hairy. > Not sure I understand the expression here... hairy == questionable/unlikely? I think Luc's point is that the system library exception in the GPL should provide the legal coverage you need. You mentioned that sharing the address space between proprietary code and GPL code could be a problem, but given that a process on e.g x86 shares its address space with the libraries it uses, it is a normal case that proprietary library code and GPL application code live in the same address space, and IMO the GPL system library exception was meant to cover exactly that case. Unless I have totally misunderstood how VxWorks works, this would mean you're totally fine with a GPL flashrom. >> It's not nearly so easy to actually make such a change, as such a license >> change entails getting permission from all individual contributors. > Ok. Wasn't sure how copyright assignment was being handled on flashrom. We didn't use copyright assignment at all, and that was originally intended to assure everybody that nobody would relicense the code at will. >> So, here is the deal, a deal that i think most people on this ml would >> wholeheartedly agree with: if _you_ want LGPL, _you_ get to sollicite >> all individual contributors. > Fair enough. A few questions on that: > > 1) I'm assuming there are is a small core of folks that form the heart of > the project. I'd like to start with them if possible because there is no > point in going broader than that if the core developers don't agree. > > Would someone be willing to provide a list of the "leaders"? A quick look > at the source shows a few names that show up a lot (Uwe, Carl-Daniel, > Stefan, etc.), but always hard to tell without the benefit of having > followed the project over time. The Signed-off-by statements in the logs would give you the best indication, and they should cover roughly 95% of the current codebase. The rest (very early commits) is by authors who might be more difficult to reach. > 2) What is required from each contributor? Just an email approving a move > to LGPL for their contribution? Something more specific? If you attempt relicensing because your legal department has doubts about GPL code, I think they won't be happy with confirmation e-mails (due to them being easy to fake) and would require at least some written and signed statement for every contributor. That would make relicensing a project needing a lot of effort, though. > 3) Is it ok to derive the list of approvers based on the copyright statement > in the source files? Use the Signed-off-by statements, they are better indicators. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH 2/2] spi25.c: Refactor spi_write_status_register helpers.
by Stefan Tauner 28 Apr '12

28 Apr '12

In r1115 "Write protection handling for Atmel AT25*" the old spi_write_status_register function was duplicated to send WREN and EWSR commands respectively controlled by a new common wrapper function spi_write_status_register without a reason. Both functions' resulting code is equal apart from the opcode used. The code itself does also differ in the macros used, but their value (apart from the opcode) is equal. This patch adds a new parameter for the opcode to the helper function which allows removal of the other one. This relies on the fact that EWSR and WREN have the same INSIZE and OUTSIZE though. If that is really seen as an issue, the sizes could be made parameters too. This patch also changes the wrapper so that it no longer sets the feature bits of the struct flash(ctx) argument. This may result in changed output, because it no longer implicitly disables the debug message in following executions. Since almost all chips had their feature bits fixed in the previous commit, this is a minor problem. Also, spi_write_status_enable has been dead code since r658 or so. Remove it. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> --- spi25.c | 72 +++++++++++++-------------------------------------------------- 1 file changed, 14 insertions(+), 58 deletions(-) diff --git a/spi25.c b/spi25.c index b7e8189..083d85f 100644 --- a/spi25.c +++ b/spi25.c @@ -764,63 +764,19 @@ int spi_write_status_enable(struct flashctx *flash) * This is according the SST25VF016 datasheet, who knows it is more * generic that this... */ -static int spi_write_status_register_ewsr(struct flashctx *flash, int status) +static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) { int result; int i = 0; - struct spi_command cmds[] = { - { - /* WRSR requires either EWSR or WREN depending on chip type. */ - .writecnt = JEDEC_EWSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_EWSR }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_WRSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", - __func__); - /* No point in waiting for the command to complete if execution - * failed. - */ - return result; - } - /* WRSR performs a self-timed erase before the changes take effect. - * This may take 50-85 ms in most cases, and some chips apparently - * allow running RDSR only once. Therefore pick an initial delay of - * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. + /* + * WRSR requires either EWSR or WREN depending on chip type. + * The code below relies on the fact hat EWSR and WREN have the same + * INSIZE and OUTSIZE. */ - programmer_delay(100 * 1000); - while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { - if (++i > 490) { - msg_cerr("Error: WIP bit after WRSR never cleared\n"); - return TIMEOUT_ERROR; - } - programmer_delay(10 * 1000); - } - return 0; -} - -static int spi_write_status_register_wren(struct flashctx *flash, int status) -{ - int result; - int i = 0; struct spi_command cmds[] = { { - /* WRSR requires either EWSR or WREN depending on chip type. */ .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, + .writearr = (const unsigned char[]){ enable_opcode }, .readcnt = 0, .readarr = NULL, }, { @@ -837,8 +793,7 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) result = spi_send_multicommand(flash, cmds); if (result) { - msg_cerr("%s failed during command execution\n", - __func__); + msg_cerr("%s failed during command execution\n", __func__); /* No point in waiting for the command to complete if execution * failed. */ @@ -862,17 +817,18 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) int spi_write_status_register(struct flashctx *flash, int status) { + int feature_bits = flash->feature_bits; int ret = 1; - if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { + if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { msg_cdbg("Missing status register write definition, assuming " "EWSR is needed\n"); - flash->feature_bits |= FEATURE_WRSR_EWSR; + feature_bits |= FEATURE_WRSR_EWSR; } - if (flash->feature_bits & FEATURE_WRSR_WREN) - ret = spi_write_status_register_wren(flash, status); - if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) - ret = spi_write_status_register_ewsr(flash, status); + if (feature_bits & FEATURE_WRSR_WREN) + ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); + if (ret && (feature_bits & FEATURE_WRSR_EWSR)) + ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); return ret; } -- Kind regards, Stefan Tauner

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