flashrom

flashrom@flashrom.org

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9188 discussions

Re: [flashrom] Which hardware do you want supported?
by Andrew Goodbody 24 Jul '12

24 Jul '12

On 22/07/12 00:13, Vitali Druzhinin wrote: > Hello! > > Did not find my motherboards in supported hardware list, but found chipsets. > > I would like to flash the following: > > ASUS M3A-H/HDMI (SB7x0/SB8x0/SB9x0 1002:439d) > Elitegroup NFORCE6M-A2 (MCP61 10de:03e0) > > How safe is to try flash Coreboot on these MoBo? What information do you > need else? > > BR, > Vitali Not safe at all. Flashrom may well work if the boards do not require board specific enables but coreboot requires a specific port to each motherboard in question. So you are very likely to end up with a motherboard that will not boot. If you want to do the coreboot ports then the coreboot mailing list will be the place to get the help you need. Andrew

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[PATCH] Intel QM77
by Wagner, Helge (GE Germany) 24 Jul '12

24 Jul '12

Hi all, Please find attached our changes for the QM77 chipset. I looked at the datasheet to be sure that the strap names (SPI, PCI, LPC) are the same as on the series 5 and 6 chipsets. Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> Best Regards, Helge Wagner

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Re: [flashrom] [PATCH] Fix VIA VX*** support.
by Wagner, Helge (GE Germany) 24 Jul '12

24 Jul '12

Hello Stefan, your patch looks good. I tried it on my VX900 system and found it fully working. Logs attached. Regards, Helge

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[PATCH] Fix VIA VX*** support.
by Stefan Tauner 23 Jul '12

23 Jul '12

Helge Wagner's patch that added VIA VX900 chipset support made me look closer at the datasheets which led to some concise documentation about newer VIA chipsets: http://flashrom.org/VIA Based on that this patch adds full support for VX800/VX820, VX855/VX875 and VX900, including SPI and LPC. VT8237S was not changed (SPI support only) because there is no public datasheet and it is not clear how to distinguish between LPC and SPI strapping and investigations in (NDAed) documents have not brought up anything conclusively. enable_flash_vt823x could probably be enhanced too due to various ignored LPC options of the chipset. Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 79 +++++++++++++++++++++++++++++++++++++++++++++++------- ichspi.c | 9 +++---- programmer.h | 2 +- 3 files changed, 73 insertions(+), 17 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index bde2e12..a977d68 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -6,6 +6,7 @@ * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> * Copyright (C) 2007,2008,2009 Carl-Daniel Hailfinger * Copyright (C) 2009 Kontron Modular Computers GmbH + * Copyright (C) 2011, 2012 Stefan Tauner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -508,12 +509,6 @@ static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) return ret; } -static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) -{ - /* Do we really need no write enable? */ - return via_init_spi(dev); -} - static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, enum ich_chipset ich_generation) { @@ -680,7 +675,7 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name) return -1; } - if (dev->device_id == 0x3227) { /* VT8237R */ + if (dev->device_id == 0x3227) { /* VT8237 */ /* All memory cycles, not just ROM ones, go to LPC. */ val = pci_read_byte(dev, 0x59); val &= ~0x80; @@ -690,6 +685,69 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name) return 0; } +static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) +{ + struct pci_dev *south_north = pci_dev_find(0x1106, 0xa353); + if (south_north == NULL) { + msg_perr("Could not find South-North Module Interface Control device!\n"); + return -1; + } + + msg_pdbg("Strapped to "); + if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) { + msg_pdbg("LPC.\n"); + return enable_flash_vt823x(dev, name); + } + msg_pdbg("SPI.\n"); + + uint32_t mmio_base; + void *mmio_base_physmapped; + uint32_t spi_cntl; + #define SPI_CNTL_LEN 0x08 + uint32_t spi0_mm_base = 0; + switch(dev->device_id) { + case 0x8353: /* VX800/VX820 */ + spi0_mm_base = pci_read_long(dev, 0xbc) << 8; + break; + case 0x8409: /* VX855/VX875 */ + case 0x8410: /* VX900 */ + mmio_base = pci_read_long(dev, 0xbc) << 8; + mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) { + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + + /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; + if ((spi_cntl & 0x01) == 0) { + msg_pdbg ("SPI Bus0 disabled!\n"); + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + /* Offset 1-3 has SPI Bus Memory Map Base Address: */ + spi0_mm_base = spi_cntl & 0xFFFFFF00; + + /* Offset 4 - Bit 0 holds SPI Bus1 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x04; + if ((spi_cntl & 0x01) == 1) + msg_pdbg2("SPI Bus1 is enabled too.\n"); + + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + break; + default: + msg_perr("%s: Unsupported chipset %x:%x!\n", __func__, dev->vendor_id, dev->device_id); + return ERROR_FATAL; + } + + return via_init_spi(dev, spi0_mm_base); +} + +static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) +{ + return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8); +} + static int enable_flash_cs5530(struct pci_dev *dev, const char *name) { uint8_t reg8; @@ -1262,7 +1320,7 @@ const struct penable chipset_enables[] = { {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111}, - {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, + {0x1106, 0x3074, OK, "VIA", "VT8233/VT8237R", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, @@ -1270,8 +1328,9 @@ const struct penable chipset_enables[] = { {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, - {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, + {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, + {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, + {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, diff --git a/ichspi.c b/ichspi.c index 792d35d..fb87459 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1844,17 +1844,14 @@ static const struct spi_programmer spi_programmer_via = { .write_aai = default_spi_write_aai, }; -int via_init_spi(struct pci_dev *dev) +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) { - uint32_t mmio_base; int i; - mmio_base = (pci_read_long(dev, 0xbc)) << 8; msg_pdbg("MMIO base at = 0x%x\n", mmio_base); - ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); + ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ - /* Not sure if it speaks all these bus protocols. */ - internal_buses_supported = BUS_LPC | BUS_FWH; ich_generation = CHIPSET_ICH7; register_spi_programmer(&spi_programmer_via); diff --git a/programmer.h b/programmer.h index f511c71..cfdc677 100644 --- a/programmer.h +++ b/programmer.h @@ -561,7 +561,7 @@ enum ich_chipset { extern uint32_t ichspi_bbar; int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, enum ich_chipset ich_generation); -int via_init_spi(struct pci_dev *dev); +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); /* it85spi.c */ int it85xx_spi_init(struct superio s); -- Kind regards, Stefan Tauner

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Re: [flashrom] [PATCH 3/3] Not for merge: make the dummy programmer FAIL
by Carl-Daniel Hailfinger 23 Jul '12

23 Jul '12

Am 23.07.2012 15:34 schrieb Stefan Tauner: > blacklisting and ignorelisting opcodes is just not enough. > this patch does not introduce the most outstand failure injection ever, but > it certainly helped me testing the other patch. maybe we want to make > similar failures user configurable? > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> I really like simulating chip failure. What about doing this with a programmer parameter, maybe erasestuckbyte=val@addr+count:val@addr+count etc. (essentially an AND mask for the desired erase result) writestuckbyte=val@addr+count:val@addr+count etc. (essentially an OR mask for the desired write result) val would be the hex representation of a single byte, addr would be the in-chip address where the stuck byte is placed, and count would be how often you have to write/erase to get the right value (with 0 as special count meaning the byte is stuck forever). For erasestuckbyte=0xfe@0xbabe+2 we'd get the following result: 1. Address 0xbabe has value 0xfe&oldval_at_0xbabe 2. Run erase 3. Address 0xbabe has value 0xfe 4. Run erase again (same or different block size) 5. Address 0xbabe has value 0xff 6. Write anything to address 0xbabe 7. Address 0xbabe has desired value 8. If you erase again, address 0xbabe has value 0xfe Write resets the counter for erasestuckbyte. For writstuckbyte=0x01@0xbabe+2 we'd get the following result: 1. Address 0xbabe has value 0x01|oldval_at_0xbabe 2. Run erase 3. Address 0xbabe has value 0xff 4. Write newval to address 0xbabe 5. Address 0xbabe has value 0x01|newval_at_0xbabe 6. Write newval to address 0xbabe 7. Address 0xbabe has desired value Erase resets the counter for writestuckbyte What do you think? Is this completely overdesigning a solution, or is it a useful unit test? Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH 3/3] Not for merge: make the dummy programmer FAIL
by Stefan Tauner 23 Jul '12

23 Jul '12

blacklisting and ignorelisting opcodes is just not enough. this patch does not introduce the most outstand failure injection ever, but it certainly helped me testing the other patch. maybe we want to make similar failures user configurable? Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- dummyflasher.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/dummyflasher.c b/dummyflasher.c index 66d0df0..5a51d1c 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -493,6 +493,7 @@ static int emulate_spi_chip_response(unsigned int writecnt, { unsigned int offs, i, toread; static int unsigned aai_offs; + static int num_read = 0; if (writecnt == 0) { msg_perr("No command sent to the chip!\n"); @@ -587,6 +588,13 @@ static int emulate_spi_chip_response(unsigned int writecnt, offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; /* Truncate to emu_chip_size. */ offs %= emu_chip_size; + if(offs==(emu_chip_size/8)){ + num_read++; + if(num_read >= 4){ // verify will fail iff there has been at least one erase retry + memset(readarr, 0x13, readcnt); + break; + } + } if (readcnt > 0) memcpy(readarr, flashchip_contents + offs, readcnt); break; @@ -602,6 +610,10 @@ static int emulate_spi_chip_response(unsigned int writecnt, msg_perr("Max BYTE PROGRAM size exceeded!\n"); return 1; } + if(offs==(emu_chip_size/4)){ // will be detected at verification + memset(flashchip_contents + offs, 0x14, writecnt - 4); + break; + } memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4); break; case JEDEC_AAI_WORD_PROGRAM: @@ -659,6 +671,9 @@ static int emulate_spi_chip_response(unsigned int writecnt, if (offs & (emu_jedec_se_size - 1)) msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs); offs &= ~(emu_jedec_se_size - 1); + if(offs==(emu_chip_size/2)){ // this will be detected early (iff block needs an erase) + break; + } memset(flashchip_contents + offs, 0xff, emu_jedec_se_size); break; case JEDEC_BE_52: -- Kind regards, Stefan Tauner

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[PATCH 2/3] Not for merge: Warn if we skipped all blocks
by Stefan Tauner 23 Jul '12

23 Jul '12

Quick hack to print a warning if we skip all blocks because they are already equal to the requested image. We want something like this to make users aware... and some developers that regularly fall for this too *coughcough*. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashrom.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/flashrom.c b/flashrom.c index 70687ff..ebc3118 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1218,6 +1218,7 @@ static int selfcheck_eraseblocks(const struct flashchip *flash) return ret; } +static int all_skipped = 1; static int erase_and_write_block_helper(struct flashctx *flash, unsigned int start, unsigned int len, uint8_t *curcontents, @@ -1266,6 +1267,8 @@ static int erase_and_write_block_helper(struct flashctx *flash, } if (skip) msg_cdbg("S"); + else + all_skipped = 0; return ret; } @@ -1391,6 +1394,8 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents, if (ret) { msg_cerr("FAILED!\n"); } else { + if(all_skipped) + msg_cinfo("\nWarning: Chip contents were already identical to the requested image.\n"); msg_cinfo("Erase/write done.\n"); } return ret; -- Kind regards, Stefan Tauner

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[PATCH 1/3] Do not read the flash chip twice in verification mode.
by Stefan Tauner 23 Jul '12

23 Jul '12

Kyösti Mälkki noticed that we unnecessarily read the flash chip twice when called with --verify. The first one is the mandatory read before everything (to be able to detect the seriousness of errors), but the second one is not necessary because we can just use the former for the comparison. This introduces a small output change: previously we printed ERASE or VERIFY depending on the callee. This special case has been dropped because it is unnecessary to print it (and wrong for the verification function to need to know why it is verifying exactly). If an erase fails we mention that fact explicitly already, similar for verify. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flash.h | 2 +- flashrom.c | 86 +++++++++++++++++++++++++++--------------------------------- jedec.c | 2 +- 3 files changed, 41 insertions(+), 49 deletions(-) diff --git a/flash.h b/flash.h index d669512..5bb1211 100644 --- a/flash.h +++ b/flash.h @@ -241,7 +241,7 @@ int min(int a, int b); int max(int a, int b); void tolower_string(char *str); char *extract_param(char **haystack, const char *needle, const char *delim); -int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message); +int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len); int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granularity gran); char *strcat_realloc(char *dest, const char *src); void print_version(void); diff --git a/flashrom.c b/flashrom.c index fc52c4a..70687ff 100644 --- a/flashrom.c +++ b/flashrom.c @@ -548,6 +548,26 @@ static unsigned int count_usable_erasers(const struct flashctx *flash) return usable_erasefunctions; } +int compare_range(uint8_t *wantbuf, uint8_t *havebuf, unsigned int start, unsigned int len) +{ + int ret = 0, failcount = 0; + unsigned int i; + for (i = 0; i < len; i++) { + if (wantbuf[i] != havebuf[i]) { + /* Only print the first failure. */ + if (!failcount++) + msg_cerr("FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x,", + start + i, wantbuf[i], havebuf[i]); + } + } + if (failcount) { + msg_cerr(" failed byte count from 0x%08x-0x%08x: 0x%x\n", + start, start + len - 1, failcount); + ret = -1; + } + return ret; +} + /* start is an offset to the base address of the flash chip */ int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len) @@ -560,7 +580,7 @@ int check_erased_range(struct flashctx *flash, unsigned int start, exit(1); } memset(cmpbuf, 0xff, len); - ret = verify_range(flash, cmpbuf, start, len, "ERASE"); + ret = verify_range(flash, cmpbuf, start, len); free(cmpbuf); return ret; } @@ -570,15 +590,12 @@ int check_erased_range(struct flashctx *flash, unsigned int start, * flash content at location start * @start offset to the base address of the flash chip * @len length of the verified area - * @message string to print in the "FAILED" message * @return 0 for success, -1 for failure */ -int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, - unsigned int len, const char *message) +int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len) { - unsigned int i; uint8_t *readbuf = malloc(len); - int ret = 0, failcount = 0; + int ret = 0; if (!len) goto out_free; @@ -599,8 +616,6 @@ int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, ret = -1; goto out_free; } - if (!message) - message = "VERIFY"; ret = flash->read(flash, readbuf, start, len); if (ret) { @@ -609,22 +624,7 @@ int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, return ret; } - for (i = 0; i < len; i++) { - if (cmpbuf[i] != readbuf[i]) { - /* Only print the first failure. */ - if (!failcount++) - msg_cerr("%s FAILED at 0x%08x! " - "Expected=0x%02x, Read=0x%02x,", - message, start + i, cmpbuf[i], - readbuf[i]); - } - } - if (failcount) { - msg_cerr(" failed byte count from 0x%08x-0x%08x: 0x%x\n", - start, start + len - 1, failcount); - ret = -1; - } - + ret = compare_range(cmpbuf, readbuf, start, len); out_free: free(readbuf); return ret; @@ -1060,21 +1060,6 @@ notfound: return flash - flashchips; } -int verify_flash(struct flashctx *flash, uint8_t *buf) -{ - int ret; - unsigned int total_size = flash->total_size * 1024; - - msg_cinfo("Verifying flash... "); - - ret = verify_range(flash, buf, 0, total_size, NULL); - - if (!ret) - msg_cinfo("VERIFIED. \n"); - - return ret; -} - int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename) { @@ -1838,15 +1823,22 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, } if (verify_it) { - /* Work around chips which need some time to calm down. */ - if (write_it) + msg_cinfo("Verifying flash... "); + + if (write_it) { + /* Work around chips which need some time to calm down. */ programmer_delay(1000*1000); - ret = verify_flash(flash, newcontents); - /* If we tried to write, and verification now fails, we - * might have an emergency situation. - */ - if (ret && write_it) - emergency_help_message(); + ret = verify_range(flash, newcontents, 0, size); + /* If we tried to write, and verification now fails, we + * might have an emergency situation. + */ + if (ret) + emergency_help_message(); + } else { + ret = compare_range(newcontents, oldcontents, 0, size); + } + if (!ret) + msg_cinfo("VERIFIED.\n"); } out: diff --git a/jedec.c b/jedec.c index 69c0c0c..1fa1a10 100644 --- a/jedec.c +++ b/jedec.c @@ -409,7 +409,7 @@ retry: dst = d; src = s; - failed = verify_range(flash, src, start, page_size, NULL); + failed = verify_range(flash, src, start, page_size); if (failed && tried++ < MAX_REFLASH_TRIES) { msg_cerr("retrying.\n"); -- Kind regards, Stefan Tauner

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[PATCH 0/3] Verify once..
by Stefan Tauner 23 Jul '12

23 Jul '12

Thanks to Kyösti for bringing up this emberrassing issue. Let's fix this quickly before anyone notices and please let us forget that it ever happened. :) The good thing is, that i had a few ideas while fixing the problem that may improve the overall situation, looking forward to comments. One idea i did not follow up yet is getting rid of read_flash_to_file(…). It is as useless as verify_flash was before my patch and just complicates things (e.g. for layout integration). Stefan Tauner (3): Do not read the flash chip twice in verification mode. Not for merge: Warn if we skipped all blocks Not for merge: make the dummy programmer FAIL dummyflasher.c | 15 ++++++++++ flash.h | 2 +- flashrom.c | 91 +++++++++++++++++++++++++++----------------------------- jedec.c | 2 +- 4 files changed, 61 insertions(+), 49 deletions(-) -- Kind regards, Stefan Tauner

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[PATCH] VIA VX900
by Wagner, Helge (GE Germany) 23 Jul '12

23 Jul '12

Hi all, please find attached our changes for the VIA VX900 chipset. Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> Regards, Helge

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