flashrom

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[commit] r1578 - trunk
by repository service 24 Aug '12

24 Aug '12

Author: stefanct Date: Sat Aug 25 01:03:46 2012 New Revision: 1578 URL: http://flashrom.org/trac/flashrom/changeset/1578 Log: Fix VIA VX*** support. Helge Wagner's patch that added VIA VX900 chipset support made me look closer at the datasheets which led to some concise documentation about newer VIA chipsets: http://flashrom.org/VIA Based on that this patch adds full support for VX800/VX820, VX855/VX875 and VX900, including SPI and LPC. VT8237S was not changed (SPI support only) because there is no public datasheet and it is not clear how to distinguish between LPC and SPI strapping and investigations in (NDAed) documents have not brought up anything conclusively. enable_flash_vt823x could probably be enhanced too due to various ignored LPC options of the chipset. Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Tested-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/ichspi.c trunk/programmer.h Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/board_enable.c Sat Aug 25 01:03:46 2012 (r1578) @@ -784,7 +784,7 @@ dev = pci_dev_find_vendorclass(0x1106, 0x0601); switch (dev->device_id) { case 0x3177: /* VT8235 */ - case 0x3227: /* VT8237R */ + case 0x3227: /* VT8237/VT8237R */ case 0x3337: /* VT8237A */ break; default: Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/chipset_enable.c Sat Aug 25 01:03:46 2012 (r1578) @@ -6,6 +6,7 @@ * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> * Copyright (C) 2007,2008,2009 Carl-Daniel Hailfinger * Copyright (C) 2009 Kontron Modular Computers GmbH + * Copyright (C) 2011, 2012 Stefan Tauner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -508,12 +509,6 @@ return ret; } -static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) -{ - /* Do we really need no write enable? */ - return via_init_spi(dev); -} - static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, enum ich_chipset ich_generation) { @@ -681,7 +676,7 @@ return -1; } - if (dev->device_id == 0x3227) { /* VT8237R */ + if (dev->device_id == 0x3227) { /* VT8237/VT8237R */ /* All memory cycles, not just ROM ones, go to LPC. */ val = pci_read_byte(dev, 0x59); val &= ~0x80; @@ -691,6 +686,69 @@ return 0; } +static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) +{ + struct pci_dev *south_north = pci_dev_find(0x1106, 0xa353); + if (south_north == NULL) { + msg_perr("Could not find South-North Module Interface Control device!\n"); + return ERROR_FATAL; + } + + msg_pdbg("Strapped to "); + if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) { + msg_pdbg("LPC.\n"); + return enable_flash_vt823x(dev, name); + } + msg_pdbg("SPI.\n"); + + uint32_t mmio_base; + void *mmio_base_physmapped; + uint32_t spi_cntl; + #define SPI_CNTL_LEN 0x08 + uint32_t spi0_mm_base = 0; + switch(dev->device_id) { + case 0x8353: /* VX800/VX820 */ + spi0_mm_base = pci_read_long(dev, 0xbc) << 8; + break; + case 0x8409: /* VX855/VX875 */ + case 0x8410: /* VX900 */ + mmio_base = pci_read_long(dev, 0xbc) << 8; + mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) { + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + + /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; + if ((spi_cntl & 0x01) == 0) { + msg_pdbg ("SPI Bus0 disabled!\n"); + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + return ERROR_FATAL; + } + /* Offset 1-3 has SPI Bus Memory Map Base Address: */ + spi0_mm_base = spi_cntl & 0xFFFFFF00; + + /* Offset 4 - Bit 0 holds SPI Bus1 Enable Bit. */ + spi_cntl = mmio_readl(mmio_base_physmapped) + 0x04; + if ((spi_cntl & 0x01) == 1) + msg_pdbg2("SPI Bus1 is enabled too.\n"); + + physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + break; + default: + msg_perr("%s: Unsupported chipset %x:%x!\n", __func__, dev->vendor_id, dev->device_id); + return ERROR_FATAL; + } + + return via_init_spi(dev, spi0_mm_base); +} + +static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) +{ + return via_init_spi(dev, pci_read_long(dev, 0xbc) << 8); +} + static int enable_flash_cs5530(struct pci_dev *dev, const char *name) { uint8_t reg8; @@ -1266,13 +1324,14 @@ {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, - {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, + {0x1106, 0x3227, OK, "VIA", "VT8237(R)", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, - {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, + {0x1106, 0x8353, NT, "VIA", "VX800/VX820", enable_flash_vt_vx}, + {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt_vx}, + {0x1106, 0x8410, NT, "VIA", "VX900", enable_flash_vt_vx}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x17f3, 0x6030, OK, "RDC", "R8610/R3210", enable_flash_rdc_r8610}, Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/ichspi.c Sat Aug 25 01:03:46 2012 (r1578) @@ -1844,14 +1844,12 @@ .write_aai = default_spi_write_aai, }; -int via_init_spi(struct pci_dev *dev) +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) { - uint32_t mmio_base; int i; - mmio_base = (pci_read_long(dev, 0xbc)) << 8; - msg_pdbg("MMIO base at = 0x%x\n", mmio_base); - ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); + ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ /* Not sure if it speaks all these bus protocols. */ internal_buses_supported = BUS_LPC | BUS_FWH; Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Mon Aug 20 02:24:22 2012 (r1577) +++ trunk/programmer.h Sat Aug 25 01:03:46 2012 (r1578) @@ -558,7 +558,7 @@ extern uint32_t ichspi_bbar; int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, enum ich_chipset ich_generation); -int via_init_spi(struct pci_dev *dev); +int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); /* it85spi.c */ int it85xx_spi_init(struct superio s);

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W836xx: Supermicro X8DTT-H: flashrom -V
by Simon Kuhn 24 Aug '12

24 Aug '12

flashrom v0.9.6.1-r1563 on Linux 2.6.35-32-server (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.0.0, GCC 4.4.3, little endian Command line (3 args): flashrom -V -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 1333M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10006 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Supermicro" DMI string system-product-name: "X8DTT-H" DMI string system-version: "1234567890" DMI string baseboard-manufacturer: "Supermicro" DMI string baseboard-product-name: "X8DTT-H" DMI string baseboard-version: "1.3 " DMI string chassis-type: "Main Server Chassis" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 1a. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "Intel ICH10R" with PCI ID 8086:3a16. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 Root Complex Register Block address = 0xfed1c000 GCS = 0x60: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x0 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x2008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=0, FLOCKDN=0 Programming OPCODES... done 0x08: 0x003fffc0 (FADDR) 0x90: 0x04 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0x007f10 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 0x94: 0x5006 (PREOP) 0x96: 0x463b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0xc79f0190 (OPMENU+4) 0xA0: 0x00000000 (BBAR) SPI Read Configuration: prefetching disabled, caching enabled, OK. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0xbf, id2 0x4a Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0xbf, id2 0x4a Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Chip status register is 00 Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found SST flash chip "SST25VF032B" (4096 kB, SPI) at physical address 0xffc00000. Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xbf, id2 0x4a Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xe8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Found SST flash chip "SST25VF032B" (4096 kB, SPI). No operations were specified. Restoring MMIO space at 0x7fcf72ea98a0 Restoring MMIO space at 0x7fcf72ea989c Restoring MMIO space at 0x7fcf72ea9898 Restoring MMIO space at 0x7fcf72ea9896 Restoring MMIO space at 0x7fcf72ea9894

1 0

Re: [flashrom] Fix for serprog-ardu initialization failure due to unimplemented S_CMD_S_BUSTYPE (0x12)
by Denis 'GNUtoo' Carikli 23 Aug '12

23 Aug '12

On Wed, 2012-08-15 at 02:10 +0200, Alexander Meyer wrote: > Hi, > > I had problems making flashrom talk to an Arduino as described in > http://www.flashrom.org/index.php?title=Serprog&redirect=no > > It always failed right after this: > Warning: Automatic command availability check failed for cmd 0x12 - > won't execute cmd I am sorry, I was waiting for a Tested-by line that didn't come fast enough(I don't have the hardware with me so I rely on a user to test my commits).... Now the fix should be pushed... Beside There are issues with the speed with the arduino uno because of the microcontroller doing the USB<->Serial conversion.... Such issues are absent on the arduino duemillanove. I'll try to fix it when I have access to my arduino uno again.... Also I have not found the corresponding source code of the firmware running on that microcontroller: they give a binary in the arduino git and source code that doesn't seem to correspond to it. However I've a nearly equivalent(only reset don't work out of the box) firmware with LUFA alone. The idea is to fix the reset and then try to fix the serial issues that occur at higher speeds. Denis.

1 0

bios
by Dubrov Andrey 23 Aug '12

23 Aug '12

1 0

lspci dumps of VT8237S with SPI
by Stefan Tauner 21 Aug '12

21 Aug '12

Here are two logs from Rudolf Marek… > Hi some very old dumps. new_lspci is coreboot. lspci xxxvvv is vendor > bios. the board uses SPI flash. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

ASRock 4CoreDual-SATA2 R2.0: VT8237S flashing
by Carl-Daniel Hailfinger 20 Aug '12

20 Aug '12

Hi Jan-Hendrik, I noticed that you own an ASRock 4CoreDual-SATA2 R2.0 which has the VIA VT8237S chipset and a LPC/FWH BIOS flash chip. We flashrom developers are currently trying to cross-check the VT8237S documentation with real hardware settings, and it would be very helpful for us if you could mail us (just hit reply-all to send to the flashrom(a)flashrom.org mailing list) the output of the following command (as root): lspci -nnvvvxxx Just in case you've never heard about flashrom: flashrom is a tool to update your BIOS/EFI/coreboot from inside Linux/*BSD without the need to use a DOS boot disk. Your help is greatly appreciated. Regards, Carl-Daniel

2 1

NAND flash support
by jana1972＠centrum.cz 20 Aug '12

20 Aug '12

Is there NAND flash support available? Or is it a plan to add such support? By NAND I mean paralel NAND flash such as HY27US08121A or similar ( used in Xbox360 and other kind of boxes) BR, Ja.

2 1

Re: [flashrom] [PATCH] Refactor the -p internal:mainboard handling.
by Carl-Daniel Hailfinger 19 Aug '12

19 Aug '12

Am 13.08.2012 02:51 schrieb Stefan Tauner: > This patch gets rid of some global variables and makes lots of bits along > the code path that control the board enable execution more generic and > clearer. From now on flashrom also abort on a few occasions that should be > safer for the user. For example we abort if he specifies the mainboard (enable) > but we can not find the enable function. > > Parts of the board_match_cbname refactoring were done by Carl-Daniel. > > FIXME: manpage > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> with a few comments and if you fix the manpage. BIG FAT NOTE: You do not have to change all the stuff mentioned in the review (because that would mean I have to review the patch again), but it would be nice to have the review comments addressed in a followup patch. > --- > This might be kinda unreviewable... > i can probably split it up if need be, just tell me please. Big patch, but still... splitting it wouldn't have helped. > diff --git a/board_enable.c b/board_enable.c > index 9c16905..22d4072 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -25,6 +25,7 @@ > */ > > #include <string.h> > +#include <stdlib.h> > #include "flash.h" > #include "programmer.h" > #include "hwaccess.h" > @@ -2443,41 +2444,63 @@ const struct board_match board_matches[] = { > { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ > }; > > +/* Parse the <vendor>:<board> string specified by the user as part of -p internal:mainboard=<vendor>:<board>. > + * Parameters vendor and model will be overwritten. Returns 0 on success. > + * Note: strtok modifies the original string, so we work on a copy and allocate memory for the results. > + */ > +int board_parse_parameter(const char *boardstring, const char **vendor, const char **model) > +{ > + /* strtok may modify the original string. */ > + char *tempstr = strdup(boardstring); > + char *tempstr2 = NULL; > + strtok(tempstr, ":"); > + tempstr2 = strtok(NULL, ":"); > + if (tempstr == NULL || tempstr2 == NULL) { > + free(tempstr); While freeing only tempstr is correct, it's not obvious. > + msg_pinfo("Please supply the board vendor and model name with the " > + "-p internal:mainboard=<vendor>:<model> option.\n"); > + return 1; > + } > + *vendor = strdup(tempstr); > + *model = strdup(tempstr2); > + msg_pspew("-p internal:mainboard: vendor=\"%s\", model=\"%s\"\n", tempstr, tempstr2); > + free(tempstr); > + return 0; > +} > + > /* > - * Match boards on coreboot table gathered vendor and part name. > + * Match boards on vendor and model name. > + * Hint: the parameters can come either from the coreboot table or the command line (i.e. the user). Please add the following comment: vendor and model must be non-NULL. > * Require main PCI IDs to match too as extra safety. > */ > -static const struct board_match *board_match_cbname(const char *vendor, > - const char *part) > +static const struct board_match *board_match_name(const char *vendor, const char *model) > { > const struct board_match *board = board_matches; > const struct board_match *partmatch = NULL; > > for (; board->vendor_name; board++) { > - if (vendor && (!board->lb_vendor > - || strcasecmp(board->lb_vendor, vendor))) > + if (!board->lb_vendor || strcasecmp(board->lb_vendor, vendor)) > continue; > > - if (!board->lb_part || strcasecmp(board->lb_part, part)) > + if (!board->lb_part || strcasecmp(board->lb_part, model)) > continue; > > - if (!pci_dev_find(board->first_vendor, board->first_device)) > + if (!pci_dev_find(board->first_vendor, board->first_device)) { > + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but first PCI device %04x:%04x " > + "doesn't.\n", vendor, model, board->first_vendor, board->first_device); Should we ask for a report here? Not sure, personal preference is not to ask. If yes, at which message level? > continue; > + } > > - if (board->second_vendor && > - !pci_dev_find(board->second_vendor, board->second_device)) > + if (!pci_dev_find(board->second_vendor, board->second_device)) { > + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but second PCI device %04x:%04x " > + "doesn't.\n", vendor, model, board->second_vendor, board->second_device); > continue; > - > - if (vendor) > - return board; > + } > > if (partmatch) { > - /* a second entry has a matching part name */ > - msg_pinfo("AMBIGUOUS BOARD NAME: %s\n", part); > - msg_pinfo("At least vendors '%s' and '%s' match.\n", > - partmatch->lb_vendor, board->lb_vendor); > - msg_perr("Please use the full -p internal:mainboard=" > - "vendor:part syntax.\n"); > + /* More than one entry has a matching name. */ > + msg_perr("Board name \"%s\":\"%s\" and PCI IDs matched more than one board enable " > + "entry. Please report a bug at flashrom(a)flashrom.org\n", vendor, model); > return NULL; > } > partmatch = board; > @@ -2486,15 +2509,7 @@ static const struct board_match *board_match_cbname(const char *vendor, > if (partmatch) > return partmatch; > > - if (!partvendor_from_cbtable) { > - /* Only warn if the mainboard type was not gathered from the > - * coreboot table. If it was, the coreboot implementor is > - * expected to fix flashrom, too. > - */ > - msg_perr("\nUnknown vendor:board from -p internal:mainboard=" > - " programmer parameter:\n%s:%s\n\n", > - vendor, part); > - } > + msg_perr("No board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); > return NULL; > } > > @@ -2534,9 +2549,10 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas > > if (board->dmi_pattern) { > if (!has_dmi_support) { > - msg_perr("WARNING: Can't autodetect %s %s," > - " DMI info unavailable.\n", > + msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", > board->vendor_name, board->board_name); > + msg_pinfo("Please supply the board vendor and model name with the " > + "-p internal:mainboard=<vendor>:<model> option.\n"); > continue; > } else { > if (!dmi_match(board->dmi_pattern)) > @@ -2569,8 +2585,7 @@ static int unsafe_board_handler(const struct board_match *board) > return 1; > } > msg_pinfo("NOTE: Running an untested board enable procedure.\n" > - "Please report success/failure to flashrom(a)flashrom.org\n" > - "with your board name and SUCCESS or FAILURE in the subject.\n"); > + "Please report success/failure to flashrom(a)flashrom.org.\n"); > return 0; > } > > @@ -2606,29 +2621,29 @@ void board_handle_before_laptop(void) > board_handle_phase(P2); > } > > -int board_flash_enable(const char *vendor, const char *part) > +int board_flash_enable(const char *vendor, const char *model) > { > const struct board_match *board = NULL; > int ret = 0; > > - if (part) > - board = board_match_cbname(vendor, part); > - > - if (!board) > + if (vendor && model) { > + board = board_match_name(vendor, model); > + if (!board) /* if a board was given it has to match, else we abort here. */ > + return 1; > + } else { > board = board_match_pci_ids(P3); > + if (!board) /* i.e. there is just no board enable available for this board */ > + return 0; > + } > > - if (unsafe_board_handler(board)) > - board = NULL; > - > - if (board) { > + ret = unsafe_board_handler(board); Side note: unsafe_board_handler is a pretty dumb name. Yes, it's my fault. Still... check_unsafe_board_enable() or something similar would be a better name. > + if (!ret) { > if (board->max_rom_decode_parallel) > - max_rom_decode.parallel = > - board->max_rom_decode_parallel * 1024; > + max_rom_decode.parallel = board->max_rom_decode_parallel * 1024; > > if (board->enable != NULL) { > - msg_pinfo("Disabling flash write protection for " > - "board \"%s %s\"... ", board->vendor_name, > - board->board_name); > + msg_pinfo("Enabling full flash access for board \"%s %s\"... ", > + board->vendor_name, board->board_name); > > ret = board->enable(); > if (ret) > diff --git a/cbtable.c b/cbtable.c > index dde12ac..1f8b1c3 100644 > --- a/cbtable.c > +++ b/cbtable.c > @@ -24,57 +24,33 @@ > > #include <unistd.h> > #include <stdio.h> > -#include <stdlib.h> > #include <ctype.h> > #include <string.h> > #include "flash.h" > #include "programmer.h" > #include "coreboot_tables.h" > > -char *lb_part = NULL, *lb_vendor = NULL; > -int partvendor_from_cbtable = 0; > -static char *def_name = "DEFAULT"; > -static char *mainboard_vendor = NULL; > -static char *mainboard_part = NULL; > - > -/* Parse the [<vendor>:]<board> string specified by the user as part of > - * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part > - * to the extracted values. > - * Note: strtok modifies the original string, so we work on a copy and allocate > - * memory for lb_vendor and lb_part with strdup. > - */ > -void lb_vendor_dev_from_string(const char *boardstring) > -{ > - /* strtok may modify the original string. */ > - char *tempstr = strdup(boardstring); > - char *tempstr2 = NULL; > - strtok(tempstr, ":"); > - tempstr2 = strtok(NULL, ":"); > - if (tempstr2) { > - lb_vendor = strdup(tempstr); > - lb_part = strdup(tempstr2); > - } else { > - lb_vendor = NULL; > - lb_part = strdup(tempstr); > - } > - free(tempstr); > -} > +static char *cb_vendor = NULL, *cb_model = NULL; > > -int show_id(uint8_t *bios, int size) > +/* Tries to find coreboot IDs in the supplied image and compares them to the current IDs. > + * Returns... > + * -1 if IDs in the image do not match the IDs embedded in the current firmware, > + * 0 if the IDs could not be found in the image or if they match correctly. > + */ > +int cb_check_image(uint8_t *image, int size) cb_check_image_matches_board would be a better name IMHO. > { > + const char *image_vendor = NULL; > + const char *image_model = NULL; > unsigned int *walk; > unsigned int mb_part_offset, mb_vendor_offset; > char *mb_part, *mb_vendor; > > - mainboard_vendor = def_name; > - mainboard_part = def_name; > - > - walk = (unsigned int *)(bios + size - 0x10); > + walk = (unsigned int *)(image + size - 0x10); > walk--; The two lines above made me scream WTF?!? Since you're already fixing that code, can you please merge them into one? walk = (unsigned int *)(image + size - 0x14); > > if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { > - /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ > - walk = (unsigned int *)(bios + size - 0x80); > + /* We might have an NVIDIA chipset which stores the ID information somewhere else. */ Actually, "BIOS" wasn't that wrong... let me rephrase the comment so that others may have a chance to understand the reason: /* Some NVIDIA chipsets store chipset soft straps (IIRC Hypertransport init info etc.) in flash at exactly the location where coreboot image size, coreboot vendor name pointer and coreboot board name pointer are usually stored. In this case coreboot uses an alternate location for the coreboot image data. */ > + walk = (unsigned int *)(image + size - 0x80); > walk--; And the two lines above need to be walk = (unsigned int *)(image + size - 0x84); > } > > @@ -88,49 +64,37 @@ int show_id(uint8_t *bios, int size) > mb_vendor_offset = *(walk - 2); > if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || > mb_part_offset > size || mb_vendor_offset > size) { > - msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); > + msg_pdbg("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); > return 0; > } > > - mb_part = (char *)(bios + size - mb_part_offset); > - mb_vendor = (char *)(bios + size - mb_vendor_offset); > + mb_part = (char *)(image + size - mb_part_offset); > + mb_vendor = (char *)(image + size - mb_vendor_offset); > if (!isprint((unsigned char)*mb_part) || > !isprint((unsigned char)*mb_vendor)) { > - msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); > + msg_pdbg("Flash image seems to have garbage in the ID location. Disabling checks.\n"); ...garbage in the coreboot ID location. Disabling coreboot-related checks. > return 0; > } > > msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); > > - mainboard_part = strdup(mb_part); > - mainboard_vendor = strdup(mb_vendor); > - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); > - msg_pdbg("Mainboard ID: %s\n", mainboard_part); > + image_vendor = strdup(mb_vendor); > + image_model = strdup(mb_part); If the image looks like a coreboot image according to our checks, but it's malformed (or not a coreboot image), checking string length with if (strnlen(mb_vendor, mb_vendor_offset) < mb_vendor_offset) and aborting otherwise may be a good idea to avoid segfaults. Can be done in a followup patch, though. > + msg_pdbg("Manufacturer: %s\n", image_vendor); > + msg_pdbg("Mainboard ID: %s\n", image_model); > > /* If these are not set, the coreboot table was not found. */ > - if (!lb_vendor || !lb_part) { > - msg_pinfo("Note: If the following flash access fails, try " > - "-p internal:mainboard=<vendor>:<mainboard>.\n"); > + if (!cb_vendor || !cb_model) > return 0; > - } > > /* These comparisons are case insensitive to make things a little less user^Werror prone. */ > - if (!strcasecmp(mainboard_vendor, lb_vendor) && > - !strcasecmp(mainboard_part, lb_part)) { > - msg_pdbg("This firmware image matches this mainboard.\n"); > + if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) { > + msg_pdbg2("This coreboot image matches this mainboard.\n"); > } else { > - if (force_boardmismatch) { > - msg_pinfo("WARNING: This firmware image does not " > - "seem to fit to this machine - forcing it.\n"); > - } else { > - msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" > - " be correct for the detected mainboard (%s:%s)\n\n" > - "Override with -p internal:boardmismatch=force to ignore the board name\n" > - "in the firmware image or override the detected mainboard with\n" > - "-p internal:mainboard=<vendor>:<mainboard>.\n\n", > - mainboard_vendor, mainboard_part, lb_vendor, lb_part); > - return 1; > - } > + msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n" > + " be correct for the detected mainboard (%s:%s).\n", > + image_vendor, image_model, cb_vendor, cb_model); > + return -1; > } > > return 0; > @@ -242,22 +206,15 @@ static void find_mainboard(struct lb_record *ptr, unsigned long addr) find_mainboard is a misnomer... it should be get_mainboard_from_cb_record or something like that, and the addr parameter was never used since the code was first committed. Followup patch, no need to complicate this one. > rec = (struct lb_mainboard *)ptr; > max_size = rec->size - sizeof(*rec); > msg_pdbg("Vendor ID: %.*s, part ID: %.*s\n", > - max_size - rec->vendor_idx, > - rec->strings + rec->vendor_idx, > - max_size - rec->part_number_idx, > - rec->strings + rec->part_number_idx); > - snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, > - rec->strings + rec->vendor_idx); > - snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, > - rec->strings + rec->part_number_idx); > - > - if (lb_part) { > - msg_pdbg("Overwritten by command line, vendor ID: %s, part ID: %s.\n", lb_vendor, lb_part); > - } else { > - partvendor_from_cbtable = 1; > - lb_part = strdup(part); > - lb_vendor = strdup(vendor); > - } > + max_size - rec->vendor_idx, > + rec->strings + rec->vendor_idx, > + max_size - rec->part_number_idx, > + rec->strings + rec->part_number_idx); > + snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, rec->strings + rec->vendor_idx); > + snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, rec->strings + rec->part_number_idx); > + > + cb_vendor = strdup(vendor); > + cb_model = strdup(part); > } > > static struct lb_record *next_record(struct lb_record *rec) > @@ -265,8 +222,7 @@ static struct lb_record *next_record(struct lb_record *rec) > return (struct lb_record *)(((char *)rec) + rec->size); > } > > -static void search_lb_records(struct lb_record *rec, struct lb_record *last, > - unsigned long addr) > +static void search_lb_records(struct lb_record *rec, struct lb_record *last, unsigned long addr) > { > struct lb_record *next; > int count; > @@ -284,7 +240,8 @@ static void search_lb_records(struct lb_record *rec, struct lb_record *last, > } > > #define BYTES_TO_MAP (1024*1024) > -int coreboot_init(void) > +/* returns 0 if the table was parsed successfully and cb_vendor/cb_model have been set. */ > +int cb_parse_table(const char **vendor, const char **model) > { > uint8_t *table_area; > unsigned long addr, start; > @@ -317,8 +274,7 @@ int coreboot_init(void) > physunmap(table_area, BYTES_TO_MAP); > table_area = physmap_try_ro("high tables", start, BYTES_TO_MAP); > if (ERROR_PTR == table_area) { > - msg_perr("Failed getting access to coreboot " > - "high tables.\n"); > + msg_perr("Failed getting access to coreboot high tables.\n"); > return -1; > } > lb_table = find_lb_table(table_area, 0x00000, 0x1000); > @@ -340,6 +296,7 @@ int coreboot_init(void) > lb_table->table_bytes, lb_table->table_checksum, > lb_table->table_entries); > search_lb_records(rec, last, addr + lb_table->header_bytes); > - > + *vendor = cb_vendor; > + *model = cb_model; I'm not totally happy with those static variables, but I can't offer a better suggestion (unless we want to extend struct flashctx with board/device matching info, but anything like that should be a separate patch. > return 0; > } > diff --git a/flashrom.c b/flashrom.c > index 9544155..c39c12c 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -1814,11 +1814,15 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > } > > #if CONFIG_INTERNAL == 1 > - if (programmer == PROGRAMMER_INTERNAL) > - if (show_id(newcontents, size)) { > + if (programmer == PROGRAMMER_INTERNAL && cb_check_image(newcontents, size) < 0) { > + if (force_boardmismatch) { > + msg_pinfo("Proceeding anyway because user forced us to.\n"); > + } else { > + msg_perr("Aborting. You can override this with -p internal:boardmismatch=force.\n"); 112 column limit... > ret = 1; > goto out; > } > + } > #endif > } > > diff --git a/internal.c b/internal.c > index 3ecc348..b1686aa 100644 > --- a/internal.c > +++ b/internal.c > @@ -249,10 +256,20 @@ int internal_init(void) > } > > #if defined(__i386__) || defined(__x86_64__) > - /* We look at the cbtable first to see if we need a > - * mainboard specific flash enable sequence. > - */ > - coreboot_init(); > + if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ > + /* if no -p internal:mainboard was given but there are valid coreboot IDs then use those */ Please capitalize first word and finish with full stop. Otherwise you'll see an instant followup commit by Uwe changing it. ;-) > + if (board_vendor == NULL || board_model == NULL) { Is it even possible that only one of board_vendor/board_model is NULL? > + board_vendor = cb_vendor; > + board_model = cb_model; > + } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { > + msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" > + " match the current coreboot IDs of the mainboard (%s:%s).\n", > + board_vendor, board_model, cb_vendor, cb_model); > + if (!force_boardmismatch) > + return 1; > + msg_pinfo("Continuing anyway.\n"); > + } > + } > > dmi_init(); > > @@ -321,12 +338,11 @@ int internal_init(void) > init_superio_ite(); > #endif > > - board_flash_enable(lb_vendor, lb_part); > + if (board_flash_enable(board_vendor, board_model)) { > + msg_perr("Aborting to be safe.\n"); > + return 1; > + } > > - /* Even if chipset init returns an error code, we don't want to abort. > - * The error code might have been a warning only. The two lines above still make sense AFAICS. > - * Besides that, we don't check the board enable return code either. The line above can be killed as you did. > - */ > #if defined(__i386__) || defined(__x86_64__) || defined (__mips) > register_par_programmer(&par_programmer_internal, internal_buses_supported); > return 0; Thanks for cleaning up this code! Regards, Carl-Daniel -- http://www.hailfinger.org/

2 4

[commit] r1577 - trunk
by repository service 19 Aug '12

19 Aug '12

Author: stefanct Date: Mon Aug 20 02:24:22 2012 New Revision: 1577 URL: http://flashrom.org/trac/flashrom/changeset/1577 Log: Refactor the -p internal:mainboard handling. This patch gets rid of some global variables and makes lots of bits along the code path that control the board enable execution more generic and clearer. From now on flashrom aborts on a few more occasions that should be safer for the user. For example it aborts if the enable function for the specified mainboard (enable) can not be found. Parts of the board_match_cbname refactoring were done by Carl-Daniel. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/cbtable.c trunk/flashrom.8 trunk/flashrom.c trunk/internal.c trunk/programmer.h Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/board_enable.c Mon Aug 20 02:24:22 2012 (r1577) @@ -25,6 +25,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" #include "programmer.h" #include "hwaccess.h" @@ -2443,41 +2444,64 @@ { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ }; +/* Parse the <vendor>:<board> string specified by the user as part of -p internal:mainboard=<vendor>:<board>. + * Parameters vendor and model will be overwritten. Returns 0 on success. + * Note: strtok modifies the original string, so we work on a copy and allocate memory for the results. + */ +int board_parse_parameter(const char *boardstring, const char **vendor, const char **model) +{ + /* strtok may modify the original string. */ + char *tempstr = strdup(boardstring); + char *tempstr2 = NULL; + strtok(tempstr, ":"); + tempstr2 = strtok(NULL, ":"); + if (tempstr == NULL || tempstr2 == NULL) { + free(tempstr); + msg_pinfo("Please supply the board vendor and model name with the " + "-p internal:mainboard=<vendor>:<model> option.\n"); + return 1; + } + *vendor = strdup(tempstr); + *model = strdup(tempstr2); + msg_pspew("-p internal:mainboard: vendor=\"%s\", model=\"%s\"\n", tempstr, tempstr2); + free(tempstr); + return 0; +} + /* - * Match boards on coreboot table gathered vendor and part name. + * Match boards on vendor and model name. + * Hint: the parameters can come either from the coreboot table or the command line (i.e. the user). * Require main PCI IDs to match too as extra safety. + * vendor and model must be non-NULL! */ -static const struct board_match *board_match_cbname(const char *vendor, - const char *part) +static const struct board_match *board_match_name(const char *vendor, const char *model) { const struct board_match *board = board_matches; const struct board_match *partmatch = NULL; for (; board->vendor_name; board++) { - if (vendor && (!board->lb_vendor - || strcasecmp(board->lb_vendor, vendor))) + if (!board->lb_vendor || strcasecmp(board->lb_vendor, vendor)) continue; - if (!board->lb_part || strcasecmp(board->lb_part, part)) + if (!board->lb_part || strcasecmp(board->lb_part, model)) continue; - if (!pci_dev_find(board->first_vendor, board->first_device)) + if (!pci_dev_find(board->first_vendor, board->first_device)) { + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but first PCI device %04x:%04x " + "doesn't.\n", vendor, model, board->first_vendor, board->first_device); continue; + } - if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) + if (!pci_dev_find(board->second_vendor, board->second_device)) { + msg_pdbg("Odd. Board name \"%s\":\"%s\" matches, but second PCI device %04x:%04x " + "doesn't.\n", vendor, model, board->second_vendor, board->second_device); continue; - - if (vendor) - return board; + } if (partmatch) { - /* a second entry has a matching part name */ - msg_pinfo("AMBIGUOUS BOARD NAME: %s\n", part); - msg_pinfo("At least vendors '%s' and '%s' match.\n", - partmatch->lb_vendor, board->lb_vendor); - msg_perr("Please use the full -p internal:mainboard=" - "vendor:part syntax.\n"); + /* More than one entry has a matching name. */ + msg_perr("Board name \"%s\":\"%s\" and PCI IDs matched more than one board enable " + "entry. Please report a bug at flashrom(a)flashrom.org\n", vendor, model); return NULL; } partmatch = board; @@ -2486,15 +2510,7 @@ if (partmatch) return partmatch; - if (!partvendor_from_cbtable) { - /* Only warn if the mainboard type was not gathered from the - * coreboot table. If it was, the coreboot implementor is - * expected to fix flashrom, too. - */ - msg_perr("\nUnknown vendor:board from -p internal:mainboard=" - " programmer parameter:\n%s:%s\n\n", - vendor, part); - } + msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); return NULL; } @@ -2534,9 +2550,10 @@ if (board->dmi_pattern) { if (!has_dmi_support) { - msg_perr("WARNING: Can't autodetect %s %s," - " DMI info unavailable.\n", + msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", board->vendor_name, board->board_name); + msg_pinfo("Please supply the board vendor and model name with the " + "-p internal:mainboard=<vendor>:<model> option.\n"); continue; } else { if (!dmi_match(board->dmi_pattern)) @@ -2550,7 +2567,7 @@ return NULL; } -static int unsafe_board_handler(const struct board_match *board) +static int board_enable_safetycheck(const struct board_match *board) { if (!board) return 1; @@ -2559,18 +2576,15 @@ return 0; if (!force_boardenable) { - msg_pinfo("WARNING: Your mainboard is %s %s, but the mainboard-specific\n" - "code has not been tested, and thus will not be executed by default.\n" - "Depending on your hardware environment, erasing, writing or even probing\n" - "can fail without running the board specific code.\n\n" + msg_pinfo("WARNING: The mainboard-specific code for %s %s has not been tested,\n" + "and thus will not be executed by default. Depending on your hardware,\n" + "erasing, writing or even probing can fail without running this code.\n\n" "Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n" - "\"internal programmer\") for details.\n", - board->vendor_name, board->board_name); + "\"internal programmer\") for details.\n", board->vendor_name, board->board_name); return 1; } msg_pinfo("NOTE: Running an untested board enable procedure.\n" - "Please report success/failure to flashrom(a)flashrom.org\n" - "with your board name and SUCCESS or FAILURE in the subject.\n"); + "Please report success/failure to flashrom(a)flashrom.org.\n"); return 0; } @@ -2581,12 +2595,12 @@ board = board_match_pci_ids(phase); - if (unsafe_board_handler(board)) - board = NULL; - if (!board) return 0; + if (board_enable_safetycheck(board)) + return 0; + if (!board->enable) { /* Not sure if there is a valid case for this. */ msg_perr("Board match found, but nothing to do?\n"); @@ -2606,36 +2620,37 @@ board_handle_phase(P2); } -int board_flash_enable(const char *vendor, const char *part) +int board_flash_enable(const char *vendor, const char *model) { const struct board_match *board = NULL; int ret = 0; - if (part) - board = board_match_cbname(vendor, part); - - if (!board) + if (vendor && model) { + board = board_match_name(vendor, model); + if (!board) /* if a board was given it has to match, else we abort here. */ + return 1; + } else { board = board_match_pci_ids(P3); + if (!board) /* i.e. there is just no board enable available for this board */ + return 0; + } - if (unsafe_board_handler(board)) - board = NULL; + if (board_enable_safetycheck(board)) + return 1; - if (board) { - if (board->max_rom_decode_parallel) - max_rom_decode.parallel = - board->max_rom_decode_parallel * 1024; - - if (board->enable != NULL) { - msg_pinfo("Disabling flash write protection for " - "board \"%s %s\"... ", board->vendor_name, - board->board_name); - - ret = board->enable(); - if (ret) - msg_pinfo("FAILED!\n"); - else - msg_pinfo("OK.\n"); - } + /* limit the maximum size of the parallel bus */ + if (board->max_rom_decode_parallel) + max_rom_decode.parallel = board->max_rom_decode_parallel * 1024; + + if (board->enable != NULL) { + msg_pinfo("Enabling full flash access for board \"%s %s\"... ", + board->vendor_name, board->board_name); + + ret = board->enable(); + if (ret) + msg_pinfo("FAILED!\n"); + else + msg_pinfo("OK.\n"); } return ret; Modified: trunk/cbtable.c ============================================================================== --- trunk/cbtable.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/cbtable.c Mon Aug 20 02:24:22 2012 (r1577) @@ -24,57 +24,36 @@ #include <unistd.h> #include <stdio.h> -#include <stdlib.h> #include <ctype.h> #include <string.h> #include "flash.h" #include "programmer.h" #include "coreboot_tables.h" -char *lb_part = NULL, *lb_vendor = NULL; -int partvendor_from_cbtable = 0; -static char *def_name = "DEFAULT"; -static char *mainboard_vendor = NULL; -static char *mainboard_part = NULL; - -/* Parse the [<vendor>:]<board> string specified by the user as part of - * -p internal:mainboard=[<vendor>:]<board> and set lb_vendor and lb_part - * to the extracted values. - * Note: strtok modifies the original string, so we work on a copy and allocate - * memory for lb_vendor and lb_part with strdup. - */ -void lb_vendor_dev_from_string(const char *boardstring) -{ - /* strtok may modify the original string. */ - char *tempstr = strdup(boardstring); - char *tempstr2 = NULL; - strtok(tempstr, ":"); - tempstr2 = strtok(NULL, ":"); - if (tempstr2) { - lb_vendor = strdup(tempstr); - lb_part = strdup(tempstr2); - } else { - lb_vendor = NULL; - lb_part = strdup(tempstr); - } - free(tempstr); -} +static char *cb_vendor = NULL, *cb_model = NULL; -int show_id(uint8_t *bios, int size) +/* Tries to find coreboot IDs in the supplied image and compares them to the current IDs. + * Returns... + * -1 if IDs in the image do not match the IDs embedded in the current firmware, + * 0 if the IDs could not be found in the image or if they match correctly. + */ +int cb_check_image(uint8_t *image, int size) { + const char *image_vendor = NULL; + const char *image_model = NULL; unsigned int *walk; unsigned int mb_part_offset, mb_vendor_offset; char *mb_part, *mb_vendor; - mainboard_vendor = def_name; - mainboard_part = def_name; - - walk = (unsigned int *)(bios + size - 0x10); + walk = (unsigned int *)(image + size - 0x10); walk--; if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an NVIDIA chipset BIOS which stores the ID information somewhere else. */ - walk = (unsigned int *)(bios + size - 0x80); + /* Some NVIDIA chipsets store chipset soft straps (IIRC Hypertransport init info etc.) in + * flash at exactly the location where coreboot image size, coreboot vendor name pointer and + * coreboot board name pointer are usually stored. In this case coreboot uses an alternate + * location for the coreboot image data. */ + walk = (unsigned int *)(image + size - 0x80); walk--; } @@ -88,49 +67,38 @@ mb_vendor_offset = *(walk - 2); if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || (*walk) > size || mb_part_offset > size || mb_vendor_offset > size) { - msg_pinfo("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); + msg_pdbg("Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.\n"); return 0; } - mb_part = (char *)(bios + size - mb_part_offset); - mb_vendor = (char *)(bios + size - mb_vendor_offset); + mb_part = (char *)(image + size - mb_part_offset); + mb_vendor = (char *)(image + size - mb_vendor_offset); if (!isprint((unsigned char)*mb_part) || !isprint((unsigned char)*mb_vendor)) { - msg_pinfo("Flash image seems to have garbage in the ID location. Disabling checks.\n"); + msg_pdbg("Flash image seems to have garbage in the ID location. " + "Disabling coreboot-related checks.\n"); return 0; } msg_pdbg("coreboot last image size (not ROM size) is %d bytes.\n", *walk); - mainboard_part = strdup(mb_part); - mainboard_vendor = strdup(mb_vendor); - msg_pdbg("Manufacturer: %s\n", mainboard_vendor); - msg_pdbg("Mainboard ID: %s\n", mainboard_part); + image_vendor = strdup(mb_vendor); + image_model = strdup(mb_part); + msg_pdbg("Manufacturer: %s\n", image_vendor); + msg_pdbg("Mainboard ID: %s\n", image_model); /* If these are not set, the coreboot table was not found. */ - if (!lb_vendor || !lb_part) { - msg_pinfo("Note: If the following flash access fails, try " - "-p internal:mainboard=<vendor>:<mainboard>.\n"); + if (!cb_vendor || !cb_model) return 0; - } /* These comparisons are case insensitive to make things a little less user^Werror prone. */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && - !strcasecmp(mainboard_part, lb_part)) { - msg_pdbg("This firmware image matches this mainboard.\n"); + if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) { + msg_pdbg2("This coreboot image matches this mainboard.\n"); } else { - if (force_boardmismatch) { - msg_pinfo("WARNING: This firmware image does not " - "seem to fit to this machine - forcing it.\n"); - } else { - msg_pinfo("ERROR: Your firmware image (%s:%s) does not appear to\n" - " be correct for the detected mainboard (%s:%s)\n\n" - "Override with -p internal:boardmismatch=force to ignore the board name\n" - "in the firmware image or override the detected mainboard with\n" - "-p internal:mainboard=<vendor>:<mainboard>.\n\n", - mainboard_vendor, mainboard_part, lb_vendor, lb_part); - return 1; - } + msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n" + " be correct for the detected mainboard (%s:%s).\n", + image_vendor, image_model, cb_vendor, cb_model); + return -1; } return 0; @@ -242,22 +210,15 @@ rec = (struct lb_mainboard *)ptr; max_size = rec->size - sizeof(*rec); msg_pdbg("Vendor ID: %.*s, part ID: %.*s\n", - max_size - rec->vendor_idx, - rec->strings + rec->vendor_idx, - max_size - rec->part_number_idx, - rec->strings + rec->part_number_idx); - snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, - rec->strings + rec->vendor_idx); - snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, - rec->strings + rec->part_number_idx); + max_size - rec->vendor_idx, + rec->strings + rec->vendor_idx, + max_size - rec->part_number_idx, + rec->strings + rec->part_number_idx); + snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx, rec->strings + rec->vendor_idx); + snprintf(part, 255, "%.*s", max_size - rec->part_number_idx, rec->strings + rec->part_number_idx); - if (lb_part) { - msg_pdbg("Overwritten by command line, vendor ID: %s, part ID: %s.\n", lb_vendor, lb_part); - } else { - partvendor_from_cbtable = 1; - lb_part = strdup(part); - lb_vendor = strdup(vendor); - } + cb_vendor = strdup(vendor); + cb_model = strdup(part); } static struct lb_record *next_record(struct lb_record *rec) @@ -265,8 +226,7 @@ return (struct lb_record *)(((char *)rec) + rec->size); } -static void search_lb_records(struct lb_record *rec, struct lb_record *last, - unsigned long addr) +static void search_lb_records(struct lb_record *rec, struct lb_record *last, unsigned long addr) { struct lb_record *next; int count; @@ -284,7 +244,8 @@ } #define BYTES_TO_MAP (1024*1024) -int coreboot_init(void) +/* returns 0 if the table was parsed successfully and cb_vendor/cb_model have been set. */ +int cb_parse_table(const char **vendor, const char **model) { uint8_t *table_area; unsigned long addr, start; @@ -317,8 +278,7 @@ physunmap(table_area, BYTES_TO_MAP); table_area = physmap_try_ro("high tables", start, BYTES_TO_MAP); if (ERROR_PTR == table_area) { - msg_perr("Failed getting access to coreboot " - "high tables.\n"); + msg_perr("Failed getting access to coreboot high tables.\n"); return -1; } lb_table = find_lb_table(table_area, 0x00000, 0x1000); @@ -340,6 +300,7 @@ lb_table->table_bytes, lb_table->table_checksum, lb_table->table_entries); search_lb_records(rec, last, addr + lb_table->header_bytes); - + *vendor = cb_vendor; + *model = cb_model; return 0; } Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/flashrom.8 Mon Aug 20 02:24:22 2012 (r1577) @@ -259,7 +259,7 @@ identify the mainboard (which is the exception), or if you want to override the detected mainboard model, you can specify the mainboard using the .sp -.B " flashrom \-p internal:mainboard=[<vendor>:]<board>" +.B " flashrom \-p internal:mainboard=<vendor>:<board>" syntax. .sp See the 'Known boards' or 'Known laptops' section in the output Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/flashrom.c Mon Aug 20 02:24:22 2012 (r1577) @@ -1012,12 +1012,11 @@ "work, but to support all possible " "features"); - msg_cinfo(" we need to add them manually.\nYou " - "can help us by mailing us the output of " - "the following command to flashrom@flashrom." - "org: \n'flashrom -VV [plus the " - "-p/--programmer parameter (if needed)]" - "'\nThanks for your help!\n" + msg_cinfo(" we need to add them manually.\n" + "You can help us by mailing us the output of the following command to " + "flashrom@flashrom.org:\n" + "'flashrom -VV [plus the -p/--programmer parameter]'\n" + "Thanks for your help!\n" "===\n"); } @@ -1814,11 +1813,16 @@ } #if CONFIG_INTERNAL == 1 - if (programmer == PROGRAMMER_INTERNAL) - if (show_id(newcontents, size)) { + if (programmer == PROGRAMMER_INTERNAL && cb_check_image(newcontents, size) < 0) { + if (force_boardmismatch) { + msg_pinfo("Proceeding anyway because user forced us to.\n"); + } else { + msg_perr("Aborting. You can override this with " + "-p internal:boardmismatch=force.\n"); ret = 1; goto out; } + } #endif } Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/internal.c Mon Aug 20 02:24:22 2012 (r1577) @@ -169,6 +169,10 @@ #endif int force_laptop = 0; int not_a_laptop = 0; + const char *board_vendor = NULL; + const char *board_model = NULL; + const char *cb_vendor = NULL; + const char *cb_model = NULL; char *arg; arg = extract_programmer_param("boardenable"); @@ -217,7 +221,10 @@ arg = extract_programmer_param("mainboard"); if (arg && strlen(arg)) { - lb_vendor_dev_from_string(arg); + if (board_parse_parameter(arg, &board_vendor, &board_model)) { + free(arg); + return 1; + } } else if (arg && !strlen(arg)) { msg_perr("Missing argument for mainboard.\n"); free(arg); @@ -249,10 +256,20 @@ } #if defined(__i386__) || defined(__x86_64__) - /* We look at the cbtable first to see if we need a - * mainboard specific flash enable sequence. - */ - coreboot_init(); + if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ + /* If no -p internal:mainboard was given but there are valid coreboot IDs then use those. */ + if (board_vendor == NULL || board_model == NULL) { + board_vendor = cb_vendor; + board_model = cb_model; + } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { + msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" + " match the current coreboot IDs of the mainboard (%s:%s).\n", + board_vendor, board_model, cb_vendor, cb_model); + if (!force_boardmismatch) + return 1; + msg_pinfo("Continuing anyway.\n"); + } + } dmi_init(); @@ -321,11 +338,13 @@ init_superio_ite(); #endif - board_flash_enable(lb_vendor, lb_part); + if (board_flash_enable(board_vendor, board_model)) { + msg_perr("Aborting to be safe.\n"); + return 1; + } /* Even if chipset init returns an error code, we don't want to abort. * The error code might have been a warning only. - * Besides that, we don't check the board enable return code either. */ #if defined(__i386__) || defined(__x86_64__) || defined (__mips) register_par_programmer(&par_programmer_internal, internal_buses_supported); Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Fri Aug 17 19:30:43 2012 (r1576) +++ trunk/programmer.h Mon Aug 20 02:24:22 2012 (r1577) @@ -246,6 +246,7 @@ #if CONFIG_INTERNAL == 1 /* board_enable.c */ +int board_parse_parameter(const char *boardstring, const char **vendor, const char **model); void w836xx_ext_enter(uint16_t port); void w836xx_ext_leave(uint16_t port); void probe_superio_winbond(void); @@ -255,7 +256,7 @@ void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); -int board_flash_enable(const char *vendor, const char *part); +int board_flash_enable(const char *vendor, const char *model); /* chipset_enable.c */ int chipset_flash_enable(void); @@ -273,11 +274,8 @@ void cleanup_cpu_msr(void); /* cbtable.c */ -void lb_vendor_dev_from_string(const char *boardstring); -int show_id(uint8_t *bios, int size); -int coreboot_init(void); -extern char *lb_part, *lb_vendor; -extern int partvendor_from_cbtable; +int cb_parse_table(const char **vendor, const char **model); +int cb_check_image(uint8_t *bios, int size); /* dmi.c */ extern int has_dmi_support;

1 0

K9N6SGM-V
by Perpetuum Mobile (ukr.net) 19 Aug '12

19 Aug '12

http://www.msi.com/product/mb/K9N6SGM-V---K9N6PGM-FI---K9N6PGM- F.html#/?div=Detail

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