flashrom

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9188 discussions

Re: [flashrom] MSI K9N6SGM-V: flashrom -V
by Stefan Tauner 18 Sep '12

18 Sep '12

Hi! Thanks for the log. It seems like your board uses a superio chip that is not supported by flashrom yet. Carl-Daniel is working on a patch for it, but it does (or should) only detect that chip at the moment - it does not enable read or write access yet. Please do not expect flashrom to work on that board soon, sorry. If you want to help us add support for that board please get the source of flashrom from http://flashrom.org/Downloads#Installation_from_source apply the patch below, compile it and reply with a verbose log again. If you need help with that just ask or visit our IRC channel (#flashrom on chat.freenode.net). the current patch: http://patchwork.coreboot.org/patch/3713/ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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#5: Winbond W25Q128 for ICH
by flashrom 17 Sep '12

17 Sep '12

#5: Winbond W25Q128 for ICH ----------------------------------+--------------------------- Reporter: rheneus.paul@… | Owner: hailfinger Type: defect | Status: new Priority: critical | Milestone: Component: flashrom | Version: Keywords: | Dependencies: Patch Status: there is no patch | ----------------------------------+--------------------------- I could not use flashrom 0.9.3 -r1205 to detect Winbond W25Q128 to program BIOS. Attached the read log Just by adding WINBOND_NEX_W25Q128 0x4018 in flashchips.c for W25Q128, similar to W25Q64 throws run Opcode 0x3 error for read. Attached Verbose log of read -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/5> flashrom <http://www.flashrom.org/>

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Add support for unlock and write to Atmel AT26F040
by tim＠buttersideup.com 17 Sep '12

17 Sep '12

Add support for unlock and write to Atmel AT26F040 SPI 512k chips. Tested using a bus pirate only. I'm unavailble for a couple of weeks imminently, but will reply on return if pos... Cheers, Tim. ~# flashrom -c AT26F004 -p buspirate_spi:dev=/dev/ttyUSB0 -Vw rr620WDA-read-rom-image flashrom v0.9.3-r1349 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1088M loops per second, 10 myus = 10 us, 100 myus = 95 us, 1000 myus = 945 us, 10000 myus = 9495 us, 4 myus = 5 us, OK. Initializing buspirate_spi programmer SPI speed is 8MHz Raw bitbang mode version 1 Raw SPI mode version 1 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x400 Chip status register is 1c Found chip "Atmel AT26F004" (512 kB, SPI) on buspirate_spi. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Some block protection in effect, disabling All write protection disabled! Reading old flash chip contents... Erasing and writing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff:EW, 0x001000-0x001fff:W, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S, 0x00c000-0x00cfff:W, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff:S, 0x010000-0x010fff:EW, 0x011000-0x011fff:EW, 0x012000-0x012fff:EW, 0x013000-0x013fff:EW, 0x014000-0x014fff:EW, 0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:S, 0x018000-0x018fff:S, 0x019000-0x019fff:S, 0x01a000-0x01afff:S, 0x01b000-0x01bfff:S, 0x01c000-0x01cfff:S, 0x01d000-0x01dfff:S, 0x01e000-0x01efff:S, 0x01f000-0x01ffff:S, 0x020000-0x020fff:EW, 0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W, 0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W, 0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W, 0x02a000-0x02aff f:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W, 0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W, 0x030000-0x030fff:W, 0x031000-0x031fff:W, 0x032000-0x032fff:W, 0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W, 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W, 0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W, 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:S, 0x03e000-0x03efff:S, 0x03f000-0x03ffff:S, 0x040000-0x040fff:S, 0x041000-0x041fff:S, 0x042000-0x042fff:S, 0x043000-0x043fff:S, 0x044000-0x044fff:S, 0x045000-0x045fff:S, 0x046000-0x046fff:S, 0x047000-0x047fff:S, 0x048000-0x048fff:S, 0x049000-0x049fff:S, 0x04a000-0x04afff:S, 0x04b000-0x04bfff:S, 0x04c000-0x04cfff:S, 0x04d000-0x04dfff:S, 0x04e000-0x04efff:S, 0x04f000-0x04ffff:S, 0x050000-0x050fff:S, 0x051000-0x051fff:S, 0x052000-0x052fff:S, 0x053000-0x053fff:S, 0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x056000-0x056fff:S, 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff: S, 0x05a000-0x05afff:S, 0x05b000-0x05bfff:W, 0x05c000-0x05cfff:W, 0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S, 0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S, 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S, 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S, 0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S, 0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S, 0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S, 0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S, 0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S, 0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S, 0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S, 0x07e000-0x07efff:S, 0x07f000-0x07ffff:S Done. Verifying flash... VERIFIED. Raw bitbang mode version 1 Bus Pirate shutdown completed. Signed-off-by: Tim Small <tim(a)seoss.co.uk> Index: at25.c =================================================================== --- at25.c (revision 1349) +++ at25.c (working copy) @@ -215,6 +215,8 @@ /* spi_disable_blockprotect_at25df is not really the right way to do * this, but the side effects of said function work here as well. */ + /* FIXME? This does a global unlock, but at25f don't have this command? + */ return spi_disable_blockprotect_at25df(flash); } @@ -285,3 +287,71 @@ } return 0; } + + +int spi_disable_blockprotect_at26f040(struct flashchip *flash) +{ + uint8_t status; + uint32_t i; + int result; + + /* See Page 19 * + * http://www.atmel.com/dyn/resources/prod_documents/doc3588.pdf */ + + /* Write Protect Pin status: 0 == cannot set SPRL to 0 (unlocked) */ + const uint8_t stat_bit_WPP = (1 << 4); + + /* Software Protection Status: 00 == all sectors unprotected */ + const uint8_t stat_bit_SWP = (3 << 2); + + /* Sector Protection registers locked: 0 == unlocked. * + * Cannot be set to 0 if WPP is 1 (hardware lock). */ + const uint8_t stat_bit_SPRL = (1 << 7); + + /* Page 6 */ + const uint8_t at26f004_unprotect_sector = 0x39; + + status = spi_read_status_register(); + /* If block protection is disabled, OK to go ahead, stop here. */ + if ((status & stat_bit_SWP) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & stat_bit_SPRL) { + msg_cdbg("Need to disable Sector Protection Register Lock\n"); + if ((status & stat_bit_WPP) == 0) { + msg_cerr("The chips write-protect pin is being " + "asserted (driven low) by external hardware." + "\nWriting is impossible :-(.\n"); + return 1; + } + /* All bits except bit 7 (SPRL) are readonly. */ + /* Unlock sector protection registers. */ + result = spi_write_status_register(flash, status & ~stat_bit_SPRL); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + + } + /* Call unprotect sector on each sector. We need to give an address */ + /* within each sector, and the smallest sector is 8KB. */ + for (i = 0; i < 0x80000; i += 0x1000) { + const unsigned char cmd[4] = { at26f004_unprotect_sector, + (i >> 16) & 0xff, + (i >> 8) & 0xff, + i & 0xff}; + /* set the chip's "WEL" write latch - WREN (Write Enable) */ + spi_write_enable(); + spi_send_command(sizeof(cmd), 0, cmd, NULL); + } + status = spi_read_status_register(); + if ((status & stat_bit_SWP) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } else { + msg_cerr("All write protection disabled!\n"); + } + + return 0; +} Index: spi25.c =================================================================== --- spi25.c (revision 1349) +++ spi25.c (working copy) @@ -1210,3 +1210,94 @@ return 0; } + + +/* This is for Atmel chips only (AT26F004, AT26DF161A etc.) - the 25F004 only + * does either this mode, or byte-at-a-time. */ +int spi_at26_write_sequential(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + /* ref http://www.atmel.com/dyn/resources/prod_documents/doc3588.pdf + * page 9 etc. */ + const int AT26_SEQ_BYTE_WRITE_OUTSIZE = 5; + const int AT26_SEQ_BYTE_WRITE_CONT_OUTSIZE = 2; + const int AT26_SEQ_BYTE_WRITE_CMD = 0xaf; + uint32_t pos = start; + int result; + unsigned char cmd[4] = { + AT26_SEQ_BYTE_WRITE_CMD + }; + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = AT26_SEQ_BYTE_WRITE_OUTSIZE, + .writearr = (const unsigned char[]){ + AT26_SEQ_BYTE_WRITE_CMD, + (start >> 16) & 0xff, + (start >> 8) & 0xff, + (start & 0xff), + buf[0] + }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + switch (spi_programmer->type) { +#if CONFIG_INTERNAL == 1 +#if defined(__i386__) || defined(__x86_64__) + case SPI_CONTROLLER_IT87XX: + case SPI_CONTROLLER_WBSIO: + msg_perr("%s: impossible with this SPI controller," + " degrading to byte program\n", __func__); + return spi_chip_write_1(flash, buf, start, len); +#endif +#endif + default: + break; + } + + cmds[1].writearr = (const unsigned char[]){ + 0xAF, + (pos >> 16) & 0xff, + (pos >> 8) & 0xff, + (pos & 0xff), + buf[pos - start] + }; + + + result = spi_send_multicommand(cmds); + if (result) { + msg_cerr("%s failed during start command execution\n", + __func__); + /* FIXME: Should we send WRDI here as well to make sure the chip + * is not in seuquential wirte mode? + */ + return result; + } + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(5); + + pos ++; + + while (pos < start + len) { + cmd[1] = buf[pos++ - start]; + spi_send_command(AT26_SEQ_BYTE_WRITE_CONT_OUTSIZE, 0, cmd, NULL); + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(5); + } + + /* Use WRDI to exit sequential write mode. This needs to be done before + * issuing any other non-sequential-byte-write commands. + */ + spi_write_disable(); + + return 0; +} Index: flashchips.c =================================================================== --- flashchips.c (revision 1349) +++ flashchips.c (working copy) @@ -1883,6 +1883,7 @@ }, .printlock = spi_prettyprint_status_register_atmel_at26df081a, .unlock = spi_disable_blockprotect, + /* Should support spi_at26_write_sequential too, but it's untested */ .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, @@ -1914,6 +1915,7 @@ .model_id = ATMEL_AT26F004, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1936,7 +1938,9 @@ .block_erase = spi_block_erase_c7, } }, - .write = NULL /* Incompatible Page write */, + .unlock = spi_disable_blockprotect_at26f040, + /* also supports spi_chip_write_1, but nothing else */ + .write = spi_at26_write_sequential, .read = spi_chip_read, .voltage = {2700, 3600}, }, Index: chipdrivers.h =================================================================== --- chipdrivers.h (revision 1349) +++ chipdrivers.h (working copy) @@ -55,6 +55,7 @@ int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf, int start, int len); +int spi_at26_write_sequential(struct flashchip *flash, uint8_t *buf, int start, int len); /* a25.c */ int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash); @@ -74,6 +75,7 @@ int spi_disable_blockprotect_at25f(struct flashchip *flash); int spi_disable_blockprotect_at25fs010(struct flashchip *flash); int spi_disable_blockprotect_at25fs040(struct flashchip *flash); +int spi_disable_blockprotect_at26f040(struct flashchip *flash); /* 82802ab.c */ uint8_t wait_82802ab(struct flashchip *flash);

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[commit] r1599 - trunk
by repository service 16 Sep '12

16 Sep '12

Author: stefanct Date: Mon Sep 17 02:40:54 2012 New Revision: 1599 URL: http://flashrom.org/trac/flashrom/changeset/1599 Log: Allow to select FTDI device by serial number. Requires libftdi > 0.5 (2004, commit ID a8f46ddc1595b1b07abfcce613acdafe5b8ddf9d). Idea stolen from chromiumos commit 5eb5624aeb7e2ee483e2fa0823c4e634c8ea3e68: http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… Signed-off-by: Shik Chen <shik(a)chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashrom.8 trunk/ft2232_spi.c Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Mon Sep 17 02:05:44 2012 (r1598) +++ trunk/flashrom.8 Mon Sep 17 02:40:54 2012 (r1599) @@ -573,6 +573,15 @@ and the default interface is .BR B . .sp +If there is more than one ft2232_spi-compatible device connected, you can select which one should be used by +specifying its serial number with the +.sp +.B " flashrom \-p ft2232_spi:serial=number" +.sp +syntax where +.B number +is the serial number of the device (which can be found for example in the output of lsusb -v). +.sp All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The expressible divisors are all even numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of 6 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Mon Sep 17 02:05:44 2012 (r1598) +++ trunk/ft2232_spi.c Mon Sep 17 02:40:54 2012 (r1599) @@ -283,7 +283,9 @@ msg_perr("Unable to select interface: %s\n", ftdic->error_str); } - f = ftdi_usb_open(ftdic, ft2232_vid, ft2232_type); + arg = extract_programmer_param("serial"); + f = ftdi_usb_open_desc(ftdic, ft2232_vid, ft2232_type, NULL, arg); + free(arg); if (f < 0 && f != -5) { msg_perr("Unable to open FTDI device: %d (%s)\n", f,

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[commit] r1598 - trunk
by repository service 16 Sep '12

16 Sep '12

Author: stefanct Date: Mon Sep 17 02:05:44 2012 New Revision: 1598 URL: http://flashrom.org/trac/flashrom/changeset/1598 Log: Add support for GigaDevice GD25LQ32. This is the low power version (vendor,device = 0xc8,0x6016) of GD25Q32 (0xc8,0x4016) which matches that of W25Q32 (0xef,0x4016) and W25Q32DW (0xef,0x6016). All their datasheets look pretty much the same with respect to commands, erase blocks, etc. Stolen from chromiumos: http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… Signed-off-by: Bryan Freed <bfreed(a)chromium.org> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Sep 15 17:51:09 2012 (r1597) +++ trunk/flashchips.c Mon Sep 17 02:05:44 2012 (r1598) @@ -4240,6 +4240,43 @@ }, { + .vendor = "GigaDevice", + .name = "GD25LQ32", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25LQ32, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, + }, + + { .vendor = "Hyundai", .name = "HY29F002T", .bustype = BUS_PARALLEL, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Sep 15 17:51:09 2012 (r1597) +++ trunk/flashchips.h Mon Sep 17 02:05:44 2012 (r1598) @@ -305,6 +305,7 @@ #define GIGADEVICE_GD25Q32 0x4016 #define GIGADEVICE_GD25Q64 0x4017 #define GIGADEVICE_GD25Q128 0x4018 +#define GIGADEVICE_GD25LQ32 0x6016 #define HYUNDAI_ID 0xAD /* Hyundai */ #define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */

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Re: [flashrom] [coreboot] New laptop: Lenovo ThinkPad X230 tablet, with dumps to go with it
by Peter Stuge 16 Sep '12

16 Sep '12

Keith Hui wrote: > At this point I'm mostly interested in just identifying the flash chip > without disassembling the laptop, although I'm ready for that if > necessary. Try: flashrom -p internal:force=laptop_I_want_a_brick flashrom is overly defensive on Thinkpads, where the Renesas EC always has it's own flash. > However, I do need to find a USB-based chip programmer that can do > parallel, FWH and SPI. No such thing in cheap. You can get a GALEP-5, which supports an incredible range of devices, but which also costs >= 600 USD. I want to make an open hardware+firmware design, but so far I haven't made it beyond the USB protocol. http://git.stuge.se/?p=qiprog.git //Peter

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Re: [flashrom] [coreboot] New laptop: Lenovo ThinkPad X230 tablet, with dumps to go with it
by Keith Hui 15 Sep '12

15 Sep '12

Thanks Idwer for your response. I downloaded most public datasheets available for the CPU and the PCH (it was called 7 Series). At this point I'm mostly interested in just identifying the flash chip without disassembling the laptop, although I'm ready for that if necessary. However, I do need to find a USB-based chip programmer that can do parallel, FWH and SPI. I still have to get a spare SPI flash chip and port coreboot to my Asus AMD board. For some reason I killed by home-built Willem PCB3B trying to convert it to PCB4-something to use newer version of its software. On Sat, Sep 15, 2012 at 7:10 AM, Idwer Vollering <vidwer(a)gmail.com> wrote: > CC: flashrom(a)flashrom.org > > 2012/9/15 Keith Hui <buurin(a)gmail.com>: >> Hi all, >> >> I'm back. With a new laptop. >> >> I'm now rocking a Lenovo x230 tablet, dual-booting Windows 7 and >> Fuduntu, both 64-bit. Knowing the last time I contributed to coreboot >> it was the good old 440BX when life was much simpler, it could be a >> while before I can get up to speed again, so I'll for now just put >> forth the obligatory lspci/superiotool dump to give any interested >> parties a heads-up of what support needs to be programmed for. >> >> Another interesting thing is it does UEFI. >> >> Below is output of flashrom 0.9.6.1. I cannot get it to identify the >> flash chip. lspci and superiotool dumps are attached. > > This thread mentions that it runs QM77: > http://forums.lenovo.com/t5/X-Series-Tablet-ThinkPad-Laptops/X230-Tablet-Ch… > >> >> # /usr/src/flashrom-0.9.6.1/flashrom -V -p internal >> flashrom v0.9.6.1-r1564 on Linux 3.4.9-1.fu2012.x86_64 (x86_64) >> flashrom is free software, get the source code at http://www.flashrom.org >> >> flashrom was built with libpci 3.1.7, GCC 4.6.3 20120306 (Red Hat >> 4.6.3-2), little endian >> Command line (3 args): /usr/src/flashrom-0.9.6.1/flashrom -V -p internal >> Calibrating delay loop... OS timer resolution is 1 usecs, 3243M loops >> per second, 10 myus = 10 us, 100 myus = 119 us, 1000 myus = 1026 us, >> 10000 myus = 10097 us, 4 myus = 4 us, OK. >> Initializing internal programmer >> No coreboot table found. >> DMI string system-manufacturer: "LENOVO" >> DMI string system-product-name: "3434CTO" >> DMI string system-version: "ThinkPad X230 Tablet" >> DMI string baseboard-manufacturer: "LENOVO" >> DMI string baseboard-product-name: "3434CTO" >> DMI string baseboard-version: "Not Available" >> DMI string chassis-type: "Notebook" >> Laptop detected via DMI. >> W836xx enter config mode worked or we were already in config mode. >> W836xx leave config mode had no effect. >> Active config mode, unknown reg 0x20 ID: 00. >> Please send the output of "flashrom -V" to >> flashrom(a)flashrom.org with W836xx: your board name: flashrom -V >> as the subject to help us finish support for your Super I/O. Thanks. >> ======================================================================== >> WARNING! You seem to be running flashrom on an unsupported laptop. >> Laptops, notebooks and netbooks are difficult to support and we >> recommend to use the vendor flashing utility. The embedded controller >> (EC) in these machines often interacts badly with flashing. >> See http://www.flashrom.org/Laptops for details. > > Also, see the "Laptops" section in flashrom's man page. > >> >> If flash is shared with the EC, erase is guaranteed to brick your laptop >> and write may brick your laptop. >> Read and probe may irritate your EC and cause fan failure, backlight >> failure and sudden poweroff. >> You have been warned. >> ======================================================================== >> Aborting. >> Error: Programmer initialization failed. > > You'll want to do a little investigation on which external programmer > [1] suits your needs. > > [1] http://flashrom.org/Supported_programmers

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[PATCH] Fix flashrom running on boards with coreboot.
by Stefan Tauner 15 Sep '12

15 Sep '12

In r1577 we removed the discrimination of coreboot IDs and user-specified mainboards. The problem is that the board enable code required to find a board enable if either of these model strings were set. Therefore boards running coreboot that do not need a board enable failed to execute flashrom since then. This patch fixes this by handling coreboot IDs and user-supplied IDs differently again. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Carl-Daniel noticed that the order of the board_match_name() calls were odd. The result was that in the case the user supplied a mainboard model that differed from the one in the cb table, and if the user forced flashrom to not abort, then the board enable matching the cb table would have been used instead of the one the user supplied. this is wrong or at least confusing. board_enable.c | 20 +++++++++++++++----- internal.c | 10 +++------- programmer.h | 2 +- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/board_enable.c b/board_enable.c index b23ef8f..8528747 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2495,7 +2495,6 @@ static const struct board_match *board_match_name(const char *vendor, const char if (partmatch) return partmatch; - msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); return NULL; } @@ -2605,16 +2604,27 @@ void board_handle_before_laptop(void) board_handle_phase(P2); } -int board_flash_enable(const char *vendor, const char *model) +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model) { const struct board_match *board = NULL; int ret = 0; - if (vendor && model) { + if (vendor != NULL && model != NULL) { board = board_match_name(vendor, model); - if (!board) /* if a board was given it has to match, else we abort here. */ + if (!board) { /* If a board was given by the user it has to match, else we abort here. */ + msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", + vendor, model); return 1; - } else { + } + } + if (board == NULL && cb_vendor != NULL && cb_model != NULL) { + board = board_match_name(cb_vendor, cb_model); + if (!board) { /* Failure is an option here, because many cb boards don't require an enable. */ + msg_pdbg2("No board enable found matching coreboot IDs vendor=\"%s\", model=\"%s\".\n", + vendor, model); + } + } + if (board == NULL) { board = board_match_pci_ids(P3); if (!board) /* i.e. there is just no board enable available for this board */ return 0; diff --git a/internal.c b/internal.c index 7b6cff2..b4414a5 100644 --- a/internal.c +++ b/internal.c @@ -257,12 +257,8 @@ int internal_init(void) } #if defined(__i386__) || defined(__x86_64__) - if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ - /* If no -p internal:mainboard was given but there are valid coreboot IDs then use those. */ - if (board_vendor == NULL || board_model == NULL) { - board_vendor = cb_vendor; - board_model = cb_model; - } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { + if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { + if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" " match the current coreboot IDs of the mainboard (%s:%s).\n", board_vendor, board_model, cb_vendor, cb_model); @@ -339,7 +335,7 @@ int internal_init(void) init_superio_ite(); #endif - if (board_flash_enable(board_vendor, board_model)) { + if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model)) { msg_perr("Aborting to be safe.\n"); return 1; } diff --git a/programmer.h b/programmer.h index 51b9c40..dedec67 100644 --- a/programmer.h +++ b/programmer.h @@ -256,7 +256,7 @@ void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); -int board_flash_enable(const char *vendor, const char *model); +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); /* chipset_enable.c */ int chipset_flash_enable(void); -- Kind regards, Stefan Tauner

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Re: [flashrom] [PATCH] Fix flashrom running on boards with coreboot.
by Idwer Vollering 15 Sep '12

15 Sep '12

2012/9/15 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: > In r1577 we removed the discrimination of coreboot IDs and user-specified > mainboards. The problem is that the board enable code required to find > a board enable if either of these model strings were set. Therefore boards > running coreboot that do not need a board enable failed to execute flashrom > since then. This patch fixes this by handling coreboot IDs and user-supplied > IDs differently again. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer(a)gmail.com> > --- > board_enable.c | 20 +++++++++++++++----- > internal.c | 10 +++------- > programmer.h | 2 +- > 3 files changed, 19 insertions(+), 13 deletions(-) > > diff --git a/board_enable.c b/board_enable.c > index 2668f10..bdd5ebb 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -2493,7 +2493,6 @@ static const struct board_match *board_match_name(const char *vendor, const char > if (partmatch) > return partmatch; > > - msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", vendor, model); > return NULL; > } > > @@ -2603,16 +2602,27 @@ void board_handle_before_laptop(void) > board_handle_phase(P2); > } > > -int board_flash_enable(const char *vendor, const char *model) > +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model) Future plan: pass board_match{} to board_flash_enable() instead? > { > const struct board_match *board = NULL; > int ret = 0; > > - if (vendor && model) { > + if (cb_vendor != NULL && cb_model != NULL) { > + board = board_match_name(cb_vendor, cb_model); > + if (!board) { /* Failure is an option here, because many cb boards don't require an enable. */ > + msg_pdbg2("No board enable found matching coreboot IDs vendor=\"%s\", model=\"%s\".\n", > + vendor, model); > + } > + } > + if (board == NULL && vendor && model) { > board = board_match_name(vendor, model); > - if (!board) /* if a board was given it has to match, else we abort here. */ > + if (!board) { /* If a board was given by the user it has to match, else we abort here. */ > + msg_perr("No suitable board enable found for vendor=\"%s\", model=\"%s\".\n", > + vendor, model); > return 1; > - } else { > + } > + } > + if (board == NULL) { > board = board_match_pci_ids(P3); > if (!board) /* i.e. there is just no board enable available for this board */ > return 0; > diff --git a/internal.c b/internal.c > index 7b6cff2..b4414a5 100644 > --- a/internal.c > +++ b/internal.c > @@ -257,12 +257,8 @@ int internal_init(void) > } > > #if defined(__i386__) || defined(__x86_64__) > - if (cb_parse_table(&cb_vendor, &cb_model) == 0) { /* coreboot IDs valid */ > - /* If no -p internal:mainboard was given but there are valid coreboot IDs then use those. */ > - if (board_vendor == NULL || board_model == NULL) { > - board_vendor = cb_vendor; > - board_model = cb_model; > - } else if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { > + if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { > + if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { > msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" > " match the current coreboot IDs of the mainboard (%s:%s).\n", > board_vendor, board_model, cb_vendor, cb_model); > @@ -339,7 +335,7 @@ int internal_init(void) > init_superio_ite(); > #endif > > - if (board_flash_enable(board_vendor, board_model)) { > + if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model)) { > msg_perr("Aborting to be safe.\n"); > return 1; > } > diff --git a/programmer.h b/programmer.h > index 51b9c40..dedec67 100644 > --- a/programmer.h > +++ b/programmer.h > @@ -256,7 +256,7 @@ void sio_write(uint16_t port, uint8_t reg, uint8_t data); > void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); > void board_handle_before_superio(void); > void board_handle_before_laptop(void); > -int board_flash_enable(const char *vendor, const char *model); > +int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); See above. > > /* chipset_enable.c */ > int chipset_flash_enable(void); > -- > Kind regards, Stefan Tauner > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

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flashrom -V
by Gary E. Miller 15 Sep '12

15 Sep '12

Yo flashrom-ers! See below for the results of 'flashrom -V' on my Foxconn M61PMP motherboard. Flashing worked. RGDS GARY --------------------------------------------------------------------------- Gary E. Miller Rellim 109 NW Wilmington Ave., Suite E, Bend, OR 97701 gem(a)rellim.com Tel:+1(541)382-8588 localhost 966F1P07 # flashrom -V flashrom v0.9.5.2-r1515 on Linux 3.4.9-gentoo (x86_64), built with libpci 3.1.9, GCC 4.6.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1607M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10001 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "To Be Filled By O.E.M." DMI string system-product-name: "To Be Filled By O.E.M." DMI string system-version: "To Be Filled By O.E.M." DMI string baseboard-manufacturer: "FOXCONN" DMI string baseboard-product-name: "M61PMP/M61PMP-K" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8716 on port 0x2e Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xd0000000 Mapping NVIDIA MCP6x SPI at 0xd0000000, unaligned size 0x544. SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. No IT87* serial flash segment enabled. The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Chip status register is 00 Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x13 Found Winbond flash chip "W25Q80" (1024 kB, SPI). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). No operations were specified.

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