flashrom

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[commit] r1619 - trunk
by repository service 27 Oct '12

27 Oct '12

Author: stefanct Date: Sat Oct 27 17:36:56 2012 New Revision: 1619 URL: http://flashrom.org/trac/flashrom/changeset/1619 Log: Do not read the flash chip twice in verification mode. Kyösti Mälkki noticed that we unnecessarily read the flash chip twice when called with --verify. The first one is the mandatory read before everything (to be able to detect the seriousness of errors), but the second one is not necessary because we can just use the former for the comparison. This introduces a small output change: previously we printed ERASE or VERIFY depending on the callee. This special case has been dropped because it is unnecessary to print it (and wrong for the verification function to need to know why it is verifying exactly). If an erase fails we mention that fact explicitly already, similar for verify. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flash.h trunk/flashrom.c trunk/jedec.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sat Oct 27 02:34:23 2012 (r1618) +++ trunk/flash.h Sat Oct 27 17:36:56 2012 (r1619) @@ -231,7 +231,7 @@ int max(int a, int b); void tolower_string(char *str); char *extract_param(char **haystack, const char *needle, const char *delim); -int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message); +int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len); int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granularity gran); char *strcat_realloc(char *dest, const char *src); void print_version(void); Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Oct 27 02:34:23 2012 (r1618) +++ trunk/flashrom.c Sat Oct 27 17:36:56 2012 (r1619) @@ -544,6 +544,26 @@ return usable_erasefunctions; } +int compare_range(uint8_t *wantbuf, uint8_t *havebuf, unsigned int start, unsigned int len) +{ + int ret = 0, failcount = 0; + unsigned int i; + for (i = 0; i < len; i++) { + if (wantbuf[i] != havebuf[i]) { + /* Only print the first failure. */ + if (!failcount++) + msg_cerr("FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x,", + start + i, wantbuf[i], havebuf[i]); + } + } + if (failcount) { + msg_cerr(" failed byte count from 0x%08x-0x%08x: 0x%x\n", + start, start + len - 1, failcount); + ret = -1; + } + return ret; +} + /* start is an offset to the base address of the flash chip */ int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len) @@ -556,7 +576,7 @@ exit(1); } memset(cmpbuf, 0xff, len); - ret = verify_range(flash, cmpbuf, start, len, "ERASE"); + ret = verify_range(flash, cmpbuf, start, len); free(cmpbuf); return ret; } @@ -566,15 +586,12 @@ * flash content at location start * @start offset to the base address of the flash chip * @len length of the verified area - * @message string to print in the "FAILED" message * @return 0 for success, -1 for failure */ -int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, - unsigned int len, const char *message) +int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len) { - unsigned int i; uint8_t *readbuf = malloc(len); - int ret = 0, failcount = 0; + int ret = 0; if (!len) goto out_free; @@ -595,8 +612,6 @@ ret = -1; goto out_free; } - if (!message) - message = "VERIFY"; ret = flash->chip->read(flash, readbuf, start, len); if (ret) { @@ -605,22 +620,7 @@ return ret; } - for (i = 0; i < len; i++) { - if (cmpbuf[i] != readbuf[i]) { - /* Only print the first failure. */ - if (!failcount++) - msg_cerr("%s FAILED at 0x%08x! " - "Expected=0x%02x, Read=0x%02x,", - message, start + i, cmpbuf[i], - readbuf[i]); - } - } - if (failcount) { - msg_cerr(" failed byte count from 0x%08x-0x%08x: 0x%x\n", - start, start + len - 1, failcount); - ret = -1; - } - + ret = compare_range(cmpbuf, readbuf, start, len); out_free: free(readbuf); return ret; @@ -1054,21 +1054,6 @@ return chip - flashchips; } -int verify_flash(struct flashctx *flash, uint8_t *buf) -{ - int ret; - unsigned int total_size = flash->chip->total_size * 1024; - - msg_cinfo("Verifying flash... "); - - ret = verify_range(flash, buf, 0, total_size, NULL); - - if (!ret) - msg_cinfo("VERIFIED. \n"); - - return ret; -} - int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename) { @@ -1424,10 +1409,8 @@ { msg_gerr("Your flash chip is in an unknown state.\n" "Get help on IRC at chat.freenode.net (channel #flashrom) or\n" - "mail flashrom(a)flashrom.org with the subject " - "\"FAILED: <your board name>\"!\n" - "-------------------------------------------------------------" - "------------------\n" + "mail flashrom(a)flashrom.org with the subject \"FAILED: <your board name>\"!\n" + "-------------------------------------------------------------------------------\n" "DO NOT REBOOT OR POWEROFF!\n"); } @@ -1860,15 +1843,22 @@ } if (verify_it) { - /* Work around chips which need some time to calm down. */ - if (write_it) + msg_cinfo("Verifying flash... "); + + if (write_it) { + /* Work around chips which need some time to calm down. */ programmer_delay(1000*1000); - ret = verify_flash(flash, newcontents); - /* If we tried to write, and verification now fails, we - * might have an emergency situation. - */ - if (ret && write_it) - emergency_help_message(); + ret = verify_range(flash, newcontents, 0, size); + /* If we tried to write, and verification now fails, we + * might have an emergency situation. + */ + if (ret) + emergency_help_message(); + } else { + ret = compare_range(newcontents, oldcontents, 0, size); + } + if (!ret) + msg_cinfo("VERIFIED.\n"); } out: Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Sat Oct 27 02:34:23 2012 (r1618) +++ trunk/jedec.c Sat Oct 27 17:36:56 2012 (r1619) @@ -410,7 +410,7 @@ dst = d; src = s; - failed = verify_range(flash, src, start, page_size, NULL); + failed = verify_range(flash, src, start, page_size); if (failed && tried++ < MAX_REFLASH_TRIES) { msg_cerr("retrying.\n");

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ft2232: TI Stellaris DevKit / Dediprog SF100 IF / SPI Chip
by Philipp Wiesner 27 Oct '12

27 Oct '12

Hi I had to flash a BIOS chip via SPI. The board i was flashing was the mainboard of a 'iEi TANK-800-D525' computer (it's a rugged industrial sff computer). I don't have access to the machine ATM so I can't tell what the exact name of the board is, but it's a custom mainboard only used in this computer AFAIK. It has a SST25VF016B BIOS-chip (which is well supported) and an interface designed for the Dediprog SF100 programmer, which essentially is a SPI interface with an optional IO line. (Documentation is available online, for users as well as for hardware developers, so the interface is well documented). The programmer I used was a Texas Instruments DK-LM3S9B96 Stellaris development kit. It has a JTAG-Interface, which is externally accessable via pin header. The interface is provided by a FTDI ft2232 chip together with some glue logic (essentially bus buffers, some logic). I had to make some customizations to ft2232.c add support for this programmer. I had to build a cable which connects the JTAG interface with the on-board SF100 interface. Needless to say, I was successful. I like to share as much of the knowledge I acquired as possible with the community. The least thing I can do is send a patch with my modifications for the TI development board. I still need to read the instructions on how to prepare and send patches as I haven't done this in a long time. IMHO other TI Stellaris development boards share the same JTAG interface concept, but I can't name them. If someone has suggestions, I could check those boards for compatibility (by schematics). BTW, vid=0x0403 (FTDI default), pid=0xbcd9. In fact, a lot of USB-JTAG-Interfaces on development boards should be capable of doing this. The board needs to be flashed while completely off. At least I was not successful using the optional IO-line to claim exclusive access to the chip while in standby/running. I'm going to send a follow-up if I have specific questions. In the meantime you can ask questions if you think anything I did can be useful for you / for everyone. Kind regards, P. Wiesner

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[commit] r1616 - trunk
by repository service 27 Oct '12

27 Oct '12

Author: stefanct Date: Sat Oct 27 02:06:02 2012 New Revision: 1616 URL: http://flashrom.org/trac/flashrom/changeset/1616 Log: Add support for Atmel AT26DF041. Wicked chip: No WRSR, no write enable command (but swallows our default one without a problem), supports an auto-erasing page write (but even without that page writes are recommended to write the whole page i.e. operate on a completely erased page), mad requirements on block refreshments if only partly written. Found on my Intel D946GZIS and tested with my serprog in situ. Using the page write by setting JEDEC_BYTE_PROGRAM to 0x11 and using the spi_chip_write_256 command greatly improves performance and works flawlessly. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/spi.h trunk/spi25.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Fri Oct 26 18:49:15 2012 (r1615) +++ trunk/chipdrivers.h Sat Oct 27 02:06:02 2012 (r1616) @@ -41,7 +41,9 @@ int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Oct 26 18:49:15 2012 (r1615) +++ trunk/flashchips.c Sat Oct 27 02:06:02 2012 (r1616) @@ -1795,18 +1795,24 @@ .total_size = 512, .page_size = 256, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { + .eraseblocks = { {256, 2048} }, + .block_erase = spi_block_erase_81, + }, { + .eraseblocks = { {2 * 1024, 256} }, + .block_erase = spi_block_erase_50, + }, { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, } - }, - .write = NULL /* Incompatible Page write */, - .read = spi_chip_read, + }, /* Supports also an incompatible page write (of exactly 256 B) and an auto-erasing write. */ + .write = spi_chip_write_1, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, /* 3.0-3.6V for higher speed, 2.7-3.6V normal */ }, Modified: trunk/spi.h ============================================================================== --- trunk/spi.h Fri Oct 26 18:49:15 2012 (r1615) +++ trunk/spi.h Sat Oct 27 02:06:02 2012 (r1616) @@ -76,11 +76,21 @@ #define JEDEC_CE_C7_OUTSIZE 0x01 #define JEDEC_CE_C7_INSIZE 0x00 +/* Block Erase 0x50 is supported by Atmel AT26DF chips. */ +#define JEDEC_BE_50 0x50 +#define JEDEC_BE_50_OUTSIZE 0x04 +#define JEDEC_BE_50_INSIZE 0x00 + /* Block Erase 0x52 is supported by SST and old Atmel chips. */ #define JEDEC_BE_52 0x52 #define JEDEC_BE_52_OUTSIZE 0x04 #define JEDEC_BE_52_INSIZE 0x00 +/* Block Erase 0x81 is supported by Atmel AT26DF chips. */ +#define JEDEC_BE_81 0x81 +#define JEDEC_BE_81_OUTSIZE 0x04 +#define JEDEC_BE_81_INSIZE 0x00 + /* Block Erase 0xd8 is supported by EON/Macronix chips. */ #define JEDEC_BE_D8 0xd8 #define JEDEC_BE_D8_OUTSIZE 0x04 Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Fri Oct 26 18:49:15 2012 (r1615) +++ trunk/spi25.c Sat Oct 27 02:06:02 2012 (r1616) @@ -741,6 +741,86 @@ return 0; } +int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + int result; + struct spi_command cmds[] = { + { +/* .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { */ + .writecnt = JEDEC_BE_50_OUTSIZE, + .writearr = (const unsigned char[]){ + JEDEC_BE_50, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff) + }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(flash, cmds); + if (result) { + msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); + return result; + } + /* Wait until the Write-In-Progress bit is cleared. + * This usually takes 10 ms, so wait in 1 ms steps. + */ + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(1 * 1000); + /* FIXME: Check the status register for errors. */ + return 0; +} + +int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + int result; + struct spi_command cmds[] = { + { +/* .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { */ + .writecnt = JEDEC_BE_81_OUTSIZE, + .writearr = (const unsigned char[]){ + JEDEC_BE_81, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff) + }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(flash, cmds); + if (result) { + msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); + return result; + } + /* Wait until the Write-In-Progress bit is cleared. + * This usually takes 8 ms, so wait in 1 ms steps. + */ + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(1 * 1000); + /* FIXME: Check the status register for errors. */ + return 0; +} + int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen) {

2 1

[commit] r1618 - in trunk: . Documentation
by repository service 27 Oct '12

27 Oct '12

Author: stefanct Date: Sat Oct 27 02:34:23 2012 New Revision: 1618 URL: http://flashrom.org/trac/flashrom/changeset/1618 Log: serprog: add opcode to control the programmer's output drivers. This allowed me to let the clips remain attached on my D946GZIS while playing with coreboot/serialice. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Documentation/serprog-protocol.txt trunk/serprog.c trunk/serprog.h Modified: trunk/Documentation/serprog-protocol.txt ============================================================================== --- trunk/Documentation/serprog-protocol.txt Sat Oct 27 02:34:18 2012 (r1617) +++ trunk/Documentation/serprog-protocol.txt Sat Oct 27 02:34:23 2012 (r1618) @@ -34,6 +34,7 @@ 0x13 Perform SPI operation 24-bit slen + 24-bit rlen ACK + rlen bytes of data / NAK + slen bytes of data 0x14 Set SPI clock frequency in Hz 32-bit requested frequency ACK + 32-bit set frequency / NAK +0x15 Toggle flash chip pin drivers 8-bit (0 disable, else enable) ACK / NAK 0x?? unimplemented command - invalid. @@ -82,6 +83,12 @@ lower than the one requested. If there is no lower frequency available the lowest possible should be used. The value chosen is sent back in the reply with an ACK. + 0x15 (S_CMD_S_PIN_STATE): + Sets the state of the pin drivers connected to the flash chip. Disabling them allows other + devices (e.g. a mainboard's chipset) to access the chip. This way the serprog controller can + remain attached to the flash chip even when the board is running. The user is responsible to + NOT connect VCC and other permanently externally driven signals to the programmer as needed. + If the value is 0, then the drivers should be disabled, otherwise they should be enabled. About mandatory commands: The only truly mandatory commands for any device are 0x00, 0x01, 0x02 and 0x10, but one can't really do anything with these commands. Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Sat Oct 27 02:34:18 2012 (r1617) +++ trunk/serprog.c Sat Oct 27 02:34:23 2012 (r1618) @@ -664,6 +664,15 @@ sp_device_opbuf_size); } + if (sp_check_commandavail(S_CMD_S_PIN_STATE)) { + uint8_t en = 1; + if (sp_docommand(S_CMD_S_PIN_STATE, 1, &en, 0, NULL) != 0) { + msg_perr("Error: could not enable output buffers\n"); + return 1; + } else + msg_pdbg(MSGHEADER "Output drivers enabled\n"); + } else + msg_pdbg(MSGHEADER "Warning: Programmer does not support toggling its output drivers\n"); sp_prev_was_write = 0; sp_streamed_transmit_ops = 0; sp_streamed_transmit_bytes = 0; @@ -736,9 +745,15 @@ static int serprog_shutdown(void *data) { - msg_pspew("%s\n", __func__); if ((sp_opbuf_usage) || (sp_max_write_n && sp_write_n_bytes)) sp_execute_opbuf(); + if (sp_check_commandavail(S_CMD_S_PIN_STATE)) { + uint8_t dis = 0; + if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0) + msg_pdbg(MSGHEADER "Output drivers disabled\n"); + else + msg_perr(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__); + } /* FIXME: fix sockets on windows(?), especially closing */ serialport_shutdown(&sp_fd); if (sp_max_write_n) Modified: trunk/serprog.h ============================================================================== --- trunk/serprog.h Sat Oct 27 02:34:18 2012 (r1617) +++ trunk/serprog.h Sat Oct 27 02:34:23 2012 (r1618) @@ -22,3 +22,4 @@ #define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ #define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ #define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ +#define S_CMD_S_PIN_STATE 0x15 /* Enable/disable output drivers */

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[commit] r1617 - in trunk: . Documentation
by repository service 27 Oct '12

27 Oct '12

Author: stefanct Date: Sat Oct 27 02:34:18 2012 New Revision: 1617 URL: http://flashrom.org/trac/flashrom/changeset/1617 Log: serprog: move the macro list to its own header file. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Added: trunk/serprog.h (contents, props changed) Modified: trunk/Documentation/serprog-protocol.txt trunk/serprog.c Modified: trunk/Documentation/serprog-protocol.txt ============================================================================== --- trunk/Documentation/serprog-protocol.txt Sat Oct 27 02:06:02 2012 (r1616) +++ trunk/Documentation/serprog-protocol.txt Sat Oct 27 02:34:18 2012 (r1617) @@ -92,28 +92,4 @@ In addition, support for these commands is recommended: S_CMD_Q_PGMNAME, S_CMD_Q_BUSTYPE, S_CMD_Q_CHIPSIZE (if parallel). - -This define listing should help C coders - (it's here to be the single source for copying - will be a .h someday i think) -#define S_ACK 0x06 -#define S_NAK 0x15 -#define S_CMD_NOP 0x00 /* No operation */ -#define S_CMD_Q_IFACE 0x01 /* Query interface version */ -#define S_CMD_Q_CMDMAP 0x02 /* Query supported commands bitmap */ -#define S_CMD_Q_PGMNAME 0x03 /* Query programmer name */ -#define S_CMD_Q_SERBUF 0x04 /* Query Serial Buffer Size */ -#define S_CMD_Q_BUSTYPE 0x05 /* Query supported bustypes */ -#define S_CMD_Q_CHIPSIZE 0x06 /* Query supported chipsize (2^n format) */ -#define S_CMD_Q_OPBUF 0x07 /* Query operation buffer size */ -#define S_CMD_Q_WRNMAXLEN 0x08 /* Query Write to opbuf: Write-N maximum length */ -#define S_CMD_R_BYTE 0x09 /* Read a single byte */ -#define S_CMD_R_NBYTES 0x0A /* Read n bytes */ -#define S_CMD_O_INIT 0x0B /* Initialize operation buffer */ -#define S_CMD_O_WRITEB 0x0C /* Write opbuf: Write byte with address */ -#define S_CMD_O_WRITEN 0x0D /* Write to opbuf: Write-N */ -#define S_CMD_O_DELAY 0x0E /* Write opbuf: udelay */ -#define S_CMD_O_EXEC 0x0F /* Execute operation buffer */ -#define S_CMD_SYNCNOP 0x10 /* Special no-operation that returns NAK+ACK */ -#define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ -#define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ -#define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ -#define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ +See also serprog.h. Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Sat Oct 27 02:06:02 2012 (r1616) +++ trunk/serprog.c Sat Oct 27 02:34:18 2012 (r1617) @@ -38,6 +38,7 @@ #include "flash.h" #include "programmer.h" #include "chipdrivers.h" +#include "serprog.h" #define MSGHEADER "serprog: " @@ -48,30 +49,6 @@ */ static int serprog_shutdown(void *data); -#define S_ACK 0x06 -#define S_NAK 0x15 -#define S_CMD_NOP 0x00 /* No operation */ -#define S_CMD_Q_IFACE 0x01 /* Query interface version */ -#define S_CMD_Q_CMDMAP 0x02 /* Query supported commands bitmap */ -#define S_CMD_Q_PGMNAME 0x03 /* Query programmer name */ -#define S_CMD_Q_SERBUF 0x04 /* Query Serial Buffer Size */ -#define S_CMD_Q_BUSTYPE 0x05 /* Query supported bustypes */ -#define S_CMD_Q_CHIPSIZE 0x06 /* Query supported chipsize (2^n format) */ -#define S_CMD_Q_OPBUF 0x07 /* Query operation buffer size */ -#define S_CMD_Q_WRNMAXLEN 0x08 /* Query opbuf-write-N maximum length */ -#define S_CMD_R_BYTE 0x09 /* Read a single byte */ -#define S_CMD_R_NBYTES 0x0A /* Read n bytes */ -#define S_CMD_O_INIT 0x0B /* Initialize operation buffer */ -#define S_CMD_O_WRITEB 0x0C /* Write opbuf: Write byte with address */ -#define S_CMD_O_WRITEN 0x0D /* Write to opbuf: Write-N */ -#define S_CMD_O_DELAY 0x0E /* Write opbuf: udelay */ -#define S_CMD_O_EXEC 0x0F /* Execute operation buffer */ -#define S_CMD_SYNCNOP 0x10 /* Special no-operation that returns NAK+ACK */ -#define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ -#define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ -#define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ -#define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */ - static uint16_t sp_device_serbuf_size = 16; static uint16_t sp_device_opbuf_size = 300; /* Bitmap of supported commands */ Added: trunk/serprog.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/serprog.h Sat Oct 27 02:34:18 2012 (r1617) @@ -0,0 +1,24 @@ +/* According to Serial Flasher Protocol Specification - version 1 */ +#define S_ACK 0x06 +#define S_NAK 0x15 +#define S_CMD_NOP 0x00 /* No operation */ +#define S_CMD_Q_IFACE 0x01 /* Query interface version */ +#define S_CMD_Q_CMDMAP 0x02 /* Query supported commands bitmap */ +#define S_CMD_Q_PGMNAME 0x03 /* Query programmer name */ +#define S_CMD_Q_SERBUF 0x04 /* Query Serial Buffer Size */ +#define S_CMD_Q_BUSTYPE 0x05 /* Query supported bustypes */ +#define S_CMD_Q_CHIPSIZE 0x06 /* Query supported chipsize (2^n format) */ +#define S_CMD_Q_OPBUF 0x07 /* Query operation buffer size */ +#define S_CMD_Q_WRNMAXLEN 0x08 /* Query Write to opbuf: Write-N maximum length */ +#define S_CMD_R_BYTE 0x09 /* Read a single byte */ +#define S_CMD_R_NBYTES 0x0A /* Read n bytes */ +#define S_CMD_O_INIT 0x0B /* Initialize operation buffer */ +#define S_CMD_O_WRITEB 0x0C /* Write opbuf: Write byte with address */ +#define S_CMD_O_WRITEN 0x0D /* Write to opbuf: Write-N */ +#define S_CMD_O_DELAY 0x0E /* Write opbuf: udelay */ +#define S_CMD_O_EXEC 0x0F /* Execute operation buffer */ +#define S_CMD_SYNCNOP 0x10 /* Special no-operation that returns NAK+ACK */ +#define S_CMD_Q_RDNMAXLEN 0x11 /* Query read-n maximum length */ +#define S_CMD_S_BUSTYPE 0x12 /* Set used bustype(s). */ +#define S_CMD_O_SPIOP 0x13 /* Perform SPI operation. */ +#define S_CMD_S_SPI_FREQ 0x14 /* Set SPI clock frequency */

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[commit] r1615 - trunk
by repository service 26 Oct '12

26 Oct '12

Author: stefanct Date: Fri Oct 26 18:49:15 2012 New Revision: 1615 URL: http://flashrom.org/trac/flashrom/changeset/1615 Log: Add support for Numonyx N25Q016 and N25Q032. The 32Mb version has 1.8V and 3.0V versions, the smaller one 1.8V only (or Numonyx/Micron forgot to publish it). Another difference is that the 16Mb chip has 32 kB subsectors (erase opcode 0x52). As long as there are no funky configurations like for the 128Mb chips, we got the smaller parts covered with this change. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Oct 23 15:06:46 2012 (r1614) +++ trunk/flashchips.c Fri Oct 26 18:49:15 2012 (r1615) @@ -5587,6 +5587,108 @@ { .vendor = "Numonyx", + .name = "N25Q016", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q016__1E, + .total_size = 2048, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q032..1E", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q032__1E, + .total_size = 4096, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q032..3E", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q032__3E, + .total_size = 4096, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Numonyx", .name = "N25Q064..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -5614,7 +5716,7 @@ }, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1700, 2000}, }, @@ -5647,7 +5749,7 @@ }, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, }, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Tue Oct 23 15:06:46 2012 (r1614) +++ trunk/flashchips.h Fri Oct 26 18:49:15 2012 (r1615) @@ -591,8 +591,11 @@ #define ST_M29W010B 0x23 #define ST_M29W040B 0xE3 #define ST_M29W512B 0x27 -#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, 64KB/4KB blocks/sectors */ -#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, 64KB/4KB blocks/sectors */ +#define ST_N25Q016__1E 0xBB15 /* N25Q016, 1.8V, (uniform sectors expected) */ +#define ST_N25Q032__3E 0xBA16 /* N25Q032, 3.0V, (uniform sectors expected) */ +#define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */ +#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */ +#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ #define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */ #define MVC_V29C51000T 0x00

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[PATCH] Remove exit calls from print_supported_chips
by Niklas Söderlund 23 Oct '12

23 Oct '12

Propagate the error code using return values instead. Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- cli_classic.c | 3 +-- flash.h | 2 +- print.c | 14 +++++++++----- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/cli_classic.c b/cli_classic.c index 4ae375c..7bcd4a6 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -363,8 +363,7 @@ int main(int argc, char *argv[]) #endif if (list_supported) { - print_supported(); - ret = 0; + ret = print_supported(); goto out; } diff --git a/flash.h b/flash.h index 4913536..0bb6c2b 100644 --- a/flash.h +++ b/flash.h @@ -214,7 +214,7 @@ void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); -void print_supported(void); +int print_supported(void); void print_supported_wiki(void); /* flashrom.c */ diff --git a/print.c b/print.c index eb99c07..49e9441 100644 --- a/print.c +++ b/print.c @@ -58,7 +58,7 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -static void print_supported_chips(void) +static int print_supported_chips(void) { const char *delim = "/"; const int mintoklen = 5; @@ -182,7 +182,7 @@ static void print_supported_chips(void) tmpven = malloc(strlen(chip->vendor) + 1); if (tmpven == NULL) { msg_gerr("Out of memory!\n"); - exit(1); + return 1; } strcpy(tmpven, chip->vendor); @@ -206,7 +206,7 @@ static void print_supported_chips(void) tmpdev = malloc(strlen(chip->name) + 1); if (tmpdev == NULL) { msg_gerr("Out of memory!\n"); - exit(1); + return 1; } strcpy(tmpdev, chip->name); @@ -320,6 +320,8 @@ static void print_supported_chips(void) } msg_ginfo("\n"); } + + return 0; } #if CONFIG_INTERNAL == 1 @@ -431,9 +433,10 @@ static void print_supported_boards_helper(const struct board_info *boards, } #endif -void print_supported(void) +int print_supported(void) { - print_supported_chips(); + if (print_supported_chips()) + return 1; msg_ginfo("\nSupported programmers:\n"); list_programmers_linebreak(0, 80, 0); @@ -547,6 +550,7 @@ void print_supported(void) programmer_table[PROGRAMMER_LINUX_SPI].name); msg_ginfo("Device files /dev/spidev*.*\n"); #endif + return 0; } #if CONFIG_INTERNAL == 1 -- 1.7.12.3

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[commit] r1614 - trunk
by repository service 23 Oct '12

23 Oct '12

Author: stefanct Date: Tue Oct 23 15:06:46 2012 New Revision: 1614 URL: http://flashrom.org/trac/flashrom/changeset/1614 Log: Remove exit calls from print_supported_chips. Propagate the error code using return values instead, but let cli_classic.c still decide the ultimate return value of the process. Also, remove setting the ret value again after print_supported_wiki() - success is the default. Signed-off-by: Niklas Söderlund <niso(a)kth.se> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/cli_classic.c trunk/flash.h trunk/print.c Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Sat Oct 20 11:13:16 2012 (r1613) +++ trunk/cli_classic.c Tue Oct 23 15:06:46 2012 (r1614) @@ -357,14 +357,13 @@ #if CONFIG_PRINT_WIKI == 1 if (list_supported_wiki) { print_supported_wiki(); - ret = 0; goto out; } #endif if (list_supported) { - print_supported(); - ret = 0; + if (print_supported()) + ret = 1; goto out; } Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sat Oct 20 11:13:16 2012 (r1613) +++ trunk/flash.h Tue Oct 23 15:06:46 2012 (r1614) @@ -214,7 +214,7 @@ /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); -void print_supported(void); +int print_supported(void); void print_supported_wiki(void); /* flashrom.c */ Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Oct 20 11:13:16 2012 (r1613) +++ trunk/print.c Tue Oct 23 15:06:46 2012 (r1614) @@ -58,7 +58,7 @@ return ret; } -static void print_supported_chips(void) +static int print_supported_chips(void) { const char *delim = "/"; const int mintoklen = 5; @@ -182,7 +182,7 @@ tmpven = malloc(strlen(chip->vendor) + 1); if (tmpven == NULL) { msg_gerr("Out of memory!\n"); - exit(1); + return 1; } strcpy(tmpven, chip->vendor); @@ -206,7 +206,7 @@ tmpdev = malloc(strlen(chip->name) + 1); if (tmpdev == NULL) { msg_gerr("Out of memory!\n"); - exit(1); + return 1; } strcpy(tmpdev, chip->name); @@ -320,6 +320,8 @@ } msg_ginfo("\n"); } + + return 0; } #if CONFIG_INTERNAL == 1 @@ -431,9 +433,10 @@ } #endif -void print_supported(void) +int print_supported(void) { - print_supported_chips(); + if (print_supported_chips()) + return 1; msg_ginfo("\nSupported programmers:\n"); list_programmers_linebreak(0, 80, 0); @@ -547,6 +550,7 @@ programmer_table[PROGRAMMER_LINUX_SPI].name); msg_ginfo("Device files /dev/spidev*.*\n"); #endif + return 0; } #if CONFIG_INTERNAL == 1

1 0

[PATCH] Enable VX855 chipset
by John Schmerge 21 Oct '12

21 Oct '12

This patch adds support for the Via VX855 chipset

4 8

CHIPSET: TYAN Thunder K8WE S2895
by Tony Freeman 21 Oct '12

21 Oct '12

*Hello,* * * *As per output from the program:* *=========================* [root@monarch ~]# flashrom --programmer internal flashrom v0.9.6.1-r1613 on Linux 2.6.32-279.11.1.el6.x86_64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA CK804". Enabling flash write... OK. WARNING: unexpected second chipset match: "NVIDIA CK804" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000. No operations were specified. *And here's the lspci:* *================* [root@monarch ~]# lspci 00:00.0 Memory controller: NVIDIA Corporation CK804 Memory Controller (rev a3) 00:01.0 ISA bridge: NVIDIA Corporation CK804 ISA Bridge (rev a3) 00:01.1 SMBus: NVIDIA Corporation CK804 SMBus (rev a2) 00:02.0 USB controller: NVIDIA Corporation CK804 USB Controller (rev a2) 00:02.1 USB controller: NVIDIA Corporation CK804 USB Controller (rev a3) 00:04.0 Multimedia audio controller: NVIDIA Corporation CK804 AC'97 Audio Controller (rev a2) 00:06.0 IDE interface: NVIDIA Corporation CK804 IDE (rev a2) 00:07.0 IDE interface: NVIDIA Corporation CK804 Serial ATA Controller (rev a3) 00:08.0 IDE interface: NVIDIA Corporation CK804 Serial ATA Controller (rev a3) 00:09.0 PCI bridge: NVIDIA Corporation CK804 PCI Bridge (rev a2) 00:0a.0 Bridge: NVIDIA Corporation CK804 Ethernet Controller (rev a3) 00:0e.0 PCI bridge: NVIDIA Corporation CK804 PCIE Bridge (rev a3) 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 00:19.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:19.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:19.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:19.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 01:05.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22A IEEE-1394a-2000 Controller (PHY/Link) [iOHCI-Lynx] 02:00.0 VGA compatible controller: NVIDIA Corporation NV45 [GeForce 6800 GTO] (rev a2) 08:0a.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge (rev 12) 08:0a.1 PIC: Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC (rev 01) 08:0b.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge (rev 12) 08:0b.1 PIC: Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC (rev 01) 80:00.0 Memory controller: NVIDIA Corporation CK804 Memory Controller (rev a3) 80:01.0 Memory controller: NVIDIA Corporation CK804 Memory Controller (rev a3) 80:0a.0 Bridge: NVIDIA Corporation CK804 Ethernet Controller (rev a3) 80:0e.0 PCI bridge: NVIDIA Corporation CK804 PCIE Bridge (rev a3)

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