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Re: [flashrom] N25Q128 and EliteBook
by Stefan Tauner 20 Mar '13

20 Mar '13

On Wed, 20 Mar 2013 19:09:07 +0400 Vasiliy Vylegzhanin <coder(a)npo-echelon.ru> wrote: > Warning: Setting Bios Control at 0xdc from 0x0a to 0x0b on QM77 failed. I did miss that line in the first mail. Your BIOS traps the access to that register and reverts it in SMM so that the general write protection of the flash chip remains enabled. See also the mail titled "success hacking DELL Dimension 4100" with the same underlying problem. Sadly the exact hack was not posted (yet), you may wanna ping Bertho to send his solution. > 0x74: 0x8fff0f70 PR0: Warning: 0x00f70000-0x00ffffff is read-only. While that's not the problem, you need to take that range into account to. It is probably the boot sector. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Successful read on HP ProBook 4320s (HM57)
by Vasiliy Vylegzhanin 20 Mar '13

20 Mar '13

Hi, appying patches from http://patchwork.coreboot.org/user/bundle/37/ makes it possible to read non-blocked regions on HP ProBook 4320s. HM57 is marked untested, so here is read log (attached).

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Re: [flashrom] N25Q128 and EliteBook
by Vasiliy Vylegzhanin 20 Mar '13

20 Mar '13

Full write log attached. On Wed, Mar 20, 2013 at 7:07 PM, Vasiliy Vylegzhanin <coder(a)npo-echelon.ru> wrote: > On Tue, Mar 19, 2013 at 9:33 PM, Stefan Tauner > <stefan.tauner(a)student.tuwien.ac.at> wrote: >> On Tue, 19 Mar 2013 21:12:55 +0400 >> Vasiliy Vylegzhanin <coder(a)npo-echelon.ru> wrote: >> >>> Hi! >>> >>> I've got HP EliteBook 9470m, which contains (according to ID, didn't check) >>> Numonyx N25Q128. So I added this chip to flashrom, but anything except >>> probe fails with transaction error: >>> >>> Reading flash... Transaction error! >>> SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 >>> SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=4 >>> Running OPCODE 0x03 failed at address 0x003000 (payload length was 64). >>> Read operation failed! >>> >>> Can anything be done here? Logs attached. Patch (dirty) below. >> >> Hi, >> >> the transaction error comes from the chipset configuration which >> read-protects the ME region and has nothing to do with the flash >> chip/your patch. Please search the mailing list archive and take a look >> at the Documentation directory of flashrom regarding problems with the >> locked ME region. Short answer: if you need to access the whole chip, >> use an external programmer. >> There is a hard coded override in some HP firmwares that might be worth >> a try before that, try win, left arrow, right arrow (all at once i >> think) as you turn on the laptop. >> >> Thanks very much for showing your patch. No need to clean it up and >> submit it again though, because we are working on our own version >> already, see also >> http://patchwork.coreboot.org/patch/3652/ >> Sorry for not having it integrated already :) >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> > > Well, I've tried to read only BIOS region (ported patch 3 from > http://patchwork.coreboot.org/user/bundle/37/) and succeeded. > But erase operation fails with transaction error: > > Erasing and writing flash chip... Trying erase function 0... > 0x000000-0x000fff:S, <snip> 0xd3e000-0xd3efff:S, > 0xd3f000-0xd3ffff:ETransaction error! > SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 > SSFC: SCGO=0, ACS=1, SPOP=0, COP=4, DBC=0, SME=0, SCF=4 > Running OPCODE 0x20 failed at address 0xd3f000 (payload length was 0). > spi_block_erase_20 failed during command execution at address 0xd3f000 > > Is it chip or laptop issue?

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Re: [flashrom] N25Q128 and EliteBook
by Stefan Tauner 20 Mar '13

20 Mar '13

On Tue, 19 Mar 2013 21:12:55 +0400 Vasiliy Vylegzhanin <coder(a)npo-echelon.ru> wrote: > Hi! > > I've got HP EliteBook 9470m, which contains (according to ID, didn't check) > Numonyx N25Q128. So I added this chip to flashrom, but anything except > probe fails with transaction error: > > Reading flash... Transaction error! > SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 > SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=4 > Running OPCODE 0x03 failed at address 0x003000 (payload length was 64). > Read operation failed! > > Can anything be done here? Logs attached. Patch (dirty) below. Hi, the transaction error comes from the chipset configuration which read-protects the ME region and has nothing to do with the flash chip/your patch. Please search the mailing list archive and take a look at the Documentation directory of flashrom regarding problems with the locked ME region. Short answer: if you need to access the whole chip, use an external programmer. There is a hard coded override in some HP firmwares that might be worth a try before that, try win, left arrow, right arrow (all at once i think) as you turn on the laptop. Thanks very much for showing your patch. No need to clean it up and submit it again though, because we are working on our own version already, see also http://patchwork.coreboot.org/patch/3652/ Sorry for not having it integrated already :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] enable NVIDIA MCP89 chipset
by James Laird 20 Mar '13

20 Mar '13

Hello, I have successfully read from an MCP89 chipset. Have not tested write (it's a laptop: macbookpro 7,1). Flash chip is an SST25VF032B (SPI). MCP-init log fragment: ---------------------------- snip --------------------------------------- Found chipset "NVIDIA MCP89" with PCI ID 10de:0d80. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:0d79 at 00:03:2 MCP SPI BAR is at 0xd3400000 Mapping NVIDIA MCP6x SPI at 0xd3400000, unaligned size 0x544. SPI control is 0xc145, req=1, gnt=1 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. ----------------------------- snip --------------------------------------- Patch follows. Cheerio, James Signed-Off-By: James Laird <jhl(a)mafipulation.org> Index: chipset_enable.c =================================================================== --- chipset_enable.c (revision 1657) +++ chipset_enable.c (working copy) @@ -1380,6 +1380,7 @@ {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x0d80, NT, "NVIDIA", "MCP89", enable_flash_mcp6x_7x}, /* VIA northbridges */ {0x1106, 0x0585, NT, "VIA", "VT82C585VPX", via_no_byte_merge}, {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge},

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N25Q128 and EliteBook
by Vasiliy Vylegzhanin 19 Mar '13

19 Mar '13

Hi! I've got HP EliteBook 9470m, which contains (according to ID, didn't check) Numonyx N25Q128. So I added this chip to flashrom, but anything except probe fails with transaction error: Reading flash... Transaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=4 Running OPCODE 0x03 failed at address 0x003000 (payload length was 64). Read operation failed! Can anything be done here? Logs attached. Patch (dirty) below. -- diff -Nur flashrom/flashchips.c flashrom-m/flashchips.c --- flashrom/flashchips.c 2013-03-19 21:06:22.307763803 +0400 +++ flashrom-m/flashchips.c 2013-03-19 19:04:42.000000000 +0400 @@ -6561,6 +6561,40 @@ }, { + .vendor = "Numonyx", + .name = "N25Q128", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q128, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "PMC", .name = "Pm25LV010", .bustype = BUS_SPI, diff -Nur flashrom/flashchips.h flashrom-m/flashchips.h --- flashrom/flashchips.h 2013-03-19 21:06:24.747763812 +0400 +++ flashrom-m/flashchips.h 2013-03-19 19:05:12.000000000 +0400 @@ -615,6 +615,7 @@ #define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */ #define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */ #define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ +#define ST_N25Q128 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */ #define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */ #define MVC_V29C51000T 0x00

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flashrom patch for ST Micro Connect Lite
by Reimer Prochnow 19 Mar '13

19 Mar '13

Hello, I'd like to summit a simple patch for a ST Micro Connect Lite for use witch flashrom (R.1657) The device is FT2232H based (second channel used by serial port) and it is sufficient to add VID / PID: http://pastebin.com/Am6Kt4AX I successfully read a Winbond W25Q80. Thanks for your work. -- Mit freundlichen Grüßen Reimer Prochnow ------------------------------------------------------------------------ Reimer Prochnow

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Re: [flashrom] SST29EE010 ERASE WRITE
by Stefan Tauner 19 Mar '13

19 Mar '13

On Sun, 17 Mar 2013 14:15:49 +0100 (CET) mailsanmich(a)gmx.li wrote: Please use English so that everyone subscribed can understand you. > ja, ich habe den Chip wirklich erfolgreich beschrieben. Habe den Durchlauf für die Ausgabe der Infos wiederholt. You may have tested it again, but you did not attach a log containing a successful write ;) > Außerdem habe gestern noch mit einer 3com Netzwerkkarte den onboard Chip beschrieben, der bisher auch nicht als unterstützt für WRITE aufgeführt war. Wenn ich die Karte das nächste Mal in den Fingern habe, dann schicke ich dir das Log. Looking forward to it, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Emulating a flash chip for a real device
by Adam Nielsen 19 Mar '13

19 Mar '13

Hi all, I have just purchased a network-connected video camera which runs Linux, and I would like to experiment with creating my own firmware for it. Since I am likely to brick the device a few times with this, I'd like to come up with a way of recovering it before I start. The firmware (bootloader + kernel) is stored inside a 4MB SPI flash chip supported by flashrom, however it is soldered onto the board, so presumably to reflash it I will have to desolder at least one of the pins to avoid the flashrom commands getting tangled up with those sent by the device itself when reading the chip. However I was thinking that instead of reflashing the entire chip every time something goes wrong, it would be a lot easier if I could produce my firmware image as a 4MB file, and emulate the chip so that the file is accessed directly every time the camera tries to read from the flash chip. I see flashrom can already emulate some chips with the 'dummy' programmer, and as most (all?) programmers can both read and write data I am wondering whether it is possible to set flashrom up as a virtual flash chip connected to a real circuit, responding to read and write commands received from other chips in the device. I plan to use a Bus Pirate as a programmer, so if I remove the flash chip and connect the Bus Pirate to the circuit instead, being able to edit a file and reset the device without actually reflashing anything would be a huge time saver. If this isn't currently possible, would it be a big job to add support for it? Thanks, Adam.

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Report: LENOVO Product Name 5ECN33WW(V2.03) read
by dpcimanager＠users.sourceforge.net 19 Mar '13

19 Mar '13

flashrom v0.9.6.1-r1653 on Darwin 12.3.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.10, LLVM Clang 4.2 (clang-425.0.24), little endian Command line (5 args): ~/Desktop/DPCIManager/DPCIManager.app/Contents/MacOS/flashrom -VV -r /var/folders/x1/14s3qqgs0bq1ppvk191vwyt80000gn/T/DPCIr7QqhH.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 422M loops per second, 10 myus = 10 us, 100 myus = 115 us, 1000 myus = 1079 us, 10000 myus = 9896 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. DMI string system-manufacturer: "LENOVO" DMI string system-product-name: "Lenovo G580" DMI string system-version: "Lenovo G580" DMI string baseboard-manufacturer: "LENOVO" DMI string baseboard-product-name: "Product Name" DMI string baseboard-version: "Mainboard version " DMI string chassis-type: "Notebook" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

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