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AT25F512 recognized as AT25F1024
by Chi Zhang 19 Apr '13

19 Apr '13

Recently I got an AT25F512(no A) chip from my old nVidia Geforce FX 5200 card. However, flashrom seems to recognize it as AT25F1024: flashrom -p serprog:dev=/dev/ttyACM0:4000000,spispeed=1000000 flashrom v0.9.6.1-r1658 on Linux 3.2.0-39-generic (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. serprog: Programmer name is "serprog-STM32VCP" Found Atmel flash chip "AT25F1024(A)" (128 kB, SPI) on serprog. No operations were specified. The detailed log with -VV canbe found at: http://paste.flashrom.org/view.php?id=1568

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Re: [flashrom] [PATCH 2/2] Add support for PMC Pm25LD series.
by Stefan Tauner 19 Apr '13

19 Apr '13

On Tue, 2 Apr 2013 02:59:58 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > This patch adds support for > - Pm25LD256C > - Pm25LD512(C) > - Pm25LD010(C) > - Pm25LD020(C) > - Pm25LD040(C) > > These seem to be the successors of the Pm25LV series. > The main difference seems to be the dual I/O and additional erase opcodes. > Some support an additional, complex locking register (maybe all of the > above, but available datahsheets do not indicate it for all). > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> refined, self-acked and committed in r1671. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 1/2] Refine PMC Pm25LV series.
by Stefan Tauner 19 Apr '13

19 Apr '13

On Tue, 2 Apr 2013 02:59:57 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > - Resort > - Add Pm25LV512A and Pm25LV010A > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> refined and committed in r1670. the non-RDID probes in the datasheet are really spooky, any comments/insights/flames welcome. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1671 - trunk
by repository service 19 Apr '13

19 Apr '13

Author: stefanct Date: Fri Apr 19 03:59:15 2013 New Revision: 1671 URL: http://flashrom.org/trac/flashrom/changeset/1671 Log: Add support for PMC Pm25LD series. This patch adds support for - Pm25LD256C - Pm25LD512(C) - Pm25LD010(C) - Pm25LD020(C) - Pm25LD040(C) These seem to be the successors of the Pm25LV series. The main difference seems to be the dual I/O and additional erase opcodes. Some support an additional, complex locking register (maybe all of the above, but available datahsheets do not indicate it for all). The Pm25LD512C was tested by Chi Zhang: http://paste.flashrom.org/view.php?id=1579 Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h trunk/spi25_statusreg.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Apr 19 03:58:33 2013 (r1670) +++ trunk/flashchips.c Fri Apr 19 03:59:15 2013 (r1671) @@ -6562,6 +6562,195 @@ { .vendor = "PMC", + .name = "Pm25LD256C", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD256C, + .total_size = 32, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 8} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 1} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, + }, + { + .vendor = "PMC", + .name = "Pm25LD512(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2300, 3600}, + }, + + { + .vendor = "PMC", + .name = "Pm25LD010(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD010, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, /* 2.3-3.6V for Pm25LD010 */ + }, + + { + .vendor = "PMC", + .name = "Pm25LD020(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LD020, + .total_size = 256, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, /* FIXME: C version supports "Safe Guard" */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, /* 2.3-3.6V for Pm25LD020 */ + }, + + { + .vendor = "PMC", + .name = "Pm25LD040(C)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LV040, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, /* 2.3-3.6V for Pm25LD040 */ + }, + +{ + .vendor = "PMC", .name = "Pm25LV512(A)", .bustype = BUS_SPI, .manufacture_id = PMC_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Fri Apr 19 03:58:33 2013 (r1670) +++ trunk/flashchips.h Fri Apr 19 03:59:15 2013 (r1671) @@ -450,6 +450,7 @@ /* * Programmable Micro Corp is listed in JEP106W in bank 2, so it should * have a 0x7F continuation code prefix. + * Apparently this name is owned by "Chingis Technology Corporation" http://www.chingistek.com. */ #define PMC_ID 0x7F9D /* PMC */ #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */ @@ -460,7 +461,7 @@ #define PMC_PM25LV512 0x7B /* Same as Pm25LV512A */ #define PMC_PM25LV010 0x7C /* Same as Pm25LV010A, but the former does not support RDID but RES3 only. */ #define PMC_PM25LV020 0x7D -#define PMC_PM25LV040 0x7E +#define PMC_PM25LV040 0x7E /* Same as PM25LD040(C), but the latter supports more features. */ #define PMC_PM25LV080B 0x13 #define PMC_PM25LV016B 0x14 #define PMC_PM29F002T 0x1D Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Fri Apr 19 03:58:33 2013 (r1670) +++ trunk/spi25_statusreg.c Fri Apr 19 03:59:15 2013 (r1671) @@ -262,6 +262,7 @@ /* Works for many chips of the * AMIC A25L series + * PMC Pm25LD series */ int spi_prettyprint_status_register_default_bp2(struct flashctx *flash) {

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[commit] r1670 - trunk
by repository service 19 Apr '13

19 Apr '13

Author: stefanct Date: Fri Apr 19 03:58:33 2013 New Revision: 1670 URL: http://flashrom.org/trac/flashrom/changeset/1670 Log: Refine PMC Pm25LV series. - Add missing bits and resort chips - Refine Pm25LV512(A) and Pm25LV010 Due to manufacturer ID continuation this one needs a new probing function: probe_spi_res3() which should be refactored in the future. The datasheet describes a very weird order of ID bytes: Vendor byte, model byte, vendor continuation byte. Let's pretend we did not read that or the datasheet is bogus (although the datasheet of the successor series describes the same but luckily additionally to RDID). - Add Pm25LV010A This was tested by Chi Zhang: http://paste.flashrom.org/view.php?id=1573 Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi25.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sat Apr 13 02:29:30 2013 (r1669) +++ trunk/chipdrivers.h Fri Apr 19 03:58:33 2013 (r1670) @@ -38,6 +38,7 @@ int probe_spi_rems(struct flashctx *flash); int probe_spi_res1(struct flashctx *flash); int probe_spi_res2(struct flashctx *flash); +int probe_spi_res3(struct flashctx *flash); int probe_spi_at25f(struct flashctx *flash); int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Apr 13 02:29:30 2013 (r1669) +++ trunk/flashchips.c Fri Apr 19 03:58:33 2013 (r1670) @@ -6562,6 +6562,38 @@ { .vendor = "PMC", + .name = "Pm25LV512(A)", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LV512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_res3, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp1, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "PMC", .name = "Pm25LV010", .bustype = BUS_SPI, .manufacture_id = PMC_ID, @@ -6570,7 +6602,7 @@ .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, - .probe = probe_spi_rdid, + .probe = probe_spi_res3, .probe_timing = TIMING_ZERO, .block_erasers = { @@ -6585,48 +6617,42 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, { .vendor = "PMC", - .name = "Pm25LV016B", + .name = "Pm25LV010A", .bustype = BUS_SPI, .manufacture_id = PMC_ID, - .model_id = PMC_PM25LV016B, - .total_size = 2048, + .model_id = PMC_PM25LV010, + .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { - .eraseblocks = { {4 * 1024, 512} }, + .eraseblocks = { {4 * 1024, 32} }, .block_erase = spi_block_erase_d7, }, { - .eraseblocks = { {4 * 1024, 512} }, - .block_erase = spi_block_erase_20, - }, { - .eraseblocks = { {64 * 1024, 32} }, + .eraseblocks = { {32 * 1024, 4} }, .block_erase = spi_block_erase_d8, }, { - .eraseblocks = { {2 * 1024 * 1024, 1} }, - .block_erase = spi_block_erase_60, - }, { - .eraseblocks = { {2 * 1024 * 1024, 1} }, + .eraseblocks = { {128 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, @@ -6655,7 +6681,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6687,10 +6713,10 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, @@ -6725,20 +6751,20 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, { .vendor = "PMC", - .name = "Pm25LV512", + .name = "Pm25LV016B", .bustype = BUS_SPI, .manufacture_id = PMC_ID, - .model_id = PMC_PM25LV512, - .total_size = 64, + .model_id = PMC_PM25LV016B, + .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, @@ -6747,20 +6773,26 @@ .block_erasers = { { - .eraseblocks = { {4 * 1024, 16} }, + .eraseblocks = { {4 * 1024, 512} }, .block_erase = spi_block_erase_d7, }, { - .eraseblocks = { {32 * 1024, 2} }, + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, .block_erase = spi_block_erase_d8, }, { - .eraseblocks = { {64 * 1024, 1} }, + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Apr 13 02:29:30 2013 (r1669) +++ trunk/flashchips.h Fri Apr 19 03:58:33 2013 (r1670) @@ -453,8 +453,12 @@ */ #define PMC_ID 0x7F9D /* PMC */ #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */ -#define PMC_PM25LV512 0x7B -#define PMC_PM25LV010 0x7C +#define PMC_PM25LD256C 0x2F +#define PMC_PM25LD512 0x20 /* Same as Pm25LD512C, but the latter has more locking options. */ +#define PMC_PM25LD010 0x21 /* Same as Pm25LD010C, but the latter has more locking options. */ +#define PMC_PM25LD020 0x22 /* Same as Pm25LD020C, but the latter has more locking options. */ +#define PMC_PM25LV512 0x7B /* Same as Pm25LV512A */ +#define PMC_PM25LV010 0x7C /* Same as Pm25LV010A, but the former does not support RDID but RES3 only. */ #define PMC_PM25LV020 0x7D #define PMC_PM25LV040 0x7E #define PMC_PM25LV080B 0x13 Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Sat Apr 13 02:29:30 2013 (r1669) +++ trunk/spi25.c Fri Apr 19 03:58:33 2013 (r1670) @@ -279,6 +279,26 @@ return 1; } +int probe_spi_res3(struct flashctx *flash) +{ + unsigned char readarr[3]; + uint32_t id1, id2; + + if (spi_res(flash, readarr, 3)) { + return 0; + } + + id1 = (readarr[0] << 8) | readarr[1]; + id2 = readarr[2]; + + msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); + + if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) + return 0; + + return 1; +} + /* Only used for some Atmel chips. */ int probe_spi_at25f(struct flashctx *flash) {

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Re: [flashrom] Intel QM67 - Macronix MX25L6405 flash read problem
by Stefan Tauner 18 Apr '13

18 Apr '13

On Fri, 19 Apr 2013 00:20:54 +0300 George Ciobanu <mrg2k8(a)gmail.com> wrote: > Hello, > > It's me again. I had some free time so I decided to disassemble the > notebook and to wire it directly to the arduino, using Simon Inns' > schematic. I didn't desolder the chip. > > I've hit a roadblock, though. I get this message: *Probing for Macronix > MX25L6405(D), 8192 kB: RDID byte 0 parity violation. > probe_spi_rdid_generic: id1 0xff, id2 0xffff* > * > * > I tried patching flashrom with http://patchwork.coreboot.org/patch/3851/, > still with no luck. I am sure the flash model is correct, because I can > read it on the capsule. > > I've attached the logs, with and without the -c option. > > In the hope that a solution will arise, > I thank you again. Hello George, the output of the chip as seen by the arduino toggles a lot between the correct output and all high (or some corrupt bits too). This usually indicates a cabling problem. You should not need any patches additional to what is in our subversion repository's HEAD, just check that the connections are good (better :). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] Intel QM67 - Macronix MX25L6405 flash read problem
by Stefan Tauner 18 Apr '13

18 Apr '13

On Fri, 15 Mar 2013 15:56:28 +0200 George Ciobanu <mrg2k8(a)gmail.com> wrote: > I've tried to read the contents of the memory in the subject, but it > failed. I'm using a Panasonic CF-53 Toughbook and I have attached the > verbose output. > 0x5C: 0x057f0003 FREG2: Warning: Management Engine region (0x00003000-0x0057ffff) is locked. Hello George, thanks for your report! The problem is the locked ME region as quoted above. We are working on unlocking it or working around it, but intel does not provide us any documentation so please do not expect a solution soon (or ever). > Do you think that I will be able to read the memory using serprog and an > Arduino, unsoldering it from the motherboard or will flashrom just give the > same error? The problem is the configuration of the mainboard chipset. Outside of the board flashrom will definitely be able to read and write the chip (there is a minor problem of misdetecting the MX25L6405 because Macronix used the same ID for different chips, but there is a patch for that http://patchwork.coreboot.org/patch/3851/ and a quick hack that you could apply locally is just a simple number change). You might be able to access the flash chip while it is still soldered, so that you do not need to desolder it (completely), see http://flashrom.org/ISP If you need to read the BIOS region only, there is a complete software-based solution too. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH 2/2] sbxxx: hack to disable fast reads and force lowest possible SPI clock
by Stefan Tauner 18 Apr '13

18 Apr '13

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- sb600spi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sb600spi.c b/sb600spi.c index 42a0ece..95e5ad1 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -246,6 +246,16 @@ int sb600_probe_spi(struct pci_dev *dev) msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", tmp & 0x1, (tmp & 0x20) >> 5); tmp = mmio_readl(sb600_spibar); + if (((tmp >> 18) & 0x3) != 0) { + msg_pdbg("Disabling fast reads and setting SPI clock to 16.5 MHz..."); + tmp &= ~(0x3 << 18); + mmio_writel(tmp, sb600_spibar); + mmio_writeb(mmio_readb(sb600_spibar + 0xd) | (0x3 << 4), sb600_spibar + 0xd); + + tmp = mmio_readl(sb600_spibar); + msg_pdbg(" done\n"); + } + /* FIXME: If SpiAccessMacRomEn or SpiHostAccessRomEn are zero on * SB700 or later, reads and writes will be corrupted. Abort in this * case. Make sure to avoid this check on SB600. -- Kind regards, Stefan Tauner

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[PATCH 1/2] sbxxx: spibar[0] debug print refinements
by Stefan Tauner 18 Apr '13

18 Apr '13

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flash.h | 1 + sb600spi.c | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/flash.h b/flash.h index 6ff691a..1857cc0 100644 --- a/flash.h +++ b/flash.h @@ -24,6 +24,7 @@ #ifndef __FLASH_H__ #define __FLASH_H__ 1 +#include <inttypes.h> #include <stdint.h> #include <stddef.h> #ifdef _WIN32 diff --git a/sb600spi.c b/sb600spi.c index fe60aa9..42a0ece 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -211,7 +211,7 @@ int sb600_probe_spi(struct pci_dev *dev) uint32_t tmp; uint8_t reg; static const char *const speed_names[4] = { - "Reserved", "33", "22", "16.5" + "66", "33", "22", "16.5" }; /* Read SPI_BaseAddr */ @@ -250,10 +250,10 @@ int sb600_probe_spi(struct pci_dev *dev) * SB700 or later, reads and writes will be corrupted. Abort in this * case. Make sure to avoid this check on SB600. */ - msg_pdbg("SpiArbEnable=%i, SpiAccessMacRomEn=%i, " + msg_pdbg("(0x08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, " "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", - (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, + (tmp >> 18) & 0x3, (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; -- Kind regards, Stefan Tauner

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[PATCH 0/2] AMD sbxxx hacks.
by Stefan Tauner 18 Apr '13

18 Apr '13

andor had some problems with how coreboot configured the SPI controller. let's see if this hack fixes that. Stefan Tauner (2): sbxxx: spibar[0] debug print refinements sbxxx: hack to disable fast reads and force lowest possible SPI clock flash.h | 1 + sb600spi.c | 16 +++++++++++++--- 2 files changed, 14 insertions(+), 3 deletions(-) -- Kind regards, Stefan Tauner

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