flashrom April 2022

flashrom@flashrom.org

24 participants
24 discussions

[GSoC 2022] Restructure Shutdown Function
by Joursoir 13 Apr '22

13 Apr '22

Good day, I am a student and very interested in flashrom. I fit the description of experienced C programmer. Open-source and low-level programming are my interests. I already have real experience with flashrom (CH341A programmer + chip "MX25L6436E") and want to become a GSoC 2022 contributor in this project. I find the "Restructure Shutdown Function" project interestring to me. But right now it has no mentors. Maybe someone from the mailing can help me. I have gone through sources and understand how things are now. The project description says "have a defined shutdown function in the programmer API". But we already have it. It's programmer_shutdown(). Or no? The first and easiest thing that comes to my mind is to refuse using callbacks and use enums, thusly: enum shutdown_func { SERPROG = 1 << 0, SPI = 1 << 1, ... }; int programmer_shutdown(enum shutdown_func execfunc) { ... if(execfunc & SERPROG) ret |= serprog_shutdown(...); if(execfunc & SPI) { /* the problem is that SPI programmers have own shutdown funcs, like dlc5_shutdown, byteblaster_shutdown, stlinkv3_spi_shutdown, so use struct spi_master, that contains shutdown callback */ ret |= spi_master_shutdown(...); } ... } This system has disadvantages, but it'll make easier to track the code flow. What are the potential problems in this implementation? What's with struct flashrom_programmer? Is not implemented yet? I would appreciate any feedback. -- Joursoir

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Future of DirectHW
by Thomas Heijligen 12 Apr '22

12 Apr '22

Hi, is there someone in the flashrom community who has worked with DirectHW and knows if it's still working on supported MacOS systems? I want to figure out how to deal with it in the future of flashrom. -- Thomas

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Couldn't parse the descriptor?
by Pete Smith 11 Apr '22

11 Apr '22

I'm using a Raspberry Pi Zero and SOIC clip to communicate with a MX25L12873F chip, using flashrom built from master branch (1b1066e). Reading the chip is working fine, no matter how many times I do a read operation, the resulting firmware image is correct. However, I'm unable to write to the chip: ======================================================================== flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -c \ MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F \ -w firmware.bin --ifd -i fd -i bios -i me --noverify-all -VVV -o out.log Initializing linux_spi programmer Using device /dev/spidev0.0 Using 1000kHz clock get_max_kernel_buf_size: Using value from \ /sys/module/spidev/parameters/bufsiz as max buffer size. linux_spi_init: max_kernel_buf_size: 4096 The following protocols are supported: SPI. Probing for Macronix \ MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F, \ 16384 kB: programmer_map_flash_region: mapping \ MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F from \ 0xff000000 to 0x00000000 RDID returned 0xc2 0x20 0x18. compare_id: id1 0xc2, id2 0x2018 Added layout entry 00000000 - 00ffffff named complete flash Found Macronix flash chip \ "MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F" \ (16384 kB, SPI) on linux_spi. Chip status register is 0x7c. Chip status register: Status Register Write Disable (SRWD, SRP, ...) \ is not set Chip status register: Bit 6 is set Chip status register: Block Protect 3 (BP3) is set Chip status register: Block Protect 2 (BP2) is set Chip status register: Block Protect 1 (BP1) is set Chip status register: Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set programmer_unmap_flash_region: unmapped 0x00000000 This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to \ completely clone the contents of this chip (see man page for details). programmer_map_flash_region: mapping \ MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F from \ 0xff000000 to 0x00000000 Some block protection in effect, disabling... \ Block protection could not be disabled! Chip status register is 0x7c. Chip status register: Status Register Write Disable (SRWD, SRP, ...) \ is not set Chip status register: Bit 6 is set Chip status register: Block Protect 3 (BP3) is set Chip status register: Block Protect 2 (BP2) is set Chip status register: Block Protect 1 (BP1) is set Chip status register: Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Reading ich descriptor... done. layout_from_ich_descriptors():1367, returned with value -1. Couldn't parse the descriptor! Illegal instruction ======================================================================== On an identical system, I have been using the flashrom internal programmer to write the same firmware image without any errors parsing the descriptor. Any ideas why this happens? I'm a doing something wrong? Thanks. Best regards, Pete Smith

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Invitation: Flashrom Dev Meeting (monthly) @ Every 2 weeks from 8am to 9am on Thursday (CEST) (flashrom@flashrom.org)
by felix.singer12＠gmail.com 11 Apr '22

11 Apr '22

You have been invited to the following event. Title: Flashrom Dev Meeting (monthly) Monthly meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… When: Every 2 weeks from 8am to 9am on Thursday Central European Time - Berlin Joining info: Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 (PIN: 304642402) More phone numbers: https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Calendar: flashrom(a)flashrom.org Who: * aklm(a)chromium.org- creator * felix.singer12(a)gmail.com * david.hendricks(a)gmail.com * quasisec(a)google.com * nico.h(a)gmx.de * Martin Roth * src(a)posteo.de * martonmiklosqdev(a)gmail.com * piotr.krol(a)3mdeb.com * Maciej Pijanowski * michal.zygowski(a)3mdeb.com * th3fanbus(a)gmail.com * stefan.k.reinauer(a)gmail.com * nartemiev(a)google.com * arthur(a)aheymans.xyz * flashrom(a)flashrom.org Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account flashrom(a)flashrom.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively, you can sign up for a Google Account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organiser and be added to the guest list, invite others regardless of their own invitation status or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

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Board Testing - ASRock TRX40 Creator
by Dario Dorando 09 Apr '22

09 Apr '22

Hey folks, I've tested compatibility of this tool with my mainboard today. Boardname: ASRock TRX40 Creator Vendor website: http://www.asrock.com/mb/AMD/TRX40%20Creator/#Specification Flash-chip: Winbond 25Q128FWSQ - 16MBSuperI/O: nuvoTon NCT6683D-T For the folks interested - A webpage with amazingly detailed photos of that mainboard, including chips and whatnot: https://news.xfastest.com/review/review-03/72941/asrock-trx40-creator-revie… Note that this page is currently down for me, but you can still access it via the wayback machine. Commands ran: sudo flashrom/flashrom -r biosdump.bin -p internal # Note that TRX4CTR1.70 is the rom file that's freely downloadable from ASRock's website. binwalk -W -i TRX4CTR1.70 biosdump.bin > binwalk_diff.txt # Since I'm not really fond of firmware file layouts yet, somebody who's smarter than me might want to verify whether # the differences are mainly due to different bios configs and hardware I've added into my system,# or if some firmware section got omitted on read. more binwalk_diff.txt | grep 0x0 | wc -l # This command showed '17430'. Since binwalk shows 16 bytes per line, there should be about 34kb of differences in binary. # Flashed back the official rom, since I don't really trust the read one. sudo flashrom/flashrom -p internal -w TRX4CTR1.70 # The output from that is in the attached file. sudo flashrom/flashrom -p internal -V lspci -nnvvxxxsuperiotool -deV Flashing the machine with the stock rom did work as well! - Dario

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EU/AU flashrom dev meeting appointment time change
by Felix Singer 07 Apr '22

07 Apr '22

Hi all, as discussed in the last dev meeting, we can not have one appointment for EU, AU and US people during the time from 1. April until 30. September because of the time change. For this time, we have decided to split the meeting up into one meeting for EU/AU and another one for EU/US and we will alternate between them, so that all groups have a chance to participate. The next meeting will be on 6. April, which will target EU/AU. We created a poll [1] for voting. For EU/AU, we are proposing the following dates (UTC+0): * Monday, Wednesday, Thursday 7:00-8:00 * Monday, Wednesday, Thursday 9:15-10:15 // Felix [1] https://terminplaner4.dfn.de/dBtjEZxKqmcm721C

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flashrom dev meeting notes 7.04.22
by Felix Singer 07 Apr '22

07 Apr '22

# 7th April 2022, 6:00 - 7:00 am UTC+0 Attendees: Martin, Michal, Felix, Anastasia, Nikolai, David, Thomas, Nico, Arthur, Edward ## Decisions Summary * Write a script to email out a summary every weekend. Martin can work on a script. * Gerrit guidelines document. Anastasia will start something. * Start using the redmine bug tracker. There are still issues with it, but we’re going to start using it in its current state and work on it as we go. Felix will work on this. ## Agenda * [FelixS] Hackathons need a reboot. So I’m thinking about doing one. Please share :) * [Poll and some more details](https://terminplaner4.dfn.de/pBooK8FBDlM2zDwa) * Darmstadt, Germany. 10. - 12 June * [Edward] Not every developer has the resources to spend their whole time in IRC and have a spiritual connection with a select few. * How to ensure each code review pass results in a contributor that knows where they stand? - what's next, what's done, when things are going to be merged. * How to avoid walking on eggshells and guessing how to avoid arguments on every contribution but at the same time make tangible progress? * Looks like this topic is closely related to the next one, let's discuss them together? (All notes are done below). * [Edward] How to avoid constant politics in every contribution and instead find a path to allow contributors to not feel ostracized for daring to make a change even when the change may not be useful to others in the immediate sense. * Nikolai: hard to understand whether people are looking at the change, do they have thoughts. Hard to get to know the current status of patch? How to coordinate things? There are many channels? * Nikolai: hard to know whether it is ok. If there is no response, does it mean everything is okay, or no one had a look? * Edward: If people send patches, they need to know what the next step is? * David: gerrit plugin which pings reviewers every 48h ? we need some automation * Edward: observation. Both sides expecting action, or both sides are not sure whose turn? If something is +2 , can it be merged? How to understand that something is ready to merge? * Nikolai: how to ensure there is a consensus? People who are unfamiliar with the process don’t know how to proceed and then give up. * Silicon vendors are unfamiliar with the process. Can they officially support new chips? They attempt to send a patch, and then they are confused on what are next steps. Sometimes good ideas come up in code reviews, and it is not clear who should do that. * David: If adding a new chip requires some refactoring, maybe someone can take that work and do a refactoring? * Edward: We can create a bug in this situation, and prioritize the bug, so that refactor idea is not dropped. * Martin: We need guidelines, maybe “gerrit guidelines”. Coreboot has [https://doc.coreboot.org/contributing/gerrit_guidelines.html](https://doc.c… * Review comments should make clear what is next step * [Edward] How to make the project more accommodating to silicon partners so we can start getting direct support from manufacturers? * Often non-native speakers, * Often not well practiced in free software workflows, * Often need help and guidance to bring them into the fold. * [Edward] How to avoid commits sitting around for years in some weird state between reviewed and unmerged. * Improve project velocity while maintaining stability (improved testing, capture mistakes in tests) * Nico: Can we cherry-pick from coreboot guidelines? Only the bits that apply? * Nico: we can say “write to the mailing list if you don’t know what to do and patch needs attention” * Felix: Can we share the same guidelines as coreboot? We share processes and concepts * Edward: Let's start with our own. Copy-paste and cherry pick model. * Edward: at the end of week an email with the list “everything that has +2”. Martin: We can write it in bash. * [David] We have a GSOC student who wants to do some of the easy projects. Are those projects supposed to be saved for new contributors to have something easy to do? * [Anastasia] The easy projects page needs to be updated, but the projects do need to be done. Since they haven’t been done in 5 years, let’s let the students do them. * [Felix] Employees at companies aren’t interested in doing the easy projects. * [Edward] Let’s adopt the bug tracker and mark bugs as “easy” for people to work on. * [Anastasia] Students should do a single easy project, then move on to a single full project. * [Edward] How to get the mailing list into a usable medium and the code review tools into being for code review only. Move noise to a bug tracker. * Capture ideas in bug tracker. Ideas come up in code reviews, good ideas that need to be done “in a separate patch” and then this is lost. * Felix: some issues left to be configured in the redmine instance. * Nico: we can start using bug tracker with email feature disabled, and then see how it goes. Setup email feature can be the first ticket? * Let’s start using it? * [Edward] How to move to a culture of searched responsibility over constant finger pointing? * Some kind of policy for breakage. * Understanding that software breaks, it is impossible to catch everything in review. * Culture around writing tests and documentation. * Edward: revert policy? Anastasia: There is a thread on mailing list, revert policy is one of the topics

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Join GSoC
by Sayed 07 Apr '22

07 Apr '22

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GSOC 2022
by Wynn K 07 Apr '22

07 Apr '22

Hello, I recently found this project and was wondering if this project was still interested in applicants for the 2022 summer. I was looking into the project ideas and am looking into "Emulate hardware and filesystem in platform-independent way for unit tests" and "Optimize Erase-Function Selection". As many of the projects require programmers, flash chips, and hardware, I was wondering to what extent I would need to have these. I saw the following lists which demonstrate the supported hardware, but I would appreciate it if I could have a more descriptive explanation of what I would need. https://www.flashrom.org/Supported_programmers https://www.flashrom.org/Supported_hardware Additionally, I noticed that some projects want low-level programming, which I would be interested in. However, as I have only a small amount of experience with MIPS, would it not be worthwhile to apply to this position? Thank you for your time

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One Build System Working Group
by Thomas Heijligen 07 Apr '22

07 Apr '22

Hi, As discoursed last dev meeting, we are going to start a working group to adopt meson as single, all cases covering, build system for flashrom. The first step will be to write down all requirements that we need to meet. Therefor, we'll meet today at 8:30 UTC at https://meet.google.com/sag-dyik-bbr and posting the working draft afterwards on the mailing list. The google doc can be visited at any time. https://docs.google.com/document/d/1TVso_VbrLEbGc7BNrYxqlrP8jMxB23TuMqEI3Pn… Please feel free to join the meetings, the next ones will be announced much earlier, add comments to the document or reply to this mail with and question or suggestion. -- Thomas

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