flashrom November 2021

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FAILED: MZ42-G20
by Keno Fischer 05 Nov '21

05 Nov '21

I tried to update the BIOS firmware on this board (the GIGABYTE MZ242-G20 in a G292-Z40 chassis) using `flashrom -pinternal`. This did not work, as it failed to find an appropriate erase function. I subsequently re-flashed using the BMC, which recovered the machine. Investigating the .bin files at the various stages, it appears that the erase did actually work, except that regions below 0x01000000 always read back as 0xFF under flashrom (while a proper SPI readback over the BMC shows this not to be the case). This board is an AMD Zen3 mainboard so the flasher in question is sb600. Looking at the image, I believe the regions above and below 0x01000000 are used as part of a dual bios setup, as they are substantially identical. Perhaps there are some protection registers in the SPI bus master that flashrom needs to be aware of in order to properly read this SPI flash? Keno

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report can't write fw with hp 8200 ssf
by King ho Chau 03 Nov '21

03 Nov '21

flashrom v1.2 on Linux 5.13.0-19-generic (x86_64)flashrom is free software, get the source code at https://flashrom.orgflashrom was built with libpci 3.6.4, GCC 9.2.1 20200304, little endianCommand line (10 args): flashrom -V -p internal -c MX25L6406E/MX25L6408E --ifd -i bios -w build/coreboot.romUsing clock_gettime for delay loops (clk_id: 1, resolution: 1ns).Initializing internal programmer/sys/class/mtd/mtd0 does not existNo coreboot table found.Using Internal DMI decoder.No DMI table found.W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect.Active config mode, unknown reg 0x20 ID: 1c.Found chipset "Intel Q67" with PCI ID 8086:1c4e.This chipset is marked as untested. If you are using an up-to-date versionof flashrom *and* were (not) able to successfully update your firmware with it,then please email a report to flashrom(a)flashrom.org including a verbose (-V) log.Thank you!Enabling flash write... Root Complex Register Block address = 0xfed1c000GCS = 0xc05: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI)Top Swap: not enabled0x7fffffff/0x7fffffff FWH IDSEL: 0x00x7fffffff/0x7fffffff FWH IDSEL: 0x00x7fffffff/0x7fffffff FWH IDSEL: 0x10x7fffffff/0x7fffffff FWH IDSEL: 0x10x7fffffff/0x7fffffff FWH IDSEL: 0x20x7fffffff/0x7fffffff FWH IDSEL: 0x20x7fffffff/0x7fffffff FWH IDSEL: 0x30x7fffffff/0x7fffffff FWH IDSEL: 0x30x7fffffff/0x7fffffff FWH IDSEL: 0x40x7fffffff/0x7fffffff FWH IDSEL: 0x50x7fffffff/0x7fffffff FWH IDSEL: 0x60x7fffffff/0x7fffffff FWH IDSEL: 0x70x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode enabled0x7fffffff/0x7fffffff FWH decode disabled0x7fffffff/0x7fffffff FWH decode disabled0x7fffffff/0x7fffffff FWH decode disabled0x7fffffff/0x7fffffff FWH decode disabledMaximum FWH chip size: 0x100000 bytesSPI Read Configuration: prefetching disabled, caching enabled,BIOS_CNTL = 0x02: BIOS Lock Enable: enabled, BIOS Write Enable: disabledWarning: Setting Bios Control at 0xdc from 0x02 to 0x01 failed.New value is 0x02.SPIBAR = 0x00007fe7156a5000 + 0x38000x04: 0xc008 (HSFS)HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=0, FDV=1, FLOCKDN=1SPI Configuration is locked down.The Flash Descriptor Override Strap-Pin is set. Restrictions implied bythe Master Section of the flash descriptor are NOT in effect. Please notethat Protected Range (PR) restrictions still apply.Reading OPCODES... done0x06: 0x0000 (HSFC)HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=00x50: 0x0000ffff (FRAP)BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.0x58: 0x07ff0510 FREG1: BIOS region (0x00510000-0x007fffff) is read-write.0x5C: 0x050f0003 FREG2: Management Engine region (0x00003000-0x0050ffff) is read-write.0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write.0x90: 0x84 (SSFS)SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=00x91: 0xf94130 (SSFC)SSFC: SCGO=0, ACS=0, SPOP=0, COP=3, DBC=1, SME=0, SCF=10x94: 0x0006 (PREOP)0x96: 0x043b (OPTYPE)0x98: 0x05200302 (OPMENU)0x9c: 0x0000019f (OPMENU+4)0xa0: 0x00000000 (BBAR)0xc4: 0x00802005 (LVSCC)LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=10xc8: 0x00002005 (UVSCC)UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x200xd0: 0x00000000 (FPB)OK.The following protocols are supported: SPI.Probing for Macronix MX25L6406E/MX25L6408E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017Found Macronix flash chip "MX25L6406E/MX25L6408E" (8192 kB, SPI) mapped at physical address 0x00000000ff800000.Chip status register is 0x00.Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not setChip status register: Bit 6 is not setChip status register: Block Protect 3 (BP3) is not setChip status register: Block Protect 2 (BP2) is not setChip status register: Block Protect 1 (BP1) is not setChip status register: Block Protect 0 (BP0) is not setChip status register: Write Enable Latch (WEL) is not setChip status register: Write In Progress (WIP/BUSY) is not setThis chip may contain one-time programmable memory. flashrom cannot readand may never be able to write it, hence it may not be able to completelyclone the contents of this chip (see man page for details).Reading ich descriptor... done.Peculiar firmware descriptor, assuming Ibex Peak compatibility.Using region: "bios".coreboot last image size (not ROM size) is 8388608 bytes.Manufacturer: HPMainboard ID: HP Compaq 8200 Elite SFF PCReading old flash chip contents... done.Erasing and writing flash chip... Trying erase function 0... 0x510000-0x510fff:ETransaction error!SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0SSFC: SCGO=0, ACS=1, SPOP=0, COP=2, DBC=0, SME=0, SCF=1Running OPCODE 0x20 failed at address 0x510000 (payload length was 0).spi_write_cmd failed during command execution at address 0x510000Reading current flash chip contents... done. Looking for another erase function.Trying erase function 1... 0x510000-0x51ffff:EInvalid OPCODE 0x06, will not execute.spi_write_cmd failed during command execution at address 0x510000Reading current flash chip contents... done. Looking for another erase function.Trying erase function 2... 0x510000-0x51ffff:EInvalid OPCODE 0x06, will not execute.spi_write_cmd failed during command execution at address 0x510000Reading current flash chip contents... done. Looking for another erase function.Trying erase function 3... 0x000000-0x7fffff:RREInvalid OPCODE 0x06, will not execute.spi_simple_write_cmd failed during command executionReading current flash chip contents... done. Looking for another erase function.Trying erase function 4... 0x000000-0x7fffff:RREInvalid OPCODE 0x06, will not execute.spi_simple_write_cmd failed during command executionReading current flash chip contents... done. Looking for another erase function.Trying erase function 5... not defined. Looking for another erase function.Trying erase function 6... not defined. Looking for another erase function.Trying erase function 7... not defined. No usable erase functions left.FAILED!Uh oh. Erase/write failed. Checking if anything has changed.Reading current flash chip contents... done.Good, writing to the flash chip apparently didn't do anything.This means we have to add special support for your board, programmer or flashchip. Please report this on IRC at chat.freenode.net (channel #flashrom) ormail flashrom(a)flashrom.org, thanks!-------------------------------------------------------------------------------You may now reboot or simply leave the machine running.Restoring MMIO space at 0x7fe7156a88a0Restoring PCI config space for 00:1f:0 reg 0xdcroot@rap-Aspire-TC-710:/media/rap/834bd4d1-5548-4c05-b249-20c4df3b7e34/stolen2ndgen/coreboot#

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Truncating flash for oversized image
by Rob Shore 01 Nov '21

01 Nov '21

Hello! I've just discovered Flashrom as a way to use a Dediprog SPI programmer with MacOS, which is awesome. I've got a bit of a strange question though: I've got a 1Mbit rom on a board, but the image I was given for it is for a 2Mbit part. The firmware itself in the raw image is < 1Mbit, but the file is still larger than my ROM. Flashrom won't run the flash saying "Error: Image size (262144 B) doesn't match the flash chip's size (131072 B)!", which is technically correct. Is there a way to force the flash, and just have the process end after the first 131072B, which would result in the data I need being on the ROM? Thanks, and looking forward to using this tool some more! --Rob

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flashrom November 2021