flashrom August 2015

flashrom@flashrom.org

35 participants
53 discussions

by Евгений Черкашин

Hi! I saw Your notification when flashing my Motherboard BIOS. It said that flashing is successful Base Board Information Manufacturer: ASUSTeK Computer INC. Product Name: P5GD1-VM Version: Rev 1.xx Serial Number: MB-1234567890 Reboot was successful too. CHIP ID: W39V040FA Best regards, Evgeny Cherkashin.

5 years, 7 months

Phoenix BIOS with NVIDIA MCP55 ROM MAC Address Help Needed

by compevo communications

We have a huge batch of these servers that our client has hosted with us. 1. They are Dell CS24-NV5 with a Dell rebranded GA-3CESL-RH Motherboard and asked us to update the firmware. 2. They have asked us to help them update their firmware to support 6-core CPUs. 3. The problem is that no support or firmware files seem to be available from Dell (the Gigabyte BIOS is not suitable because it does not recognize or control the chassis fans). 4. flashrom has been great in that we had access to machines with the newer BIOS. We read it with flashrom but and wrote it back to one of their machines. 5. The problem is that it seems the MAC address is stored in the BIOS as well, so it copied the MAC address of the source machine. We cannot have multiple servers with duplicate MAC's for obvious reasons. *What we have tried:* 1.) All the tools mentioned online such as CBROM, Phoenix Mod, etc... have been unsuccessful (they cannot seem to properly access or open these files). *What we need help with:* 1. Can someone make a perl or python script to replace the MAC addresses in the attached ROM? Does it help if we know the MAC addresses currently in the ROM? 2. Or if someone happens to have the 1.89a factory flash for a Dell CS24-NV7 that is even better. 3. Or if someone can modify this ROM to remove the NIC/MCP55 LAN module that contains the MAC addresses (we attempted with CBROM but it cannot read the ROM). Any help would be appreciated. We are willing to pay someone if necessary. Cheers -- compevo communications http://compevo.com Toll-Free: 1-877-347-5238 Vancouver, Canada: 604-484-9873 Hong Kong: 852 5808-3267 Singapore: 6531581387 San Francisco, USA: 415-704-7591

5 years, 7 months

Gigabyte GA-Z97MX Gaming 5

by XVilka Haos of System

Hello! Trying to make flashrom working on the Gigabyte GA-Z97MX Gaming 5 mainboard. It has ITE IT8620E Super I/O chip, DualBIOS configuration, thus 2 MXIC MX25L6473E chips. Attaching some logs: http://paste.flashrom.org/view.php?id=2779 Kind regards, XVilka.

5 years, 7 months

BP4 Open-Drain command line Option

by Cosimo Orlando

Dear Flashrom Team, I'd like to add a simple feature to your BP4 support to allow the user to set up an open-drain SPI on command line exactly as for pullups option! Enable the pullups without an open-drain setting into configuration is useless, instead with it is very easy to flash an 1.8v eeprom. All details into the topic right here Could you add this feature? Or release a patch? Thanks. Regards, Cosimo Orlando P.S. Many users are looking for a solution right this into Dangerous Prototypes forum. -- *IT engineer in Electronics, Embedded Software Developer & C/D Blogger*

5 years, 7 months

[PATCH] Add support for SST25WF080B 1 MB flash.

by Ben Gardner

Apart from the JEDEC ID (621614) the difference from the SST25WF080 is that it lacks op codes 0xAD (AAI Word program) and 0x52 (32K erase). Tested under Linux with spidev. Signed-off-by: Ben Gardner <bgardner(a)wabtec.com> --- flashchips.c | 35 +++++++++++++++++++++++++++++++++++ flashchips.h | 3 ++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/flashchips.c b/flashchips.c index 8b5d1ec..b71bd2c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -11803,6 +11803,41 @@ const struct flashchip flashchips[] = { { .vendor = "SST", + .name = "SST25WF080B", + .bustype = BUS_SPI, + .manufacture_id = SST_ID_62, + .model_id = SST_SST25WF080B, + .total_size = 1024, + .page_size = 256, + .feature_bits = FEATURE_WRSR_EITHER, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_sst25, /* *does* have a BP3 but it is useless */ + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {1650, 1950}, + }, + + { + .vendor = "SST", .name = "SST28SF040A", .bustype = BUS_PARALLEL, .manufacture_id = SST_ID, diff --git a/flashchips.h b/flashchips.h index 07ae49d..d6b2b8d 100644 --- a/flashchips.h +++ b/flashchips.h @@ -659,6 +659,7 @@ * byte of device ID is related to log(bitsize) at least for some chips. */ #define SST_ID 0xBF /* SST */ +#define SST_ID_62 0x62 /* SST */ #define SST_SST25LF020_REMS 0x43 /* REMS or RES opcode */ #define SST_SST25WF512 0x2501 #define SST_SST25WF010 0x2502 @@ -669,7 +670,7 @@ * IDs and were not spotted in the wild yet. Their datasheets show a 4 byte long response w/o a vendor ID. */ #define SST_SST25WF020A /* 0x62 0x16 0x12 0x00 */ #define SST_SST25WF040B /* 0x62 0x16 0x13 0x00 */ -#define SST_SST25WF080B /* 0x62 0x16 0x14 0x00 */ +#define SST_SST25WF080B 0x1614 /* 0x62 0x16 0x14 0x00 */ #define SST_SST25VF512_REMS 0x48 /* REMS or RES opcode, same as SST25VF512A */ #define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode, same as SST25VF010A */ #define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode, same as SST25LF020A */ -- 1.9.1 This email and any attachments are only for use by the intended recipient(s) and may contain legally privileged, confidential, proprietary or otherwise private information. Any unauthorized use, reproduction, dissemination, distribution or other disclosure of the contents of this e-mail or its attachments is strictly prohibited. If you have received this email in error, please notify the sender immediately and delete the original. Neither this information block, the typed name of the sender, nor anything else in this message is intended to constitute an electronic signature unless a specific statement to the contrary is included in this message.

5 years, 7 months

End user flash tool - Adding new working configurations and testing

by Łukasz Dmitrowski

Hello, I am looking for people who want to help with testing automatic building of coreboot rom(and other features) with end user flash tool. To make automatic building possible for your machines first I need to prepare a configuration for particular hardware set(s). Until tomorrow I will provide a pdf with description of application features, building process and rest of details.For now best source of info about the app is here: http://blogs.coreboot.org/blog/author/dmitro/ If someone wants to help with testing (and also making a list of working configurations bigger) please contact me and send: * lspci -nn output * cat /sys/class/drm/card0-LVDS-1/edid | edid-decode * dmidecode –t 2 * short description of how you normally proceed with building image for your system (important or unusual steps), are additional option roms or other kinds of action needed? * if it needs factory VGABIOS, which one is working – extracted from memory or extracted from factory BIOS rom? please also attach needed file(s) * coreboot .config file with your configuration Thanks in advance for help! Regards, Lukasz Dmitrowski

5 years, 7 months

MS7336 (HP Compaq dx2300 Microtower motherboard) successful BIOS update

by Benjamin Bellec

Hello, I successfully flashed this motherboard with a Winbond flash chip "W39V080FA (1024 kB, FWH)" which is currently tagged as UNTESTED for ERASE and WRITE. http://h20564.www2.hp.com/hpsc/swd/public/readIndex?sp4ts.oid=3353051 I flashed from BIOS version 1.08 to 1.14 (the last one). Note that the BIOS included some DMI data (SKU number, Serial number, UUID, etc.) which have been deleted during the operation. See dmidecode_before/after log files attached for more information. Here are the logs. Regards. -- Benjamin

5 years, 7 months

Phoenix BIOS with NVIDIA MCP55 ROM MAC Address Help Needed

by compevo communications

5 years, 8 months

Dediprogress (was: Re: dediprog: Use command 0x0B only on older SF100s)

by David Hendricks

(I figured we could use a new thread to track overall progress) A few more tweaks and now writes work, too: https://chromium-review.googlesource.com/#/c/293889 On Sat, Aug 15, 2015 at 6:26 PM, David Hendricks <david.hendricks(a)gmail.com> wrote: > Voilà! > > https://chromium-review.googlesource.com/#/c/293924/ > > Freed of the shackles of Subversion and Patchwork, maybe now I can get > some real work done on this thing. > > On Fri, Aug 14, 2015 at 2:09 AM, David Woodhouse <dwmw2(a)infradead.org> > wrote: > >> On Sun, 2015-08-02 at 15:09 -0700, David Hendricks wrote: >> > >> > Tested with SF100 V:5.1.5 and SF600 V:7.1.4 (with subsequent patches) >> > Signed-off-by: David Hendricks <dhendrix(a)chromium.org> >> >> Can you push a git tree somewhere with those 'subsequent patches' >> please? I know you said they're just the ones I posted, but I could >> have sworn I'd *tried* what you're doing in this patch, and my testers >> said it didn't work (I only have SF100 locally). >> >> http://git.infradead.org/users/dwmw2/flashrom.git has my version of >> those 'subsequent patches' — can you confirm that your patch works on >> top of that? >> >> -- >> David Woodhouse Open Source Technology Centre >> David.Woodhouse(a)intel.com Intel Corporation >> >> _______________________________________________ >> flashrom mailing list >> flashrom(a)flashrom.org >> http://www.flashrom.org/mailman/listinfo/flashrom >> > >

5 years, 8 months

Re: [flashrom] dediprog: Use command 0x0B only on older SF100s

by David Woodhouse

On Sun, 2015-08-02 at 15:09 -0700, David Hendricks wrote: > > Tested with SF100 V:5.1.5 and SF600 V:7.1.4 (with subsequent patches) > Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Can you push a git tree somewhere with those 'subsequent patches' please? I know you said they're just the ones I posted, but I could have sworn I'd *tried* what you're doing in this patch, and my testers said it didn't work (I only have SF100 locally). http://git.infradead.org/users/dwmw2/flashrom.git has my version of those 'subsequent patches' — can you confirm that your patch works on top of that? -- David Woodhouse Open Source Technology Centre David.Woodhouse(a)intel.com Intel Corporation

5 years, 8 months

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flashrom August 2015