flashrom January 2015

flashrom@flashrom.org

35 participants
121 discussions

[PATCH 3/10] 4BA: Winbond W25Q256.V chip (32MB) declaration, 4-bytes addr mode
by Boris Baykov 11 Jan '15

11 Jan '15

Here is the definition of new W25Q256xV chip with new functions pointers for 4-bytes addressing reads and writes. Erase functions pointers are changed in their old places. New feature flags for 4-bytes mode added. Patched files ------------- flashchips.c + added definition for Winbond W25Q256BV/W25Q256FV chips Signed-off-by: Boris Baykov <dev(a)borisbaykov.com>, Russia, Jan 2014 --- diff -U 5 -N ./flashrom/flashchips.c ./flashrom-1868-4ba-3/flashchips.c --- ./flashrom/flashchips.c 2015-01-11 01:55:15.000000000 +0300 +++ ./flashrom-1868-4ba-3/flashchips.c 2015-01-10 19:14:01.000000000 +0300 @@ -13320,10 +13320,58 @@ .voltage = {2700, 3600}, }, { .vendor = "Winbond", + .name = "W25Q256.V", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q256_V, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .enter_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ + .read_nbyte = spi_nbyte_read_4ba, /* read from 4-bytes addressing mode */ + .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ + .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20_4ba, /* erases 4k from 4-bytes addressing mode */ + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52_4ba, /* erases 32k from 4-bytes addressing mode */ + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8_4ba, /* erases 64k from 4-bytes addressing mode */ + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", .name = "W25Q20.W", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, .model_id = WINBOND_NEX_W25Q20_W, .total_size = 256,

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[PATCH 4a/10] 4BA: W25Q256.V declaration update to work using Extended Address.Register
by Boris Baykov 11 Jan '15

11 Jan '15

The 4a patch is made to show how can you define chips with access via Extebded Address Register. This patch is fully working but not required. Patched files ------------- flashchips.c + modified definition of Winbond W25Q256BV/W25Q256FV chips Signed-off-by: Boris Baykov <dev(a)borisbaykov.com>, Russia, Jan 2014 --- diff -U 5 -N ./flashrom/flashchips.c ./flashrom-1868-4ba-4a/flashchips.c --- ./flashrom/flashchips.c 2015-01-11 02:03:38.000000000 +0300 +++ ./flashrom-1868-4ba-4a/flashchips.c 2015-01-10 19:23:32.000000000 +0300 @@ -13329,32 +13329,33 @@ .total_size = 32768, .page_size = 256, /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT + | FEATURE_4BA_EXTENDED_ADDR_REG, .four_bytes_addr_funcs = { - .enter_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ - .read_nbyte = spi_nbyte_read_4ba, /* read from 4-bytes addressing mode */ - .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ - .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ + .enter_4ba = NULL, /* no need to enter 4-bytes addressing mode */ + .read_nbyte = spi_nbyte_read_4ba_ereg, /* read using ext.addr.reg from 3-bytes mode */ + .program_byte = spi_byte_program_4ba_ereg, /* write using ext.addr.reg from 3-bytes mode */ + .program_nbyte = spi_nbyte_program_4ba_ereg /* write using ext.addr.reg from 3-bytes mode */ }, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 8192} }, - .block_erase = spi_block_erase_20_4ba, /* erases 4k from 4-bytes addressing mode */ + .block_erase = spi_block_erase_20_4ba_ereg, /* erases 4k using ext.addr.reg from 3-bytes mode */ }, { .eraseblocks = { {32 * 1024, 1024} }, - .block_erase = spi_block_erase_52_4ba, /* erases 32k from 4-bytes addressing mode */ + .block_erase = spi_block_erase_52_4ba_ereg, /* erases 32k using ext.addr.reg from 3-bytes mode */ }, { .eraseblocks = { {64 * 1024, 512} }, - .block_erase = spi_block_erase_d8_4ba, /* erases 64k from 4-bytes addressing mode */ + .block_erase = spi_block_erase_d8_4ba_ereg, /* erases 64k using ext.addr.reg from 3-bytes mode */ }, { .eraseblocks = { {32 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {32 * 1024 * 1024, 1} },

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[PATCH 10/10] 4BA: Some small visual changes for 4-byte addresses
by Boris Baykov 11 Jan '15

11 Jan '15

Reason to patch: %06x isn't enough to show 32-bit address. Patched files ------------- flashrom.c + changed in address print %06x to %08x for support of 32MB+ chips Signed-off-by: Boris Baykov <dev(a)borisbaykov.com>, Russia, Jan 2014 --- diff -U 5 -N ./flashrom/flashrom.c ./flashrom-1868-4ba-A/flashrom.c --- ./flashrom/flashrom.c 2015-01-11 01:55:16.000000000 +0300 +++ ./flashrom-1868-4ba-A/flashrom.c 2015-01-10 18:48:45.000000000 +0300 @@ -1366,12 +1366,12 @@ "non-empty erase function. Not an error.\n"); if (!done) continue; if (done != chip->total_size * 1024) { msg_gerr("ERROR: Flash chip %s erase function %i " - "region walking resulted in 0x%06x bytes total," - " expected 0x%06x bytes. Please report a bug at" + "region walking resulted in 0x%08x bytes total," + " expected 0x%08x bytes. Please report a bug at" " flashrom(a)flashrom.org\n", chip->name, k, done, chip->total_size * 1024); ret = 1; } if (!eraser.block_erase) @@ -1481,11 +1481,11 @@ len = eraser.eraseblocks[i].size; for (j = 0; j < eraser.eraseblocks[i].count; j++) { /* Print this for every block except the first one. */ if (i || j) msg_cdbg(", "); - msg_cdbg("0x%06x-0x%06x", start, + msg_cdbg("0x%08x-0x%08x", start, start + len - 1); if (do_something(flash, start, len, param1, param2, eraser.block_erase)) { return 1; }

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Re: [flashrom] support for flashrom@flashrom.org
by Stefan Tauner 10 Jan '15

10 Jan '15

On Sat, 10 Jan 2015 20:13:49 +0200 Marius Cirsta <mforce2(a)gmail.com> wrote: > Hi, > > I have a HP DL365 G1 server and I found that it has a Spansion > S29GL032M90TFIR3 flash chip. I was support was introduced for some > similar flash chips but the ones from Spansion are still not > supported. > > Any difficulty in adding support for this one ? If needed I can try > and add support myself. I'm also willing to test it on my server ( at > least read, maybe even write ). Hi Marius, I have added support for other 29GL chips in r1835. I can not remember why I have left out those from Spansion... I guess because there were so many and I got fed up with it at the time :) I can't remember any specific problems with them, so adding should be relatively simply. I have even added the chip IDs to flashchips.h so you would only need to add the respective definitions to flashchips.c. If everything works as planned and I have not forgotten some hiding dragons... ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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support for flashrom@flashrom.org
by Marius Cirsta 10 Jan '15

10 Jan '15

Hi, I have a HP DL365 G1 server and I found that it has a Spansion S29GL032M90TFIR3 flash chip. I was support was introduced for some similar flash chips but the ones from Spansion are still not supported. Any difficulty in adding support for this one ? If needed I can try and add support myself. I'm also willing to test it on my server ( at least read, maybe even write ).

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Re: [flashrom] Add new Macronix MX25L6495F support
by Stefan Tauner 10 Jan '15

10 Jan '15

On Wed, 15 Oct 2014 18:13:54 +0800 alexlu6(a)mxic.com.tw wrote: > > Dear sirs, > > This mail comes from Macronix to add the new MX25L6495F flash chip > support > in the flashrom project in order to help the adoption of the chip for > Google Chromium OS. > Please help to review it. Thanks a lot! Hello Alex, I'd like to add support for this chip to vanilla flashrom as well but could not find a public datasheet to add a few additional bits. Will this chip and a respective datasheet be available publicly? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1868 - trunk
by repository service 10 Jan '15

10 Jan '15

Author: stefanct Date: Sat Jan 10 16:59:54 2015 New Revision: 1868 URL: http://flashrom.org/trac/flashrom/changeset/1868 Log: Fix support for Macronix MX25L6495F. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Jan 10 10:33:14 2015 (r1867) +++ trunk/flashchips.c Sat Jan 10 16:59:54 2015 (r1868) @@ -7280,6 +7280,7 @@ }, { + .vendor = "Macronix", .name = "MX25L6495F", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID,

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Re: [flashrom] [PATCH 0/5] Cross Compilation Refinements
by Stefan Tauner 10 Jan '15

10 Jan '15

On Mon, 5 Jan 2015 01:12:38 +0100 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > I have created some cross compilation fixes while working on the buildbot. > Most of them are compile-tested apart from the following platforms: > - Solaris (I could not get any variant to install in VirtualBox on > ESXi in a timely manner). > - MIPS no cross compiler binary package available at buildbot host > - SPARC is currently also untested. No intended changes there though. Committed in r1862-r1866. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1867 - trunk
by repository service 10 Jan '15

10 Jan '15

Author: stefanct Date: Sat Jan 10 10:33:14 2015 New Revision: 1867 URL: http://flashrom.org/trac/flashrom/changeset/1867 Log: Add support for Macronix MX25L6495F. This is based on the code sent to the flashrom mailing list by Alex Lu (alexlu6(a)mxic.com.tw) without sign-off. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Jan 10 10:33:06 2015 (r1866) +++ trunk/flashchips.c Sat Jan 10 10:33:14 2015 (r1867) @@ -7280,6 +7280,43 @@ }, { + .name = "MX25L6495F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L6495F, + .total_size = 8192, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "Macronix", .name = "MX29F001B", .bustype = BUS_PARALLEL, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Jan 10 10:33:06 2015 (r1866) +++ trunk/flashchips.h Sat Jan 10 10:33:14 2015 (r1867) @@ -474,6 +474,7 @@ #define MACRONIX_MX25U12835E 0x2538 /* Same as MX25U12835F */ #define MACRONIX_MX25U25635F 0x2539 #define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ +#define MACRONIX_MX25L6495F 0x9517 #define MACRONIX_MX29F001B 0x19 #define MACRONIX_MX29F001T 0x18

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[commit] r1866 - trunk
by repository service 10 Jan '15

10 Jan '15

Author: stefanct Date: Sat Jan 10 10:33:06 2015 New Revision: 1866 URL: http://flashrom.org/trac/flashrom/changeset/1866 Log: Refinements for DragonflyBSD. - /usr/include/cpu/param.h defines PAGE_MASK already, hence use another name for the respective macro in nicintel_eeprom.c. - Since DragonflyBSD 3.6 DPorts is used as the default package manager. Therefore we should use /usr/local/ instead of /usr/pkg/ on default to fetch libraries. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/Makefile trunk/README trunk/hwaccess.h trunk/nicintel_eeprom.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sat Jan 10 10:33:00 2015 (r1865) +++ trunk/Makefile Sat Jan 10 10:33:06 2015 (r1866) @@ -111,8 +111,8 @@ endif ifeq ($(TARGET_OS), DragonFlyBSD) -CPPFLAGS += -I/usr/pkg/include -LDFLAGS += -L/usr/pkg/lib +CPPFLAGS += -I/usr/local/include +LDFLAGS += -L/usr/local/lib endif ifeq ($(TARGET_OS), DOS) @@ -815,7 +815,7 @@ define LIBPCI_TEST /* Avoid a failing test due to libpci header symbol shadowing breakage */ #define index shadow_workaround_index -#if !defined __NetBSD__ && !defined __DragonFly__ +#if !defined __NetBSD__ #include <pci/pci.h> #else #include <pciutils/pci.h> Modified: trunk/README ============================================================================== --- trunk/README Sat Jan 10 10:33:00 2015 (r1865) +++ trunk/README Sat Jan 10 10:33:06 2015 (r1866) @@ -68,7 +68,7 @@ make -To compile on FreeBSD, use: +To compile on FreeBSD, OpenBSD or DragonFly BSD, use: gmake @@ -80,11 +80,7 @@ gmake LDFLAGS="-L$pathtolibpci" CC="gcc -I$pathtopciheaders" CFLAGS=-O2 -To compile on NetBSD or DragonFly BSD (with pciutils, libftdi, libusb installed in /usr/pkg/), use: - - gmake - -To compile on OpenBSD, use: +To compile on NetBSD (with pciutils, libftdi, libusb installed in /usr/pkg/), use: gmake Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Sat Jan 10 10:33:00 2015 (r1865) +++ trunk/hwaccess.h Sat Jan 10 10:33:06 2015 (r1866) @@ -40,7 +40,7 @@ */ #define index shadow_workaround_index -#if !defined (__NetBSD__) && !defined (__DragonFly__) +#if !defined (__NetBSD__) #include <pci/pci.h> #else #include <pciutils/pci.h> Modified: trunk/nicintel_eeprom.c ============================================================================== --- trunk/nicintel_eeprom.c Sat Jan 10 10:33:00 2015 (r1865) +++ trunk/nicintel_eeprom.c Sat Jan 10 10:33:06 2015 (r1866) @@ -57,7 +57,7 @@ #define EERD_DATA 16 #define BIT(x) (1<<x) -#define PAGE_MASK 0x3f +#define EE_PAGE_MASK 0x3f static uint8_t *nicintel_eebar; static struct pci_dev *nicintel_pci; @@ -94,11 +94,11 @@ } } - flash->chip->page_size = PAGE_MASK + 1; + flash->chip->page_size = EE_PAGE_MASK + 1; flash->chip->tested = TEST_OK_PREW; flash->chip->gran = write_gran_1byte_implicit_erase; - flash->chip->block_erasers->eraseblocks[0].size = (PAGE_MASK + 1); - flash->chip->block_erasers->eraseblocks[0].count = (flash->chip->total_size * 1024) / (PAGE_MASK + 1); + flash->chip->block_erasers->eraseblocks[0].size = (EE_PAGE_MASK + 1); + flash->chip->block_erasers->eraseblocks[0].count = (flash->chip->total_size * 1024) / (EE_PAGE_MASK + 1); return 1; } @@ -249,7 +249,7 @@ nicintel_ee_bitbang((buf) ? *buf++ : 0xff, NULL); len--; addr++; - if (!(addr & PAGE_MASK)) + if (!(addr & EE_PAGE_MASK)) break; } nicintel_ee_bitset(EEC, EE_CS, 1);

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flashrom January 2015