Author: stefanct
Date: Sat Apr 26 18:12:45 2014
New Revision: 1778
URL: http://flashrom.org/trac/flashrom/changeset/1778
Log:
CID1130006: Memory leaks in buspirate_spi_init().
The one in the error case of register_shutdown() was discovered while
reviewing the other one found by Coverity and fixed by Stefan Reinauer.
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at>
Modified:
trunk/buspirate_spi.c
Modified: trunk/buspirate_spi.c
==============================================================================
--- trunk/buspirate_spi.c Sat Apr 26 18:12:31 2014 (r1777)
+++ trunk/buspirate_spi.c Sat Apr 26 18:12:45 2014 (r1778)
@@ -250,6 +250,7 @@
if (!bp_commbuf) {
bp_commbufsize = 0;
msg_perr("Out of memory!\n");
+ free(dev);
return ERROR_OOM;
}
bp_commbufsize = DEFAULT_BUFSIZE;
@@ -263,8 +264,12 @@
return ret;
}
- if (register_shutdown(buspirate_spi_shutdown, NULL))
+ if (register_shutdown(buspirate_spi_shutdown, NULL) != 0) {
+ bp_commbufsize = 0;
+ free(bp_commbuf);
+ bp_commbuf = NULL;
return 1;
+ }
/* This is the brute force version, but it should work.
* It is likely to fail if a previous flashrom run was aborted during a write with the new SPI commands
Author: stefanct
Date: Sat Apr 26 18:12:15 2014
New Revision: 1776
URL: http://flashrom.org/trac/flashrom/changeset/1776
Log:
CID1130002: Logically dead code due to copy and paste error.
What we really want to do is check whether PCI_BASE_ADDRESS_2 is valid at this
point, and not PCI_BASE_ADDRESS_0.
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at>
Modified:
trunk/satamv.c
Modified: trunk/satamv.c
==============================================================================
--- trunk/satamv.c Sat Apr 26 18:12:03 2014 (r1775)
+++ trunk/satamv.c Sat Apr 26 18:12:15 2014 (r1776)
@@ -138,7 +138,7 @@
pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL);
/* Get I/O BAR location. */
- tmp = pcidev_readbar(dev, PCI_BASE_ADDRESS_2);
+ addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2);
if (!addr)
return 1;
@@ -146,7 +146,7 @@
* FIXME: Check if the I/O BAR is actually reachable.
* This is an arch specific check.
*/
- mv_iobar = tmp & 0xffff;
+ mv_iobar = addr & 0xffff;
msg_pspew("Activating I/O BAR at 0x%04x\n", mv_iobar);
/* 512 kByte with two 8-bit latches, and