flashrom April 2012

flashrom@flashrom.org

44 participants
141 discussions

Re: [flashrom] PONY_SPI, now with Windows support
by Virgil-Adrian Teaca 30 Apr '12

30 Apr '12

And there is the latest PONY_SPI patch. Also, I think that the public api should work better with the function names as serialport_set_pin() and serialport_get_pin() ... All the best, Virgil.

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Re: [flashrom] PONY_SPI, now with Windows support
by Michael Karcher 30 Apr '12

30 Apr '12

On Sun, 2012-04-29 at 23:58 +0200, Virgil-Adrian Teaca wrote: > Then, there is attached a new patch, where code is cleaned and some > main bitbanging functions are moved to serial.c, to simplify the > pony_spi.c and to make them available to all possible serial drivers > which want bitbanging... Great! The code is now styled and designed as I expect it for flashrom code, just some minor nitpicks and one detail I missed to mention in the last review, and is a problem we can't expect you to know. Let's start with that one: In programmer.h, we have: #if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) SPI_CONTROLLER_BITBANG, #endif If the only bitbang programmer enabled is your programmer, SPI_CONTROLLER_BITBANG doesn't get defined. I hit that problem when I tried to cross-compile for Windows, as on Windows, we don't support the internal programmer or PCI-based programmers (which also means direct port I/O programmers like rayer for now), so your programmer would be the only one enabled, but is not in the list of programmers tested. In my oppion, the whole test should be replaced by #if CONFIG_BITBANG_SPI == 1 because the Makefile already handles defining CONFIG_BITBANG_SPI the right way. [Makefile] > LIBFLASHROM_OBJS = $(CHIP_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) > -OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) > +OBJS = $(CLI_OBJS) $(LIBFLASHROM_OBJS) This change is an white-space change (removing a space at end of line. It should not have been there in the first place, though) which is unrelated to your patch. If it doesn't take too much hassle for you, please remove this change from your patch. [pony_spi.c] > +static void pony_bitbang_set_cs(int val) > +{ > + if(pony_type == TYPE_SI_PROG) Please add a space after "if" > + if( pony_type == TYPE_SERBANG ) Please add a space after "if" and remove the inner spaces > + /* The parameter is on format "dev=/dev/device,type=serbang" */ > + arg = extract_programmer_param( "dev" ); No spaces inside the parens, please. > + } else { > + msg_perr("Error: Invalid programmer type specified.\n"); > + free( arg ); > + return 1; > + } > + } > + free( arg ); > + > + msg_pdbg("Using the %s programmer.\n", ((pony_type == TYPE_SI_PROG ) ? "SI-Prog" : "SERBANG")); In the "free" calls, remove space, too. Generally, remove the space after "!" for negation. [programmer.h] > +enum sp_pin { > + PIN_CD = 1, > + PIN_RXD, > + PIN_TXD, > + PIN_DTR, > + PIN_GND, > + PIN_DSR, > + PIN_RTS, > + PIN_CTS, > + PIN_RI, > +}; Can you rename them to SP_PIN_...? This enum is defined in programmer.h now, which is included nearly everywhere in flashrom, not only on serial port related stuff, so limiting to names starting with serialport or SP_ seems appropriate. [serial.c] > + ioctl( sp_fd, val ? TIOCSBRK : TIOCCBRK, 0 ); spacing inside parentheses. > + ioctl( sp_fd, TIOCMGET, &ctl ); dito. > + if ( val ) { dito. > + GetCommModemStatus( sp_fd, &ctl ); dito. > @@ -212,7 +266,7 @@ > } > if (!tmp) > msg_pdbg("Empty write\n"); > - writecnt -= tmp; > + writecnt -= tmp; > buf += tmp; > } unrelated whitespace change. Regards, Michael Karcher

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Re: [flashrom] PONY_SPI, now with Windows support
by Michael Karcher 29 Apr '12

29 Apr '12

On Sun, 2012-04-29 at 18:35 +0200, Virgil-Adrian Teaca wrote: > This PONY_SPI patch have also the Windows support, but, to note that > this new code is untested. Thank you very much for sharing your work! It might make sense to put the serial port pin manipulation functions into serial.c instead of pony_spi.c (of course they can't be static then, should be named sp_xxx instead of pony_xxx and the PIN_xxx enumeration should be named "SERIAL_PIN_xxx") Comments from other developers? I will start with some coding style issues, but please see the code comments below, too. I can't provide you any indent command line for flashrom, but we generally don't use spaces on the inner sider of parentheses. So inside flashrom: WRONG: ioctl( sp_fd, TIOCMGET, &ctl ); RIGHT: ioctl(sp_fd, TICMGET, &ctl); On the other hand, we *do* write a space before the opening parenthesis, but only after keywords (if, while, for), not after function names, so for code in flashrom: WRONG: if( pin == PIN_TXD ) RIGHT: if (pin == PIN_TXD) Furthermore, I noticed you are using a lot of blank lines. I appreciate structuring your code by inserting blank lines between logical blocks to make it more readable, but having every second line blank (like you do in the programmer detection loop for example) does not really add any value over not having blank lines. In that specific example, the only blank line I might leave in is the one before the "if" block. > @@ -122,6 +122,11 @@ > else > override CONFIG_RAYER_SPI = no > endif > +ifeq ($(CONFIG_PONY_SPI), yes) > +UNSUPPORTED_FEATURES += CONFIG_PONY_SPI=yes > +else > +override CONFIG_PONY_SPI = no > +endif > ifeq ($(CONFIG_NIC3COM), yes) > UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes > else > @@ -246,6 +251,11 @@ > else > override CONFIG_RAYER_SPI = no > endif > +ifeq ($(CONFIG_PONY_SPI), yes) > +UNSUPPORTED_FEATURES += CONFIG_PONY_SPI=yes > +else > +override CONFIG_PONY_SPI = no > +endif > ifeq ($(CONFIG_ATAHPT), yes) > UNSUPPORTED_FEATURES += CONFIG_ATAHPT=yes > else Drop these two hunks. They are for programmers that directly access hardware through processor I/O cycles. You don't do that, as you use the OS driver for the serial port instead. > +ifeq ($(CONFIG_PONY_SPI), yes) > +FEATURE_CFLAGS += -D'CONFIG_PONY_SPI=1' > +PROGRAMMER_OBJS += pony_spi.o > +endif Add a "NEED_SERIAL := yes" in the if block, otherwise serial.c might not get included. > +#include <stdlib.h> > +#include <string.h> > +#include <termios.h> > +#include <unistd.h> > +#include <sys/types.h> > +#include <sys/stat.h> > +#include <fcntl.h> > +#include <sys/ioctl.h> The last six headers are not needed on Windows, and some of them don't even exist. Wrap these includes by "#ifndef _WIN32" > +#ifdef _WIN32 > +#include <conio.h> > +#endif That include is useless, drop it. > +enum pony_pin { > + PIN_CD = 0, > + PIN_RXD, > + PIN_TXD, > + PIN_DTR, > + PIN_GND, > + PIN_DSR, > + PIN_RTS, > + PIN_CTS, > + PIN_RI, > +}; I wonder whether it makes sense to define all 9 pins of the socket. For example: What are you intending to use "PIN_GND" for? In the case, you just define them to have all pins defined, I would suggest to start with PIN_CD at 1, so the enumerators match the conventional pin numbers. > +static void pony_set_pin( int pin, int val ) { Why don't you use "enum pony_pin" as type for the pin? > +static int pony_get_pin( int pin ) { dito. One might even think about using two different enums, one for input pins, one for output pins. > +static void pony_bitbang_set_cs( int val ) > +{ > + if( pony_type == TYPE_SI_PROG ) > + { > + /* CS# is negated by the SI-Prog programmer. */ > + val = val ? 0 : 1; please write this as "val = !val;" or "val ^= 1;" > + } > + > + pony_set_pin( PIN_TXD, val ); > +} > +static int pony_bitbang_get_miso(void) > +{ > + int tmp; > + > + tmp = pony_get_pin( PIN_CTS ); > + > + if( pony_type == TYPE_SERBANG ) > + { > + /* MISO is negated by the SERBANG programmer. */ > + tmp = tmp ? 0 : 1; dito, use "tmp = !tmp;" here, or do it like /* MISO is negated by the SERBANG programmer, */ if (pony_type == TYPE_SERBANG) return !tmp; else return tmp; > + /* Register the shutdown callback. */ > + > + if ( register_shutdown( serialport_shutdown, NULL ) ) { > + return 1; > + } If you would register the shutdown function directly after opening the port, you would not have to call serialport_shutdown(NULL) yourself in the error cases before this line. > + > + /* Get the initial value before writing to any line. */ > + Remove this comment. It doesn't apply. > + if ( bitbang_spi_init( &bitbang_spi_master_pony ) ) { > + return 1; > + } > + > + return 0; > +} > diff -urN flashrom.orig/print.c flashrom/print.c > --- flashrom.orig/print.c 2012-03-13 16:52:50.000000000 +0100 > +++ flashrom/print.c 2012-04-24 00:50:46.329483950 +0200 > @@ -507,6 +507,12 @@ > /* FIXME */ > msg_ginfo("RayeR parallel port programmer\n"); > #endif > +#if CONFIG_PONY_SPI == 1 > + msg_ginfo("\nSupported devices for the %s programmer:\n", > + programmer_table[PROGRAMMER_PONY_SPI].name); > + /* FIXME */ > + msg_ginfo("SI-Prog serial port programmer\n"); Add serbang here, too. Regards, Michael Karcher

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PONY_SPI, now with Windows support
by Virgil-Adrian Teaca 29 Apr '12

29 Apr '12

Hello, This PONY_SPI patch have also the Windows support, but, to note that this new code is untested. All the best, Virgil.

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Re: [flashrom] LGPL
by Carl-Daniel Hailfinger 29 Apr '12

29 Apr '12

Hi Jay, Am 27.04.2012 14:59 schrieb Rolette, James (Jay): >> It's easy to make requests like this, even though i find your >> explanation as to why you think VxWorks users (what vxworks users would >> even know of flashrom?) will not use flashrom rather hairy. > Not sure I understand the expression here... hairy == questionable/unlikely? I think Luc's point is that the system library exception in the GPL should provide the legal coverage you need. You mentioned that sharing the address space between proprietary code and GPL code could be a problem, but given that a process on e.g x86 shares its address space with the libraries it uses, it is a normal case that proprietary library code and GPL application code live in the same address space, and IMO the GPL system library exception was meant to cover exactly that case. Unless I have totally misunderstood how VxWorks works, this would mean you're totally fine with a GPL flashrom. >> It's not nearly so easy to actually make such a change, as such a license >> change entails getting permission from all individual contributors. > Ok. Wasn't sure how copyright assignment was being handled on flashrom. We didn't use copyright assignment at all, and that was originally intended to assure everybody that nobody would relicense the code at will. >> So, here is the deal, a deal that i think most people on this ml would >> wholeheartedly agree with: if _you_ want LGPL, _you_ get to sollicite >> all individual contributors. > Fair enough. A few questions on that: > > 1) I'm assuming there are is a small core of folks that form the heart of > the project. I'd like to start with them if possible because there is no > point in going broader than that if the core developers don't agree. > > Would someone be willing to provide a list of the "leaders"? A quick look > at the source shows a few names that show up a lot (Uwe, Carl-Daniel, > Stefan, etc.), but always hard to tell without the benefit of having > followed the project over time. The Signed-off-by statements in the logs would give you the best indication, and they should cover roughly 95% of the current codebase. The rest (very early commits) is by authors who might be more difficult to reach. > 2) What is required from each contributor? Just an email approving a move > to LGPL for their contribution? Something more specific? If you attempt relicensing because your legal department has doubts about GPL code, I think they won't be happy with confirmation e-mails (due to them being easy to fake) and would require at least some written and signed statement for every contributor. That would make relicensing a project needing a lot of effort, though. > 3) Is it ok to derive the list of approvers based on the copyright statement > in the source files? Use the Signed-off-by statements, they are better indicators. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH 2/2] spi25.c: Refactor spi_write_status_register helpers.
by Stefan Tauner 29 Apr '12

29 Apr '12

In r1115 "Write protection handling for Atmel AT25*" the old spi_write_status_register function was duplicated to send WREN and EWSR commands respectively controlled by a new common wrapper function spi_write_status_register without a reason. Both functions' resulting code is equal apart from the opcode used. The code itself does also differ in the macros used, but their value (apart from the opcode) is equal. This patch adds a new parameter for the opcode to the helper function which allows removal of the other one. This relies on the fact that EWSR and WREN have the same INSIZE and OUTSIZE though. If that is really seen as an issue, the sizes could be made parameters too. This patch also changes the wrapper so that it no longer sets the feature bits of the struct flash(ctx) argument. This may result in changed output, because it no longer implicitly disables the debug message in following executions. Since almost all chips had their feature bits fixed in the previous commit, this is a minor problem. Also, spi_write_status_enable has been dead code since r658 or so. Remove it. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> --- spi25.c | 72 +++++++++++++-------------------------------------------------- 1 file changed, 14 insertions(+), 58 deletions(-) diff --git a/spi25.c b/spi25.c index b7e8189..083d85f 100644 --- a/spi25.c +++ b/spi25.c @@ -764,63 +764,19 @@ int spi_write_status_enable(struct flashctx *flash) * This is according the SST25VF016 datasheet, who knows it is more * generic that this... */ -static int spi_write_status_register_ewsr(struct flashctx *flash, int status) +static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) { int result; int i = 0; - struct spi_command cmds[] = { - { - /* WRSR requires either EWSR or WREN depending on chip type. */ - .writecnt = JEDEC_EWSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_EWSR }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_WRSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", - __func__); - /* No point in waiting for the command to complete if execution - * failed. - */ - return result; - } - /* WRSR performs a self-timed erase before the changes take effect. - * This may take 50-85 ms in most cases, and some chips apparently - * allow running RDSR only once. Therefore pick an initial delay of - * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. + /* + * WRSR requires either EWSR or WREN depending on chip type. + * The code below relies on the fact hat EWSR and WREN have the same + * INSIZE and OUTSIZE. */ - programmer_delay(100 * 1000); - while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { - if (++i > 490) { - msg_cerr("Error: WIP bit after WRSR never cleared\n"); - return TIMEOUT_ERROR; - } - programmer_delay(10 * 1000); - } - return 0; -} - -static int spi_write_status_register_wren(struct flashctx *flash, int status) -{ - int result; - int i = 0; struct spi_command cmds[] = { { - /* WRSR requires either EWSR or WREN depending on chip type. */ .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, + .writearr = (const unsigned char[]){ enable_opcode }, .readcnt = 0, .readarr = NULL, }, { @@ -837,8 +793,7 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) result = spi_send_multicommand(flash, cmds); if (result) { - msg_cerr("%s failed during command execution\n", - __func__); + msg_cerr("%s failed during command execution\n", __func__); /* No point in waiting for the command to complete if execution * failed. */ @@ -862,17 +817,18 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) int spi_write_status_register(struct flashctx *flash, int status) { + int feature_bits = flash->feature_bits; int ret = 1; - if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { + if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { msg_cdbg("Missing status register write definition, assuming " "EWSR is needed\n"); - flash->feature_bits |= FEATURE_WRSR_EWSR; + feature_bits |= FEATURE_WRSR_EWSR; } - if (flash->feature_bits & FEATURE_WRSR_WREN) - ret = spi_write_status_register_wren(flash, status); - if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) - ret = spi_write_status_register_ewsr(flash, status); + if (feature_bits & FEATURE_WRSR_WREN) + ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); + if (ret && (feature_bits & FEATURE_WRSR_EWSR)) + ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); return ret; } -- Kind regards, Stefan Tauner

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[PATCH 1/2] Tag all EWSR chips correctly.
by Stefan Tauner 29 Apr '12

29 Apr '12

All SPI chips without a WRSR feature bit set were evaluated except the Sanyo LF25FW203A for which no datasheet is available. The following list includes all SPI-capable chips that still have no WRSR feature bit set: - AT26DF041 - AT45CS1282 - AT45DB011D - AT45DB021D - AT45DB041D - AT45DB081D - AT45DB161D - AT45DB321C - AT45DB321D - AT45DB642D All of them have no write function set and can be therefore ignored for now. Apart from those the generic chips are also not tagged. The opaque flash interface should not be affected. The SFDP dummy chip is changed to explicitly set EWSR if it can't deduce it dynamically. The vendor detecting generic chips can't write anyway. Signed-off-by: Steven Zakulec <spzakulec(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashchips.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++- sfdp.c | 4 ++- 2 files changed, 87 insertions(+), 2 deletions(-) diff --git a/flashchips.c b/flashchips.c index 5904e2b..b48552c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -545,6 +545,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L05PT, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -578,6 +579,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L05PU, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -611,6 +613,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L10PT, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -645,6 +648,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L10PU, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -679,6 +683,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L20PT, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -713,6 +718,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L20PU, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -752,6 +758,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L40PT, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -786,6 +793,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L40PU, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -820,6 +828,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L80P, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -854,6 +863,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L16PT, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -891,6 +901,7 @@ const struct flashchip flashchips[] = { .model_id = AMIC_A25L16PU, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -1701,6 +1712,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT25FS010, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1741,6 +1753,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT25FS040, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1778,6 +1791,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT26DF041, .total_size = 512, .page_size = 256, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1839,6 +1853,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT26DF161, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1876,6 +1891,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT26DF161A, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1914,6 +1930,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT26DF321, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1932,6 +1949,7 @@ const struct flashchip flashchips[] = { .total_size = 512, .page_size = 256, .tested = TEST_UNTESTED, + .feature_bits = FEATURE_WRSR_WREN, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -2062,6 +2080,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45CS1282, .total_size = 16896 /* No power of two sizes */, .page_size = 1056 /* No power of two sizes */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2078,6 +2097,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45DB011D, .total_size = 128 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2094,6 +2114,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45DB021D, .total_size = 256 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2110,6 +2131,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45DB041D, .total_size = 512 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2126,6 +2148,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45DB081D, .total_size = 1024 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2142,6 +2165,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45DB161D, .total_size = 2048 /* Size can only be determined from status register */, .page_size = 512 /* Size can only be determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2158,6 +2182,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45DB321C, .total_size = 4224 /* No power of two sizes */, .page_size = 528 /* No power of two sizes */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2175,6 +2200,7 @@ const struct flashchip flashchips[] = { .total_size = 4096 /* Size can only be determined from status register */, .page_size = 512 /* Size can only be determined from status register */, /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .feature_bits = FEATURE_OTP, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, @@ -2192,6 +2218,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT45DB642D, .total_size = 8192 /* Size can only be determined from status register */, .page_size = 1024 /* Size can only be determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2477,6 +2504,7 @@ const struct flashchip flashchips[] = { .model_id = EMST_F25L008A, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2510,6 +2538,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B05, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2542,6 +2571,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B05, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2574,6 +2604,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B10, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2606,6 +2637,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B10, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2638,6 +2670,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B20, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2671,6 +2704,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B20, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2704,6 +2738,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B40, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2737,6 +2772,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B40, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2770,6 +2806,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B80, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2803,6 +2840,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B80, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2836,6 +2874,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B16, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2869,6 +2908,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B16, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2902,6 +2942,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B32, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2935,6 +2976,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B32, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -3002,6 +3044,7 @@ const struct flashchip flashchips[] = { .model_id = EON_EN25B64, .total_size = 8192, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5197,6 +5240,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PE10, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5227,6 +5271,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PE20, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5257,6 +5302,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PE40, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5287,6 +5333,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PE80, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5317,6 +5364,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PE16, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5376,6 +5424,7 @@ const struct flashchip flashchips[] = { .model_id = PMC_PM25LV010, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5406,6 +5455,7 @@ const struct flashchip flashchips[] = { .model_id = PMC_PM25LV016B, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5442,6 +5492,7 @@ const struct flashchip flashchips[] = { .model_id = PMC_PM25LV020, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5472,6 +5523,7 @@ const struct flashchip flashchips[] = { .model_id = PMC_PM25LV040, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5502,6 +5554,7 @@ const struct flashchip flashchips[] = { .model_id = PMC_PM25LV080B, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5538,6 +5591,7 @@ const struct flashchip flashchips[] = { .model_id = PMC_PM25LV512, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5873,6 +5927,7 @@ const struct flashchip flashchips[] = { .model_id = SPANSION_S25FL004A, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5900,6 +5955,7 @@ const struct flashchip flashchips[] = { .model_id = SPANSION_S25FL008A, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5927,6 +5983,7 @@ const struct flashchip flashchips[] = { .model_id = SPANSION_S25FL016A, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5954,6 +6011,7 @@ const struct flashchip flashchips[] = { .model_id = SPANSION_S25FL032A, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5981,6 +6039,7 @@ const struct flashchip flashchips[] = { .model_id = SPANSION_S25FL064A, .total_size = 8192, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -6008,6 +6067,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF040_REMS, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, @@ -6038,6 +6098,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF080_REMS, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_UNTESTED, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, @@ -6068,6 +6129,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF010_REMS, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rems, .probe_timing = TIMING_ZERO, @@ -6098,6 +6160,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF016B, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -6134,6 +6197,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF032B, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -6170,6 +6234,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF064C, .total_size = 8192, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -6206,6 +6271,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF040_REMS, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PR, .probe = probe_spi_rems, .probe_timing = TIMING_ZERO, @@ -6236,6 +6302,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF040B, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -6272,6 +6339,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF040B_REMS, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PR, .probe = probe_spi_rems, .probe_timing = TIMING_ZERO, @@ -6308,6 +6376,7 @@ const struct flashchip flashchips[] = { .model_id = SST_SST25VF080B, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7128,6 +7197,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P05A, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7160,6 +7230,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P05_RES, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res1, .probe_timing = TIMING_ZERO, @@ -7187,6 +7258,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P10A, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7215,6 +7287,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P10_RES, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res1, .probe_timing = TIMING_ZERO, @@ -7242,6 +7315,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P20, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7269,6 +7343,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P40, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7296,6 +7371,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P40_RES, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_res1, .probe_timing = TIMING_ZERO, @@ -7322,6 +7398,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P80, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7349,6 +7426,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P16, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PR, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7376,6 +7454,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P32, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7403,6 +7482,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P64, .total_size = 8192, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7430,6 +7510,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P128, .total_size = 16384, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7458,7 +7539,7 @@ const struct flashchip flashchips[] = { .total_size = 2048, .page_size = 256, /* OTP: 64B total; read 0x4B; write 0x42 */ - .feature_bits = FEATURE_OTP, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7488,6 +7569,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PX32, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7518,6 +7600,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PX64, .total_size = 8192, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, diff --git a/sfdp.c b/sfdp.c index 39d59e0..708b66b 100644 --- a/sfdp.c +++ b/sfdp.c @@ -176,10 +176,12 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len) flash->feature_bits = FEATURE_WRSR_EWSR; msg_cdbg2("EWSR (0x50).\n"); } - } else + } else { msg_cdbg2("non-volatile and the standard does not allow " "vendors to tell us whether EWSR/WREN is needed for " "status register writes - assuming EWSR.\n"); + flash->feature_bits = FEATURE_WRSR_EWSR; + } msg_cdbg2(" Write chunk size is "); if (tmp32 & (1 << 2)) { -- Kind regards, Stefan Tauner

1 0

EWSR fixes + spi25.c spi_write_status_register cleanup
by Stefan Tauner 29 Apr '12

29 Apr '12

will commit both patches as is if no one vetos in the next days. [PATCH 1/2] Tag all EWSR chips correctly. [PATCH 2/2] spi25.c: Refactor spi_write_status_register helpers.

1 0

Intel DN2800MT no flash device found
by Marek Zakrzewski 29 Apr '12

29 Apr '12

flashrom -Vr bios.bin flashrom v0.9.5.2-r1515 on Linux 3.2.13-xxxx-std-ipv6-64 (x86_64), built with libpci 3.1.7, GCC 4.1.2 20080704 (Red Hat 4.1.2-52), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 933M loops per second, 10 myus = 10 us, 100 myus = 155 us, 1000 myus = 1061 us, 10000 myus = 10057 us, 4 myus = 7 us, OK. Initializing internal programmer No coreboot table found. -s: No such file or directory dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel NM10" with PCI ID 8086:27bc. Enabling flash write... 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x4 0x7fffffff/0x7fffffff FWH IDSEL: 0x5 0x7fffffff/0x7fffffff FWH IDSEL: 0x6 0x7fffffff/0x7fffffff FWH IDSEL: 0x7 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0xe WARNING: Setting 0xdc from 0xe to 0xf on NM10 failed. New value is 0xe. Root Complex Register Block address = 0xfed1c000 GCS = 0x61: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x0 (reserved) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x8004 (SPIS) 0x02: 0x4040 (SPIC) 0x04: 0x00000000 (SPIA) 0x08: 0x000041bf (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x00000000 (SPID2+4) 0x20: 0x00000000 (SPID3) 0x24: 0x00000000 (SPID3+4) 0x28: 0x00000000 (SPID4) 0x2c: 0x00000000 (SPID4+4) 0x30: 0x00000000 (SPID5) 0x34: 0x00000000 (SPID5+4) 0x38: 0x00000000 (SPID6) 0x3c: 0x00000000 (SPID6+4) 0x40: 0x00000000 (SPID7) 0x44: 0x00000000 (SPID7+4) 0x50: 0x00000000 (BBAR) 0x54: 0x5006 (PREOP) 0x56: 0x123b (OPTYPE) 0x58: 0x05200302 (OPMENU) 0x5c: 0x000100ab (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done SPI Read Configuration: invalid prefetching/caching settings, PROBLEMS, continuing anyway The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L05PU, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L10PT, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L10PU, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L20PT, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L20PU, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L40PT, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L40PU, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L80P, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L16PT, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L16PU, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L512, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L010, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L020, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L040, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L080, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L016, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25L032, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for AMIC A25LQ032, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF021, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF041A, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF081, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF081A, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF161, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF321, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF321A, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DF641(A), 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25DQ161, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25F512B, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25FS010, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT25FS040, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT26DF041, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT26DF081A, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT26DF161, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT26DF161A, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT26F004, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45CS1282, 16896 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB011D, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB021D, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB041D, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB081D, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB161D, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB321C, 4224 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB321D, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel AT45DB642D, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for EMST F25L008A, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B05, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B05T, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B10, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B10T, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B20, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B20T, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B40, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B40T, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B80, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B80T, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B16T, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B32, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B32T, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B64, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25B64T, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25F05, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25F10, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25F20, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25F40, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25F80, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25F16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25F32, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25Q40, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25Q80(A), 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25Q16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25Q32(A/B), 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25Q64, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25Q128, 16384 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon EN25QH16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L512, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L1005, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L2005, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L4005, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L8005, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L1605, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L1635D, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L1635E, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L3205, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L3235D, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L6405, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix MX25L12805, 16384 kB: Invalid OPCODE 0x9f, will not execute. Probing for Numonyx M25PE10, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Numonyx M25PE20, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Numonyx M25PE40, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Numonyx M25PE80, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Numonyx M25PE16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for PMC Pm25LV010, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for PMC Pm25LV016B, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for PMC Pm25LV020, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for PMC Pm25LV040, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for PMC Pm25LV080B, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for PMC Pm25LV512, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for Sanyo LF25FW203A, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Spansion S25FL004A, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Spansion S25FL008A, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Spansion S25FL016A, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Spansion S25FL032A, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Spansion S25FL064A, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF016B, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for SST SST25VF032B, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for SST SST25VF064C, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF040B, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF080B, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P05-A, 64 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P05, 64 kB: Invalid OPCODE 0x9f, will not execute. Invalid OPCODE 0x90, will not execute. probe_spi_res1: id 0xbf Probing for ST M25P10-A, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P10, 128 kB: Invalid OPCODE 0x9f, will not execute. Invalid OPCODE 0x90, will not execute. probe_spi_res1: id 0xbf Probing for ST M25P20, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P40, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P40-old, 512 kB: Invalid OPCODE 0x9f, will not execute. Invalid OPCODE 0x90, will not execute. probe_spi_res1: id 0xbf Probing for ST M25P80, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P32, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P64, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25P128, 16384 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25PX16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25PX32, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST M25PX64, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25Q80, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25Q16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25Q32, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25Q64, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25Q128, 16384 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25X10, 128 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25X20, 256 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25X40, 512 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25X80, 1024 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25X16, 2048 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25X32, 4096 kB: Invalid OPCODE 0x9f, will not execute. Probing for Winbond W25X64, 8192 kB: Invalid OPCODE 0x9f, will not execute. Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. Receiving SFDP signature failed. Probing for AMIC unknown AMIC SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for Atmel unknown Atmel SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for Eon unknown Eon SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for Macronix unknown Macronix SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for PMC unknown PMC SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for SST unknown SST SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for ST unknown ST SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for Sanyo unknown Sanyo SPI chip, 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for Generic unknown SPI chip (RDID), 0 kB: Invalid OPCODE 0x9f, will not execute. Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring MMIO space at 0x7f9346ce7070 Restoring PCI config space for 00:1f:0 reg 0xdc

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[PATCH 2/2] Add board enable for Biostar M7VIQ.
by Stefan Tauner 28 Apr '12

28 Apr '12

The PCI IDs are generic VIA IDs. Only Biostar IDs are those of the LOM, but that would not be a good choice for ID. Accept the generic IDs (+ DMI string) for now because this will be generic soonish(tm) anyway. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- board_enable.c | 13 +++++++++++++ print.c | 2 +- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/board_enable.c b/board_enable.c index 8f01fc1..6221575 100644 --- a/board_enable.c +++ b/board_enable.c @@ -415,6 +415,18 @@ static void w83697xx_memw_enable(uint16_t port) /* * Suited for: + * - Biostar M7VIQ: VIA KM266 + VT8235 + */ +static int w83697xx_memw_enable_2e(void) +{ + w83697xx_memw_enable(0x2E); + + return 0; +} + + +/* + * Suited for: * - EPoX EP-8K5A2: VIA KT333 + VT8235 * - Albatron PM266A Pro: VIA P4M266A + VT8235 * - Shuttle AK31 (all versions): VIA KT266 + VT8233 @@ -2208,6 +2220,7 @@ const struct board_match board_matches[] = { {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x8249, "^P5N-E SLI$",NULL, NULL, P3, "ASUS", "P5N-E SLI", 0, NT, it8718f_gpio63_raise}, {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, NULL, NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", NULL, NULL, P3, "Biostar", "M7VIQ", 0, OK, w83697xx_memw_enable_2e}, {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x10de, 0x03ea, 0x1019, 0x2602, 0x10de, 0x03e0, 0x1019, 0x2602, NULL, NULL, NULL, P3, "Elitegroup", "GeForce6100SM-M", 0, OK, board_ecs_geforce6100sm_m}, diff --git a/print.c b/print.c index 84a1604..4706589 100644 --- a/print.c +++ b/print.c @@ -721,7 +721,7 @@ const struct board_info boards_known[] = { B("Biostar", "H61MU3", 0, NULL, "Probing works (Eon EN25Q32(A/B), 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Biostar", "M6TBA", 0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("Biostar", "M7NCD Pro", 1, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL), - B("Biostar", "M7VIQ", 0, NULL, "Missing board enable (W83697HF/F/HG/G), see http://www.flashrom.org/pipermail/flashrom/2012-February/008863.html"), + B("Biostar", "M7VIQ", 1, NULL, NULL), B("Biostar", "N61PB-M2S", 1, NULL, NULL), B("Biostar", "N68S3+", 1, NULL, NULL), B("Biostar", "P4M80-M4", 1, "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL), -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashrom April 2012