flashrom August 2011

flashrom@flashrom.org

42 participants
219 discussions

Re: [flashrom] flashrom post from info@mingtaofurniture.com requires approval
by Stefan Tauner 18 Aug '11

18 Aug '11

On Thu, 18 Aug 2011 06:53:29 +0200 flashrom-owner(a)flashrom.org wrote: > As list administrator, your authorization is requested for the > following mailing list posting: > > List: flashrom(a)flashrom.org > From: info(a)mingtaofurniture.com > Subject: 3819289?$?$?$?$?$?$?$?uhmms > Reason: Post by non-member to a members-only list > > At your convenience, visit: > > http://www.flashrom.org/mailman/admindb/flashrom > > to approve or deny the request. let's hope mailman does the right thing. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 1/3] layout: change return type and name of find_next_included_romentry
by Stefan Tauner 18 Aug '11

18 Aug '11

On Mon, 15 Aug 2011 06:43:36 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > -typedef struct { > +static struct rom_entry { > unsigned int start; > unsigned int end; > unsigned int included; > char name[256]; > -} romlayout_t; > - > -static romlayout_t rom_entries[MAX_ROMLAYOUT]; > +} rom_entries[MAX_ROMLAYOUT]; this was a big mistake. this type is very useful - not necessarily in this setup, but in general we want a rom_entry type to pass around functions that operate on parts of the flash only (i am working on making reads obey layouts atm). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Makefile: fix and simplify test program compilations
by Carl-Daniel Hailfinger 18 Aug '11

18 Aug '11

Am 12.08.2011 21:38 schrieb Stefan Tauner: > this was totally broken due to the time behavior of make's shell > function's temporal behavior. > quote from the gnu make documentation > http://www.gnu.org/s/hello/manual/make/Shell-Function.html): > "The commands run by calls to the shell function are run when the > function calls are expanded" > we have used the shell function to echo the test programs to a file. > the file name used was equal for all tests and was overwritten for > each test. the result was that all tests (in a single target?) used > the last test program because the echoing of the test programs was > done before all test compilations(!) > Thanks for opening that bug report. Apparently the gnu make documentation was incorrect. > also the branching for testing ifeq ($(CONFIG_FT2232_SPI), yes) was > unnecessary. > Branching never worked for me inside a target, but I also never tried it your way. > in my approach here i am using verbatim variables (allows to define > even complex test programs in the makefile without jumping through > hoops) that get exported to environment variables (via "export", > reference afterwards with "$$<varname>"). > > i have also added the missing redirection of stderr to the compiler test. > Good. > alternatively one could just use different file names of course, but > i think my approach is superior due to the separation and > readability of the tested code and the fact that the temporal > behavior is MUCH clearer now (else this bug would have not crept in > in the first place :P) > > if line count is an issue one could of course compress the test > programs to something unreadable again :) > Haha. > side note: we use $(CC) all over the place before we even check if > it is there. e.g.: > override ARCH = $(strip $(shell LC_ALL=C $(CC) -E arch.h|grep -v '^\#')) > > this creates unwanted output like: > make -j1 CC=eiugthes > /bin/sh: eiugthes: not found > /bin/sh: eiugthes: not found > /bin/sh: eiugthes: not found > /bin/sh: eiugthes: not found > Checking for a C compiler... not found. > Hm yes. > make: *** [compiler] Error 1 > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > Makefile | 91 ++++++++++++++++++++++++++++++++++++++++---------------------- > 1 files changed, 59 insertions(+), 32 deletions(-) > > diff --git a/Makefile b/Makefile > index c72d10a..672a0df 100644 > --- a/Makefile > +++ b/Makefile > @@ -531,11 +531,62 @@ distclean: clean > strip: $(PROGRAM)$(EXEC_SUFFIX) > $(STRIP) $(STRIP_ARGS) $(PROGRAM)$(EXEC_SUFFIX) > > +# below are the definitions of test programs as verbatim variables, which get > +# exported to environment variables and are referenced with $$<varname> later > +define COMPILER_TEST > +int main(int argc, char **argv) > +{ > + (void) argafc; > Typo? > +define UTSNAME_TEST > +#include <sys/utsname.h> > +struct utsname osinfo; > +int main(int argc, char **argv) > +{ > + (void) argc; > + (void) argv; > + uname (&osinfo); > + return 0; > +} > +endef > +export UTSNAME_TEST > Hm... the alternative would be to have each of those C programs in a separate file in a config/ directory or somesuch. I don't have a strong preference either way. Given that you think verbatim variables are superior, please move them directly above the targets which use them. > + > compiler: featuresavailable > @printf "Checking for a C compiler... " > - @$(shell ( echo "int main(int argc, char **argv)"; \ > - echo "{ (void) argc; (void) argv; return 0; }"; ) > .test.c ) > - @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null && \ > + @echo "$$COMPILER_TEST" > .test.c > + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null 2>&1 && \ > echo "found." || ( echo "not found."; \ > rm -f .test.c .test$(EXEC_SUFFIX); exit 1) > @rm -f .test.c .test$(EXEC_SUFFIX) > @@ -548,12 +599,7 @@ compiler: featuresavailable > ifeq ($(CHECK_LIBPCI), yes) > pciutils: compiler > @printf "Checking for libpci headers... " > - @# Avoid a failing test due to libpci header symbol shadowing breakage > - @$(shell ( echo "#define index shadow_workaround_index"; \ > - echo "#include <pci/pci.h>"; \ > - echo "struct pci_access *pacc;"; \ > - echo "int main(int argc, char **argv)"; \ > - echo "{ (void) argc; (void) argv; pacc = pci_alloc(); return 0; }"; ) > .test.c ) > + @echo "$$LIBPCI_TEST" > .test.c > @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ > echo "found." || ( echo "not found."; echo; \ > echo "Please install libpci headers (package pciutils-devel)."; \ > @@ -588,41 +634,22 @@ featuresavailable: > @false > endif > > -ifeq ($(CONFIG_FT2232_SPI), yes) > features: compiler > @echo "FEATURES := yes" > .features.tmp > +ifeq ($(CONFIG_FT2232_SPI), yes) > I'm really surprised that ifeq inside a target works. IIRC I tried this some time ago on my older machine and it did not work. However, if this works reliably, the code is indeed a lot more readable. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Even if we ever decide to use another build system, we need this fix now. Regards, Carl-Daniel

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[commit] r1416 - trunk
by repository service 18 Aug '11

18 Aug '11

Author: stefanct Date: Thu Aug 18 04:27:19 2011 New Revision: 1416 URL: http://flashrom.org/trac/flashrom/changeset/1416 Log: Makefile: fix and simplify test program compilations this was totally broken due to the make's shell function's temporal behavior. quote from the gnu make documentation (http://www.gnu.org/s/hello/manual/make/Shell-Function.html): "The commands run by calls to the shell function are run when the function calls are expanded" we have used the shell function to echo the test programs to a file. the file name used was equal for all tests and was overwritten for each test. the result was that all tests (in a single target?) used the last test program because the echoing of the test programs was done before all test compilations(!) see my mail for details: http://lists.gnu.org/archive/html/bug-make/2011-08/msg00010.html also the branching for testing ifeq ($(CONFIG_FT2232_SPI), yes) was unnecessarily complicated. in my approach here i am using verbatim variables (allows to define even complex test programs in the makefile without jumping through hoops) that get exported to environment variables (via "export", reference afterwards with "$$<varname>"). i have also added the missing redirection of stderr to the compiler test and changed the definition of ARCH to use simple expansion (:=). the latter is still wrong, because it uses $(CC) before we check if a compiler is installed... makes the compiler check pretty much useless. The simple expansion just reduces the number of errors printed to 1. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Aug 17 11:50:11 2011 (r1415) +++ trunk/Makefile Thu Aug 18 04:27:19 2011 (r1416) @@ -38,7 +38,7 @@ endif # Determine the destination processor architecture -override ARCH = $(strip $(shell LC_ALL=C $(CC) -E arch.h|grep -v '^\#')) +override ARCH := $(strip $(shell LC_ALL=C $(CC) -E arch.h|grep -v '^\#')) # FIXME We have to differentiate between host and target OS architecture. OS_ARCH ?= $(shell uname) @@ -531,11 +531,23 @@ strip: $(PROGRAM)$(EXEC_SUFFIX) $(STRIP) $(STRIP_ARGS) $(PROGRAM)$(EXEC_SUFFIX) +# to define test programs we use verbatim variables, which get exported +# to environment variables and are referenced with $$<varname> later + +define COMPILER_TEST +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + return 0; +} +endef +export COMPILER_TEST + compiler: featuresavailable @printf "Checking for a C compiler... " - @$(shell ( echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; return 0; }"; ) > .test.c ) - @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null && \ + @echo "$$COMPILER_TEST" > .test.c + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test$(EXEC_SUFFIX) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; \ rm -f .test.c .test$(EXEC_SUFFIX); exit 1) @rm -f .test.c .test$(EXEC_SUFFIX) @@ -545,15 +557,25 @@ ( echo "unknown. Aborting."; exit 1) @printf "%s\n" '$(ARCH)' +define LIBPCI_TEST +/* Avoid a failing test due to libpci header symbol shadowing breakage */ +#define index shadow_workaround_index +#include <pci/pci.h> +struct pci_access *pacc; +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + pacc = pci_alloc(); + return 0; +} +endef +export LIBPCI_TEST + ifeq ($(CHECK_LIBPCI), yes) pciutils: compiler @printf "Checking for libpci headers... " - @# Avoid a failing test due to libpci header symbol shadowing breakage - @$(shell ( echo "#define index shadow_workaround_index"; \ - echo "#include <pci/pci.h>"; \ - echo "struct pci_access *pacc;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; pacc = pci_alloc(); return 0; }"; ) > .test.c ) + @echo "$$LIBPCI_TEST" > .test.c @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci headers (package pciutils-devel)."; \ @@ -588,41 +610,47 @@ @false endif -ifeq ($(CONFIG_FT2232_SPI), yes) +define FTDI_TEST +#include <ftdi.h> +struct ftdi_context *ftdic = NULL; +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + return ftdi_init(ftdic); +} +endef +export FTDI_TEST + +define UTSNAME_TEST +#include <sys/utsname.h> +struct utsname osinfo; +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + uname (&osinfo); + return 0; +} +endef +export UTSNAME_TEST + features: compiler @echo "FEATURES := yes" > .features.tmp +ifeq ($(CONFIG_FT2232_SPI), yes) @printf "Checking for FTDI support... " - @$(shell ( echo "#include <ftdi.h>"; \ - echo "struct ftdi_context *ftdic = NULL;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; return ftdi_init(ftdic); }"; ) > .featuretest.c ) + @echo "$$FTDI_TEST" > .featuretest.c @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ ( echo "found."; echo "FTDISUPPORT := yes" >> .features.tmp ) || \ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) +endif @printf "Checking for utsname support... " - @$(shell ( echo "#include <sys/utsname.h>"; \ - echo "struct utsname osinfo;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; uname (&osinfo); return 0; }"; ) > .featuretest.c ) - @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) >/dev/null 2>&1 && \ - ( echo "found."; echo "UTSNAME := yes" >> .features.tmp ) || \ - ( echo "not found."; echo "UTSNAME := no" >> .features.tmp ) - @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features - @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX) -else -features: compiler - @echo "FEATURES := yes" > .features.tmp - @printf "Checking for utsname support... " - @$(shell ( echo "#include <sys/utsname.h>"; \ - echo "struct utsname osinfo;"; \ - echo "int main(int argc, char **argv)"; \ - echo "{ (void) argc; (void) argv; uname (&osinfo); return 0; }"; ) > .featuretest.c ) + @echo "$$UTSNAME_TEST" > .featuretest.c @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) >/dev/null 2>&1 && \ ( echo "found."; echo "UTSNAME := yes" >> .features.tmp ) || \ ( echo "not found."; echo "UTSNAME := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX) -endif install: $(PROGRAM)$(EXEC_SUFFIX) mkdir -p $(DESTDIR)$(PREFIX)/sbin

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qflashrom dutch (nl-NL) translation
by Bernd Blaauw 18 Aug '11

18 Aug '11

I'm currently delaying things I should be doing, so in a boring moment decided to translate qflashrom language file. [ https://gitorious.org/qflashrom/qflashrom/blobs/master/locale/qflashrom_de_… ]. (btw lines 169..171 are confusing, mentioning 'read' but german part says 'write') Textfile attached, no idea if FireFox and MetaPad kept it as UTF8. Entirely untested ofcourse due to running Windows and no development platforms whatsoever (besides VMware for emulation/virtualisation). Likely usable as well for [nl-BE] but who can tell.. Consider it my €0,02 to this project :) with best regards, Bernd Blaauw (license stuff: whatever the original had, or public domain, at your convenience, giving up all rights to copyright, do as you please).

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[Patch] Added SST25LF080A Flash Chip
by Zeus Castro 17 Aug '11

17 Aug '11

Added support for SST25LF080A flash chip, based on public datasheet available here: http://www.sst.com/dotAsset/40316.pdf

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[commit] r1415 - trunk
by repository service 17 Aug '11

17 Aug '11

Author: stefanct Date: Wed Aug 17 11:50:11 2011 New Revision: 1415 URL: http://flashrom.org/trac/flashrom/changeset/1415 Log: Add support for the SST25LF080A flash chip Based on the definition of SST25LF040A and the public datasheet available here: http://www.sst.com/dotAsset/40316.pdf Also, move the SST25LF040A up to keep the list ordered alphabetically (while removing the ".RES" suffix). Signed-off-by: Zeus Castro <thezeusjuice(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Aug 16 14:08:22 2011 (r1414) +++ trunk/flashchips.c Wed Aug 17 11:50:11 2011 (r1415) @@ -5547,6 +5547,66 @@ { .vendor = "SST", + .name = "SST25LF040A", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST25VF040_REMS, + .total_size = 512, + .page_size = 256, + .tested = TEST_OK_PROBE, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ + .read = spi_chip_read, + .voltage = {3000, 3600}, + }, + + { + .vendor = "SST", + .name = "SST25LF080A", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST25VF080_REMS, + .total_size = 1024, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ + .read = spi_chip_read, + .voltage = {3000, 3600}, + }, + + { + .vendor = "SST", .name = "SST25VF010.REMS", .bustype = BUS_SPI, .manufacture_id = SST_ID, @@ -5750,36 +5810,6 @@ }, { - .vendor = "SST", - .name = "SST25LF040A.RES", - .bustype = BUS_SPI, - .manufacture_id = SST_ID, - .model_id = SST_SST25VF040_REMS, - .total_size = 512, - .page_size = 256, - .tested = TEST_OK_PROBE, - .probe = probe_spi_res2, - .probe_timing = TIMING_ZERO, - .block_erasers = - { - { - .eraseblocks = { {4 * 1024, 128} }, - .block_erase = spi_block_erase_20, - }, { - .eraseblocks = { {32 * 1024, 16} }, - .block_erase = spi_block_erase_52, - }, { - .eraseblocks = { {512 * 1024, 1} }, - .block_erase = spi_block_erase_60, - }, - }, - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ - .read = spi_chip_read, - .voltage = {3000, 3600}, - }, - - { .vendor = "SST", .name = "SST25VF040B.REMS", .bustype = BUS_SPI,

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Re: [flashrom] report for Intel QM67 | Winbond W25Q64
by Stefan Tauner 17 Aug '11

17 Aug '11

On Wed, 17 Aug 2011 09:16:05 +0200 "Frei, Thomas (GE Germany)" <Thomas.Frei(a)ge.com> wrote: > Hi Stefan, > > First of all: thank you for the quick response. > Yes I work on a prototype from GE :-) > > OK - now to your questions: > - the flashchip is connected as follows: SPI_CLK + SPI_MOSI are connected via a FET_busswitch, and SPI_MISI is connected directly to the chipset. > - I can use FPT.EXE from intel, and it successfully reads the content of the flashchip - but only 4MB!!! > - the file, I got from the hardware development, that should be used here, also has 4MB!!!??? moin! very interesting. this endorses my theory somewhat that the chipset prohibits writes outside the address ranges of the regions defined by the FREGs completely. this is rather bad because it does not work well with the current concept of flashrom, which basically is founded on the idea that we can access the whole under normal circumstances - or at least that the programmer (in your case the chipset) does not get in our way by unexpected means. this would be a very good use case for a layout file... if it would work for reading :/ or a parameter that would tell flashrom to not throw away the data read, if there is an error later... which does not exist either. that said, writing could work quite normally with a layout file. you would need to make the image match the size of the chip though, so that flashrom accepts it in the first place. i think cp image.bin test.bin ; cat image.bin >> test.bin would work. even without a layout file this would probably write correctly... but flashrom would scream when accessing the second half of the chip. please see the manpage for details about the layout file option. i will work on this in one way or another, but please don't expect it to be committed or even working soon. i guess that you know helge wagner at GE? he may be able to help you (in hacking something together) too. if you test the method outlined above i would really like to hear if it works. please note though that it may also brick your setup... dont blame me then please :) if you want to help us and have a method to recover bricked boards (i.e. if you have an external programmer that works with your boards), you could also try to play with the FREG1 values in the descriptor with fit.exe (or fitw.exe). that said, i just read an interesting paragraph in the ibex peak SPI programming guide: "Flash Space Allocation FIT/Ftoolc allocates SPI flash space allocation for each region as follows: 1. 2. If after allocation for all regions there is still space left in flash, then the ME region expands to fill the remaining space. 3. If there is leftover space and the ME region is not implemented, then the BIOS region is expands to use the remaining space. 4. If there is leftover space and the BIOS region is not implemented, then the GbE region is expands to contain the remaining space." not sure if that still applies to cougar point, but i would guess so. in this case i am wondering if your hardware engineering team has created the image correctly (or if they have set up the total size incorrectly to 4MB instead of 8). > P.S.: Bist Du etwa ein Student an der TU Wien - sprichst Du also Deutsch? yes i am, but since this is public and some of us do not speak german, we use english exclusively on the mailing list. you can mail me directly though, if it is important. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] Fix printing of the Boot BIOS Straps on Intel chipsets
by Stefan Tauner 17 Aug '11

17 Aug '11

The meaning of the bits involved has changed several times in the past. This patch takes these changes into account and hence fixes the output of the pretty printing of GCS on all SPI-supported Intel chipsets that are not ICH7 or NM10 (the latter were unaffected, because the defaults were correct). This patch also allows to differentiate Ibex Peak and Cougar Point chipsets from the earlier chipset series (ICH10) by adding new wrapper functions that set "ich_generation" to 11 and 12 respectively. This should not change behavior outside of enable_flash_ich_dc_spi, because the code path for ich_generation >=9 is equal. --- defining all those arrays is not very elegant, but i think it is at least very readable this way. improvements are welcome! reviewers should have an eye on the codepaths for ich_generation >= 9. i did not spot a problem, but it should be checked again. alternatively we could just remove the pretty printing of GCS and just output the bits involved. i would like to keep the pch differentiation anyway though, because i feel it will become handy in the future. tested on my QS57-based thinkpad (probe + partial read) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 129 ++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 81 insertions(+), 48 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 687682a..662273b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -440,11 +440,6 @@ static int enable_flash_poulsbo(struct pci_dev *dev, const char *name) return 0; } -#define ICH_STRAP_RSVD 0x00 -#define ICH_STRAP_SPI 0x01 -#define ICH_STRAP_PCI 0x02 -#define ICH_STRAP_LPC 0x03 - static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) { /* Do we really need no write enable? */ @@ -458,13 +453,39 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, uint8_t bbs, buc; uint32_t tmp, gcs; void *rcrb; - - /* - * TODO: These names are incorrect for EP80579. For that, the solution - * would look like the commented line below. - */ - // static const char *straps_names[] = {"SPI", "reserved", "reserved", "LPC" }; - static const char *straps_names[] = { "reserved", "SPI", "PCI", "LPC" }; + const char *const *straps_names; + + static const char *const straps_names_EP80579[] = { "SPI", "reserved", "reserved", "LPC" }; + static const char *const straps_names_ich7_nm10[] = { "reserved", "SPI", "PCI", "LPC" }; + static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" }; + static const char *const straps_names_pch56[] = { "LPC", "reserved", "PCI", "SPI" }; + static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" }; + + switch (ich_generation) { + case 7: + /* EP80579 may need further changes, but this is the least + * intrusive way to get correct BOOT Strap printing without + * changing the rest of its code path) */ + if (strcmp(name, "EP80579") == 0) + straps_names = straps_names_EP80579; + else + straps_names = straps_names_ich7_nm10; + break; + case 8: + case 9: + case 10: + straps_names = straps_names_ich8910; + break; + case 11: + case 12: + straps_names = straps_names_pch56; + break; + default: + msg_gerr("%s: unknown ICH generation. Please report!\n", + __func__); + straps_names = straps_names_unknown; + break; + } /* Enable Flash Writes */ ret = enable_flash_ich_dc(dev, name); @@ -481,7 +502,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, msg_pdbg("BIOS Interface Lock-Down: %sabled, ", (gcs & 0x1) ? "en" : "dis"); bbs = (gcs >> 10) & 0x3; - msg_pdbg("BOOT BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); + msg_pdbg("Boot BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); buc = mmio_readb(rcrb + 0x3414); msg_pdbg("Top Swap : %s\n", @@ -491,11 +512,11 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, * time. At least not with our current code. So we prevent searching * on ICH7 when the southbridge is strapped to LPC */ - buses_supported = BUS_FWH; if (ich_generation == 7) { - if (bbs == ICH_STRAP_LPC) { - /* No further SPI initialization required */ + if (bbs == 0x03) { + /* If strapped to LPC, no further SPI initialization is + * required. */ return ret; } else { /* Disable LPC/FWH if strapped to PCI or SPI */ @@ -532,6 +553,18 @@ static int enable_flash_ich10(struct pci_dev *dev, const char *name) return enable_flash_ich_dc_spi(dev, name, 10); } +/* Ibex Peak aka. 5 series & 3400 series */ +static int enable_flash_pch5(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 11); +} + +/* Cougar Point aka. 6 series & c200 series */ +static int enable_flash_pch6(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 12); +} + static int via_no_byte_merge(struct pci_dev *dev, const char *name) { uint8_t val; @@ -1158,21 +1191,21 @@ const struct penable chipset_enables[] = { {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_ich10}, - {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_ich10}, - {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_ich10}, - {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_ich10}, - {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_ich10}, - {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_ich10}, - {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_ich10}, - {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_ich10}, - {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_ich10}, - {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_ich10}, - {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_ich10}, - {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_ich10}, - {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_ich10}, - {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_ich10}, - {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_ich10}, + {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_pch6}, + {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_pch6}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_pch6}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_pch6}, + {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_pch6}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_pch6}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_pch6}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_pch6}, + {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_pch6}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_pch6}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6}, + {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, + {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_pch6}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, @@ -1211,23 +1244,23 @@ const struct penable chipset_enables[] = { {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, - {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, - {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, - {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, - {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, - {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, - {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, - {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, - {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, - {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, - {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, - {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, - {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, - {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, - {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, - {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_pch5}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_pch5}, + {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_pch5}, + {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_pch5}, + {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_pch5}, + {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_pch5}, + {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_pch5}, + {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_pch5}, + {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_pch5}, + {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_pch5}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_pch5}, + {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_pch5}, + {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_pch5}, + {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_pch5}, + {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_pch5}, + {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_pch5}, + {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_pch5}, {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, -- 1.7.1

1 0

Advent MT22: flashrom -V
by simon jenkins 17 Aug '11

17 Aug '11

Here is the flashrom -V output for the Advent MT22 system: [root@simon ~]# flashrom -V flashrom v0.9.3-r1368 on Linux 2.6.40-4.fc15.i686.PAE (i686), built with libpci 3.1.7, GCC 4.6.0 20110530 (Red Hat 4.6.0-9), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2183M loops per second, 10 myus = 10 us, 100 myus = 114 us, 1000 myus = 999 us, 10000 myus = 9987 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Advent" DMI string system-product-name: "MT22" DMI string system-version: "100" DMI string baseboard-manufacturer: "To be filled by O.E.M." DMI string baseboard-product-name: "To be filled by O.E.M." DMI string baseboard-version: "To be filled by O.E.M." DMI string chassis-type: "" Found chipset "NVIDIA MCP79", enabling flash write... chipset PCI ID is 10de:0aae, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Write is unsupported! Found SMBus device 10de:0aa2 at 00:03:2 MCP SPI BAR is at 0xfae80000 Mapping NVIDIA MCP6x SPI at 0xfae80000, unaligned size 0x544. SPI control is 0xc105, req=1, gnt=1 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25D16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x13 No operations were specified.

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flashrom August 2011