flashrom December 2011

flashrom@flashrom.org

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[commit] r1475 - trunk
by repository service 20 Dec '11

20 Dec '11

Author: hailfinger Date: Tue Dec 20 01:19:29 2011 New Revision: 1475 URL: http://flashrom.org/trac/flashrom/changeset/1475 Log: Have all programmer init functions register bus masters/programmers All programmer types (Parallel, SPI, Opaque) now register themselves into a generic programmer list and probing is now programmer-centric instead of chip-centric. Registering multiple SPI/... masters at the same time is now possible without any problems. Handling multiple flash chips is still unchanged, but now we have the infrastructure to deal with "dual BIOS" and "one flash behind southbridge and one flash behind EC" sanely. A nice side effect is that this patch kills quite a few global variables and improves the situation for libflashrom. Hint for developers: struct {spi,par,opaque}_programmer now have a void *data pointer to store any additional programmer-specific data, e.g. hardware configuration info. Note: flashrom -f -c FOO -r forced_read.bin does not work anymore. We have to find an architecturally clean way to solve this. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/bitbang_spi.c trunk/cli_classic.c trunk/flash.h trunk/flashrom.c trunk/ichspi.c trunk/mcp6x_spi.c trunk/nicintel_spi.c trunk/ogp_spi.c trunk/opaque.c trunk/programmer.c trunk/programmer.h trunk/rayer_spi.c trunk/spi.c trunk/spi25.c Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/bitbang_spi.c Tue Dec 20 01:19:29 2011 (r1475) @@ -25,42 +25,37 @@ #include "programmer.h" #include "spi.h" -/* Length of half a clock period in usecs. */ -static int bitbang_spi_half_period; - -static const struct bitbang_spi_master *bitbang_spi_master = NULL; - /* Note that CS# is active low, so val=0 means the chip is active. */ -static void bitbang_spi_set_cs(int val) +static void bitbang_spi_set_cs(const const struct bitbang_spi_master *master, int val) { - bitbang_spi_master->set_cs(val); + master->set_cs(val); } -static void bitbang_spi_set_sck(int val) +static void bitbang_spi_set_sck(const const struct bitbang_spi_master *master, int val) { - bitbang_spi_master->set_sck(val); + master->set_sck(val); } -static void bitbang_spi_set_mosi(int val) +static void bitbang_spi_set_mosi(const const struct bitbang_spi_master *master, int val) { - bitbang_spi_master->set_mosi(val); + master->set_mosi(val); } -static int bitbang_spi_get_miso(void) +static int bitbang_spi_get_miso(const const struct bitbang_spi_master *master) { - return bitbang_spi_master->get_miso(); + return master->get_miso(); } -static void bitbang_spi_request_bus(void) +static void bitbang_spi_request_bus(const const struct bitbang_spi_master *master) { - if (bitbang_spi_master->request_bus) - bitbang_spi_master->request_bus(); + if (master->request_bus) + master->request_bus(); } -static void bitbang_spi_release_bus(void) +static void bitbang_spi_release_bus(const const struct bitbang_spi_master *master) { - if (bitbang_spi_master->release_bus) - bitbang_spi_master->release_bus(); + if (master->release_bus) + master->release_bus(); } static int bitbang_spi_send_command(struct flashctx *flash, @@ -78,67 +73,59 @@ .write_256 = default_spi_write_256, }; -int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod) +#if 0 // until it is needed +static int bitbang_spi_shutdown(const struct bitbang_spi_master *master) { + /* FIXME: Run bitbang_spi_release_bus here or per command? */ + return 0; +} +#endif + +int bitbang_spi_init(const struct bitbang_spi_master *master) +{ + struct spi_programmer pgm = spi_programmer_bitbang; /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type, * we catch it here. Same goes for missing initialization of bitbanging * functions. */ if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs || - !master->set_sck || !master->set_mosi || !master->get_miso) { + !master->set_sck || !master->set_mosi || !master->get_miso || + (master->request_bus && !master->release_bus) || + (!master->request_bus && master->release_bus)) { msg_perr("Incomplete SPI bitbang master setting!\n" "Please report a bug at flashrom(a)flashrom.org\n"); - return 1; - } - if (bitbang_spi_master) { - msg_perr("SPI bitbang master already initialized!\n" - "Please report a bug at flashrom(a)flashrom.org\n"); - return 1; + return ERROR_FLASHROM_BUG; } - bitbang_spi_master = master; - bitbang_spi_half_period = halfperiod; + pgm.data = master; + register_spi_programmer(&pgm); - register_spi_programmer(&spi_programmer_bitbang); - - /* FIXME: Run bitbang_spi_request_bus here or in programmer init? */ - bitbang_spi_set_cs(1); - bitbang_spi_set_sck(0); - bitbang_spi_set_mosi(0); - return 0; -} - -int bitbang_spi_shutdown(const struct bitbang_spi_master *master) -{ - if (!bitbang_spi_master) { - msg_perr("Shutting down an uninitialized SPI bitbang master!\n" - "Please report a bug at flashrom(a)flashrom.org\n"); - return 1; - } - if (master != bitbang_spi_master) { - msg_perr("Shutting down a mismatched SPI bitbang master!\n" - "Please report a bug at flashrom(a)flashrom.org\n"); - return 1; - } - - /* FIXME: Run bitbang_spi_release_bus here or per command? */ - bitbang_spi_master = NULL; + /* Only mess with the bus if we're sure nobody else uses it. */ + bitbang_spi_request_bus(master); + bitbang_spi_set_cs(master, 1); + bitbang_spi_set_sck(master, 0); + bitbang_spi_set_mosi(master, 0); + /* FIXME: Release SPI bus here and request it again for each command or + * don't release it now and only release it on programmer shutdown? + */ + bitbang_spi_release_bus(master); return 0; } -static uint8_t bitbang_spi_readwrite_byte(uint8_t val) +static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master, + uint8_t val) { uint8_t ret = 0; int i; for (i = 7; i >= 0; i--) { - bitbang_spi_set_mosi((val >> i) & 1); - programmer_delay(bitbang_spi_half_period); - bitbang_spi_set_sck(1); + bitbang_spi_set_mosi(master, (val >> i) & 1); + programmer_delay(master->half_period); + bitbang_spi_set_sck(master, 1); ret <<= 1; - ret |= bitbang_spi_get_miso(); - programmer_delay(bitbang_spi_half_period); - bitbang_spi_set_sck(0); + ret |= bitbang_spi_get_miso(master); + programmer_delay(master->half_period); + bitbang_spi_set_sck(master, 0); } return ret; } @@ -149,23 +136,24 @@ unsigned char *readarr) { int i; + const struct bitbang_spi_master *master = flash->pgm->spi.data; /* FIXME: Run bitbang_spi_request_bus here or in programmer init? * Requesting and releasing the SPI bus is handled in here to allow the * programmer to use its own SPI engine for native accesses. */ - bitbang_spi_request_bus(); - bitbang_spi_set_cs(0); + bitbang_spi_request_bus(master); + bitbang_spi_set_cs(master, 0); for (i = 0; i < writecnt; i++) - bitbang_spi_readwrite_byte(writearr[i]); + bitbang_spi_rw_byte(master, writearr[i]); for (i = 0; i < readcnt; i++) - readarr[i] = bitbang_spi_readwrite_byte(0); + readarr[i] = bitbang_spi_rw_byte(master, 0); - programmer_delay(bitbang_spi_half_period); - bitbang_spi_set_cs(1); - programmer_delay(bitbang_spi_half_period); + programmer_delay(master->half_period); + bitbang_spi_set_cs(master, 1); + programmer_delay(master->half_period); /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */ - bitbang_spi_release_bus(); + bitbang_spi_release_bus(master); return 0; } Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/cli_classic.c Tue Dec 20 01:19:29 2011 (r1475) @@ -172,7 +172,7 @@ struct flashctx flashes[3]; struct flashctx *fill_flash; const char *name; - int namelen, opt, i; + int namelen, opt, i, j; int startchip = 0, chipcount = 0, option_index = 0, force = 0; #if CONFIG_PRINT_WIKI == 1 int list_supported_wiki = 0; @@ -444,17 +444,21 @@ ret = 1; goto out_shutdown; } - tempstr = flashbuses_to_text(buses_supported); - msg_pdbg("This programmer supports the following protocols: %s.\n", + tempstr = flashbuses_to_text(get_buses_supported()); + msg_pdbg("The following protocols are supported: %s.\n", tempstr); free(tempstr); - for (i = 0; i < ARRAY_SIZE(flashes); i++) { - startchip = probe_flash(startchip, &flashes[i], 0); - if (startchip == -1) - break; - chipcount++; - startchip++; + for (j = 0; j < registered_programmer_count; j++) { + startchip = 0; + for (i = 0; i < ARRAY_SIZE(flashes); i++) { + startchip = probe_flash(&registered_programmers[j], + startchip, &flashes[i], 0); + if (startchip == -1) + break; + chipcount++; + startchip++; + } } if (chipcount > 1) { @@ -472,6 +476,7 @@ printf("Note: flashrom can never write if the flash " "chip isn't found automatically.\n"); } +#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered? if (force && read_it && chip_to_probe) { printf("Force read (-f -r -c) requested, pretending " "the chip is there:\n"); @@ -486,6 +491,7 @@ "contain garbage.\n"); return read_flash_to_file(&flashes[0], filename); } +#endif ret = 1; goto out_shutdown; } else if (!chip_to_probe) { @@ -502,7 +508,7 @@ check_chip_supported(fill_flash); size = fill_flash->total_size * 1024; - if (check_max_decode((buses_supported & fill_flash->bustype), size) && + if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->bustype, size) && (!force)) { fprintf(stderr, "Chip is too big for this programmer " "(-V gives details). Use --force to override.\n"); Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/flash.h Tue Dec 20 01:19:29 2011 (r1475) @@ -171,6 +171,7 @@ chipaddr virtual_memory; /* Some flash devices have an additional register space. */ chipaddr virtual_registers; + struct registered_programmer *pgm; }; #define TEST_UNTESTED 0 @@ -224,14 +225,13 @@ write_gran_1byte, write_gran_256bytes, }; -extern enum chipbustype buses_supported; extern int verbose; extern const char flashrom_version[]; extern char *chip_to_probe; void map_flash_registers(struct flashctx *flash); int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int erase_flash(struct flashctx *flash); -int probe_flash(int startchip, struct flashctx *fill_flash, int force); +int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force); int read_flash_to_file(struct flashctx *flash, const char *filename); int min(int a, int b); int max(int a, int b); @@ -256,6 +256,13 @@ /* Something happened that shouldn't happen, we'll abort. */ #define ERROR_FATAL -0xee +#define ERROR_FLASHROM_BUG -200 +/* We reached one of the hardcoded limits of flashrom. This can be fixed by + * increasing the limit of a compile-time allocation or by switching to dynamic + * allocation. + * Note: If this warning is triggered, check first for runaway registrations. + */ +#define ERROR_FLASHROM_LIMIT -201 /* cli_output.c */ /* Let gcc and clang check for correct printf-style format strings. */ @@ -297,4 +304,5 @@ int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds); uint32_t spi_get_valid_read_addr(struct flashctx *flash); +enum chipbustype get_buses_supported(void); #endif /* !__FLASH_H__ */ Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/flashrom.c Tue Dec 20 01:19:29 2011 (r1475) @@ -46,9 +46,6 @@ static char *programmer_param = NULL; -/* Supported buses for the current programmer. */ -enum chipbustype buses_supported; - /* * Programmers supporting multiple buses can have differing size limits on * each bus. Store the limits for each bus in a common struct. @@ -314,7 +311,6 @@ .fwh = 0xffffffff, .spi = 0xffffffff, }; - buses_supported = BUS_NONE; /* Default to top aligned flash at 4 GB. */ flashbase = 0; /* Registering shutdown functions is now allowed. */ @@ -361,44 +357,44 @@ void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { - par_programmer->chip_writeb(flash, val, addr); + flash->pgm->par.chip_writeb(flash, val, addr); } void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr) { - par_programmer->chip_writew(flash, val, addr); + flash->pgm->par.chip_writew(flash, val, addr); } void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr) { - par_programmer->chip_writel(flash, val, addr); + flash->pgm->par.chip_writel(flash, val, addr); } void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len) { - par_programmer->chip_writen(flash, buf, addr, len); + flash->pgm->par.chip_writen(flash, buf, addr, len); } uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr) { - return par_programmer->chip_readb(flash, addr); + return flash->pgm->par.chip_readb(flash, addr); } uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr) { - return par_programmer->chip_readw(flash, addr); + return flash->pgm->par.chip_readw(flash, addr); } uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr) { - return par_programmer->chip_readl(flash, addr); + return flash->pgm->par.chip_readl(flash, addr); } void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len) { - par_programmer->chip_readn(flash, buf, addr, len); + flash->pgm->par.chip_readn(flash, buf, addr, len); } void programmer_delay(int usecs) @@ -942,7 +938,8 @@ return 1; } -int probe_flash(int startchip, struct flashctx *fill_flash, int force) +int probe_flash(struct registered_programmer *pgm, int startchip, + struct flashctx *fill_flash, int force) { const struct flashchip *flash; unsigned long base = 0; @@ -954,20 +951,9 @@ for (flash = flashchips + startchip; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) continue; - buses_common = buses_supported & flash->bustype; - if (!buses_common) { - msg_gspew("Probing for %s %s, %d kB: skipped. ", - flash->vendor, flash->name, flash->total_size); - tmp = flashbuses_to_text(buses_supported); - msg_gspew("Host bus type %s ", tmp); - free(tmp); - tmp = flashbuses_to_text(flash->bustype); - msg_gspew("and chip bus type %s are incompatible.", - tmp); - free(tmp); - msg_gspew("\n"); + buses_common = pgm->buses_supported & flash->bustype; + if (!buses_common) continue; - } msg_gdbg("Probing for %s %s, %d kB: ", flash->vendor, flash->name, flash->total_size); if (!flash->probe && !force) { @@ -981,6 +967,7 @@ /* Start filling in the dynamic data. */ memcpy(fill_flash, flash, sizeof(struct flashchip)); + fill_flash->pgm = pgm; base = flashbase ? flashbase : (0xffffffff - size + 1); fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size); Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/ichspi.c Tue Dec 20 01:19:29 2011 (r1475) @@ -635,7 +635,7 @@ /* Read len bytes from the fdata/spid register into the data array. * - * Note that using len > spi_programmer->max_data_read will return garbage or + * Note that using len > flash->pgm->spi.max_data_read will return garbage or * may even crash. */ static void ich_read_data(uint8_t *data, int len, int reg0_off) @@ -653,7 +653,7 @@ /* Fill len bytes from the data array into the fdata/spid registers. * - * Note that using len > spi_programmer->max_data_write will trash the registers + * Note that using len > flash->pgm->spi.max_data_write will trash the registers * following the data registers. */ static void ich_fill_data(const uint8_t *data, int len, int reg0_off) @@ -960,9 +960,9 @@ uint8_t datalength, uint8_t * data) { /* max_data_read == max_data_write for all Intel/VIA SPI masters */ - uint8_t maxlength = spi_programmer->max_data_read; + uint8_t maxlength = flash->pgm->spi.max_data_read; - if (spi_programmer->type == SPI_CONTROLLER_NONE) { + if (ich_generation == CHIPSET_ICH_UNKNOWN) { msg_perr("%s: unsupported chipset\n", __func__); return -1; } @@ -1297,7 +1297,7 @@ REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS)); while (len > 0) { - block_len = min(len, opaque_programmer->max_data_read); + block_len = min(len, flash->pgm->opaque.max_data_read); ich_hwseq_set_addr(addr); hsfc = REGREAD16(ICH9_REG_HSFC); hsfc &= ~HSFC_FCYCLE; /* set read operation */ @@ -1336,7 +1336,7 @@ while (len > 0) { ich_hwseq_set_addr(addr); - block_len = min(len, opaque_programmer->max_data_write); + block_len = min(len, flash->pgm->opaque.max_data_write); ich_fill_data(buf, block_len, ICH9_REG_FDATA0); hsfc = REGREAD16(ICH9_REG_HSFC); hsfc &= ~HSFC_FCYCLE; /* clear operation */ Modified: trunk/mcp6x_spi.c ============================================================================== --- trunk/mcp6x_spi.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/mcp6x_spi.c Tue Dec 20 01:19:29 2011 (r1475) @@ -98,6 +98,7 @@ .get_miso = mcp6x_bitbang_get_miso, .request_bus = mcp6x_request_spibus, .release_bus = mcp6x_release_spibus, + .half_period = 0, }; int mcp6x_spi_init(int want_spi) @@ -159,8 +160,7 @@ (status >> MCP6X_SPI_GRANT) & 0x1); mcp_gpiostate = status & 0xff; - /* Zero halfperiod delay. */ - if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 0)) { + if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) { /* This should never happen. */ msg_perr("MCP6X bitbang SPI master init failed!\n"); return 1; Modified: trunk/nicintel_spi.c ============================================================================== --- trunk/nicintel_spi.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/nicintel_spi.c Tue Dec 20 01:19:29 2011 (r1475) @@ -137,6 +137,7 @@ .get_miso = nicintel_bitbang_get_miso, .request_bus = nicintel_request_spibus, .release_bus = nicintel_release_spibus, + .half_period = 1, }; static int nicintel_spi_shutdown(void *data) @@ -181,8 +182,7 @@ if (register_shutdown(nicintel_spi_shutdown, NULL)) return 1; - /* 1 usec halfperiod delay for now. */ - if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1)) + if (bitbang_spi_init(&bitbang_spi_master_nicintel)) return 1; return 0; Modified: trunk/ogp_spi.c ============================================================================== --- trunk/ogp_spi.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/ogp_spi.c Tue Dec 20 01:19:29 2011 (r1475) @@ -91,6 +91,7 @@ .get_miso = ogp_bitbang_get_miso, .request_bus = ogp_request_spibus, .release_bus = ogp_release_spibus, + .half_period = 0, }; static int ogp_spi_shutdown(void *data) @@ -136,8 +137,7 @@ if (register_shutdown(ogp_spi_shutdown, NULL)) return 1; - /* no delay for now. */ - if (bitbang_spi_init(&bitbang_spi_master_ogp, 0)) + if (bitbang_spi_init(&bitbang_spi_master_ogp)) return 1; return 0; Modified: trunk/opaque.c ============================================================================== --- trunk/opaque.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/opaque.c Tue Dec 20 01:19:29 2011 (r1475) @@ -30,70 +30,37 @@ #include "chipdrivers.h" #include "programmer.h" -const struct opaque_programmer opaque_programmer_none = { - .max_data_read = MAX_DATA_UNSPECIFIED, - .max_data_write = MAX_DATA_UNSPECIFIED, - .probe = NULL, - .read = NULL, - .write = NULL, - .erase = NULL, -}; - -const struct opaque_programmer *opaque_programmer = &opaque_programmer_none; - int probe_opaque(struct flashctx *flash) { - if (!opaque_programmer->probe) { - msg_perr("%s called before register_opaque_programmer. " - "Please report a bug at flashrom(a)flashrom.org\n", - __func__); - return 0; - } - - return opaque_programmer->probe(flash); + return flash->pgm->opaque.probe(flash); } int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - if (!opaque_programmer->read) { - msg_perr("%s called before register_opaque_programmer. " - "Please report a bug at flashrom(a)flashrom.org\n", - __func__); - return 1; - } - return opaque_programmer->read(flash, buf, start, len); + return flash->pgm->opaque.read(flash, buf, start, len); } int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - if (!opaque_programmer->write) { - msg_perr("%s called before register_opaque_programmer. " - "Please report a bug at flashrom(a)flashrom.org\n", - __func__); - return 1; - } - return opaque_programmer->write(flash, buf, start, len); + return flash->pgm->opaque.write(flash, buf, start, len); } int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen) { - if (!opaque_programmer->erase) { - msg_perr("%s called before register_opaque_programmer. " - "Please report a bug at flashrom(a)flashrom.org\n", - __func__); - return 1; - } - return opaque_programmer->erase(flash, blockaddr, blocklen); + return flash->pgm->opaque.erase(flash, blockaddr, blocklen); } -void register_opaque_programmer(const struct opaque_programmer *pgm) +int register_opaque_programmer(const struct opaque_programmer *pgm) { + struct registered_programmer rpgm; + if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) { - msg_perr("%s called with one of probe/read/write/erase being " - "NULL. Please report a bug at flashrom(a)flashrom.org\n", + msg_perr("%s called with incomplete programmer definition. " + "Please report a bug at flashrom(a)flashrom.org\n", __func__); - return; + return ERROR_FLASHROM_BUG; } - opaque_programmer = pgm; - buses_supported |= BUS_PROG; + rpgm.buses_supported = BUS_PROG; + rpgm.opaque = *pgm; + return register_programmer(&rpgm); } Modified: trunk/programmer.c ============================================================================== --- trunk/programmer.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/programmer.c Tue Dec 20 01:19:29 2011 (r1475) @@ -21,19 +21,6 @@ #include "flash.h" #include "programmer.h" -static const struct par_programmer par_programmer_none = { - .chip_readb = noop_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = noop_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, -}; - -const struct par_programmer *par_programmer = &par_programmer_none; - /* No-op shutdown() for programmers which don't need special handling */ int noop_shutdown(void) { @@ -52,13 +39,7 @@ { } -/* No-op chip_writeb() for drivers not supporting addr/data pair accesses */ -uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr) -{ - return 0xff; -} - -/* No-op chip_writeb() for drivers not supporting addr/data pair accesses */ +/* No-op chip_writeb() for parallel style drivers not supporting writes */ void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { } @@ -115,8 +96,50 @@ return; } -void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses) +int register_par_programmer(const struct par_programmer *pgm, + const enum chipbustype buses) +{ + struct registered_programmer rpgm; + if (!pgm->chip_writeb || !pgm->chip_writew || !pgm->chip_writel || + !pgm->chip_writen || !pgm->chip_readb || !pgm->chip_readw || + !pgm->chip_readl || !pgm->chip_readn) { + msg_perr("%s called with incomplete programmer definition. " + "Please report a bug at flashrom(a)flashrom.org\n", + __func__); + return ERROR_FLASHROM_BUG; + } + + rpgm.buses_supported = buses; + rpgm.par = *pgm; + return register_programmer(&rpgm); +} + +/* The limit of 4 is totally arbitrary. */ +#define PROGRAMMERS_MAX 4 +struct registered_programmer registered_programmers[PROGRAMMERS_MAX]; +int registered_programmer_count = 0; + +/* This function copies the struct registered_programmer parameter. */ +int register_programmer(struct registered_programmer *pgm) +{ + if (registered_programmer_count >= PROGRAMMERS_MAX) { + msg_perr("Tried to register more than %i programmer " + "interfaces.\n", PROGRAMMERS_MAX); + return ERROR_FLASHROM_LIMIT; + } + registered_programmers[registered_programmer_count] = *pgm; + registered_programmer_count++; + + return 0; +} + +enum chipbustype get_buses_supported(void) { - par_programmer = pgm; - buses_supported |= buses; + int i; + enum chipbustype ret = BUS_NONE; + + for (i = 0; i < registered_programmer_count; i++) + ret |= registered_programmers[i].buses_supported; + + return ret; } Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/programmer.h Tue Dec 20 01:19:29 2011 (r1475) @@ -133,6 +133,8 @@ int (*get_miso) (void); void (*request_bus) (void); void (*release_bus) (void); + /* Length of half a clock period in usecs. */ + unsigned int half_period; }; #if CONFIG_INTERNAL == 1 @@ -208,6 +210,7 @@ #if NEED_PCI == 1 /* pcidev.c */ +// FIXME: These need to be local, not global extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; @@ -427,8 +430,7 @@ #endif /* bitbang_spi.c */ -int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); -int bitbang_spi_shutdown(const struct bitbang_spi_master *master); +int bitbang_spi_init(const struct bitbang_spi_master *master); /* buspirate_spi.c */ #if CONFIG_BUSPIRATE_SPI == 1 @@ -452,6 +454,7 @@ uint32_t fwh; uint32_t spi; }; +// FIXME: These need to be local, not global extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; @@ -498,7 +501,6 @@ SPI_CONTROLLER_SERPROG, #endif }; -extern const int spi_programmer_count; #define MAX_DATA_UNSPECIFIED 0 #define MAX_DATA_READ_UNLIMITED 64 * 1024 @@ -514,15 +516,15 @@ /* Optimized functions for this programmer */ int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); + const void *data; }; -extern const struct spi_programmer *spi_programmer; int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds); int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -void register_spi_programmer(const struct spi_programmer *programmer); +int register_spi_programmer(const struct spi_programmer *programmer); /* ichspi.c */ #if CONFIG_INTERNAL == 1 @@ -570,15 +572,14 @@ int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); + const void *data; }; -extern const struct opaque_programmer *opaque_programmer; -void register_opaque_programmer(const struct opaque_programmer *pgm); +int register_opaque_programmer(const struct opaque_programmer *pgm); /* programmer.c */ int noop_shutdown(void); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); void fallback_unmap(void *virt_addr, size_t len); -uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr); void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); @@ -595,9 +596,20 @@ uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr); uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr); void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); + const void *data; }; -extern const struct par_programmer *par_programmer; -void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); +int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); +struct registered_programmer { + enum chipbustype buses_supported; + union { + struct par_programmer par; + struct spi_programmer spi; + struct opaque_programmer opaque; + }; +}; +extern struct registered_programmer registered_programmers[]; +extern int registered_programmer_count; +int register_programmer(struct registered_programmer *pgm); /* serprog.c */ #if CONFIG_SERPROG == 1 Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/rayer_spi.c Tue Dec 20 01:19:29 2011 (r1475) @@ -92,6 +92,7 @@ .set_sck = rayer_bitbang_set_sck, .set_mosi = rayer_bitbang_set_mosi, .get_miso = rayer_bitbang_get_miso, + .half_period = 0, }; int rayer_spi_init(void) @@ -171,8 +172,7 @@ /* Get the initial value before writing to any line. */ lpt_outbyte = INB(lpt_iobase); - /* Zero halfperiod delay. */ - if (bitbang_spi_init(&bitbang_spi_master_rayer, 0)) + if (bitbang_spi_init(&bitbang_spi_master_rayer)) return 1; return 0; Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/spi.c Tue Dec 20 01:19:29 2011 (r1475) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger + * Copyright (C) 2007, 2008, 2009, 2010, 2011 Carl-Daniel Hailfinger * Copyright (C) 2008 coresystems GmbH * * This program is free software; you can redistribute it and/or modify @@ -30,43 +30,17 @@ #include "programmer.h" #include "spi.h" -const struct spi_programmer spi_programmer_none = { - .type = SPI_CONTROLLER_NONE, - .max_data_read = MAX_DATA_UNSPECIFIED, - .max_data_write = MAX_DATA_UNSPECIFIED, - .command = NULL, - .multicommand = NULL, - .read = NULL, - .write_256 = NULL, -}; - -const struct spi_programmer *spi_programmer = &spi_programmer_none; - int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { - if (!spi_programmer->command) { - msg_perr("%s called, but SPI is unsupported on this " - "hardware. Please report a bug at " - "flashrom(a)flashrom.org\n", __func__); - return 1; - } - - return spi_programmer->command(flash, writecnt, readcnt, writearr, + return flash->pgm->spi.command(flash, writecnt, readcnt, writearr, readarr); } int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds) { - if (!spi_programmer->multicommand) { - msg_perr("%s called, but SPI is unsupported on this " - "hardware. Please report a bug at " - "flashrom(a)flashrom.org\n", __func__); - return 1; - } - - return spi_programmer->multicommand(flash, cmds); + return flash->pgm->spi.multicommand(flash, cmds); } int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, @@ -104,7 +78,7 @@ int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - unsigned int max_data = spi_programmer->max_data_read; + unsigned int max_data = flash->pgm->spi.max_data_read; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI read chunk size not defined " "on this hardware. Please report a bug at " @@ -117,7 +91,7 @@ int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - unsigned int max_data = spi_programmer->max_data_write; + unsigned int max_data = flash->pgm->spi.max_data_write; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI write chunk size not defined " "on this hardware. Please report a bug at " @@ -131,12 +105,6 @@ unsigned int len) { unsigned int addrbase = 0; - if (!spi_programmer->read) { - msg_perr("%s called, but SPI read is unsupported on this " - "hardware. Please report a bug at " - "flashrom(a)flashrom.org\n", __func__); - return 1; - } /* Check if the chip fits between lowest valid and highest possible * address. Highest possible address with the current SPI implementation @@ -157,7 +125,7 @@ "access window.\n"); msg_perr("Read will probably return garbage.\n"); } - return spi_programmer->read(flash, buf, addrbase + start, len); + return flash->pgm->spi.read(flash, buf, addrbase + start, len); } /* @@ -170,14 +138,7 @@ int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - if (!spi_programmer->write_256) { - msg_perr("%s called, but SPI page write is unsupported on this " - "hardware. Please report a bug at " - "flashrom(a)flashrom.org\n", __func__); - return 1; - } - - return spi_programmer->write_256(flash, buf, start, len); + return flash->pgm->spi.write_256(flash, buf, start, len); } /* @@ -187,7 +148,7 @@ */ uint32_t spi_get_valid_read_addr(struct flashctx *flash) { - switch (spi_programmer->type) { + switch (flash->pgm->spi.type) { #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) case SPI_CONTROLLER_ICH7: @@ -200,8 +161,22 @@ } } -void register_spi_programmer(const struct spi_programmer *pgm) +int register_spi_programmer(const struct spi_programmer *pgm) { - spi_programmer = pgm; - buses_supported |= BUS_SPI; + struct registered_programmer rpgm; + + if (!pgm->write_256 || !pgm->read || !pgm->command || + !pgm->multicommand || + ((pgm->command == default_spi_send_command) && + (pgm->multicommand == default_spi_send_multicommand))) { + msg_perr("%s called with incomplete programmer definition. " + "Please report a bug at flashrom(a)flashrom.org\n", + __func__); + return ERROR_FLASHROM_BUG; + } + + + rpgm.buses_supported = BUS_SPI; + rpgm.spi = *pgm; + return register_programmer(&rpgm); } Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Sun Dec 18 16:01:24 2011 (r1474) +++ trunk/spi25.c Tue Dec 20 01:19:29 2011 (r1475) @@ -179,7 +179,7 @@ /* Some SPI controllers do not support commands with writecnt=1 and * readcnt=4. */ - switch (spi_programmer->type) { + switch (flash->pgm->spi.type) { #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) case SPI_CONTROLLER_IT87XX: @@ -1120,7 +1120,7 @@ .readarr = NULL, }}; - switch (spi_programmer->type) { + switch (flash->pgm->spi.type) { #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) case SPI_CONTROLLER_IT87XX:

1 0

Re: [flashrom] ECS K7SEM (V1.0) - OK
by Stefan Tauner 20 Dec '11

20 Dec '11

On Wed, 14 Dec 2011 16:30:51 -0200 Marcos Felipe Rasia de Mello <marcosfrm(a)gmail.com> wrote: > ECS K7SEM (V1.0) success report. > > Board link: http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?CategoryID=1&D… > > BIOS: http://download.ecsusa.com/dlfileecs/bios/mb/k7/k7sem/k7sem_12b.exe > (K7SEM Ver:1.2b 01/27/2003) > > Marcos thanks marcos! i have added the mainboard and marked the chipset as tested locally. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] [PATCH] Cross-compilation fixes
by Carl-Daniel Hailfinger 19 Dec '11

19 Dec '11

Am 09.12.2011 05:02 schrieb David Hendricks: > On Thu, Dec 8, 2011 at 12:18 PM, Carl-Daniel Hailfinger < > c-d.hailfinger.devel.2006(a)gmx.net> wrote: > >>> Most likely no arm support? >> Indeed, ARM support is missing. I think it is mainy held back by libpci >> breakage for which we only have a really hackish workaround. > > For what it's worth, when I tested the patch earlier it worked on ARM with > that libpci hack. The patch has been tested natively on FreeBSD, MinGW, Linux, DragonFlyBSD, with gcc and clang, cross-compiled with clang on Linux for Windows, cross-compiled with DJGPP on Linux for DOS, cross-compiled on Linux for MinGW, natively on Linux PowerPC, .... Ack anyone? Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

Bios Update
by Marko Preuss 19 Dec '11

19 Dec '11

Hello has this updated ? Output Informations in the teminal marko@marko-desktop:~$ sudo flashrom -E -V flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2480M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 992 us, 10000 myus = 10222 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "ECS" DMI string system-product-name: "GF7100/7050PVT-M3" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "ECS" DMI string baseboard-product-name: "GF7100/7050PVT-M3" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP73" with PCI ID 10de:07d7. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:07d8 at 00:03:1 MCP SPI BAR is at 0xfec80000 Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544. SPI control is 0xc012, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Chip status register is 00 Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x13 Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:E, 0x001000-0x001fff:E, 0x002000-0x002fff:E, 0x003000-0x003fff:E, 0x004000-0x004fff:E, 0x005000-0x005fff:E, 0x006000-0x006fff:E, 0x007000-0x007fff:E, 0x008000-0x008fff:E, 0x009000-0x009fff:E, 0x00a000-0x00afff:E, 0x00b000-0x00bfff:E, 0x00c000-0x00cfff:E, 0x00d000-0x00dfff:E, 0x00e000-0x00efff:E, 0x00f000-0x00ffff:E, 0x010000-0x010fff:E, 0x011000-0x011fff:E, 0x012000-0x012fff:E, 0x013000-0x013fff:E, 0x014000-0x014fff:E, 0x015000-0x015fff:E, 0x016000-0x016fff:E, 0x017000-0x017fff:E, 0x018000-0x018fff:E, 0x019000-0x019fff:E, 0x01a000-0x01afff:E, 0x01b000-0x01bfff:E, 0x01c000-0x01cfff:E, 0x01d000-0x01dfff:E, 0x01e000-0x01efff:E, 0x01f000-0x01ffff:E, 0x020000-0x020fff:E, 0x021000-0x021fff:E, 0x022000-0x022fff:E, 0x023000-0x023fff:E, 0x024000-0x024fff:E, 0x025000-0x025fff:E, 0x026000-0x026fff:E, 0x027000-0x027fff:E, 0x028000-0x028fff:E, 0x029000-0x029fff:E, 0x02a000-0x02afff:E, 0x02b000-0x02bfff:E, 0x02c000-0x02cfff:E, 0x02d000-0x02dfff:E, 0x02e000-0x02efff:E, 0x02f000-0x02ffff:E, 0x030000-0x030fff:E, 0x031000-0x031fff:E, 0x032000-0x032fff:E, 0x033000-0x033fff:E, 0x034000-0x034fff:E, 0x035000-0x035fff:E, 0x036000-0x036fff:E, 0x037000-0x037fff:E, 0x038000-0x038fff:E, 0x039000-0x039fff:E, 0x03a000-0x03afff:E, 0x03b000-0x03bfff:E, 0x03c000-0x03cfff:E, 0x03d000-0x03dfff:E, 0x03e000-0x03efff:E, 0x03f000-0x03ffff:E, 0x040000-0x040fff:E, 0x041000-0x041fff:E, 0x042000-0x042fff:E, 0x043000-0x043fff:E, 0x044000-0x044fff:E, 0x045000-0x045fff:E, 0x046000-0x046fff:E, 0x047000-0x047fff:E, 0x048000-0x048fff:E, 0x049000-0x049fff:E, 0x04a000-0x04afff:E, 0x04b000-0x04bfff:E, 0x04c000-0x04cfff:E, 0x04d000-0x04dfff:E, 0x04e000-0x04efff:E, 0x04f000-0x04ffff:E, 0x050000-0x050fff:E, 0x051000-0x051fff:E, 0x052000-0x052fff:E, 0x053000-0x053fff:E, 0x054000-0x054fff:E, 0x055000-0x055fff:E, 0x056000-0x056fff:E, 0x057000-0x057fff:E, 0x058000-0x058fff:E, 0x059000-0x059fff:E, 0x05a000-0x05afff:E, 0x05b000-0x05bfff:E, 0x05c000-0x05cfff:E, 0x05d000-0x05dfff:E, 0x05e000-0x05efff:E, 0x05f000-0x05ffff:E, 0x060000-0x060fff:E, 0x061000-0x061fff:E, 0x062000-0x062fff:E, 0x063000-0x063fff:E, 0x064000-0x064fff:E, 0x065000-0x065fff:E, 0x066000-0x066fff:E, 0x067000-0x067fff:E, 0x068000-0x068fff:E, 0x069000-0x069fff:E, 0x06a000-0x06afff:E, 0x06b000-0x06bfff:E, 0x06c000-0x06cfff:E, 0x06d000-0x06dfff:E, 0x06e000-0x06efff:E, 0x06f000-0x06ffff:E, 0x070000-0x070fff:E, 0x071000-0x071fff:E, 0x072000-0x072fff:E, 0x073000-0x073fff:E, 0x074000-0x074fff:E, 0x075000-0x075fff:E, 0x076000-0x076fff:E, 0x077000-0x077fff:E, 0x078000-0x078fff:E, 0x079000-0x079fff:E, 0x07a000-0x07afff:E, 0x07b000-0x07bfff:E, 0x07c000-0x07cfff:E, 0x07d000-0x07dfff:E, 0x07e000-0x07efff:E, 0x07f000-0x07ffff:E, 0x080000-0x080fff:E, 0x081000-0x081fff:E, 0x082000-0x082fff:E, 0x083000-0x083fff:E, 0x084000-0x084fff:E, 0x085000-0x085fff:E, 0x086000-0x086fff:E, 0x087000-0x087fff:E, 0x088000-0x088fff:E, 0x089000-0x089fff:E, 0x08a000-0x08afff:E, 0x08b000-0x08bfff:E, 0x08c000-0x08cfff:E, 0x08d000-0x08dfff:E, 0x08e000-0x08efff:E, 0x08f000-0x08ffff:E, 0x090000-0x090fff:E, 0x091000-0x091fff:E, 0x092000-0x092fff:E, 0x093000-0x093fff:E, 0x094000-0x094fff:E, 0x095000-0x095fff:E, 0x096000-0x096fff:E, 0x097000-0x097fff:E, 0x098000-0x098fff:E, 0x099000-0x099fff:E, 0x09a000-0x09afff:E, 0x09b000-0x09bfff:E, 0x09c000-0x09cfff:E, 0x09d000-0x09dfff:E, 0x09e000-0x09efff:E, 0x09f000-0x09ffff:E, 0x0a0000-0x0a0fff:E, 0x0a1000-0x0a1fff:E, 0x0a2000-0x0a2fff:E, 0x0a3000-0x0a3fff:E, 0x0a4000-0x0a4fff:E, 0x0a5000-0x0a5fff:E, 0x0a6000-0x0a6fff:E, 0x0a7000-0x0a7fff:E, 0x0a8000-0x0a8fff:E, 0x0a9000-0x0a9fff:E, 0x0aa000-0x0aafff:E, 0x0ab000-0x0abfff:E, 0x0ac000-0x0acfff:E, 0x0ad000-0x0adfff:E, 0x0ae000-0x0aefff:E, 0x0af000-0x0affff:E, 0x0b0000-0x0b0fff:E, 0x0b1000-0x0b1fff:E, 0x0b2000-0x0b2fff:E, 0x0b3000-0x0b3fff:E, 0x0b4000-0x0b4fff:E, 0x0b5000-0x0b5fff:E, 0x0b6000-0x0b6fff:E, 0x0b7000-0x0b7fff:E, 0x0b8000-0x0b8fff:E, 0x0b9000-0x0b9fff:E, 0x0ba000-0x0bafff:E, 0x0bb000-0x0bbfff:E, 0x0bc000-0x0bcfff:E, 0x0bd000-0x0bdfff:E, 0x0be000-0x0befff:E, 0x0bf000-0x0bffff:E, 0x0c0000-0x0c0fff:E, 0x0c1000-0x0c1fff:E, 0x0c2000-0x0c2fff:E, 0x0c3000-0x0c3fff:E, 0x0c4000-0x0c4fff:E, 0x0c5000-0x0c5fff:E, 0x0c6000-0x0c6fff:E, 0x0c7000-0x0c7fff:E, 0x0c8000-0x0c8fff:E, 0x0c9000-0x0c9fff:E, 0x0ca000-0x0cafff:E, 0x0cb000-0x0cbfff:E, 0x0cc000-0x0ccfff:E, 0x0cd000-0x0cdfff:E, 0x0ce000-0x0cefff:E, 0x0cf000-0x0cffff:E, 0x0d0000-0x0d0fff:E, 0x0d1000-0x0d1fff:E, 0x0d2000-0x0d2fff:E, 0x0d3000-0x0d3fff:E, 0x0d4000-0x0d4fff:E, 0x0d5000-0x0d5fff:E, 0x0d6000-0x0d6fff:E, 0x0d7000-0x0d7fff:E, 0x0d8000-0x0d8fff:E, 0x0d9000-0x0d9fff:E, 0x0da000-0x0dafff:E, 0x0db000-0x0dbfff:E, 0x0dc000-0x0dcfff:E, 0x0dd000-0x0ddfff:E, 0x0de000-0x0defff:E, 0x0df000-0x0dffff:E, 0x0e0000-0x0e0fff:E, 0x0e1000-0x0e1fff:E, 0x0e2000-0x0e2fff:E, 0x0e3000-0x0e3fff:E, 0x0e4000-0x0e4fff:E, 0x0e5000-0x0e5fff:E, 0x0e6000-0x0e6fff:E, 0x0e7000-0x0e7fff:E, 0x0e8000-0x0e8fff:E, 0x0e9000-0x0e9fff:E, 0x0ea000-0x0eafff:E, 0x0eb000-0x0ebfff:E, 0x0ec000-0x0ecfff:E, 0x0ed000-0x0edfff:E, 0x0ee000-0x0eefff:E, 0x0ef000-0x0effff:E, 0x0f0000-0x0f0fff:E, 0x0f1000-0x0f1fff:E, 0x0f2000-0x0f2fff:E, 0x0f3000-0x0f3fff:E, 0x0f4000-0x0f4fff:E, 0x0f5000-0x0f5fff:E, 0x0f6000-0x0f6fff:E, 0x0f7000-0x0f7fff:E, 0x0f8000-0x0f8fff:E, 0x0f9000-0x0f9fff:E, 0x0fa000-0x0fafff:E, 0x0fb000-0x0fbfff:E, 0x0fc000-0x0fcfff:E, 0x0fd000-0x0fdfff:E, 0x0fe000-0x0fefff:E, 0x0ff000-0x0fffff:E Erase/write done. marko@marko-desktop:~$ Best Regards

2 1

Re: [flashrom] FAIL: msi ms-7135 (k8n-neo3)
by Jonathan A. Kollasch 19 Dec '11

19 Dec '11

On Mon, Dec 19, 2011 at 05:15:30PM +0000, Owens, Nathan D wrote: > Howdy, > > I've been trying to flash the SST49LF160C on my ms-7135. Fails to verify with the same problem every time (see attached). > > I've tried newer and older versions of flashrom, but always the same thing. > > Oddly, when I use this board's original chip (SST49LF004A/B), flashing verifies without a problem. > > Any ideas? I'm curious, what does the failure pattern look like? The SST49LF080A I sometimes use on my 7135 works fine last I checked. Jonathan Kollasch (That is, write a test pattern to the chip, and then read it back and compare hexdumps after a write failure.)

1 0

FAIL: msi ms-7135 (k8n-neo3)
by Owens, Nathan D 19 Dec '11

19 Dec '11

Howdy, I've been trying to flash the SST49LF160C on my ms-7135. Fails to verify with the same problem every time (see attached). I've tried newer and older versions of flashrom, but always the same thing. Oddly, when I use this board's original chip (SST49LF004A/B), flashing verifies without a problem. Any ideas? Thanks, Nate Owens

1 0

Update Bios 11.10 Oneric
by Marko Preuss 19 Dec '11

19 Dec '11

Hallo This is flashrom - V I will update Bios ? Please help We is the update Befehl ? sudo flashrom - E ? Beste regards marko@marko-desktop:~$ flashrom -V flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2498M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10001 us, 4 myus = 4 us, OK. Initializing internal programmer ERROR: Could not get I/O privileges (Operation not permitted). You need to be root. marko@marko-desktop:~$

1 0

[RFC] Add struct flashchip * everywhere
by Carl-Daniel Hailfinger 18 Dec '11

18 Dec '11

We need a way to identify which registered programmer should be used for a given access. Especially for cases where multiple programmers for the same bus type are registered (e.g. IT87+MCP79 SPI or Dual BIOS solutions), probing has to happen on each programmer. Somehow we have to tell the dispatcher (spi_send_command etc.) this information, and the only way to get the info to the dispatcher is either an ugly global variable which makes dealing with multiple flash chips and multiple bus probing really messy, or we store the info inside struct flashchip. Given that struct flashchip is passed around almost everywhere already, it is the natural location for such information and only very few function prototypes have to be changed to handle this. I have a prototype patch in the queue, but it's only half ready. If there is any interest, I can send the patch as is to give you an option to shoot it down while it is still unfinished. Regards, Carl-Daniel -- http://www.hailfinger.org/

3 10

[commit] r1474 - trunk
by repository service 18 Dec '11

18 Dec '11

Author: hailfinger Date: Sun Dec 18 16:01:24 2011 New Revision: 1474 URL: http://flashrom.org/trac/flashrom/changeset/1474 Log: Add struct flashctx * parameter to all functions accessing flash chips. All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/82802ab.c trunk/a25.c trunk/at25.c trunk/atahpt.c trunk/bitbang_spi.c trunk/buspirate_spi.c trunk/chipdrivers.h trunk/dediprog.c trunk/drkaiser.c trunk/dummyflasher.c trunk/flash.h trunk/flashrom.c trunk/ft2232_spi.c trunk/gfxnvidia.c trunk/ichspi.c trunk/internal.c trunk/it85spi.c trunk/it87spi.c trunk/jedec.c trunk/linux_spi.c trunk/m29f400bt.c trunk/nic3com.c trunk/nicintel.c trunk/nicnatsemi.c trunk/nicrealtek.c trunk/pm49fl00x.c trunk/programmer.c trunk/programmer.h trunk/satamv.c trunk/satasii.c trunk/sb600spi.c trunk/serprog.c trunk/sharplhf00l04.c trunk/spi.c trunk/spi25.c trunk/sst28sf040.c trunk/sst49lfxxxc.c trunk/sst_fwhub.c trunk/stm50flw0x0x.c trunk/w29ee011.c trunk/w39.c trunk/wbsio_spi.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/82802ab.c Sun Dec 18 16:01:24 2011 (r1474) @@ -47,18 +47,18 @@ int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0; /* Reset to get a clean state */ - chip_writeb(0xFF, bios); + chip_writeb(flash, 0xFF, bios); programmer_delay(10); /* Enter ID mode */ - chip_writeb(0x90, bios); + chip_writeb(flash, 0x90, bios); programmer_delay(10); - id1 = chip_readb(bios + (0x00 << shifted)); - id2 = chip_readb(bios + (0x01 << shifted)); + id1 = chip_readb(flash, bios + (0x00 << shifted)); + id2 = chip_readb(flash, bios + (0x01 << shifted)); /* Leave ID mode */ - chip_writeb(0xFF, bios); + chip_writeb(flash, 0xFF, bios); programmer_delay(10); @@ -71,8 +71,8 @@ * Read the product ID location again. We should now see normal * flash contents. */ - flashcontent1 = chip_readb(bios + (0x00 << shifted)); - flashcontent2 = chip_readb(bios + (0x01 << shifted)); + flashcontent1 = chip_readb(flash, bios + (0x00 << shifted)); + flashcontent2 = chip_readb(flash, bios + (0x01 << shifted)); if (id1 == flashcontent1) msg_cdbg(", id1 is normal flash content"); @@ -94,15 +94,15 @@ uint8_t status; chipaddr bios = flash->virtual_memory; - chip_writeb(0x70, bios); - if ((chip_readb(bios) & 0x80) == 0) { // it's busy - while ((chip_readb(bios) & 0x80) == 0) ; + chip_writeb(flash, 0x70, bios); + if ((chip_readb(flash, bios) & 0x80) == 0) { // it's busy + while ((chip_readb(flash, bios) & 0x80) == 0) ; } - status = chip_readb(bios); + status = chip_readb(flash, bios); /* Reset to get a clean state */ - chip_writeb(0xFF, bios); + chip_writeb(flash, 0xFF, bios); return status; } @@ -113,7 +113,7 @@ //chipaddr wrprotect = flash->virtual_registers + page + 2; for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) - chip_writeb(0, flash->virtual_registers + i + 2); + chip_writeb(flash, 0, flash->virtual_registers + i + 2); return 0; } @@ -125,11 +125,11 @@ uint8_t status; // clear status register - chip_writeb(0x50, bios + page); + chip_writeb(flash, 0x50, bios + page); // now start it - chip_writeb(0x20, bios + page); - chip_writeb(0xd0, bios + page); + chip_writeb(flash, 0x20, bios + page); + chip_writeb(flash, 0xd0, bios + page); programmer_delay(10); // now let's see what the register is @@ -141,15 +141,16 @@ } /* chunksize is 1 */ -int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, + unsigned int len) { int i; chipaddr dst = flash->virtual_memory + start; for (i = 0; i < len; i++) { /* transfer data from source to destination */ - chip_writeb(0x40, dst); - chip_writeb(*src++, dst++); + chip_writeb(flash, 0x40, dst); + chip_writeb(flash, *src++, dst++); wait_82802ab(flash); } @@ -164,13 +165,13 @@ int i; /* Clear status register */ - chip_writeb(0x50, bios); + chip_writeb(flash, 0x50, bios); /* Read identifier codes */ - chip_writeb(0x90, bios); + chip_writeb(flash, 0x90, bios); /* Read master lock-bit */ - mcfg = chip_readb(bios + 0x3); + mcfg = chip_readb(flash, bios + 0x3); msg_cdbg("master lock is "); if (mcfg) { msg_cdbg("locked!\n"); @@ -181,7 +182,7 @@ /* Read block lock-bits */ for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) { - bcfg = chip_readb(bios + i + 2); // read block lock config + bcfg = chip_readb(flash, bios + i + 2); // read block lock config msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un"); if (bcfg) { need_unlock = 1; @@ -189,14 +190,14 @@ } /* Reset chip */ - chip_writeb(0xFF, bios); + chip_writeb(flash, 0xFF, bios); /* Unlock: clear block lock-bits, if needed */ if (can_unlock && need_unlock) { msg_cdbg("Unlock: "); - chip_writeb(0x60, bios); - chip_writeb(0xD0, bios); - chip_writeb(0xFF, bios); + chip_writeb(flash, 0x60, bios); + chip_writeb(flash, 0xD0, bios); + chip_writeb(flash, 0xFF, bios); msg_cdbg("Done!\n"); } @@ -220,10 +221,10 @@ wait_82802ab(flash); /* Read identifier codes */ - chip_writeb(0x90, bios); + chip_writeb(flash, 0x90, bios); /* Read master lock-bit */ - mcfg = chip_readb(bios + 0x3); + mcfg = chip_readb(flash, bios + 0x3); msg_cdbg("master lock is "); if (mcfg) { msg_cdbg("locked!\n"); @@ -235,7 +236,7 @@ /* Read block lock-bits, 8 * 8 KB + 15 * 64 KB */ for (i = 0; i < flash->total_size * 1024; i += (i >= (64 * 1024) ? 64 * 1024 : 8 * 1024)) { - bcfg = chip_readb(bios + i + 2); /* read block lock config */ + bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */ msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un"); if (bcfg) @@ -243,14 +244,14 @@ } /* Reset chip */ - chip_writeb(0xFF, bios); + chip_writeb(flash, 0xFF, bios); /* Unlock: clear block lock-bits, if needed */ if (can_unlock && need_unlock) { msg_cdbg("Unlock: "); - chip_writeb(0x60, bios); - chip_writeb(0xD0, bios); - chip_writeb(0xFF, bios); + chip_writeb(flash, 0x60, bios); + chip_writeb(flash, 0xD0, bios); + chip_writeb(flash, 0xFF, bios); wait_82802ab(flash); msg_cdbg("Done!\n"); } Modified: trunk/a25.c ============================================================================== --- trunk/a25.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/a25.c Sun Dec 18 16:01:24 2011 (r1474) @@ -33,7 +33,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); @@ -49,7 +49,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); @@ -64,7 +64,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); @@ -82,7 +82,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); Modified: trunk/at25.c ============================================================================== --- trunk/at25.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/at25.c Sun Dec 18 16:01:24 2011 (r1474) @@ -61,7 +61,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_atmel_at25_srpl(status); @@ -84,7 +84,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_atmel_at25_srpl(status); @@ -103,7 +103,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " @@ -127,7 +127,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " @@ -151,7 +151,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_atmel_at25_srpl(status); @@ -168,7 +168,7 @@ uint8_t status; int result; - status = spi_read_status_register(); + status = spi_read_status_register(flash); /* If block protection is disabled, stop here. */ if ((status & (3 << 2)) == 0) return 0; @@ -195,7 +195,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(); + status = spi_read_status_register(flash); if ((status & (3 << 2)) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; @@ -223,7 +223,7 @@ uint8_t status; int result; - status = spi_read_status_register(); + status = spi_read_status_register(flash); /* If block protection is disabled, stop here. */ if ((status & 0x6c) == 0) return 0; @@ -244,7 +244,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(); + status = spi_read_status_register(flash); if ((status & 0x6c) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; @@ -257,7 +257,7 @@ uint8_t status; int result; - status = spi_read_status_register(); + status = spi_read_status_register(flash); /* If block protection is disabled, stop here. */ if ((status & 0x7c) == 0) return 0; @@ -278,7 +278,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(); + status = spi_read_status_register(flash); if ((status & 0x7c) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; Modified: trunk/atahpt.c ============================================================================== --- trunk/atahpt.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/atahpt.c Sun Dec 18 16:01:24 2011 (r1474) @@ -40,6 +40,10 @@ {}, }; +static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t atahpt_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_atahpt = { .chip_readb = atahpt_chip_readb, .chip_readw = fallback_chip_readw, @@ -80,13 +84,15 @@ return 0; } -void atahpt_chip_writeb(uint8_t val, chipaddr addr) +static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); OUTB(val, io_base_addr + BIOS_ROM_DATA); } -uint8_t atahpt_chip_readb(const chipaddr addr) +static uint8_t atahpt_chip_readb(const struct flashctx *flash, + const chipaddr addr) { OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); return INB(io_base_addr + BIOS_ROM_DATA); Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/bitbang_spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -63,8 +63,10 @@ bitbang_spi_master->release_bus(); } -static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); +static int bitbang_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); static const struct spi_programmer spi_programmer_bitbang = { .type = SPI_CONTROLLER_BITBANG, @@ -141,8 +143,10 @@ return ret; } -static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int bitbang_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { int i; Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/buspirate_spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -86,8 +86,11 @@ return 0; } -static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); +static int buspirate_spi_send_command(struct flashctx *flash, + unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); static const struct spi_programmer spi_programmer_buspirate = { .type = SPI_CONTROLLER_BUSPIRATE, @@ -291,8 +294,11 @@ return 0; } -static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int buspirate_spi_send_command(struct flashctx *flash, + unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { static unsigned char *buf = NULL; unsigned int i = 0; Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/chipdrivers.h Sun Dec 18 16:01:24 2011 (r1474) @@ -33,8 +33,8 @@ int probe_spi_rems(struct flashctx *flash); int probe_spi_res1(struct flashctx *flash); int probe_spi_res2(struct flashctx *flash); -int spi_write_enable(void); -int spi_write_disable(void); +int spi_write_enable(struct flashctx *flash); +int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -44,16 +44,16 @@ int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); -uint8_t spi_read_status_register(void); +uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); void spi_prettyprint_status_register_bp3210(uint8_t status, int bp); void spi_prettyprint_status_register_welwip(uint8_t status); int spi_prettyprint_status_register(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); -int spi_byte_program(unsigned int addr, uint8_t databyte); -int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_nbyte_read(unsigned int addr, uint8_t *bytes, unsigned int len); +int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte); +int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); +int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); @@ -95,9 +95,9 @@ /* jedec.c */ uint8_t oddparity(uint8_t val); -void toggle_ready_jedec(chipaddr dst); -void data_polling_jedec(chipaddr dst, uint8_t data); -int write_byte_program_jedec(chipaddr bios, uint8_t *src, +void toggle_ready_jedec(struct flashctx *flash, chipaddr dst); +void data_polling_jedec(struct flashctx *flash, chipaddr dst, uint8_t data); +int write_byte_program_jedec(struct flashctx *flash, chipaddr bios, uint8_t *src, chipaddr dst); int probe_jedec(struct flashctx *flash); int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); @@ -111,7 +111,7 @@ int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len); int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len); int write_m29f400bt(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -void protect_m29f400bt(chipaddr bios); +void protect_m29f400bt(struct flashctx *flash, chipaddr bios); /* pm49fl00x.c */ int unlock_49fl00x(struct flashctx *flash); Modified: trunk/dediprog.c ============================================================================== --- trunk/dediprog.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/dediprog.c Sun Dec 18 16:01:24 2011 (r1474) @@ -317,8 +317,11 @@ return ret; } -static int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int dediprog_spi_send_command(struct flashctx *flash, + unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { int ret; Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/drkaiser.c Sun Dec 18 16:01:24 2011 (r1474) @@ -39,6 +39,10 @@ static uint8_t *drkaiser_bar; +static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t drkaiser_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_drkaiser = { .chip_readb = drkaiser_chip_readb, .chip_readw = fallback_chip_readw, @@ -84,12 +88,14 @@ return 0; } -void drkaiser_chip_writeb(uint8_t val, chipaddr addr) +static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); } -uint8_t drkaiser_chip_readb(const chipaddr addr) +static uint8_t drkaiser_chip_readb(const struct flashctx *flash, + const chipaddr addr) { return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); } Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/dummyflasher.c Sun Dec 18 16:01:24 2011 (r1474) @@ -60,10 +60,28 @@ static unsigned int spi_write_256_chunksize = 256; -static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); +static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, + chipaddr addr); +static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, + chipaddr addr); +static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf, + chipaddr addr, size_t len); +static uint8_t dummy_chip_readb(const struct flashctx *flash, + const chipaddr addr); +static uint16_t dummy_chip_readw(const struct flashctx *flash, + const chipaddr addr); +static uint32_t dummy_chip_readl(const struct flashctx *flash, + const chipaddr addr); +static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, + const chipaddr addr, size_t len); static const struct spi_programmer spi_programmer_dummyflasher = { .type = SPI_CONTROLLER_DUMMY, @@ -263,22 +281,26 @@ __func__, (unsigned long)len, virt_addr); } -void dummy_chip_writeb(uint8_t val, chipaddr addr) +static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val); } -void dummy_chip_writew(uint16_t val, chipaddr addr) +static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, + chipaddr addr) { msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val); } -void dummy_chip_writel(uint32_t val, chipaddr addr) +static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, + chipaddr addr) { msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); } -void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf, + chipaddr addr, size_t len) { size_t i; msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", @@ -290,25 +312,29 @@ } } -uint8_t dummy_chip_readb(const chipaddr addr) +static uint8_t dummy_chip_readb(const struct flashctx *flash, + const chipaddr addr) { msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr); return 0xff; } -uint16_t dummy_chip_readw(const chipaddr addr) +static uint16_t dummy_chip_readw(const struct flashctx *flash, + const chipaddr addr) { msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr); return 0xffff; } -uint32_t dummy_chip_readl(const chipaddr addr) +static uint32_t dummy_chip_readl(const struct flashctx *flash, + const chipaddr addr) { msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr); return 0xffffffff; } -void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, + const chipaddr addr, size_t len) { msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", __func__, addr, (unsigned long)len); @@ -317,8 +343,10 @@ } #if EMULATE_SPI_CHIP -static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int emulate_spi_chip_response(unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { unsigned int offs; static int unsigned aai_offs; @@ -513,8 +541,10 @@ } #endif -static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { int i; Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/flash.h Sun Dec 18 16:01:24 2011 (r1474) @@ -44,14 +44,6 @@ void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, size_t len); void programmer_unmap_flash_region(void *virt_addr, size_t len); -void chip_writeb(uint8_t val, chipaddr addr); -void chip_writew(uint16_t val, chipaddr addr); -void chip_writel(uint32_t val, chipaddr addr); -void chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint8_t chip_readb(const chipaddr addr); -uint16_t chip_readw(const chipaddr addr); -uint32_t chip_readl(const chipaddr addr); -void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void programmer_delay(int usecs); #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -212,6 +204,15 @@ extern const struct flashchip flashchips[]; +void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); +void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); +void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); +uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr); +uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr); +uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr); +void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); + /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); @@ -292,9 +293,8 @@ const unsigned char *writearr; unsigned char *readarr; }; -int spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int spi_send_multicommand(struct spi_command *cmds); -uint32_t spi_get_valid_read_addr(void); +int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds); +uint32_t spi_get_valid_read_addr(struct flashctx *flash); #endif /* !__FLASH_H__ */ Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/flashrom.c Sun Dec 18 16:01:24 2011 (r1474) @@ -359,44 +359,46 @@ programmer_table[programmer].unmap_flash_region(virt_addr, len); } -void chip_writeb(uint8_t val, chipaddr addr) +void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { - par_programmer->chip_writeb(val, addr); + par_programmer->chip_writeb(flash, val, addr); } -void chip_writew(uint16_t val, chipaddr addr) +void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr) { - par_programmer->chip_writew(val, addr); + par_programmer->chip_writew(flash, val, addr); } -void chip_writel(uint32_t val, chipaddr addr) +void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr) { - par_programmer->chip_writel(val, addr); + par_programmer->chip_writel(flash, val, addr); } -void chip_writen(uint8_t *buf, chipaddr addr, size_t len) +void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, + size_t len) { - par_programmer->chip_writen(buf, addr, len); + par_programmer->chip_writen(flash, buf, addr, len); } -uint8_t chip_readb(const chipaddr addr) +uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr) { - return par_programmer->chip_readb(addr); + return par_programmer->chip_readb(flash, addr); } -uint16_t chip_readw(const chipaddr addr) +uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr) { - return par_programmer->chip_readw(addr); + return par_programmer->chip_readw(flash, addr); } -uint32_t chip_readl(const chipaddr addr) +uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr) { - return par_programmer->chip_readl(addr); + return par_programmer->chip_readl(flash, addr); } -void chip_readn(uint8_t *buf, chipaddr addr, size_t len) +void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr, + size_t len) { - par_programmer->chip_readn(buf, addr, len); + par_programmer->chip_readn(flash, buf, addr, len); } void programmer_delay(int usecs) @@ -412,9 +414,10 @@ flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size); } -int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len) +int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, + int unsigned len) { - chip_readn(buf, flash->virtual_memory + start, len); + chip_readn(flash, buf, flash->virtual_memory + start, len); return 0; } @@ -535,7 +538,8 @@ } /* start is an offset to the base address of the flash chip */ -int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len) +int check_erased_range(struct flashctx *flash, unsigned int start, + unsigned int len) { int ret; uint8_t *cmpbuf = malloc(len); @@ -558,8 +562,8 @@ * @message string to print in the "FAILED" message * @return 0 for success, -1 for failure */ -int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, - const char *message) +int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, + unsigned int len, const char *message) { unsigned int i; uint8_t *readbuf = malloc(len); @@ -1537,7 +1541,8 @@ /* Check that virtual_memory in struct flashctx is placed directly * after the members copied from struct flashchip. */ - if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) { + if (sizeof(struct flashchip) != + offsetof(struct flashctx, virtual_memory)) { msg_gerr("struct flashctx broken!\n"); ret = 1; } @@ -1618,7 +1623,8 @@ /* FIXME: This function signature needs to be improved once doit() has a better * function signature. */ -int chip_safety_check(struct flashctx *flash, int force, int read_it, int write_it, int erase_it, int verify_it) +int chip_safety_check(struct flashctx *flash, int force, int read_it, + int write_it, int erase_it, int verify_it) { if (!programmer_may_write && (write_it || erase_it)) { msg_perr("Write/erase is not working yet on your programmer in " @@ -1679,7 +1685,8 @@ * but right now it allows us to split off the CLI code. * Besides that, the function itself is a textbook example of abysmal code flow. */ -int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it) +int doit(struct flashctx *flash, int force, const char *filename, int read_it, + int write_it, int erase_it, int verify_it) { uint8_t *oldcontents; uint8_t *newcontents; Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/ft2232_spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -144,8 +144,10 @@ return 0; } -static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); +static int ft2232_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); static const struct spi_programmer spi_programmer_ft2232 = { .type = SPI_CONTROLLER_FT2232, @@ -342,8 +344,10 @@ } /* Returns 0 upon success, a negative number upon errors. */ -static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int ft2232_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { struct ftdi_context *ftdic = &ftdic_context; static unsigned char *buf = NULL; Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/gfxnvidia.c Sun Dec 18 16:01:24 2011 (r1474) @@ -61,6 +61,10 @@ {}, }; +static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_gfxnvidia = { .chip_readb = gfxnvidia_chip_readb, .chip_readw = fallback_chip_readw, @@ -112,12 +116,14 @@ return 0; } -void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr) +static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { pci_mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); } -uint8_t gfxnvidia_chip_readb(const chipaddr addr) +static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash, + const chipaddr addr) { return pci_mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); } Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/ichspi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -228,7 +228,7 @@ static int find_preop(OPCODES *op, uint8_t preop); static int generate_opcodes(OPCODES * op); static int program_opcodes(OPCODES *op, int enable_undo); -static int run_opcode(OPCODE op, uint32_t offset, +static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data); /* for pairing opcodes with their required preop */ @@ -638,7 +638,7 @@ * Note that using len > spi_programmer->max_data_read will return garbage or * may even crash. */ - static void ich_read_data(uint8_t *data, int len, int reg0_off) +static void ich_read_data(uint8_t *data, int len, int reg0_off) { int i; uint32_t temp32 = 0; @@ -956,7 +956,7 @@ return 0; } -static int run_opcode(OPCODE op, uint32_t offset, +static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data) { /* max_data_read == max_data_write for all Intel/VIA SPI masters */ @@ -983,8 +983,10 @@ } } -static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int ich_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { int result; int opcode_index = -1; @@ -1076,7 +1078,7 @@ count = readcnt; } - result = run_opcode(*opcode, addr, count, data); + result = run_opcode(flash, *opcode, addr, count, data); if (result) { msg_pdbg("Running OPCODE 0x%02x failed ", opcode->opcode); if ((opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) || @@ -1175,7 +1177,7 @@ return 0; } -int ich_hwseq_probe(struct flashctx *flash) +static int ich_hwseq_probe(struct flashctx *flash) { uint32_t total_size, boundary; uint32_t erase_size_low, size_low, erase_size_high, size_high; @@ -1228,9 +1230,8 @@ return 1; } -int ich_hwseq_block_erase(struct flashctx *flash, - unsigned int addr, - unsigned int len) +static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr, + unsigned int len) { uint32_t erase_block; uint16_t hsfc; @@ -1278,8 +1279,8 @@ return 0; } -int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, unsigned int addr, - unsigned int len) +static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, + unsigned int addr, unsigned int len) { uint16_t hsfc; uint16_t timeout = 100 * 60; @@ -1316,8 +1317,8 @@ return 0; } -int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, unsigned int addr, - unsigned int len) +static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, + unsigned int addr, unsigned int len) { uint16_t hsfc; uint16_t timeout = 100 * 60; @@ -1355,7 +1356,8 @@ return 0; } -static int ich_spi_send_multicommand(struct spi_command *cmds) +static int ich_spi_send_multicommand(struct flashctx *flash, + struct spi_command *cmds) { int ret = 0; int i; @@ -1405,7 +1407,7 @@ * preoppos matched, this is a normal opcode. */ } - ret = ich_spi_send_command(cmds->writecnt, cmds->readcnt, + ret = ich_spi_send_command(flash, cmds->writecnt, cmds->readcnt, cmds->writearr, cmds->readarr); /* Reset the type of all opcodes to non-atomic. */ for (i = 0; i < 8; i++) Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/internal.c Sun Dec 18 16:01:24 2011 (r1474) @@ -127,6 +127,20 @@ int is_laptop = 0; int laptop_ok = 0; +static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static void internal_chip_writew(const struct flashctx *flash, uint16_t val, + chipaddr addr); +static void internal_chip_writel(const struct flashctx *flash, uint32_t val, + chipaddr addr); +static uint8_t internal_chip_readb(const struct flashctx *flash, + const chipaddr addr); +static uint16_t internal_chip_readw(const struct flashctx *flash, + const chipaddr addr); +static uint32_t internal_chip_readl(const struct flashctx *flash, + const chipaddr addr); +static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, + const chipaddr addr, size_t len); static const struct par_programmer par_programmer_internal = { .chip_readb = internal_chip_readb, .chip_readw = internal_chip_readw, @@ -324,37 +338,44 @@ } #endif -void internal_chip_writeb(uint8_t val, chipaddr addr) +static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { mmio_writeb(val, (void *) addr); } -void internal_chip_writew(uint16_t val, chipaddr addr) +static void internal_chip_writew(const struct flashctx *flash, uint16_t val, + chipaddr addr) { mmio_writew(val, (void *) addr); } -void internal_chip_writel(uint32_t val, chipaddr addr) +static void internal_chip_writel(const struct flashctx *flash, uint32_t val, + chipaddr addr) { mmio_writel(val, (void *) addr); } -uint8_t internal_chip_readb(const chipaddr addr) +static uint8_t internal_chip_readb(const struct flashctx *flash, + const chipaddr addr) { return mmio_readb((void *) addr); } -uint16_t internal_chip_readw(const chipaddr addr) +static uint16_t internal_chip_readw(const struct flashctx *flash, + const chipaddr addr) { return mmio_readw((void *) addr); } -uint32_t internal_chip_readl(const chipaddr addr) +static uint32_t internal_chip_readl(const struct flashctx *flash, + const chipaddr addr) { return mmio_readl((void *) addr); } -void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, + const chipaddr addr, size_t len) { memcpy(buf, (void *)addr, len); return; Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/it85spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -270,8 +270,10 @@ return 0; } -static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); +static int it85xx_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); static const struct spi_programmer spi_programmer_it85xx = { .type = SPI_CONTROLLER_IT85XX, @@ -320,8 +322,10 @@ * 3. read date from LPC/FWH address 0xffff_fdxxh (drive CE# low and get * data from MISO) */ -static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int it85xx_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { int i; Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/it87spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -103,8 +103,10 @@ return; } -static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); +static int it8716f_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf, @@ -247,8 +249,10 @@ * commands with the address in inverse wire order. That's why the register * ordering in case 4 and 5 may seem strange. */ -static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int it8716f_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { uint8_t busy, writeenc; int i; @@ -319,19 +323,19 @@ int result; chipaddr bios = flash->virtual_memory; - result = spi_write_enable(); + result = spi_write_enable(flash); if (result) return result; /* FIXME: The command below seems to be redundant or wrong. */ OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); for (i = 0; i < flash->page_size; i++) - chip_writeb(buf[i], bios + start + i); + chip_writeb(flash, buf[i], bios + start + i); OUTB(0, it8716f_flashport); /* Wait until the Write-In-Progress bit is cleared. * This usually takes 1-10 ms, so wait in 1 ms steps. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(1000); return 0; } Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/jedec.c Sun Dec 18 16:01:24 2011 (r1474) @@ -37,17 +37,18 @@ return (val ^ (val >> 1)) & 0x1; } -static void toggle_ready_jedec_common(chipaddr dst, int delay) +static void toggle_ready_jedec_common(const struct flashctx *flash, + chipaddr dst, int delay) { unsigned int i = 0; uint8_t tmp1, tmp2; - tmp1 = chip_readb(dst) & 0x40; + tmp1 = chip_readb(flash, dst) & 0x40; while (i++ < 0xFFFFFFF) { if (delay) programmer_delay(delay); - tmp2 = chip_readb(dst) & 0x40; + tmp2 = chip_readb(flash, dst) & 0x40; if (tmp1 == tmp2) { break; } @@ -57,9 +58,9 @@ msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i); } -void toggle_ready_jedec(chipaddr dst) +void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst) { - toggle_ready_jedec_common(dst, 0); + toggle_ready_jedec_common(flash, dst, 0); } /* Some chips require a minimum delay between toggle bit reads. @@ -69,12 +70,13 @@ * Given that erase is slow on all chips, it is recommended to use * toggle_ready_jedec_slow in erase functions. */ -static void toggle_ready_jedec_slow(chipaddr dst) +static void toggle_ready_jedec_slow(const struct flashctx *flash, chipaddr dst) { - toggle_ready_jedec_common(dst, 8 * 1000); + toggle_ready_jedec_common(flash, dst, 8 * 1000); } -void data_polling_jedec(chipaddr dst, uint8_t data) +void data_polling_jedec(const struct flashctx *flash, chipaddr dst, + uint8_t data) { unsigned int i = 0; uint8_t tmp; @@ -82,7 +84,7 @@ data &= 0x80; while (i++ < 0xFFFFFFF) { - tmp = chip_readb(dst) & 0x80; + tmp = chip_readb(flash, dst) & 0x80; if (tmp == data) { break; } @@ -110,12 +112,13 @@ } } -static void start_program_jedec_common(struct flashctx *flash, unsigned int mask) +static void start_program_jedec_common(struct flashctx *flash, + unsigned int mask) { chipaddr bios = flash->virtual_memory; - chip_writeb(0xAA, bios + (0x5555 & mask)); - chip_writeb(0x55, bios + (0x2AAA & mask)); - chip_writeb(0xA0, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0xA0, bios + (0x5555 & mask)); } static int probe_jedec_common(struct flashctx *flash, unsigned int mask) @@ -150,57 +153,57 @@ /* Reset chip to a clean slate */ if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); if (probe_timing_exit) programmer_delay(10); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); if (probe_timing_exit) programmer_delay(10); } - chip_writeb(0xF0, bios + (0x5555 & mask)); + chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); if (probe_timing_exit) programmer_delay(probe_timing_exit); /* Issue JEDEC Product ID Entry command */ - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(0x90, bios + (0x5555 & mask)); + chip_writeb(flash, 0x90, bios + (0x5555 & mask)); if (probe_timing_enter) programmer_delay(probe_timing_enter); /* Read product ID */ - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); + id1 = chip_readb(flash, bios); + id2 = chip_readb(flash, bios + 0x01); largeid1 = id1; largeid2 = id2; /* Check if it is a continuation ID, this should be a while loop. */ if (id1 == 0x7F) { largeid1 <<= 8; - id1 = chip_readb(bios + 0x100); + id1 = chip_readb(flash, bios + 0x100); largeid1 |= id1; } if (id2 == 0x7F) { largeid2 <<= 8; - id2 = chip_readb(bios + 0x101); + id2 = chip_readb(flash, bios + 0x101); largeid2 |= id2; } /* Issue JEDEC Product ID Exit command */ if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); if (probe_timing_exit) programmer_delay(10); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); if (probe_timing_exit) programmer_delay(10); } - chip_writeb(0xF0, bios + (0x5555 & mask)); + chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); if (probe_timing_exit) programmer_delay(probe_timing_exit); @@ -209,17 +212,17 @@ msg_cdbg(", id1 parity violation"); /* Read the product ID location again. We should now see normal flash contents. */ - flashcontent1 = chip_readb(bios); - flashcontent2 = chip_readb(bios + 0x01); + flashcontent1 = chip_readb(flash, bios); + flashcontent2 = chip_readb(flash, bios + 0x01); /* Check if it is a continuation ID, this should be a while loop. */ if (flashcontent1 == 0x7F) { flashcontent1 <<= 8; - flashcontent1 |= chip_readb(bios + 0x100); + flashcontent1 |= chip_readb(flash, bios + 0x100); } if (flashcontent2 == 0x7F) { flashcontent2 <<= 8; - flashcontent2 |= chip_readb(bios + 0x101); + flashcontent2 |= chip_readb(flash, bios + 0x101); } if (largeid1 == flashcontent1) @@ -238,7 +241,7 @@ } static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page, - unsigned int pagesize, unsigned int mask) + unsigned int pagesize, unsigned int mask) { chipaddr bios = flash->virtual_memory; int delay_us = 0; @@ -246,29 +249,29 @@ delay_us = 10; /* Issue the Sector Erase command */ - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); programmer_delay(delay_us); - chip_writeb(0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); programmer_delay(delay_us); - chip_writeb(0x30, bios + page); + chip_writeb(flash, 0x30, bios + page); programmer_delay(delay_us); /* wait for Toggle bit ready */ - toggle_ready_jedec_slow(bios); + toggle_ready_jedec_slow(flash, bios); /* FIXME: Check the status register for errors. */ return 0; } static int erase_block_jedec_common(struct flashctx *flash, unsigned int block, - unsigned int blocksize, unsigned int mask) + unsigned int blocksize, unsigned int mask) { chipaddr bios = flash->virtual_memory; int delay_us = 0; @@ -276,22 +279,22 @@ delay_us = 10; /* Issue the Sector Erase command */ - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); programmer_delay(delay_us); - chip_writeb(0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); programmer_delay(delay_us); - chip_writeb(0x50, bios + block); + chip_writeb(flash, 0x50, bios + block); programmer_delay(delay_us); /* wait for Toggle bit ready */ - toggle_ready_jedec_slow(bios); + toggle_ready_jedec_slow(flash, bios); /* FIXME: Check the status register for errors. */ return 0; @@ -305,28 +308,28 @@ delay_us = 10; /* Issue the JEDEC Chip Erase command */ - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); programmer_delay(delay_us); - chip_writeb(0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); programmer_delay(delay_us); - chip_writeb(0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); programmer_delay(delay_us); - chip_writeb(0x10, bios + (0x5555 & mask)); + chip_writeb(flash, 0x10, bios + (0x5555 & mask)); programmer_delay(delay_us); - toggle_ready_jedec_slow(bios); + toggle_ready_jedec_slow(flash, bios); /* FIXME: Check the status register for errors. */ return 0; } static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src, - chipaddr dst, unsigned int mask) + chipaddr dst, unsigned int mask) { int tried = 0, failed = 0; chipaddr bios = flash->virtual_memory; @@ -341,10 +344,10 @@ start_program_jedec_common(flash, mask); /* transfer data from source to destination */ - chip_writeb(*src, dst); - toggle_ready_jedec(bios); + chip_writeb(flash, *src, dst); + toggle_ready_jedec(flash, bios); - if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) { + if (chip_readb(flash, dst) != *src && tried++ < MAX_REFLASH_TRIES) { goto retry; } @@ -355,7 +358,8 @@ } /* chunksize is 1 */ -int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, + unsigned int len) { int i, failed = 0; chipaddr dst = flash->virtual_memory + start; @@ -376,7 +380,8 @@ return failed; } -int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int page_size) +int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, + unsigned int start, unsigned int page_size) { int i, tried = 0, failed; uint8_t *s = src; @@ -395,12 +400,12 @@ for (i = 0; i < page_size; i++) { /* If the data is 0xFF, don't program it */ if (*src != 0xFF) - chip_writeb(*src, dst); + chip_writeb(flash, *src, dst); dst++; src++; } - toggle_ready_jedec(dst - 1); + toggle_ready_jedec(flash, dst - 1); dst = d; src = s; @@ -424,7 +429,8 @@ * This function is a slightly modified copy of spi_write_chunked. * Each page is written separately in chunks with a maximum size of chunksize. */ -int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len) +int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, + int unsigned len) { unsigned int i, starthere, lenhere; /* FIXME: page_size is the wrong variable. We need max_writechunk_size @@ -480,7 +486,8 @@ return probe_jedec_common(flash, mask); } -int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size) +int erase_sector_jedec(struct flashctx *flash, unsigned int page, + unsigned int size) { unsigned int mask; @@ -488,7 +495,8 @@ return erase_sector_jedec_common(flash, page, size, mask); } -int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size) +int erase_block_jedec(struct flashctx *flash, unsigned int page, + unsigned int size) { unsigned int mask; Modified: trunk/linux_spi.c ============================================================================== --- trunk/linux_spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/linux_spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -34,8 +34,10 @@ static int fd = -1; static int linux_spi_shutdown(void *data); -static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *txbuf, unsigned char *rxbuf); +static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *txbuf, + unsigned char *rxbuf); static int linux_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf, @@ -107,8 +109,10 @@ return 0; } -static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *txbuf, unsigned char *rxbuf) +static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *txbuf, + unsigned char *rxbuf) { struct spi_ioc_transfer msg[2] = { { @@ -134,11 +138,13 @@ static int linux_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - return spi_read_chunked(flash, buf, start, len, (unsigned)getpagesize()); + return spi_read_chunked(flash, buf, start, len, + (unsigned int)getpagesize()); } static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - return spi_write_chunked(flash, buf, start, len, ((unsigned)getpagesize()) - 4); + return spi_write_chunked(flash, buf, start, len, + ((unsigned int)getpagesize()) - 4); } Modified: trunk/m29f400bt.c ============================================================================== --- trunk/m29f400bt.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/m29f400bt.c Sun Dec 18 16:01:24 2011 (r1474) @@ -28,24 +28,25 @@ functions. */ /* chunksize is 1 */ -int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, + unsigned int len) { int i; chipaddr bios = flash->virtual_memory; chipaddr dst = flash->virtual_memory + start; for (i = 0; i < len; i++) { - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0xA0, bios + 0xAAA); + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0xA0, bios + 0xAAA); /* transfer data from source to destination */ - chip_writeb(*src, dst); - toggle_ready_jedec(dst); + chip_writeb(flash, *src, dst); + toggle_ready_jedec(flash, dst); #if 0 /* We only want to print something in the error case. */ msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n", - (dst - bios), chip_readb(dst), *src); + (dst - bios), chip_readb(flash, dst), *src); #endif dst++; src++; @@ -60,21 +61,21 @@ chipaddr bios = flash->virtual_memory; uint8_t id1, id2; - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x90, bios + 0xAAA); + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x90, bios + 0xAAA); programmer_delay(10); - id1 = chip_readb(bios); + id1 = chip_readb(flash, bios); /* The data sheet says id2 is at (bios + 0x01) and id2 listed in * flash.h does not match. It should be possible to use JEDEC probe. */ - id2 = chip_readb(bios + 0x02); + id2 = chip_readb(flash, bios + 0x02); - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0xF0, bios + 0xAAA); + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0xF0, bios + 0xAAA); programmer_delay(10); @@ -90,42 +91,44 @@ { chipaddr bios = flash->virtual_memory; - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x80, bios + 0xAAA); - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x10, bios + 0xAAA); + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x80, bios + 0xAAA); + + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x10, bios + 0xAAA); programmer_delay(10); - toggle_ready_jedec(bios); + toggle_ready_jedec(flash, bios); /* FIXME: Check the status register for errors. */ return 0; } -int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len) +int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, + unsigned int len) { chipaddr bios = flash->virtual_memory; chipaddr dst = bios + start; - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x80, bios + 0xAAA); - - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0x30, dst); + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x80, bios + 0xAAA); + + chip_writeb(flash, 0xAA, bios + 0xAAA); + chip_writeb(flash, 0x55, bios + 0x555); + chip_writeb(flash, 0x30, dst); programmer_delay(10); - toggle_ready_jedec(bios); + toggle_ready_jedec(flash, bios); /* FIXME: Check the status register for errors. */ return 0; } -int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, unsigned int blocklen) +int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, + unsigned int blocklen) { if ((address != 0) || (blocklen != flash->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", Modified: trunk/nic3com.c ============================================================================== --- trunk/nic3com.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/nic3com.c Sun Dec 18 16:01:24 2011 (r1474) @@ -55,6 +55,10 @@ {}, }; +static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t nic3com_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_nic3com = { .chip_readb = nic3com_chip_readb, .chip_readw = fallback_chip_readw, @@ -116,13 +120,15 @@ return 0; } -void nic3com_chip_writeb(uint8_t val, chipaddr addr) +static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); OUTB(val, io_base_addr + BIOS_ROM_DATA); } -uint8_t nic3com_chip_readb(const chipaddr addr) +static uint8_t nic3com_chip_readb(const struct flashctx *flash, + const chipaddr addr) { OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); return INB(io_base_addr + BIOS_ROM_DATA); Modified: trunk/nicintel.c ============================================================================== --- trunk/nicintel.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/nicintel.c Sun Dec 18 16:01:24 2011 (r1474) @@ -43,6 +43,10 @@ #define CSR_FCR 0x0c +static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t nicintel_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_nicintel = { .chip_readb = nicintel_chip_readb, .chip_readw = fallback_chip_readw, @@ -117,12 +121,14 @@ return 1; } -void nicintel_chip_writeb(uint8_t val, chipaddr addr) +static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { pci_mmio_writeb(val, nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); } -uint8_t nicintel_chip_readb(const chipaddr addr) +static uint8_t nicintel_chip_readb(const struct flashctx *flash, + const chipaddr addr) { return pci_mmio_readb(nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); } Modified: trunk/nicnatsemi.c ============================================================================== --- trunk/nicnatsemi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/nicnatsemi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -35,6 +35,10 @@ {}, }; +static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_nicnatsemi = { .chip_readb = nicnatsemi_chip_readb, .chip_readw = fallback_chip_readw, @@ -74,7 +78,8 @@ return 0; } -void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr) +static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { OUTL((uint32_t)addr & 0x0001FFFF, io_base_addr + BOOT_ROM_ADDR); /* @@ -88,7 +93,8 @@ OUTB(val, io_base_addr + BOOT_ROM_DATA); } -uint8_t nicnatsemi_chip_readb(const chipaddr addr) +static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash, + const chipaddr addr) { OUTL(((uint32_t)addr & 0x0001FFFF), io_base_addr + BOOT_ROM_ADDR); /* Modified: trunk/nicrealtek.c ============================================================================== --- trunk/nicrealtek.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/nicrealtek.c Sun Dec 18 16:01:24 2011 (r1474) @@ -36,6 +36,10 @@ {}, }; +static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_nicrealtek = { .chip_readb = nicrealtek_chip_readb, .chip_readw = fallback_chip_readw, @@ -69,7 +73,8 @@ return 0; } -void nicrealtek_chip_writeb(uint8_t val, chipaddr addr) +static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { /* Output addr and data, set WE to 0, set OE to 1, set CS to 0, * enable software access. @@ -83,7 +88,8 @@ io_base_addr + BIOS_ROM_ADDR); } -uint8_t nicrealtek_chip_readb(const chipaddr addr) +static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, + const chipaddr addr) { uint8_t val; Modified: trunk/pm49fl00x.c ============================================================================== --- trunk/pm49fl00x.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/pm49fl00x.c Sun Dec 18 16:01:24 2011 (r1474) @@ -22,28 +22,32 @@ #include "flash.h" -static void write_lockbits_49fl00x(chipaddr bios, unsigned int size, - unsigned char bits, unsigned int block_size) +static void write_lockbits_49fl00x(const struct flashctx *flash, + unsigned int size, unsigned char bits, + unsigned int block_size) { unsigned int i, left = size; + chipaddr bios = flash->virtual_registers; for (i = 0; left >= block_size; i++, left -= block_size) { /* pm49fl002 */ if (block_size == 16384 && i % 2) continue; - chip_writeb(bits, bios + (i * block_size) + 2); + chip_writeb(flash, bits, bios + (i * block_size) + 2); } } int unlock_49fl00x(struct flashctx *flash) { - write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 0, flash->page_size); + write_lockbits_49fl00x(flash, flash->total_size * 1024, 0, + flash->page_size); return 0; } int lock_49fl00x(struct flashctx *flash) { - write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size); + write_lockbits_49fl00x(flash, flash->total_size * 1024, 1, + flash->page_size); return 0; } Modified: trunk/programmer.c ============================================================================== --- trunk/programmer.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/programmer.c Sun Dec 18 16:01:24 2011 (r1474) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2009,2010 Carl-Daniel Hailfinger + * Copyright (C) 2009,2010,2011 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -53,61 +53,65 @@ } /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */ -uint8_t noop_chip_readb(const chipaddr addr) +uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr) { return 0xff; } /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */ -void noop_chip_writeb(uint8_t val, chipaddr addr) +void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { } /* Little-endian fallback for drivers not supporting 16 bit accesses */ -void fallback_chip_writew(uint16_t val, chipaddr addr) +void fallback_chip_writew(const struct flashctx *flash, uint16_t val, + chipaddr addr) { - chip_writeb(val & 0xff, addr); - chip_writeb((val >> 8) & 0xff, addr + 1); + chip_writeb(flash, val & 0xff, addr); + chip_writeb(flash, (val >> 8) & 0xff, addr + 1); } /* Little-endian fallback for drivers not supporting 16 bit accesses */ -uint16_t fallback_chip_readw(const chipaddr addr) +uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr) { uint16_t val; - val = chip_readb(addr); - val |= chip_readb(addr + 1) << 8; + val = chip_readb(flash, addr); + val |= chip_readb(flash, addr + 1) << 8; return val; } /* Little-endian fallback for drivers not supporting 32 bit accesses */ -void fallback_chip_writel(uint32_t val, chipaddr addr) +void fallback_chip_writel(const struct flashctx *flash, uint32_t val, + chipaddr addr) { - chip_writew(val & 0xffff, addr); - chip_writew((val >> 16) & 0xffff, addr + 2); + chip_writew(flash, val & 0xffff, addr); + chip_writew(flash, (val >> 16) & 0xffff, addr + 2); } /* Little-endian fallback for drivers not supporting 32 bit accesses */ -uint32_t fallback_chip_readl(const chipaddr addr) +uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr) { uint32_t val; - val = chip_readw(addr); - val |= chip_readw(addr + 2) << 16; + val = chip_readw(flash, addr); + val |= chip_readw(flash, addr + 2) << 16; return val; } -void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, + chipaddr addr, size_t len) { size_t i; for (i = 0; i < len; i++) - chip_writeb(buf[i], addr + i); + chip_writeb(flash, buf[i], addr + i); return; } -void fallback_chip_readn(uint8_t *buf, chipaddr addr, size_t len) +void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, + chipaddr addr, size_t len) { size_t i; for (i = 0; i < len; i++) - buf[i] = chip_readb(addr + i); + buf[i] = chip_readb(flash, addr + i); return; } Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/programmer.h Sun Dec 18 16:01:24 2011 (r1474) @@ -93,8 +93,8 @@ int (*init) (void); - void * (*map_flash_region) (const char *descr, unsigned long phys_addr, - size_t len); + void *(*map_flash_region) (const char *descr, unsigned long phys_addr, + size_t len); void (*unmap_flash_region) (void *virt_addr, size_t len); void (*delay) (int usecs); @@ -300,13 +300,6 @@ int register_superio(struct superio s); extern enum chipbustype internal_buses_supported; int internal_init(void); -void internal_chip_writeb(uint8_t val, chipaddr addr); -void internal_chip_writew(uint16_t val, chipaddr addr); -void internal_chip_writel(uint32_t val, chipaddr addr); -uint8_t internal_chip_readb(const chipaddr addr); -uint16_t internal_chip_readw(const chipaddr addr); -uint32_t internal_chip_readl(const chipaddr addr); -void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #endif /* hwaccess.c */ @@ -341,91 +334,46 @@ void rmmio_valw(void *addr); void rmmio_vall(void *addr); -/* programmer.c */ -int noop_shutdown(void); -void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); -void fallback_unmap(void *virt_addr, size_t len); -uint8_t noop_chip_readb(const chipaddr addr); -void noop_chip_writeb(uint8_t val, chipaddr addr); -void fallback_chip_writew(uint16_t val, chipaddr addr); -void fallback_chip_writel(uint32_t val, chipaddr addr); -void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint16_t fallback_chip_readw(const chipaddr addr); -uint32_t fallback_chip_readl(const chipaddr addr); -void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -struct par_programmer { - void (*chip_writeb) (uint8_t val, chipaddr addr); - void (*chip_writew) (uint16_t val, chipaddr addr); - void (*chip_writel) (uint32_t val, chipaddr addr); - void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); - uint8_t (*chip_readb) (const chipaddr addr); - uint16_t (*chip_readw) (const chipaddr addr); - uint32_t (*chip_readl) (const chipaddr addr); - void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); -}; -extern const struct par_programmer *par_programmer; -void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); - /* dummyflasher.c */ #if CONFIG_DUMMY == 1 int dummy_init(void); void *dummy_map(const char *descr, unsigned long phys_addr, size_t len); void dummy_unmap(void *virt_addr, size_t len); -void dummy_chip_writeb(uint8_t val, chipaddr addr); -void dummy_chip_writew(uint16_t val, chipaddr addr); -void dummy_chip_writel(uint32_t val, chipaddr addr); -void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len); -uint8_t dummy_chip_readb(const chipaddr addr); -uint16_t dummy_chip_readw(const chipaddr addr); -uint32_t dummy_chip_readl(const chipaddr addr); -void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #endif /* nic3com.c */ #if CONFIG_NIC3COM == 1 int nic3com_init(void); -void nic3com_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nic3com_chip_readb(const chipaddr addr); extern const struct pcidev_status nics_3com[]; #endif /* gfxnvidia.c */ #if CONFIG_GFXNVIDIA == 1 int gfxnvidia_init(void); -void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr); -uint8_t gfxnvidia_chip_readb(const chipaddr addr); extern const struct pcidev_status gfx_nvidia[]; #endif /* drkaiser.c */ #if CONFIG_DRKAISER == 1 int drkaiser_init(void); -void drkaiser_chip_writeb(uint8_t val, chipaddr addr); -uint8_t drkaiser_chip_readb(const chipaddr addr); extern const struct pcidev_status drkaiser_pcidev[]; #endif /* nicrealtek.c */ #if CONFIG_NICREALTEK == 1 int nicrealtek_init(void); -void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nicrealtek_chip_readb(const chipaddr addr); extern const struct pcidev_status nics_realtek[]; #endif /* nicnatsemi.c */ #if CONFIG_NICNATSEMI == 1 int nicnatsemi_init(void); -void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nicnatsemi_chip_readb(const chipaddr addr); extern const struct pcidev_status nics_natsemi[]; #endif /* nicintel.c */ #if CONFIG_NICINTEL == 1 int nicintel_init(void); -void nicintel_chip_writeb(uint8_t val, chipaddr addr); -uint8_t nicintel_chip_readb(const chipaddr addr); extern const struct pcidev_status nics_intel[]; #endif @@ -444,24 +392,18 @@ /* satamv.c */ #if CONFIG_SATAMV == 1 int satamv_init(void); -void satamv_chip_writeb(uint8_t val, chipaddr addr); -uint8_t satamv_chip_readb(const chipaddr addr); extern const struct pcidev_status satas_mv[]; #endif /* satasii.c */ #if CONFIG_SATASII == 1 int satasii_init(void); -void satasii_chip_writeb(uint8_t val, chipaddr addr); -uint8_t satasii_chip_readb(const chipaddr addr); extern const struct pcidev_status satas_sii[]; #endif /* atahpt.c */ #if CONFIG_ATAHPT == 1 int atahpt_init(void); -void atahpt_chip_writeb(uint8_t val, chipaddr addr); -uint8_t atahpt_chip_readb(const chipaddr addr); extern const struct pcidev_status ata_hpt[]; #endif @@ -565,9 +507,9 @@ enum spi_controller type; unsigned int max_data_read; unsigned int max_data_write; - int (*command)(unsigned int writecnt, unsigned int readcnt, + int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); - int (*multicommand)(struct spi_command *cmds); + int (*multicommand)(struct flashctx *flash, struct spi_command *cmds); /* Optimized functions for this programmer */ int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); @@ -575,9 +517,9 @@ }; extern const struct spi_programmer *spi_programmer; -int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, +int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int default_spi_send_multicommand(struct spi_command *cmds); +int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds); int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); void register_spi_programmer(const struct spi_programmer *programmer); @@ -632,12 +574,34 @@ extern const struct opaque_programmer *opaque_programmer; void register_opaque_programmer(const struct opaque_programmer *pgm); +/* programmer.c */ +int noop_shutdown(void); +void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); +void fallback_unmap(void *virt_addr, size_t len); +uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr); +void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); +void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); +void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); +uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr); +uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr); +void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); +struct par_programmer { + void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr); + void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr); + void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr); + void (*chip_writen) (const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); + uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr); + uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr); + uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr); + void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); +}; +extern const struct par_programmer *par_programmer; +void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); + /* serprog.c */ #if CONFIG_SERPROG == 1 int serprog_init(void); -void serprog_chip_writeb(uint8_t val, chipaddr addr); -uint8_t serprog_chip_readb(const chipaddr addr); -void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void serprog_delay(int usecs); #endif Modified: trunk/satamv.c ============================================================================== --- trunk/satamv.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/satamv.c Sun Dec 18 16:01:24 2011 (r1474) @@ -41,6 +41,10 @@ #define PCI_BAR2_CONTROL 0x00c08 #define GPIO_PORT_CONTROL 0x104f0 +static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t satamv_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_satamv = { .chip_readb = satamv_chip_readb, .chip_readw = fallback_chip_readw, @@ -183,13 +187,15 @@ } /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */ -void satamv_chip_writeb(uint8_t val, chipaddr addr) +static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { satamv_indirect_chip_writeb(val, addr); } /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */ -uint8_t satamv_chip_readb(const chipaddr addr) +static uint8_t satamv_chip_readb(const struct flashctx *flash, + const chipaddr addr) { return satamv_indirect_chip_readb(addr); } Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/satasii.c Sun Dec 18 16:01:24 2011 (r1474) @@ -42,6 +42,10 @@ {}, }; +static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t satasii_chip_readb(const struct flashctx *flash, + const chipaddr addr); static const struct par_programmer par_programmer_satasii = { .chip_readb = satasii_chip_readb, .chip_readw = fallback_chip_readw, @@ -95,7 +99,8 @@ return 0; } -void satasii_chip_writeb(uint8_t val, chipaddr addr) +static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { uint32_t ctrl_reg, data_reg; @@ -112,7 +117,8 @@ while (pci_mmio_readl(sii_bar) & (1 << 25)) ; } -uint8_t satasii_chip_readb(const chipaddr addr) +static uint8_t satasii_chip_readb(const struct flashctx *flash, + const chipaddr addr) { uint32_t ctrl_reg; Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/sb600spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -88,8 +88,10 @@ ; } -static int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { int count; /* First byte is cmd which can not being sent through FIFO. */ Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/serprog.c Sun Dec 18 16:01:24 2011 (r1474) @@ -299,7 +299,8 @@ return 0; } -static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int serprog_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, @@ -314,6 +315,12 @@ .write_256 = default_spi_write_256, }; +static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t serprog_chip_readb(const struct flashctx *flash, + const chipaddr addr); +static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf, + const chipaddr addr, size_t len); static const struct par_programmer par_programmer_serprog = { .chip_readb = serprog_chip_readb, .chip_readw = fallback_chip_readw, @@ -680,7 +687,8 @@ } } -void serprog_chip_writeb(uint8_t val, chipaddr addr) +static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) { msg_pspew("%s\n", __func__); if (sp_max_write_n) { @@ -711,7 +719,8 @@ } } -uint8_t serprog_chip_readb(const chipaddr addr) +static uint8_t serprog_chip_readb(const struct flashctx *flash, + const chipaddr addr) { unsigned char c; unsigned char buf[3]; @@ -757,7 +766,8 @@ } /* The externally called version that makes sure that max_read_n is obeyed. */ -void serprog_chip_readn(uint8_t * buf, const chipaddr addr, size_t len) +static void serprog_chip_readn(const struct flashctx *flash, uint8_t * buf, + const chipaddr addr, size_t len) { size_t lenm = len; chipaddr addrm = addr; @@ -792,9 +802,10 @@ sp_prev_was_write = 0; } -static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, - unsigned char *readarr) +static int serprog_spi_send_command(struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { unsigned char *parmbuf; int ret; @@ -822,14 +833,15 @@ * the advantage that it is much faster for most chips, but breaks those with * non-contiguous address space (like AT45DB161D). When spi_read_chunked is * fixed this method can be removed. */ -static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, + unsigned int start, unsigned int len) { unsigned int i, cur_len; const unsigned int max_read = spi_programmer_serprog.max_data_read; for (i = 0; i < len; i += cur_len) { int ret; cur_len = min(max_read, (len - i)); - ret = spi_nbyte_read(start + i, buf + i, cur_len); + ret = spi_nbyte_read(flash, start + i, buf + i, cur_len); if (ret) return ret; } Modified: trunk/sharplhf00l04.c ============================================================================== --- trunk/sharplhf00l04.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/sharplhf00l04.c Sun Dec 18 16:01:24 2011 (r1474) @@ -26,25 +26,26 @@ * FIXME: This file is unused. */ -int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen) +int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, + unsigned int blocklen) { chipaddr bios = flash->virtual_memory + blockaddr; chipaddr wrprotect = flash->virtual_registers + blockaddr + 2; uint8_t status; // clear status register - chip_writeb(0x50, bios); + chip_writeb(flash, 0x50, bios); status = wait_82802ab(flash); print_status_82802ab(status); // clear write protect msg_cspew("write protect is at 0x%lx\n", (wrprotect)); - msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect)); - chip_writeb(0, wrprotect); - msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect)); + msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect)); + chip_writeb(flash, 0, wrprotect); + msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect)); // now start it - chip_writeb(0x20, bios); - chip_writeb(0xd0, bios); + chip_writeb(flash, 0x20, bios); + chip_writeb(flash, 0xd0, bios); programmer_delay(10); // now let's see what the register is status = wait_82802ab(flash); Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -42,8 +42,9 @@ const struct spi_programmer *spi_programmer = &spi_programmer_none; -int spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +int spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, const unsigned char *writearr, + unsigned char *readarr) { if (!spi_programmer->command) { msg_perr("%s called, but SPI is unsupported on this " @@ -52,11 +53,11 @@ return 1; } - return spi_programmer->command(writecnt, readcnt, - writearr, readarr); + return spi_programmer->command(flash, writecnt, readcnt, writearr, + readarr); } -int spi_send_multicommand(struct spi_command *cmds) +int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds) { if (!spi_programmer->multicommand) { msg_perr("%s called, but SPI is unsupported on this " @@ -65,11 +66,13 @@ return 1; } - return spi_programmer->multicommand(cmds); + return spi_programmer->multicommand(flash, cmds); } -int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { struct spi_command cmd[] = { { @@ -84,20 +87,22 @@ .readarr = NULL, }}; - return spi_send_multicommand(cmd); + return spi_send_multicommand(flash, cmd); } -int default_spi_send_multicommand(struct spi_command *cmds) +int default_spi_send_multicommand(struct flashctx *flash, + struct spi_command *cmds) { int result = 0; for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) { - result = spi_send_command(cmds->writecnt, cmds->readcnt, + result = spi_send_command(flash, cmds->writecnt, cmds->readcnt, cmds->writearr, cmds->readarr); } return result; } -int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, + unsigned int len) { unsigned int max_data = spi_programmer->max_data_read; if (max_data == MAX_DATA_UNSPECIFIED) { @@ -109,7 +114,8 @@ return spi_read_chunked(flash, buf, start, len, max_data); } -int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +int default_spi_write_256(struct flashctx *flash, uint8_t *buf, + unsigned int start, unsigned int len) { unsigned int max_data = spi_programmer->max_data_write; if (max_data == MAX_DATA_UNSPECIFIED) { @@ -121,7 +127,8 @@ return spi_write_chunked(flash, buf, start, len, max_data); } -int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, + unsigned int len) { unsigned int addrbase = 0; if (!spi_programmer->read) { @@ -135,7 +142,7 @@ * address. Highest possible address with the current SPI implementation * means 0xffffff, the highest unsigned 24bit number. */ - addrbase = spi_get_valid_read_addr(); + addrbase = spi_get_valid_read_addr(flash); if (addrbase + flash->total_size * 1024 > (1 << 24)) { msg_perr("Flash chip size exceeds the allowed access window. "); msg_perr("Read will probably fail.\n"); @@ -160,7 +167,8 @@ * .write_256 = spi_chip_write_1 */ /* real chunksize is up to 256, logical chunksize is 256 */ -int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, + unsigned int len) { if (!spi_programmer->write_256) { msg_perr("%s called, but SPI page write is unsupported on this " @@ -177,7 +185,7 @@ * be the lowest allowed address for all commands which take an address. * This is a programmer limitation. */ -uint32_t spi_get_valid_read_addr(void) +uint32_t spi_get_valid_read_addr(struct flashctx *flash) { switch (spi_programmer->type) { #if CONFIG_INTERNAL == 1 Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/spi25.c Sun Dec 18 16:01:24 2011 (r1474) @@ -29,13 +29,13 @@ #include "programmer.h" #include "spi.h" -static int spi_rdid(unsigned char *readarr, int bytes) +static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes) { static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; int ret; int i; - ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr); + ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); if (ret) return ret; msg_cspew("RDID returned"); @@ -45,20 +45,22 @@ return 0; } -static int spi_rems(unsigned char *readarr) +static int spi_rems(struct flashctx *flash, unsigned char *readarr) { unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 }; uint32_t readaddr; int ret; - ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr); + ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, cmd, + readarr); if (ret == SPI_INVALID_ADDRESS) { /* Find the lowest even address allowed for reads. */ - readaddr = (spi_get_valid_read_addr() + 1) & ~1; + readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1; cmd[1] = (readaddr >> 16) & 0xff, cmd[2] = (readaddr >> 8) & 0xff, cmd[3] = (readaddr >> 0) & 0xff, - ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr); + ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, + cmd, readarr); } if (ret) return ret; @@ -66,21 +68,21 @@ return 0; } -static int spi_res(unsigned char *readarr, int bytes) +static int spi_res(struct flashctx *flash, unsigned char *readarr, int bytes) { unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 }; uint32_t readaddr; int ret; int i; - ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr); + ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); if (ret == SPI_INVALID_ADDRESS) { /* Find the lowest even address allowed for reads. */ - readaddr = (spi_get_valid_read_addr() + 1) & ~1; + readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1; cmd[1] = (readaddr >> 16) & 0xff, cmd[2] = (readaddr >> 8) & 0xff, cmd[3] = (readaddr >> 0) & 0xff, - ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr); + ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); } if (ret) return ret; @@ -91,13 +93,13 @@ return 0; } -int spi_write_enable(void) +int spi_write_enable(struct flashctx *flash) { static const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN }; int result; /* Send WREN (Write Enable) */ - result = spi_send_command(sizeof(cmd), 0, cmd, NULL); + result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); if (result) msg_cerr("%s failed\n", __func__); @@ -105,12 +107,12 @@ return result; } -int spi_write_disable(void) +int spi_write_disable(struct flashctx *flash) { static const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI }; /* Send WRDI (Write Disable) */ - return spi_send_command(sizeof(cmd), 0, cmd, NULL); + return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); } static int probe_spi_rdid_generic(struct flashctx *flash, int bytes) @@ -119,7 +121,7 @@ uint32_t id1; uint32_t id2; - if (spi_rdid(readarr, bytes)) { + if (spi_rdid(flash, readarr, bytes)) { return 0; } @@ -199,7 +201,7 @@ unsigned char readarr[JEDEC_REMS_INSIZE]; uint32_t id1, id2; - if (spi_rems(readarr)) { + if (spi_rems(flash, readarr)) { return 0; } @@ -242,7 +244,7 @@ /* Check if RDID is usable and does not return 0xff 0xff 0xff or * 0x00 0x00 0x00. In that case, RES is pointless. */ - if (!spi_rdid(readarr, 3) && memcmp(readarr, allff, 3) && + if (!spi_rdid(flash, readarr, 3) && memcmp(readarr, allff, 3) && memcmp(readarr, all00, 3)) { msg_cdbg("Ignoring RES in favour of RDID.\n"); return 0; @@ -250,13 +252,14 @@ /* Check if REMS is usable and does not return 0xff 0xff or * 0x00 0x00. In that case, RES is pointless. */ - if (!spi_rems(readarr) && memcmp(readarr, allff, JEDEC_REMS_INSIZE) && + if (!spi_rems(flash, readarr) && + memcmp(readarr, allff, JEDEC_REMS_INSIZE) && memcmp(readarr, all00, JEDEC_REMS_INSIZE)) { msg_cdbg("Ignoring RES in favour of REMS.\n"); return 0; } - if (spi_res(readarr, 1)) { + if (spi_res(flash, readarr, 1)) { return 0; } @@ -279,7 +282,7 @@ unsigned char readarr[2]; uint32_t id1, id2; - if (spi_res(readarr, 2)) { + if (spi_res(flash, readarr, 2)) { return 0; } @@ -298,7 +301,7 @@ return 1; } -uint8_t spi_read_status_register(void) +uint8_t spi_read_status_register(struct flashctx *flash) { static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; /* FIXME: No workarounds for driver/hardware bugs in generic code. */ @@ -306,7 +309,8 @@ int ret; /* Read Status Register */ - ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr); + ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, + readarr); if (ret) msg_cerr("RDSR failed!\n"); @@ -414,7 +418,7 @@ { uint8_t status; - status = spi_read_status_register(); + status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); switch (flash->manufacture_id) { case ST_ID: @@ -465,7 +469,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution\n", __func__); @@ -475,7 +479,7 @@ * This usually takes 1-85 s, so wait in 1 s steps. */ /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(1000 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -502,7 +506,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution\n", __func__); return result; @@ -511,13 +515,14 @@ * This usually takes 1-85 s, so wait in 1 s steps. */ /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(1000 * 1000); /* FIXME: Check the status register for errors. */ return 0; } -int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +int spi_block_erase_52(struct flashctx *flash, unsigned int addr, + unsigned int blocklen) { int result; struct spi_command cmds[] = { @@ -543,7 +548,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); @@ -552,7 +557,7 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(100 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -563,7 +568,8 @@ * 32k for SST * 4-32k non-uniform for EON */ -int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, + unsigned int blocklen) { int result; struct spi_command cmds[] = { @@ -589,7 +595,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); @@ -598,7 +604,7 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(100 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -607,7 +613,8 @@ /* Block size is usually * 4k for PMC */ -int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, + unsigned int blocklen) { int result; struct spi_command cmds[] = { @@ -633,7 +640,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); @@ -642,14 +649,15 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(100 * 1000); /* FIXME: Check the status register for errors. */ return 0; } /* Sector size is usually 4k, though Macronix eliteflash has 64k */ -int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +int spi_block_erase_20(struct flashctx *flash, unsigned int addr, + unsigned int blocklen) { int result; struct spi_command cmds[] = { @@ -675,7 +683,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); @@ -684,13 +692,14 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 15-800 ms, so wait in 10 ms steps. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(10 * 1000); /* FIXME: Check the status register for errors. */ return 0; } -int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +int spi_block_erase_60(struct flashctx *flash, unsigned int addr, + unsigned int blocklen) { if ((addr != 0) || (blocklen != flash->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", @@ -700,7 +709,8 @@ return spi_chip_erase_60(flash); } -int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, + unsigned int blocklen) { if ((addr != 0) || (blocklen != flash->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", @@ -710,13 +720,13 @@ return spi_chip_erase_c7(flash); } -int spi_write_status_enable(void) +int spi_write_status_enable(struct flashctx *flash) { static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; int result; /* Send EWSR (Enable Write Status Register). */ - result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); + result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); if (result) msg_cerr("%s failed\n", __func__); @@ -751,7 +761,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution\n", __func__); @@ -766,7 +776,7 @@ * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. */ programmer_delay(100 * 1000); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) { + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { if (++i > 490) { msg_cerr("Error: WIP bit after WRSR never cleared\n"); return TIMEOUT_ERROR; @@ -799,7 +809,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution\n", __func__); @@ -814,7 +824,7 @@ * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. */ programmer_delay(100 * 1000); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) { + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { if (++i > 490) { msg_cerr("Error: WIP bit after WRSR never cleared\n"); return TIMEOUT_ERROR; @@ -840,7 +850,8 @@ return ret; } -int spi_byte_program(unsigned int addr, uint8_t databyte) +int spi_byte_program(struct flashctx *flash, unsigned int addr, + uint8_t databyte) { int result; struct spi_command cmds[] = { @@ -867,7 +878,7 @@ .readarr = NULL, }}; - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); @@ -875,7 +886,8 @@ return result; } -int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len) +int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, + unsigned int len) { int result; /* FIXME: Switch to malloc based on len unless that kills speed. */ @@ -914,7 +926,7 @@ memcpy(&cmd[4], bytes, len); - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); @@ -931,7 +943,7 @@ uint8_t status; int result; - status = spi_read_status_register(); + status = spi_read_status_register(flash); /* If block protection is disabled, stop here. */ if ((status & 0x3c) == 0) return 0; @@ -942,7 +954,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(); + status = spi_read_status_register(flash); if ((status & 0x3c) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; @@ -950,7 +962,8 @@ return 0; } -int spi_nbyte_read(unsigned int address, uint8_t *bytes, unsigned int len) +int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes, + unsigned int len) { const unsigned char cmd[JEDEC_READ_OUTSIZE] = { JEDEC_READ, @@ -960,7 +973,7 @@ }; /* Send Read */ - return spi_send_command(sizeof(cmd), len, cmd, bytes); + return spi_send_command(flash, sizeof(cmd), len, cmd, bytes); } /* @@ -968,7 +981,8 @@ * FIXME: Use the chunk code from Michael Karcher instead. * Each page is read separately in chunks with a maximum size of chunksize. */ -int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) +int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, + unsigned int len, unsigned int chunksize) { int rc = 0; unsigned int i, j, starthere, lenhere, toread; @@ -991,7 +1005,7 @@ lenhere = min(start + len, (i + 1) * page_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { toread = min(chunksize, lenhere - j); - rc = spi_nbyte_read(starthere + j, buf + starthere - start + j, toread); + rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); if (rc) break; } @@ -1007,7 +1021,8 @@ * FIXME: Use the chunk code from Michael Karcher instead. * Each page is written separately in chunks with a maximum size of chunksize. */ -int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) +int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, + unsigned int len, unsigned int chunksize) { int rc = 0; unsigned int i, j, starthere, lenhere, towrite; @@ -1035,10 +1050,10 @@ lenhere = min(start + len, (i + 1) * page_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { towrite = min(chunksize, lenhere - j); - rc = spi_nbyte_program(starthere + j, buf + starthere - start + j, towrite); + rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); if (rc) break; - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } if (rc) @@ -1055,23 +1070,25 @@ * (e.g. due to size constraints in IT87* for over 512 kB) */ /* real chunksize is 1, logical chunksize is 1 */ -int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, + unsigned int len) { unsigned int i; int result = 0; for (i = start; i < start + len; i++) { - result = spi_byte_program(i, buf[i - start]); + result = spi_byte_program(flash, i, buf[i - start]); if (result) return 1; - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } return 0; } -int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, + unsigned int len) { uint32_t pos = start; int result; @@ -1149,7 +1166,7 @@ } - result = spi_send_multicommand(cmds); + result = spi_send_multicommand(flash, cmds); if (result) { msg_cerr("%s failed during start command execution\n", __func__); @@ -1158,7 +1175,7 @@ */ return result; } - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(10); /* We already wrote 2 bytes in the multicommand step. */ @@ -1168,15 +1185,16 @@ while (pos < start + len - 1) { cmd[1] = buf[pos++ - start]; cmd[2] = buf[pos++ - start]; - spi_send_command(JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, + cmd, NULL); + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } /* Use WRDI to exit AAI mode. This needs to be done before issuing any * other non-AAI command. */ - spi_write_disable(); + spi_write_disable(flash); /* Write remaining byte (if any). */ if (pos < start + len) { Modified: trunk/sst28sf040.c ============================================================================== --- trunk/sst28sf040.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/sst28sf040.c Sun Dec 18 16:01:24 2011 (r1474) @@ -34,13 +34,13 @@ { chipaddr bios = flash->virtual_memory; - chip_readb(bios + 0x1823); - chip_readb(bios + 0x1820); - chip_readb(bios + 0x1822); - chip_readb(bios + 0x0418); - chip_readb(bios + 0x041B); - chip_readb(bios + 0x0419); - chip_readb(bios + 0x040A); + chip_readb(flash, bios + 0x1823); + chip_readb(flash, bios + 0x1820); + chip_readb(flash, bios + 0x1822); + chip_readb(flash, bios + 0x0418); + chip_readb(flash, bios + 0x041B); + chip_readb(flash, bios + 0x0419); + chip_readb(flash, bios + 0x040A); return 0; } @@ -49,34 +49,36 @@ { chipaddr bios = flash->virtual_memory; - chip_readb(bios + 0x1823); - chip_readb(bios + 0x1820); - chip_readb(bios + 0x1822); - chip_readb(bios + 0x0418); - chip_readb(bios + 0x041B); - chip_readb(bios + 0x0419); - chip_readb(bios + 0x041A); + chip_readb(flash, bios + 0x1823); + chip_readb(flash, bios + 0x1820); + chip_readb(flash, bios + 0x1822); + chip_readb(flash, bios + 0x0418); + chip_readb(flash, bios + 0x041B); + chip_readb(flash, bios + 0x0419); + chip_readb(flash, bios + 0x041A); return 0; } -int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size) +int erase_sector_28sf040(struct flashctx *flash, unsigned int address, + unsigned int sector_size) { chipaddr bios = flash->virtual_memory; /* This command sequence is very similar to erase_block_82802ab. */ - chip_writeb(AUTO_PG_ERASE1, bios); - chip_writeb(AUTO_PG_ERASE2, bios + address); + chip_writeb(flash, AUTO_PG_ERASE1, bios); + chip_writeb(flash, AUTO_PG_ERASE2, bios + address); /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); + toggle_ready_jedec(flash, bios); /* FIXME: Check the status register for errors. */ return 0; } /* chunksize is 1 */ -int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) +int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, + unsigned int len) { int i; chipaddr bios = flash->virtual_memory; @@ -90,11 +92,11 @@ continue; } /*issue AUTO PROGRAM command */ - chip_writeb(AUTO_PGRM, dst); - chip_writeb(*src++, dst++); + chip_writeb(flash, AUTO_PGRM, dst); + chip_writeb(flash, *src++, dst++); /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); + toggle_ready_jedec(flash, bios); } return 0; @@ -104,17 +106,18 @@ { chipaddr bios = flash->virtual_memory; - chip_writeb(CHIP_ERASE, bios); - chip_writeb(CHIP_ERASE, bios); + chip_writeb(flash, CHIP_ERASE, bios); + chip_writeb(flash, CHIP_ERASE, bios); programmer_delay(10); - toggle_ready_jedec(bios); + toggle_ready_jedec(flash, bios); /* FIXME: Check the status register for errors. */ return 0; } -int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, + unsigned int blocklen) { if ((addr != 0) || (blocklen != flash->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", Modified: trunk/sst49lfxxxc.c ============================================================================== --- trunk/sst49lfxxxc.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/sst49lfxxxc.c Sun Dec 18 16:01:24 2011 (r1474) @@ -23,11 +23,14 @@ #include "flash.h" #include "chipdrivers.h" -static int write_lockbits_block_49lfxxxc(struct flashctx *flash, unsigned long address, unsigned char bits) +static int write_lockbits_block_49lfxxxc(struct flashctx *flash, + unsigned long address, + unsigned char bits) { unsigned long lock = flash->virtual_registers + address + 2; - msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock)); - chip_writeb(bits, lock); + msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, + chip_readb(flash, lock)); + chip_writeb(flash, bits, lock); return 0; } @@ -59,13 +62,14 @@ return write_lockbits_49lfxxxc(flash, 0); } -int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size) +int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, + unsigned int sector_size) { uint8_t status; chipaddr bios = flash->virtual_memory; - chip_writeb(0x30, bios); - chip_writeb(0xD0, bios + address); + chip_writeb(flash, 0x30, bios); + chip_writeb(flash, 0xD0, bios + address); status = wait_82802ab(flash); print_status_82802ab(status); Modified: trunk/sst_fwhub.c ============================================================================== --- trunk/sst_fwhub.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/sst_fwhub.c Sun Dec 18 16:01:24 2011 (r1474) @@ -29,7 +29,7 @@ chipaddr registers = flash->virtual_registers; uint8_t blockstatus; - blockstatus = chip_readb(registers + offset + 2); + blockstatus = chip_readb(flash, registers + offset + 2); msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ", offset, flash->page_size, blockstatus); switch (blockstatus & 0x3) { @@ -59,7 +59,7 @@ if (blockstatus) { msg_cdbg("Trying to clear lock for 0x%06x... ", offset); - chip_writeb(0, registers + offset + 2); + chip_writeb(flash, 0, registers + offset + 2); blockstatus = check_sst_fwhub_block_lock(flash, offset); msg_cdbg("%s\n", (blockstatus) ? "failed" : "OK"); Modified: trunk/stm50flw0x0x.c ============================================================================== --- trunk/stm50flw0x0x.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/stm50flw0x0x.c Sun Dec 18 16:01:24 2011 (r1474) @@ -60,8 +60,10 @@ // unlock each 4k-sector for (j = 0; j < 0x10000; j += 0x1000) { msg_cdbg("unlocking at 0x%x\n", offset + j); - chip_writeb(unlock_sector, wrprotect + offset + j); - if (chip_readb(wrprotect + offset + j) != unlock_sector) { + chip_writeb(flash, unlock_sector, + wrprotect + offset + j); + if (chip_readb(flash, wrprotect + offset + j) != + unlock_sector) { msg_cerr("Cannot unlock sector @ 0x%x\n", offset + j); return -1; @@ -69,8 +71,8 @@ } } else { msg_cdbg("unlocking at 0x%x\n", offset); - chip_writeb(unlock_sector, wrprotect + offset); - if (chip_readb(wrprotect + offset) != unlock_sector) { + chip_writeb(flash, unlock_sector, wrprotect + offset); + if (chip_readb(flash, wrprotect + offset) != unlock_sector) { msg_cerr("Cannot unlock sector @ 0x%x\n", offset); return -1; } @@ -94,15 +96,16 @@ } /* This function is unused. */ -int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, unsigned int sectorsize) +int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, + unsigned int sectorsize) { chipaddr bios = flash->virtual_memory + sector; // clear status register - chip_writeb(0x50, bios); + chip_writeb(flash, 0x50, bios); // now start it - chip_writeb(0x32, bios); - chip_writeb(0xd0, bios); + chip_writeb(flash, 0x32, bios); + chip_writeb(flash, 0xd0, bios); programmer_delay(10); wait_82802ab(flash); Modified: trunk/w29ee011.c ============================================================================== --- trunk/w29ee011.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/w29ee011.c Sun Dec 18 16:01:24 2011 (r1474) @@ -38,29 +38,29 @@ } /* Issue JEDEC Product ID Entry command */ - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(flash, 0xAA, bios + 0x5555); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(flash, 0x55, bios + 0x2AAA); programmer_delay(10); - chip_writeb(0x80, bios + 0x5555); + chip_writeb(flash, 0x80, bios + 0x5555); programmer_delay(10); - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(flash, 0xAA, bios + 0x5555); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(flash, 0x55, bios + 0x2AAA); programmer_delay(10); - chip_writeb(0x60, bios + 0x5555); + chip_writeb(flash, 0x60, bios + 0x5555); programmer_delay(10); /* Read product ID */ - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); + id1 = chip_readb(flash, bios); + id2 = chip_readb(flash, bios + 0x01); /* Issue JEDEC Product ID Exit command */ - chip_writeb(0xAA, bios + 0x5555); + chip_writeb(flash, 0xAA, bios + 0x5555); programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); + chip_writeb(flash, 0x55, bios + 0x2AAA); programmer_delay(10); - chip_writeb(0xF0, bios + 0x5555); + chip_writeb(flash, 0xF0, bios + 0x5555); programmer_delay(10); msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); Modified: trunk/w39.c ============================================================================== --- trunk/w39.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/w39.c Sun Dec 18 16:01:24 2011 (r1474) @@ -26,7 +26,7 @@ chipaddr wrprotect = flash->virtual_registers + offset + 2; uint8_t locking; - locking = chip_readb(wrprotect); + locking = chip_readb(flash, wrprotect); msg_cdbg("Lock status of block at 0x%08x is ", offset); switch (locking & 0x7) { case 0: @@ -64,7 +64,7 @@ chipaddr wrprotect = flash->virtual_registers + offset + 2; uint8_t locking; - locking = chip_readb(wrprotect); + locking = chip_readb(flash, wrprotect); /* Read or write lock present? */ if (locking & ((1 << 2) | (1 << 0))) { /* Lockdown active? */ @@ -73,7 +73,7 @@ return -1; } else { msg_cdbg("Unlocking block at 0x%08x\n", offset); - chip_writeb(0, wrprotect); + chip_writeb(flash, 0, wrprotect); } } @@ -86,18 +86,18 @@ uint8_t val; /* Product Identification Entry */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); + chip_writeb(flash, 0xAA, bios + 0x5555); + chip_writeb(flash, 0x55, bios + 0x2AAA); + chip_writeb(flash, 0x90, bios + 0x5555); programmer_delay(10); /* Read something, maybe hardware lock bits */ - val = chip_readb(bios + offset); + val = chip_readb(flash, bios + offset); /* Product Identification Exit */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); + chip_writeb(flash, 0xAA, bios + 0x5555); + chip_writeb(flash, 0x55, bios + 0x2AAA); + chip_writeb(flash, 0xF0, bios + 0x5555); programmer_delay(10); return val; @@ -160,7 +160,7 @@ return 0; } -int printlock_w39l040(struct flashctx * flash) +int printlock_w39l040(struct flashctx *flash) { uint8_t lock; int ret; Modified: trunk/wbsio_spi.c ============================================================================== --- trunk/wbsio_spi.c Wed Dec 14 23:25:15 2011 (r1473) +++ trunk/wbsio_spi.c Sun Dec 18 16:01:24 2011 (r1474) @@ -60,9 +60,12 @@ return flashport; } -static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr); +static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, + unsigned int start, unsigned int len); static const struct spi_programmer spi_programmer_wbsio = { .type = SPI_CONTROLLER_WBSIO, @@ -110,8 +113,10 @@ * Would one more byte of RAM in the chip (to get all 24 bits) really make * such a big difference? */ -static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) +static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) { int i; uint8_t mode = 0; @@ -194,7 +199,8 @@ return 0; } -static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, + unsigned int start, unsigned int len) { return read_memmapped(flash, buf, start, len); }

1 0

flash operation log
by Adam Kalaska 18 Dec '11

18 Dec '11

for Your request send my logs all operation success thanks

1 0

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flashrom December 2011