flashrom February 2010

flashrom@flashrom.org

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[commit] r918 - trunk
by repository service 27 Feb '10

27 Feb '10

Author: mkarcher Date: Sat Feb 27 19:35:54 2010 New Revision: 918 URL: http://flashrom.org/trac/coreboot/changeset/918 Log: Board enable for HP Vectra VL400 Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: bas nowaira <bas429(a)gmail.com> Acked-by: Luc Verhaegen <libv(a)skynet.be> Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Feb 27 19:01:15 2010 (r917) +++ trunk/board_enable.c Sat Feb 27 19:35:54 2010 (r918) @@ -233,6 +233,50 @@ return it8705f_write_enable(0x2e, name); } +static int pc87360_gpio_set(uint8_t gpio, int raise) +{ + static const int bankbase[] = {0, 4, 8, 10, 12}; + int gpio_bank = gpio / 8; + int gpio_pin = gpio % 8; + uint16_t baseport; + uint8_t id; + uint8_t val; + + if (gpio_bank > 4) + { + fprintf(stderr, "PC87360: Invalid GPIO %d\n", gpio); + return -1; + } + + id = sio_read(0x2E, 0x20); + if (id != 0xE1) + { + fprintf(stderr, "PC87360: unexpected ID %02x\n", id); + return -1; + } + + sio_write(0x2E, 0x07, 0x07); /* select GPIO device */ + baseport = (sio_read(0x2E, 0x60) << 8) | sio_read(0x2E, 0x61); + if((baseport & 0xFFF0) == 0xFFF0 || baseport == 0) + { + fprintf (stderr, "PC87360: invalid GPIO base address %04x\n", + baseport); + return -1; + } + sio_mask (0x2E, 0x30, 0x01, 0x01); /* Enable logical device */ + sio_write(0x2E, 0xF0, gpio_bank*16 + gpio_pin); + sio_mask (0x2E, 0xF1, 0x01, 0x01); /* Make pin output */ + + val = INB(baseport + bankbase[gpio_bank]); + if(raise) + val |= 1 << gpio_pin; + else + val &= ~(1 << gpio_pin); + OUTB(val, baseport + bankbase[gpio_bank]); + + return 0; +} + /** * VT823x: Set one of the GPIO pins. */ @@ -880,6 +924,21 @@ } /** + * Suited for HP Vectra VL400: 815 + ICH + PC87360. + */ + +static int board_hp_vl400(const char *name) +{ + int ret; + ret = intel_ich_gpio_set(25, 1); /* Master write enable ? */ + if (!ret) + ret = pc87360_gpio_set(0x09, 1); /* #WP ? */ + if (!ret) + ret = pc87360_gpio_set(0x27, 1); /* #TBL */ + return ret; +} + +/** * Suited for: * - Dell Poweredge 1850: Intel PPGA604 + E7520 + ICH5R. * - ASRock P4i65GV: Intel Socket478 + 865GV + ICH5R. @@ -1227,6 +1286,7 @@ {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, it87xx_probe_spi_flash}, {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, it87xx_probe_spi_flash}, {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, board_hp_dl145_g3_enable}, + {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, board_hp_vl400}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, wbsio_check_for_spi}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, w83627hf_gpio24_raise_2e},

1 0

[PATCH] Implement tested/untested status for board enables
by Michael Karcher 27 Feb '10

27 Feb '10

The message printing code greatly exceed the 80 character limit. I can reformat it on request to obey the limit. Intended behaviour: on untested boards an explanation of that status is printed and the board enable code is not run, unless the option "boardenable=force" has been passed to the internal programmer. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- board_enable.c | 140 +++++++++++++++++++++++++++++++++----------------------- flash.h | 2 + internal.c | 20 ++++++++ 3 files changed, 104 insertions(+), 58 deletions(-) diff --git a/board_enable.c b/board_enable.c index 4278b6d..8f76b9b 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1192,64 +1192,64 @@ static int board_asus_a7v600x(const char *name) /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705f_write_enable_2e}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705f_write_enable_2e}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, - {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", 512, NULL}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705f_write_enable_2e}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, board_msi_kt4v}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, board_msi_651ml}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, it8705f_write_enable_2e}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, w836xx_memw_enable_2e}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, "Tekram", "P6Pro-A5", 256, NULL}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", 0, it87xx_probe_spi_flash}, - - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, 0, NULL}, /* end marker */ + /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, OK, it8705f_write_enable_2e}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, OK, it8705f_write_enable_2e}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, it8705f_write_enable_2e}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, OK, board_epox_ep_bx3}, + {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, OK, it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, OK, it8705f_write_enable_2e}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, OK, nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, OK, it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, OK, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, OK, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, OK, it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, OK, it8705f_write_enable_2e}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, OK, board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, OK, board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, OK, w836xx_memw_enable_2e}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, "Tekram", "P6Pro-A5", 256, OK, NULL}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", 0, OK, it87xx_probe_spi_flash}, + + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, 0, NT, NULL}, /* end marker */ }; /** @@ -1349,6 +1349,30 @@ static struct board_pciid_enable *board_match_pci_card_ids(void) } } + if (board->status == NT) { + if (!force_boardenable) + { + printf("WARNING: Your mainboard is %s %s, but the mainboard-specific\n" + "code has not been marked as working. To help flashrom development, please\n" + "test flashrom on your board. As the code to support your board is untested,\n" + "we strongly recommend that as an additional safety measure you make\n" + "store backup of your current ROM contents (obtained by flashrom -r) on\n" + "a medium that can be accessed from a different computer (like an USB\n" + "drive or a network share of another system) before you try to erase or\n" + "write.\n" + "The untested code does not run unless you specify the\n" + " \"-p internal:boardenable=force\" command line option. Depending on your\n" + "hardware environment, erasing, writing or even probing can fail without\n" + "running the board specific code. Running the board-specific code might\n" + "cause your computer to behave erratically if it is wrong.\n" + "Please report the results of running the board enable code to\n" + "flashrom(a)flashrom.org.\n", + board->vendor_name, board->board_name); + continue; + } + printf("NOTE: Running an untested board enable procedure.\n" + "Please report success/failure to flashrom(a)flashrom.org\n"); + } return board; } diff --git a/flash.h b/flash.h index 76be164..f23c2d0 100644 --- a/flash.h +++ b/flash.h @@ -288,6 +288,7 @@ struct board_pciid_enable { const char *board_name; int max_rom_decode_parallel; + int status; int (*enable) (const char *name); }; @@ -382,6 +383,7 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, void get_io_perms(void); void release_io_perms(void); #if INTERNAL_SUPPORT == 1 +extern int force_boardenable; void probe_superio(void); int internal_init(void); int internal_shutdown(void); diff --git a/internal.c b/internal.c index 12dae39..38cc3fc 100644 --- a/internal.c +++ b/internal.c @@ -100,6 +100,7 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, #if INTERNAL_SUPPORT == 1 struct superio superio = {}; +int force_boardenable = 0; void probe_superio(void) { @@ -114,6 +115,25 @@ int internal_init(void) { int ret = 0; + if (programmer_param && !strlen(programmer_param)) { + free(programmer_param); + programmer_param = NULL; + } + if (programmer_param) { + char *arg; + arg = extract_param(&programmer_param, "boardenable=", ",:"); + if (arg && !strcmp(arg,"force")) + force_boardenable = 1; + else if (arg) + msg_perr("Unknown argument for boardenable: %s\n", arg); + free(arg); + + if (strlen(programmer_param)) + msg_perr("Unhandled programmer parameters: %s\n", + programmer_param); + free(programmer_param); + programmer_param = NULL; + } get_io_perms(); /* Initialize PCI access for flash enables */ -- 1.6.5

1 0

[PATCH] convert write_49fl00x to write_jedec_1
by Sean Nelson 27 Feb '10

27 Feb '10

Since we have a unlock interface for chips, I think we can convert the remaining references to *_49fl00x. Now the only remaining and used function in pm49fl00x.c is unlock_49fl00x. Added missing unlock to AMIC A49LF040A. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 2

[commit] r917 - trunk
by repository service 27 Feb '10

27 Feb '10

Author: snelson Date: Sat Feb 27 19:01:15 2010 New Revision: 917 URL: http://flashrom.org/trac/coreboot/changeset/917 Log: Since we have a unlock interface for chips, I think we can convert the remaining references to *_49fl00x. Now the only remaining and used function in pm49fl00x.c is unlock_49fl00x. Added missing unlock to AMIC A49LF040A. Added lock_49fl00x function; Trivial change. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/pm49fl00x.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Fri Feb 26 10:51:20 2010 (r916) +++ trunk/chipdrivers.h Sat Feb 27 19:01:15 2010 (r917) @@ -87,10 +87,8 @@ chipaddr dst, int page_size); /* pm49fl00x.c */ -int probe_49fl00x(struct flashchip *flash); -int erase_49fl00x(struct flashchip *flash); -int write_49fl00x(struct flashchip *flash, uint8_t *buf); int unlock_49fl00x(struct flashchip *flash); +int lock_49fl00x(struct flashchip *flash); /* sharplhf00l04.c */ int probe_lhf00l04(struct flashchip *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Feb 26 10:51:20 2010 (r916) +++ trunk/flashchips.c Sat Feb 27 19:01:15 2010 (r917) @@ -1306,7 +1306,8 @@ .block_erase = erase_chip_block_jedec, } }, - .write = write_49fl00x, + .unlock = unlock_49fl00x, + .write = write_jedec_1, .read = read_memmapped, }, @@ -3347,7 +3348,7 @@ } }, .unlock = unlock_49fl00x, - .write = write_49fl00x, + .write = write_jedec_1, .read = read_memmapped, }, @@ -3377,7 +3378,7 @@ } }, .unlock = unlock_49fl00x, - .write = write_49fl00x, + .write = write_jedec_1, .read = read_memmapped, }, Modified: trunk/pm49fl00x.c ============================================================================== --- trunk/pm49fl00x.c Fri Feb 26 10:51:20 2010 (r916) +++ trunk/pm49fl00x.c Sat Feb 27 19:01:15 2010 (r917) @@ -43,6 +43,12 @@ return 0; } +int lock_49fl00x(struct flashchip *flash) +{ + write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size); + return 0; +} + int erase_49fl00x(struct flashchip *flash) { int i;

1 0

I forgot the attachment as usual...
by gdocs123 123 27 Feb '10

27 Feb '10

I got the "other firmware p4p800se-deluxe" flashed succesfully using the socket from p4b533e motherboard by using the uniflash2.05b tool on a dos startup floppy made in windows xp. Maybe in 'distant' future I can try flashing with a newer version of flashrom if I want to take risks... like maybe try a beta bios etc... but for a couple of weeks / months I keep it this way. Here is some output info for my board asked on IRC, I hope it will help you with the development of flashrom. Thanks for the support and input sofar. If you like I can also sent you output info of p4p800s-e "deluxe" which is fixed btw. grtz Walter

2 1

Bios flash failed
by Alexandru Dabija 27 Feb '10

27 Feb '10

Hello, I tried to flash the bios of an ASUS P5LD2-VM motherboard and it failed. The output: flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x00002ee8! Expected=0xff, Read=0x50, failed byte count from 0x00000000-0x0000ffff: 0xd032 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! I've used this bios P5LD2-VM-ASUS-1303.ROM. Can anybody help me? Thanks, Alexandru Dabija

3 3

using flashrom
by Steve Smyser 26 Feb '10

26 Feb '10

Hello! I have a few questions and I'm hoping someone will be able to help me out. Let me first explain what I'm trying to do. I want to modify a dell bios, but when I try to extract the rom file from the executable with the command -writeromfile, it won't work. So, I though maybe I could mod a bios backup file, but I can't flash it with standard flash utilities. I've read that the backup doesn't contain the platform necessary to flash properly, and that's the reason the standard flash utilities reject the attempt. So, I'm hoping maybe this utility will be able to write a rom backup file to the chip. I've tried to copy your flashrom file to a bootable flash drive, but when I booted into the drive, and typed command "flashrom.exe", a colorful screen would open, the curser would blink, but I couldn't type a command. Then the screen switched over to a plain msg screen. The dell is an inspirion 531 with an award bios. The chip is supported but I'm not sure about the board. I think its an asus. Anyway, any help or suggestions would be greatly appreciated. Thank you!! Steve Email: slsmyser(a)yahoo.com

1 0

Re: [flashrom] [PATCH] Board Enable for Intel SE440BX-2
by Luc Verhaegen 26 Feb '10

26 Feb '10

On Wed, Jan 27, 2010 at 12:58:34AM +0100, Michael Karcher wrote: > This board has no subsystem IDs, but thankfully the DMI patch is in > now, which is a real life safer. There are *WAY* to many 440BX/PIIX4 > boards out there to match this without DMI. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > board_enable.c | 9 +++++++++ > 1 files changed, 9 insertions(+), 0 deletions(-) > > diff --git a/board_enable.c b/board_enable.c > index e535d4f..40db653 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -651,6 +651,14 @@ static int board_epox_ep_bx3(const char *name) > } > > /** > + * Suited for Intel SE440BX-2 > + */ > +static int intel_piix4_gpo27_lower(const char *name) > +{ > + return intel_piix4_gpo_set(27, 0); > +} > + > +/** > * Set a GPIO line on a given intel ICH LPC controller. > */ > static int intel_ich_gpio_set(int gpio, int raise) > @@ -1218,6 +1226,7 @@ struct board_pciid_enable board_pciid_enables[] = { > {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, it87xx_probe_spi_flash}, > {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, board_hp_dl145_g3_enable}, > {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, board_ibm_x3455}, > + {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, intel_piix4_gpo27_lower}, > {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, wbsio_check_for_spi}, > {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, w83627hf_gpio24_raise_2e}, > {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, board_kontron_986lcd_m}, > -- And my piix4 code might finally get tested too :) Luc Verhaegen.

2 2

Re: [flashrom] [PATCH 3/3] Warn if running on laptops
by Carl-Daniel Hailfinger 26 Feb '10

26 Feb '10

Missing signoff. Will comment anyway. On 24.02.2010 14:28, Michael Karcher wrote: > diff --git a/dmi.c b/dmi.c > index 100767f..ad023e0 100644 > --- a/dmi.c > +++ b/dmi.c > @@ -96,6 +96,7 @@ static char *get_dmi_string(const char * string_name) > void dmi_init(void) > { > int i; > + char * chassis_type; > char *chassis_type; > has_dmi_support = 1; > for (i = 0; i < DMI_ID_INVALID; i++) { > dmistrings[i] = get_dmi_string(dmidecode_names[i]); > @@ -104,6 +105,14 @@ void dmi_init(void) > break; > } > } > + > + chassis_type = get_dmi_string("chassis-type"); > + if (chassis_type && !strcmp(chassis_type, "Notebook")) > + { > + printf_debug("Laptop detected via DMI"); > + is_laptop = 1; > + } > + free (chassis_type); > Not sure about the most common coding style. free(object) or free (object). Would be nice to have uniform usage. > } > > /** > diff --git a/flash.h b/flash.h > index ff2004c..0ad6212 100644 > --- a/flash.h > +++ b/flash.h > @@ -382,6 +382,7 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, > void get_io_perms(void); > void release_io_perms(void); > #if INTERNAL_SUPPORT == 1 > +extern int is_laptop; > void probe_superio(void); > int internal_init(void); > int internal_shutdown(void); > diff --git a/internal.c b/internal.c > index 12dae39..d557738 100644 > --- a/internal.c > +++ b/internal.c > @@ -110,6 +110,8 @@ void probe_superio(void) > #endif > } > > +int is_laptop; > + > int internal_init(void) > { > int ret = 0; > @@ -131,6 +133,16 @@ int internal_init(void) > /* Probe for the SuperI/O chip and fill global struct superio. */ > probe_superio(); > > + /* Warn if a laptop is detected */ > + if (is_laptop) > + printf("========================================================================\n" > + "WARNING! You seem to be running flashrom on a laptop.\n" > + "Laptops, notebooks and netbooks are difficult to support and we recommend\n" > + "to use the vendor flashing utility. The embedded controller (EC) in these\n" > + "machines often interacts badly with flashing\n" > + "See http://www.flashrom.org/Supported_hardware#Unsupported_Laptops.2FNotebooks.…" > Should we point people to http://www.flashrom.org/Laptops instead? > + "========================================================================\n"); > + > /* try to enable it. Failure IS an option, since not all motherboards > * really need this to be done, etc., etc. > */ > Looks good otherwise. Fix or explain the issues above, and this is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

2 3

Re: [flashrom] [PATCH 2/3] Factor out DMI string reading into subfunction
by Carl-Daniel Hailfinger 26 Feb '10

26 Feb '10

On 24.02.2010 14:28, Michael Karcher wrote: > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > > diff --git a/dmi.c b/dmi.c > index c80a568..100767f 100644 > --- a/dmi.c > +++ b/dmi.c > @@ -54,55 +54,56 @@ char *dmistrings[DMI_ID_INVALID]; > [...] > + printf_debug("DMI string %s: \"%s\"\n", string_name, answerbuf); > + > + return strdup(answerbuf); > +} > If strdup runs out of memory, we'll return NULL without warning that we ran out of memory. Same coding style nitpicks as with the other patch. I trust you to explain/fix this. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

2 1

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flashrom February 2010