flashrom October 2010

flashrom@flashrom.org

66 participants
181 discussions

[commit] r1202 - trunk
by repository service 08 Oct '10

08 Oct '10

Author: hailfinger Date: Fri Oct 8 13:03:02 2010 New Revision: 1202 URL: http://flashrom.org/trac/flashrom/changeset/1202 Log: A lot of messages sent to flashrom(a)flashrom.org just have "flashrom -V" as the subject. Ask people to include more information in the subject line to make life easier for developers/supporters. Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/flashrom.c trunk/pcidev.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Oct 8 02:37:55 2010 (r1201) +++ trunk/board_enable.c Fri Oct 8 13:03:02 2010 (r1202) @@ -433,7 +433,9 @@ max_rom_decode.parallel = 1024 * 1024; msg_pinfo("IT8705F with very unusual settings. Please " "send the output of \"flashrom -V\" to \n" - "flashrom(a)flashrom.org to help us finish " + "flashrom(a)flashrom.org with " + "IT8705: your board name: flashrom -V\n" + "as the subject to help us finish " "support for your Super I/O. Thanks.\n"); ret = 1; } else if (tmp & 0x08) { @@ -2097,7 +2099,8 @@ board = NULL; } else { msg_pinfo("NOTE: Running an untested board enable procedure.\n" - "Please report success/failure to flashrom(a)flashrom.org.\n"); + "Please report success/failure to flashrom(a)flashrom.org\n" + "with your board name and SUCCESS or FAILURE in the subject.\n"); } } Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri Oct 8 02:37:55 2010 (r1201) +++ trunk/chipset_enable.c Fri Oct 8 13:03:02 2010 (r1202) @@ -939,7 +939,9 @@ } out_msg: msg_pinfo("Please send the output of \"flashrom -V\" to " - "flashrom(a)flashrom.org to help us finish support for your " + "flashrom(a)flashrom.org with\n" + "your board name: flashrom -V as the subject to help us " + "finish support for your\n" "chipset. Thanks.\n"); return ret; @@ -1195,8 +1197,11 @@ continue; if (ret != -2) { msg_pinfo("WARNING: unexpected second chipset match: " - "\"%s %s\"\nignoring, please report lspci and " - "board URL to flashrom(a)flashrom.org!\n", + "\"%s %s\"\n" + "ignoring, please report lspci and board URL " + "to flashrom(a)flashrom.org\n" + "with 2CHIPSET: your board name in the " + "subject line.\n", chipset_enables[i].vendor_name, chipset_enables[i].device_name); continue; Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Fri Oct 8 02:37:55 2010 (r1201) +++ trunk/flashrom.c Fri Oct 8 13:03:02 2010 (r1202) @@ -1314,7 +1314,8 @@ { msg_gerr("Your flash chip is in an unknown state.\n" "Get help on IRC at irc.freenode.net (channel #flashrom) or\n" - "mail flashrom(a)flashrom.org!\n" + "mail flashrom(a)flashrom.org with FAILED: your board name in " + "the subject line!\n" "-------------------------------------------------------------" "------------------\n" "DO NOT REBOOT OR POWEROFF!\n"); @@ -1496,8 +1497,8 @@ "operations you tested (-V, -Vr,\n" "-Vw, -VE), and mention which mainboard or " "programmer you tested.\n" - "Thanks for your help!\n" - "===\n"); + "Please mention your board in the subject line. " + "Thanks for your help!\n"); } } Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Fri Oct 8 02:37:55 2010 (r1201) +++ trunk/pcidev.c Fri Oct 8 13:03:02 2010 (r1202) @@ -66,9 +66,11 @@ if (devs[i].status == NT) { msg_pinfo("===\nThis PCI device is UNTESTED. Please " - "report the 'flashrom -p xxxx' output \n" - "to flashrom(a)flashrom.org if it works " - "for you. Thank you for your help!\n===\n"); + "report the 'flashrom -p xxxx' output \n" + "to flashrom(a)flashrom.org if it works " + "for you. Please add the name of your\n" + "PCI device to the subject. Thank you for " + "your help!\n===\n"); } return addr;

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[PATCH] Wait for SPI WRSR
by Carl-Daniel Hailfinger 08 Oct '10

08 Oct '10

Bugfix, 0.9.3 candidate. SPI write status register (WRSR) may take longer than 100 ms, and it makes sense to poll for completion in 10 ms steps. This patch complements r1115. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-wrsr_delay/spi25.c =================================================================== --- flashrom-wrsr_delay/spi25.c (Revision 1184) +++ flashrom-wrsr_delay/spi25.c (Arbeitskopie) @@ -880,8 +880,14 @@ msg_cerr("%s failed during command execution\n", __func__); } - /* WRSR performs a self-timed erase before the changes take effect. */ + /* WRSR performs a self-timed erase before the changes take effect. + * This may take 50-85 ms in most cases, and some chips apparently + * allow running RDSR only once. Pick an initial delay of 100 ms, + * then wait in 10 ms steps. + */ programmer_delay(100 * 1000); + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(10 * 1000); return result; } @@ -912,8 +918,14 @@ msg_cerr("%s failed during command execution\n", __func__); } - /* WRSR performs a self-timed erase before the changes take effect. */ + /* WRSR performs a self-timed erase before the changes take effect. + * This may take 50-85 ms in most cases, and some chips apparently + * allow running RDSR only once. Pick an initial delay of 100 ms, + * then wait in 10 ms steps. + */ programmer_delay(100 * 1000); + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(10 * 1000); return result; } -- http://www.hailfinger.org/

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[PATCH] Update man page
by Carl-Daniel Hailfinger 08 Oct '10

08 Oct '10

Update the man page to have correct info for the upcoming release. If you know of any features which are not mentioned in the man page, please tell me. If you know any major contributors who were forgotten, please tell me. If you find any bugs, please tell me. Should we mention all contributors with more than one patch? Should we restrict the author list to those who have substantial amounts of code in flashrom? Do we have to ask people if adding their email address to the manpage is OK? Should we mention the flashrom mailing list e-mail address in the man page and kill all other email addresses? Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-manpage/flashrom.8 =================================================================== --- flashrom-manpage/flashrom.8 (Revision 1194) +++ flashrom-manpage/flashrom.8 (Arbeitskopie) @@ -97,7 +97,7 @@ .sp * Force chip read and pretend the chip is there. .sp -* Force chip access even if the chip is bigger than the maximum supported\ +* Force chip access even if the chip is bigger than the maximum supported \ size for the flash bus. .sp * Force erase even if erase is known bad. @@ -169,6 +169,9 @@ .sp .BR "* nicsmc1211" " (for flash ROMs on RTL8139-compatible SMC2 network cards)" .sp +.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \ +cards)" +.sp .BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)" .sp .BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)" @@ -187,6 +190,8 @@ .sp .BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)" .sp +.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)" +.sp .BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport \ based programmer)" .sp @@ -313,8 +318,8 @@ Example: .B "flashrom \-p dummy:bus=lpc+fwh" .TP -.BR "nic3com" , " nicrealtek" , " nicsmc1211" , " gfxnvidia" , " satasii \ -" and " atahpt " programmers +.BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " gfxnvidia\ +" , " satasii " and " atahpt " programmers These programmers have an option to specify the PCI address of the card your want to use, which must be specified if more than one card supported by the selected programmer is installed in your system. The syntax is @@ -396,6 +401,9 @@ .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M ", " 8M (in Hz). The default is the maximum frequency of 8 MHz. .TP +.BR "dediprog " programmer +No parameters defined yet. +.TP .BR "rayer_spi " programmer The default I/O base address used for the parallel port is 0x378 and you can use the optional @@ -484,28 +492,48 @@ .br Please see the individual files. .SH AUTHORS +Andrew Morgan <ziltro(a)ziltro.com> +.br Carl-Daniel Hailfinger .br Claus Gindhart <claus.gindhart(a)kontron.com> .br +David Borg <borg.db(a)gmail.com> +.br +David Hendricks <dhendrix(a)google.com> +.br Dominik Geyer <dominik.geyer(a)kontron.com> .br Eric Biederman .br Giampiero Giancipoli <gianci(a)email.it> .br +Helge Wagner <helge.wagner(a)ge.com> +.br +Idwer Vollering <vidwer+flashrom(a)gmail.com> +.br Joe Bao <Zheng.Bao(a)amd.com> .br +Jörg Fischer <turboj(a)gmx.de> +.br +Joshua Roys <roysjosh(a)gmail.com> +.br Luc Verhaegen <libv(a)skynet.be> .br Li-Ta Lo .br Markus Boas <ryven(a)ryven.de> .br +Mattias Mattsson <vitplister(a)gmail.com> +.br Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> .br Nikolay Petukhov <nikolay.petukhov(a)gmail.com> .br +Patrick Georgi <patrick.georgi(a)coresystems.de> +.br +Peter Lemenkov <lemenkov(a)gmail.com> +.br Peter Stuge <peter(a)stuge.se> .br Reinder E.N. de Haan <lb_reha(a)mveas.com> @@ -520,6 +548,8 @@ .br Stefan Wildemann <stefan.wildemann(a)kontron.com> .br +Stephan Guilloux <stephan.guilloux(a)free.fr> +.br Steven James <pyro(a)linuxlabs.com> .br Uwe Hermann <uwe(a)hermann-uwe.de> -- http://www.hailfinger.org/

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[commit] r1201 - trunk
by repository service 08 Oct '10

08 Oct '10

Author: hailfinger Date: Fri Oct 8 02:37:55 2010 New Revision: 1201 URL: http://flashrom.org/trac/flashrom/changeset/1201 Log: SPI write status register (WRSR) may take longer than 100 ms, and it makes sense to poll for completion in 10 ms steps until 5 s are over. This patch complements r1115. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Joshua Roys <roysjosh(a)gmail.com> Modified: trunk/flash.h trunk/spi25.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Fri Oct 8 00:21:45 2010 (r1200) +++ trunk/flash.h Fri Oct 8 02:37:55 2010 (r1201) @@ -35,6 +35,9 @@ #define ERROR_PTR ((void*)-1) +/* Error codes */ +#define TIMEOUT_ERROR -101 + typedef unsigned long chipaddr; int register_shutdown(void (*function) (void *data), void *data); Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Fri Oct 8 00:21:45 2010 (r1200) +++ trunk/spi25.c Fri Oct 8 02:37:55 2010 (r1201) @@ -856,6 +856,7 @@ static int spi_write_status_register_ewsr(struct flashchip *flash, int status) { int result; + int i = 0; struct spi_command cmds[] = { { /* WRSR requires either EWSR or WREN depending on chip type. */ @@ -879,15 +880,31 @@ if (result) { msg_cerr("%s failed during command execution\n", __func__); + /* No point in waiting for the command to complete if execution + * failed. + */ + return result; } - /* WRSR performs a self-timed erase before the changes take effect. */ + /* WRSR performs a self-timed erase before the changes take effect. + * This may take 50-85 ms in most cases, and some chips apparently + * allow running RDSR only once. Therefore pick an initial delay of + * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. + */ programmer_delay(100 * 1000); - return result; + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) { + if (++i > 490) { + msg_cerr("Error: WIP bit after WRSR never cleared\n"); + return TIMEOUT_ERROR; + } + programmer_delay(10 * 1000); + } + return 0; } static int spi_write_status_register_wren(struct flashchip *flash, int status) { int result; + int i = 0; struct spi_command cmds[] = { { /* WRSR requires either EWSR or WREN depending on chip type. */ @@ -911,10 +928,25 @@ if (result) { msg_cerr("%s failed during command execution\n", __func__); + /* No point in waiting for the command to complete if execution + * failed. + */ + return result; } - /* WRSR performs a self-timed erase before the changes take effect. */ + /* WRSR performs a self-timed erase before the changes take effect. + * This may take 50-85 ms in most cases, and some chips apparently + * allow running RDSR only once. Therefore pick an initial delay of + * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. + */ programmer_delay(100 * 1000); - return result; + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) { + if (++i > 490) { + msg_cerr("Error: WIP bit after WRSR never cleared\n"); + return TIMEOUT_ERROR; + } + programmer_delay(10 * 1000); + } + return 0; } static int spi_write_status_register(struct flashchip *flash, int status)

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[commit] r1200 - trunk
by repository service 08 Oct '10

08 Oct '10

Author: hailfinger Date: Fri Oct 8 00:21:45 2010 New Revision: 1200 URL: http://flashrom.org/trac/flashrom/changeset/1200 Log: List the devices for all supported programmers in "flashrom -L" output. Fix PCI device ID printing. Remove personal e-mail addresses from the man page, point people to flashrom(a)flashrom.org instead. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.8 trunk/pcidev.c trunk/print.c Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Oct 7 01:48:34 2010 (r1199) +++ trunk/flashrom.8 Fri Oct 8 00:21:45 2010 (r1200) @@ -476,6 +476,9 @@ .B " http://www.flashrom.org/trac/flashrom/newticket" .sp or on the flashrom mailing list at +.B "<flashrom(a)flashrom.org>" +.sp +We recommend to subscribe first at .sp .B " http://www.flashrom.org/mailman/listinfo/flashrom" .sp @@ -492,73 +495,75 @@ .br Please see the individual files. .SH AUTHORS -Andrew Morgan <ziltro(a)ziltro.com> +Andrew Morgan .br Carl-Daniel Hailfinger .br -Claus Gindhart <claus.gindhart(a)kontron.com> +Claus Gindhart .br -David Borg <borg.db(a)gmail.com> +David Borg .br -David Hendricks <dhendrix(a)google.com> +David Hendricks .br -Dominik Geyer <dominik.geyer(a)kontron.com> +Dominik Geyer .br Eric Biederman .br -Giampiero Giancipoli <gianci(a)email.it> +Giampiero Giancipoli .br -Helge Wagner <helge.wagner(a)ge.com> +Helge Wagner .br -Idwer Vollering <vidwer+flashrom(a)gmail.com> +Idwer Vollering .br -Joe Bao <Zheng.Bao(a)amd.com> +Joe Bao .br -Jörg Fischer <turboj(a)gmx.de> +Jörg Fischer .br -Joshua Roys <roysjosh(a)gmail.com> +Joshua Roys .br -Luc Verhaegen <libv(a)skynet.be> +Luc Verhaegen .br Li-Ta Lo .br -Markus Boas <ryven(a)ryven.de> +Markus Boas .br -Mattias Mattsson <vitplister(a)gmail.com> +Mattias Mattsson .br -Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> +Michael Karcher .br -Nikolay Petukhov <nikolay.petukhov(a)gmail.com> +Nikolay Petukhov .br -Patrick Georgi <patrick.georgi(a)coresystems.de> +Patrick Georgi .br -Peter Lemenkov <lemenkov(a)gmail.com> +Peter Lemenkov .br -Peter Stuge <peter(a)stuge.se> +Peter Stuge .br -Reinder E.N. de Haan <lb_reha(a)mveas.com> +Reinder E.N. de Haan .br -Ronald G. Minnich <rminnich(a)gmail.com> +Ronald G. Minnich .br -Ronald Hoogenboom <ronald(a)zonnet.nl> +Ronald Hoogenboom .br -Sean Nelson <audiohacked(a)gmail.com> +Sean Nelson .br -Stefan Reinauer <stepan(a)coresystems.de> +Stefan Reinauer .br -Stefan Wildemann <stefan.wildemann(a)kontron.com> +Stefan Wildemann .br -Stephan Guilloux <stephan.guilloux(a)free.fr> +Stephan Guilloux .br -Steven James <pyro(a)linuxlabs.com> +Steven James .br -Uwe Hermann <uwe(a)hermann-uwe.de> +Uwe Hermann .br Wang Qingpei .br Yinghai Lu .br -some others +some others, please see the flashrom svn changelog for details. +.br +All authors can be reached via e-mail at <flashrom(a)flashrom.org>. .PP This manual page was written by Uwe Hermann <uwe(a)hermann-uwe.de> and Carl-Daniel Hailfinger. Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Thu Oct 7 01:48:34 2010 (r1199) +++ trunk/pcidev.c Fri Oct 8 00:21:45 2010 (r1200) @@ -134,7 +134,7 @@ msg_pinfo("PCI devices:\n"); for (i = 0; devs[i].vendor_name != NULL; i++) { - msg_pinfo("%s %s [%02x:%02x]%s\n", devs[i].vendor_name, + msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name, devs[i].device_name, devs[i].vendor_id, devs[i].device_id, (devs[i].status == NT) ? " (untested)" : ""); Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Oct 7 01:48:34 2010 (r1199) +++ trunk/print.c Fri Oct 8 00:21:45 2010 (r1200) @@ -238,6 +238,7 @@ printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DUMMY].name); /* FIXME */ + printf("Dummy device, does nothing and logs all accesses\n"); #endif #if CONFIG_NIC3COM == 1 printf("\nSupported devices for the %s programmer:\n", @@ -286,21 +287,25 @@ printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SERPROG].name); /* FIXME */ + printf("All programmer devices speaking the serprog protocol\n"); #endif #if CONFIG_BUSPIRATE_SPI == 1 printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_BUSPIRATE_SPI].name); /* FIXME */ + printf("Dangerous Prototypes Bus Pirate\n"); #endif #if CONFIG_DEDIPROG == 1 printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DEDIPROG].name); /* FIXME */ + printf("Dediprog SF100\n"); #endif #if CONFIG_RAYER_SPI == 1 printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_RAYER_SPI].name); /* FIXME */ + printf("RayeR parallel port programmer\n"); #endif #if CONFIG_NICINTEL_SPI == 1 printf("\nSupported devices for the %s programmer:\n",

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alix1d
by Raphael Nestler 07 Oct '10

07 Oct '10

Hi flashrom devs, flashrom suggested to send you a report if PROBE READ EREASE & WRITE work. so here it is Board: http://www.pcengines.ch/alix1d.htm $ sudo flashrom -w ALIX0.BIN flashrom v0.9.2-runknown on Linux 2.6.31-ARCH (i586), built with libpci 3.1.4, GCC 4.4.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "AMD CS5536", enabling flash write... OK. WARNING: unexpected second chipset match: "AMD CS5536" ignoring, please report lspci and board URL to flashrom(a)flashrom.org! This chipset supports the following protocols: Non-SPI. Found chip "Winbond W39V040(F)C" (512 KB, LPC) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... SUCCESS. Programming page: DONE!ss: 0x0007f000 COMPLETE. Verifying flash... VERIFIED. see the attached files for the output of flashrom -V and flashrom -Vr regards, roughl

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alix1d board
by Raphael Nestler 07 Oct '10

07 Oct '10

Hi flashrom devs, flashrom suggested to send it's output to this address. Board URL: http://www.pcengines.ch/alix1d.htm $ sudo flashrom flashrom v0.9.2-runknown on Linux 2.6.31-ARCH (i586), built with libpci 3.1.4, GCC 4.4.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "AMD CS5536", enabling flash write... OK. WARNING: unexpected second chipset match: "AMD CS5536" ignoring, please report lspci and board URL to flashrom(a)flashrom.org! This chipset supports the following protocols: Non-SPI. Found chip "Winbond W39V040(F)C" (512 KB, LPC) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified. $ lspci 00:01.0 Host bridge: Advanced Micro Devices [AMD] CS5536 [Geode companion] Host Bridge (rev 31) 00:01.1 VGA compatible controller: Advanced Micro Devices [AMD] Geode LX Video 00:01.2 Entertainment encryption device: Advanced Micro Devices [AMD] Geode LX AES Security Block 00:0d.0 Ethernet controller: VIA Technologies, Inc. VT6105M [Rhine-III] (rev 96) 00:0f.0 ISA bridge: Advanced Micro Devices [AMD] CS5536 [Geode companion] ISA (rev 03) 00:0f.2 IDE interface: Advanced Micro Devices [AMD] CS5536 [Geode companion] IDE (rev 01) 00:0f.3 Multimedia audio controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] Audio (rev 01) 00:0f.4 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] OHC (rev 02) 00:0f.5 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode companion] EHC (rev 02) regards, roughL

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M2N68-AM SE2 output
by Farkas Tama s 07 Oct '10

07 Oct '10

Hi, here is the output of flashrom -V on a M2N68-AM SE2 motherboard. Bye: Tamas

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Flashrom Feedback
by Andrew Wierzan 07 Oct '10

07 Oct '10

Hi, I have successfully flashed ASUS P7H57-D-EVO using the current trunk at svn://coreboot.org/flashrom/trunk (trunk @ 1199). I used an Ubuntu 9.1 Live USB environment and followed the guide on the downloads page. The latest Asus BIOS (1606) for this board disables the ability to roll-back bios version using their own utility EZFlash. Many many thanks for continuing this project, it's saved a lot of hassle :) Thanks again, Andrew -- Andrew Wierzan Technical Manager eMerging Ltd 020 8941 6547 IMPORTANT NOTICE This e-mail and any files transmitted are confidential and intended solely for the use of the individual to whom they are addressed. If you have received it in error please delete it from your system, do not use or disclose the information in any way, and notify the sender by reply. Views and opinions expressed do not represent those of eMerging Limited unless specifically stated. This message has been scanned for viruses and dangerous content and is believed to be clean. eMerging Limited, registered in England under the number 06258057 Registered Office: Devonshire House, Manor Way, Borehamwood, Hertfordshire. WD6 1QQ ______________________________________________________________________ This email has been scanned by the MessageLabs Email Security System. For more information please visit http://www.messagelabs.com/email ______________________________________________________________________

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[PATCH] Switch to AAI for some more SST chips
by Joshua Roys 07 Oct '10

07 Oct '10

Hello, Attached is a patch to switch a few more chips to AAI write. A comment is added to two entries due to the datasheets claiming AAI support but via a different opcode. I was able to test programming on one chip and the write time was more than halved. Signed-off-by: Joshua Roys <roysjosh(a)gmail.com> Josh

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flashrom October 2010