January 2010 - flashrom - mail.coreboot.org

Re: [flashrom] [coreboot] flashrom on MCP73

by Carl-Daniel Hailfinger

Hi Fabrício, [Followup to flashrom(a)flashrom.org please] some of us are interested in reverse engineering flashrom SPI support for your chipset. Do you still have that board available? On 15.01.2009 18:12, Fabrício Ceolin wrote: > On Wed, Jan 14, 2009 at 9:36 PM, Peter Stuge <peter(a)stuge.se> wrote: > >> Fabrício Ceolin wrote: >> >>> We are trying to make flashrom work on http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=85... >>> >>> Chipset MCP73 / SPI chip Macronix MX25L8005. >>> >>> We made modifications using a enable_flash_mcp55 function, but >>> does't work. >>> >> First you have to figure out what chip is the SPI bus master. >> > We made these tests. There are a superio, but the bios chip isn't connect to > it. > The bios chip is directly connected to the chipset MCP73. > > So, I need to the datasheet of MCP73 to implement it. > Did you get any datasheets from Nvidia? Regards, Carl-Daniel -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

9 years, 11 months

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Erasing on Asus M2N68-VM

by Michael Karcher

Hello developers, this is from Code found in the BIOS. Enable bitbanging SPI interface: - ISA brigde (10de:0548, at 00:01.0) needs 8A.6 set and 8A.5 cleared - SMBus controller (10de:0542, at 00:01.1, so same chip) contains base address of something at register 0x74 (DWORD). Bitbanging register is at 0x530 inside that block. The base address has been seen as 0xfec80000 on one board. To select the BIOS ROM: - Set bit 0 in the bitbang register - Wait for bit 8 to be set (this is the *only* word access to the bitbang register, everything els is bytewise) - Clear bit 1 in the bitbang register To deselect the BIOS ROM: - Set bit 1 in the bitbang register - Clear bit 0 in the bitbang register To do SPI transfers: - bit 2 is clock (read/write) - bit 3 is MOSI (to flash) - bit 4 is MISO (from flash) That's basically everything. No warranty that this doesn't interfere with anything ACPI-like while the system is running, of course. Regards, Michael Karcher

9 years, 11 months

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[PATCH] Support for chip: Intel E28F004S5

by Sean Nelson

Adds support for the Intel E28F004S5 flash chip. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

9 years, 11 months

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HP Vectra VL420 SFF

by Mattias Mattsson

Hi, I'm trying to flash the latest BIOS-version on a HP Vectra VL420 SFF but it fails with latest flashrom (r811). This computer has a motherboard similiar to an ASUS P4B-MX, the HP board is even labeled "P4B-MX" on the board itself. Some differences though: The HP board uses an AMI BIOS while the ASUS seems to have an Award BIOS. Latest VL420-BIOS (version "JA.01.07US"): ftp://ftp.hp.com/pub/softpaq/sp30001-30500/sp30221.exe Info attached. Thanks! -mattias

9 years, 11 months

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[PATCH] ICH SPI fixes/cleanup

by Carl-Daniel Hailfinger

This megapatch rewrites substantial parts of ICH SPI to actually do what the SPI layer wants instead of its own weird idea about commands (running unrequested commands, running modified commands). Besides that, there is a fair share of cleanups as well. - Add JEDEC_EWSR (Enable Write Status Register) to default commands. - Mark a no longer used opcode/preopcode table as unused. - Declare all commands as non-atomic/standalone by default. The ICH SPI driver has no business executing commands (preopcodes) automatically if they were not requested. - Automatically adjust preopcode/opcode pairings (like WREN+ERASE) based on what the SPI layer requested. The ICH SPI driver has no business executing altered opcode pairs as it sees fit. - Fix incomplete initialization in the case of a locked down chipset. Leaving the first 4 opcodes with uninitialized pairings had unpredictable results. - switch() exists for a reason. Nested if() checking on the same variable is an interesting style. - Actually check if the requested readcnt/writecnt for a command is supported by the hardware instead of delivering corrupt/incomplete commands and data. - If a command has unsupported readlen/writelen, complain loudly to the user. - Use find_opcode instead of open-coding the same stuff in a dozen variations. - Introduce infrastructure for updating the command set of unlocked chipsets on the fly. Untested. This will expose any bugs in the SPI layer (I know of one bug regarding write enables there), but the behaviour will now be consistent across all SPI drivers. Read/write/erase logs in full verbosity are appreciated. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-ichspi_cleanup_checklen_lockedfix/ichspi.c =================================================================== --- flashrom-ichspi_cleanup_checklen_lockedfix/ichspi.c (Revision 807) +++ flashrom-ichspi_cleanup_checklen_lockedfix/ichspi.c (Arbeitskopie) @@ -5,6 +5,7 @@ * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> * Copyright (C) 2008 Dominik Geyer <dominik.geyer(a)kontron.com> * Copyright (C) 2008 coresystems GmbH <info(a)coresystems.de> + * Copyright (C) 2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -105,7 +106,7 @@ uint8_t atomic; //Use preop: (0: none, 1: preop0, 2: preop1 } OPCODE; -/* Opcode definition: +/* Suggested opcode definition: * Preop 1: Write Enable * Preop 2: Write Status register enable * @@ -115,7 +116,7 @@ * OP 3: Read Status register * OP 4: Read ID * OP 5: Write Status register - * OP 6: chip private (read JDEC id) + * OP 6: chip private (read JEDEC id) * OP 7: Chip erase */ typedef struct _OPCODES { @@ -156,6 +157,7 @@ uint8_t opcode; }; +/* List of opcodes which need preopcodes and matching preopcodes. Unused. */ struct preop_opcode_pair pops[] = { {JEDEC_WREN, JEDEC_BYTE_PROGRAM}, {JEDEC_WREN, JEDEC_SE}, /* sector erase */ @@ -163,24 +165,30 @@ {JEDEC_WREN, JEDEC_BE_D8}, /* block erase */ {JEDEC_WREN, JEDEC_CE_60}, /* chip erase */ {JEDEC_WREN, JEDEC_CE_C7}, /* chip erase */ + /* FIXME: WRSR requires either EWSR or WREN depending on chip type. */ + {JEDEC_WREN, JEDEC_WRSR}, {JEDEC_EWSR, JEDEC_WRSR}, {0,} }; +/* Reasonable default configuration. Needs ad-hoc modifications if we + * encounter unlisted opcodes. Fun. + */ OPCODES O_ST_M25P = { { JEDEC_WREN, - 0}, + JEDEC_EWSR, + }, { - {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Write Byte + {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 0}, // Write Byte {JEDEC_READ, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Data - {JEDEC_BE_D8, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Erase Sector + {JEDEC_BE_D8, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 0}, // Erase Sector {JEDEC_RDSR, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read Device Status Reg {JEDEC_REMS, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Electronic Manufacturer Signature - {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Write Status Register + {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 0}, // Write Status Register {JEDEC_RDID, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read JDEC ID - {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Bulk erase - } + {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 0}, // Bulk erase + } }; OPCODES O_EXISTING = {}; @@ -209,9 +217,10 @@ return -1; } +/* Create a struct OPCODES based on what we find in the locked down chipset. */ static int generate_opcodes(OPCODES * op) { - int a, b, i; + int a; uint16_t preop, optype; uint32_t opmenu[2]; @@ -257,17 +266,10 @@ opmenu[1] >>= 8; } - /* atomic (link opcode with required pre-op) */ - for (a = 4; a < 8; a++) + /* No preopcodes used by default. */ + for (a = 0; a < 8; a++) op->opcode[a].atomic = 0; - for (i = 0; pops[i].opcode; i++) { - a = find_opcode(op, pops[i].opcode); - b = find_preop(op, pops[i].preop); - if ((a != -1) && (b != -1)) - op->opcode[a].atomic = (uint8_t) ++b; - } - return 0; } @@ -431,14 +433,15 @@ temp16 |= ((uint16_t) (opcode_index & 0x07)) << 4; /* Handle Atomic */ - if (op.atomic != 0) { - /* Select atomic command */ + switch (op.atomic) { + case 2: + /* Select second preop. */ + temp16 |= SPIC_SPOP; + /* And fall through. */ + case 1: + /* Atomic command (preop+op) */ temp16 |= SPIC_ACS; - /* Select prefix opcode */ - if ((op.atomic - 1) == 1) { - /*Select prefix opcode 2 */ - temp16 |= SPIC_SPOP; - } + break; } /* Start */ @@ -548,14 +551,15 @@ temp32 |= ((uint32_t) (opcode_index & 0x07)) << (8 + 4); /* Handle Atomic */ - if (op.atomic != 0) { - /* Select atomic command */ + switch (op.atomic) { + case 2: + /* Select second preop. */ + temp32 |= SSFC_SPOP; + /* And fall through. */ + case 1: + /* Atomic command (preop+op) */ temp32 |= SSFC_ACS; - /* Selct prefix opcode */ - if ((op.atomic - 1) == 1) { - /*Select prefix opcode 2 */ - temp32 |= SSFC_SPOP; - } + break; } /* Start */ @@ -598,16 +602,28 @@ { switch (spi_controller) { case SPI_CONTROLLER_VIA: - if (datalength > 16) + if (datalength > 16) { + fprintf(stderr, "%s: Internal command size error for " + "opcode 0x%02x, got datalength=%i, want <=16\n", + __func__, op.opcode, datalength); return SPI_INVALID_LENGTH; + } return ich7_run_opcode(op, offset, datalength, data, 16); case SPI_CONTROLLER_ICH7: - if (datalength > 64) + if (datalength > 64) { + fprintf(stderr, "%s: Internal command size error for " + "opcode 0x%02x, got datalength=%i, want <=16\n", + __func__, op.opcode, datalength); return SPI_INVALID_LENGTH; + } return ich7_run_opcode(op, offset, datalength, data, 64); case SPI_CONTROLLER_ICH9: - if (datalength > 64) + if (datalength > 64) { + fprintf(stderr, "%s: Internal command size error for " + "opcode 0x%02x, got datalength=%i, want <=16\n", + __func__, op.opcode, datalength); return SPI_INVALID_LENGTH; + } return ich9_run_opcode(op, offset, datalength, data); default: printf_debug("%s: unsupported chipset\n", __func__); @@ -686,7 +702,6 @@ int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { - int a; int result; int opcode_index = -1; const unsigned char cmd = *writearr; @@ -696,21 +711,54 @@ int count; /* find cmd in opcodes-table */ - for (a = 0; a < 8; a++) { - if ((curopcodes->opcode[a]).opcode == cmd) { - opcode_index = a; - break; - } - } - - /* unknown / not programmed command */ + opcode_index = find_opcode(curopcodes, cmd); if (opcode_index == -1) { + /* FIXME: Reprogram opcodes if possible. Autodetect type of + * opcode by checking readcnt/writecnt. + */ printf_debug("Invalid OPCODE 0x%02x\n", cmd); return SPI_INVALID_OPCODE; } opcode = &(curopcodes->opcode[opcode_index]); + /* The following valid writecnt/readcnt combinations exist: + * writecnt = 4, readcnt >= 0 + * writecnt = 1, readcnt >= 0 + * writecnt >= 4, readcnt = 0 + * writecnt >= 1, readcnt = 0 + * writecnt >= 1 is guaranteed for all commands. + */ + if ((opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS) && + (writecnt != 4)) { + fprintf(stderr, "%s: Internal command size error for opcode " + "0x%02x, got writecnt=%i, want =4\n", __func__, cmd, + writecnt); + return SPI_INVALID_LENGTH; + } + if ((opcode->spi_type == SPI_OPCODE_TYPE_READ_NO_ADDRESS) && + (writecnt != 1)) { + fprintf(stderr, "%s: Internal command size error for opcode " + "0x%02x, got writecnt=%i, want =1\n", __func__, cmd, + writecnt); + return SPI_INVALID_LENGTH; + } + if ((opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) && + (writecnt < 4)) { + fprintf(stderr, "%s: Internal command size error for opcode " + "0x%02x, got writecnt=%i, want >=4\n", __func__, cmd, + writecnt); + return SPI_INVALID_LENGTH; + } + if (((opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) || + (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS)) && + (readcnt)) { + fprintf(stderr, "%s: Internal command size error for opcode " + "0x%02x, got readcnt=%i, want =0\n", __func__, cmd, + readcnt); + return SPI_INVALID_LENGTH; + } + /* if opcode-type requires an address */ if (opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS || opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) { @@ -741,23 +789,69 @@ int ich_spi_send_multicommand(struct spi_command *cmds) { int ret = 0; + int i; int oppos, preoppos; for (; (cmds->writecnt || cmds->readcnt) && !ret; cmds++) { - /* Is the next command valid or a terminator? */ if ((cmds + 1)->writecnt || (cmds + 1)->readcnt) { + /* Next command is valid. */ preoppos = find_preop(curopcodes, cmds->writearr[0]); oppos = find_opcode(curopcodes, (cmds + 1)->writearr[0]); - /* Is the opcode of the current command listed in the - * ICH struct OPCODES as associated preopcode for the - * opcode of the next command? + if ((oppos == -1) && (preoppos != -1)) { + /* Current command is listed as preopcode in + * ICH struct OPCODES, but next command is not + * listed as opcode in that struct. + * Check for command sanity, then + * try to reprogram the ICH opcode list. + */ + if (find_preop(curopcodes, + (cmds + 1)->writearr[0]) != -1) { + fprintf(stderr, "%s: Two subsequent " + "preopcodes 0x%02x and 0x%02x, " + "ignoring the first.\n", + __func__, cmds->writearr[0], + (cmds + 1)->writearr[0]); + continue; + } + /* If the chipset is locked down, we'll fail + * during execution of the next command anyway. + * No need to bother with fixups. + */ + if (!ichspi_lock) { + printf_debug("%s: FIXME: Add on-the-fly" + " reprogramming of the " + "chipset opcode list.\n", + __func__); + /* FIXME: Reprogram opcode menu. + * Find a less-useful opcode, replace it + * with the wanted opcode, detect optype + * and reprogram the opcode menu. + * Update oppos so the next if-statement + * can do something useful. + */ + //curopcodes.opcode[lessusefulindex] = (cmds + 1)->writearr[0]); + //update_optypes(curopcodes); + //program_opcodes(curopcodes); + //oppos = find_opcode(curopcodes, (cmds + 1)->writearr[0]); + continue; + } + } + if ((oppos != -1) && (preoppos != -1)) { + /* Current command is listed as preopcode in + * ICH struct OPCODES and next command is listed + * as opcode in that struct. Match them up. + */ + curopcodes->opcode[oppos].atomic = preoppos + 1; + continue; + } + /* If none of the above if-statements about oppos or + * preoppos matched, this is a normal opcode. */ - if ((oppos != -1) && (preoppos != -1) && - ((curopcodes->opcode[oppos].atomic - 1) == preoppos)) - continue; - } - + } ret = ich_spi_send_command(cmds->writecnt, cmds->readcnt, cmds->writearr, cmds->readarr); + /* Reset the type of all opcodes to non-atomic. */ + for (i = 0; i < 8; i++) + curopcodes->opcode[i].atomic = 0; } return ret; } -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers."

9 years, 11 months

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(update) Gigabyte GA-7ZXE v1.1

by Charles M

In the last message I stated the board was 1.0, but it's actually 1.1 (the board was a little dirty and I mistook the 1.1 for 1.0). Superiotool didn't find the super i/o chip. From a quick glance it appears to be a VIA VT82C686B chip. Cheers, Charles

9 years, 11 months

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[commit] r887 - trunk

by repository service

Author: uwe Date: Sun Jan 31 21:13:06 2010 New Revision: 887 URL: http://flashrom.org/trac/coreboot/changeset/887 Log: Add the Tekram P6Pro-A5 board as supported (trivial). The board doesn't need a board-enable, writing works out of the box. Also, the board can only decode 256KB. I verified this by writing a 512KB image of random bytes (which fails), whereas 256KB of random bytes can be written correctly. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/print_wiki.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Jan 29 00:55:12 2010 (r886) +++ trunk/board_enable.c Sun Jan 31 21:13:06 2010 (r887) @@ -1235,6 +1235,7 @@ {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, board_shuttle_fn25}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, board_soyo_sy_7vca}, {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3038, 0x0925, 0x1234, 0, 0, 0, 0, NULL, NULL, NULL, "Tekram", "P6Pro-A5", 256, NULL}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, via_vt823x_gpio15_raise}, {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, via_vt823x_gpio9_raise}, {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", 0, it87xx_probe_spi_flash}, Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Fri Jan 29 00:55:12 2010 (r886) +++ trunk/print_wiki.c Sun Jan 31 21:13:06 2010 (r887) @@ -167,6 +167,7 @@ { "RCA", "RM4100", "http://www.settoplinux.org/index.php?title=RCA_RM4100" }, { "Sun", "Blade x6250", "http://www.sun.com/servers/blades/x6250/" }, { "Supermicro", "H8QC8", "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm" }, + { "Tekram", "P6Pro-A5", "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm" }, { "Thomson", "IP1000", "http://www.settoplinux.org/index.php?title=Thomson_IP1000" }, { "TriGem", "Lomita", "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml" }, { "T-Online", "S-100", "http://wiki.freifunk-hannover.de/T-Online_S_100" },

9 years, 11 months

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Parallel chips and addressability.

by Luc Verhaegen

Uwe just added another chip to the board enable to track what the board can address when writing. Addressing issues only happen when using parallel flash, when not all the lines are wired up. Now, the biggest use case of flashrom is people updating the factory inserted flashchip to a new bios version. Only the corebooters would stick a bigger parallel chip in their motherboards and try to flash that. The number of reports of board addressing issues is going to be insanely low, compared to the high number of possibly "faulty" boards out there. My point in this email is: Tracking chipset addressing issues is fine, and necessary. But tracking board addressing issues is a fight against windmills, only a few people will run into this. We are better off trying to detect wrap around, before anything is actually harmed. This is not foolproof, as we might end up in a sitution where things did go wrong, and we only afterwards were able to tell that it was address wrap around. In this case, we should be as graceful as possible. Here is some logic for such detection: - probing works, so we know how big the flash is and what type it is. It's parallel, and the size is not bigger than the chipset addressing size. - read in the flash. * if all 0xFF: - it's either been erased, and we can just write it destructively. - or the bottom half is erased, and the top half isn't. We can write to it anyway, as we will only write this part. Erase is the only bit we should be scared off. (1) * else: - compare top and bottom half (even when the chip wraps around 4x, this is good enough). * if mismatched: * No wrapping! and we are free to write. * else - check if the image present or the image that is supposed to get written is coreboot. * coreboot: Complain loudly and continue anyway. Catting the image twice to match the size is not that nice. But the corebooter should not be protected like average joe user. * else: Complain loudly and bail out. Tell the user to use a --force or somesuch option to write this thing. If the user still proceeds, it's his own fault. Now, from this logic we might proceed to writing, which is always preceded by an erase. (1) is the scary bit here. We do not want to erase the whole chip when we can only address half. But, since the visible half is all 0xFF, we do not need to erase at all. Since we do not erase this chip at all, we can only end up overwriting the empty, visible part of the chip anyway. If we do an erase on a wrapped board, then we might be able to do a blockwise erase, and see the first block in both halves change. And as such detect wrap around too. So when subsequently writing a wrapped around chip, we will see the following: * If the image is a catted coreboot, then verify will work (we're wrapping anyway). Upon reboot, it will Just Work. * If not, verify will fail... And... We can see the wrapping too, and tell the user about it. We can then provide information on bailout on how to execute a blockwise restore (with blockwise erase -- do we have this for all parallel chips?) of the original image. Luc Verhaegen.

9 years, 11 months

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Acer Aspire Revo R3600

by Andrew Morgan

Here's the output of various tools for the Acer Aspire Revo R3600. It is a 'nettop', a rather compact 'desktop' which you can hide behind the monitor. It has a socketed W25X80AVAIZ (8Mbit SPI) flash chip, datasheet: http://www.winbond.com.tw/NR/rdonlyres/93A5FE5A-EEF2-417B-87A8-CB8144F612... The board says: Acer MCP7AS01 REV : 1.0 Link to BIOS: http://global-download.acer.com/GDFiles/BIOS/BIOS/BIOS_Acer_R01.A2L_A_AR3... -- Andrew. flashrom v0.9.1-r886 No coreboot table found. DMI string 0: "Acer" DMI string 1: "Aspire R3600" DMI string 2: " " DMI string 3: "Acer" DMI string 4: "FMCP7A-ION" DMI string 5: " " This chipset supports the following protocols: Non-SPI. WARNING: No chipset found. Flash detection will most likely fail. Calibrating delay loop... 695M loops per second, 100 myus = 175 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C010A, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C020, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C040A, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N), 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for AMIC A25L40PT, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A25L40PU, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B05T, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10T, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20T, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40T, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80T, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16T, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32T, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64T, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0x7f, id2 0x02 Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0x7f, id2 0x02 Probing for Intel 28F001BX-B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BX-T, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0x7f, id2 0xfc Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Sharp LHF00L04, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for Spansion S25FL008A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0x7f, id2 0xfc Probing for SST SST29EE010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE020A, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE020, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF010A, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF020A, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF040, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF512, 64 KB: probe_jedec_common: id1 0x05, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF010, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF020, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF040, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF080, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0xa8, id2 0x24, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0x7f, id2 0xfc Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0x7f, id2 0x02 Probing for ST M29W010B, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0x7f, id2 0xfc Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0x7f, id2 0xfc Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0x10, id2 0x02 Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x7f, id2 0xfc Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for SyncMOS S29C31004T, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C51001T, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C51002T, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C51004T, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RB, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C020C, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C040P, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0x10, id2 0x02, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f25, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically. 00:00.0 Host bridge [0600]: nVidia Corporation MCP79 Host Bridge [10de:0a82] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 82 0a 06 00 a0 00 b1 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.1 RAM memory [0500]: nVidia Corporation MCP79 Memory Controller [10de:0a88] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 88 0a 04 00 a0 00 b1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.0 ISA bridge [0601]: nVidia Corporation MCP79 LPC Bridge [10de:0aad] (rev b2) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Region 0: I/O ports at 4f00 [size=256] 00: de 10 ad 0a 0f 00 a0 00 b2 00 01 06 00 00 80 00 10: 01 4f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 00:03.1 RAM memory [0500]: nVidia Corporation MCP79 Memory Controller [10de:0aa4] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 a4 0a 00 04 a0 00 b1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.2 SMBus [0c05]: nVidia Corporation MCP79 SMBus [10de:0aa2] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at 4900 [size=64] Region 4: I/O ports at 4d00 [size=64] Region 5: I/O ports at 4e00 [size=64] Capabilities: <access denied> Kernel driver in use: nForce2_smbus Kernel modules: i2c-nforce2 00: de 10 a2 0a 01 00 b0 00 b1 00 05 0c 00 00 80 00 10: 01 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 4d 00 00 01 4e 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 00 00 00:03.3 RAM memory [0500]: nVidia Corporation MCP79 Memory Controller [10de:0a89] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 89 0a 00 00 20 00 b1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.5 Co-processor [0b40]: nVidia Corporation MCP79 Co-processor [10de:0aa3] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 11 Region 0: Memory at fae80000 (32-bit, non-prefetchable) [size=512K] 00: de 10 a3 0a 06 00 a0 00 b1 00 40 0b 00 00 80 00 10: 00 00 e8 fa 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 02 03 01 00:04.0 USB Controller [0c03]: nVidia Corporation MCP79 OHCI USB 1.1 Controller [10de:0aa5] (rev b1) (prog-if 10) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 20 Region 0: Memory at fae7f000 (32-bit, non-prefetchable) [size=4K] Capabilities: <access denied> Kernel driver in use: ohci_hcd 00: de 10 a5 0a 07 00 b0 00 b1 10 03 0c 00 00 80 00 10: 00 f0 e7 fa 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 44 00 00 00 00 00 00 00 09 01 03 01 00:04.1 USB Controller [0c03]: nVidia Corporation MCP79 EHCI USB 2.0 Controller [10de:0aa6] (rev b1) (prog-if 20) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 21 Region 0: Memory at fae7ec00 (32-bit, non-prefetchable) [size=256] Capabilities: <access denied> Kernel driver in use: ehci_hcd 00: de 10 a6 0a 06 00 b0 00 b1 20 03 0c 00 00 80 00 10: 00 ec e7 fa 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 44 00 00 00 00 00 00 00 0f 02 03 01 00:08.0 Audio device [0403]: nVidia Corporation MCP79 High Definition Audio [10de:0ac0] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (500ns min, 1250ns max) Interrupt: pin A routed to IRQ 21 Region 0: Memory at fae78000 (32-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00: de 10 c0 0a 06 00 b0 00 b1 00 03 04 00 00 00 00 10: 00 80 e7 fa 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 02 05 00:09.0 PCI bridge [0604]: nVidia Corporation MCP79 PCI Bridge [10de:0aab] (rev b1) (prog-if 01) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: fff00000-000fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr+ DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> 00: de 10 ab 0a 04 00 b0 00 b1 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 20 f0 00 80 22 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 b8 00 00 00 00 00 00 00 00 00 02 02 00:0a.0 Ethernet controller [0200]: nVidia Corporation MCP79 Ethernet [10de:0ab0] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (250ns min, 5000ns max) Interrupt: pin A routed to IRQ 23 Region 0: Memory at fae7d000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at d080 [size=8] Region 2: Memory at fae7e800 (32-bit, non-prefetchable) [size=256] Region 3: Memory at fae7e400 (32-bit, non-prefetchable) [size=16] Capabilities: <access denied> Kernel driver in use: forcedeth Kernel modules: forcedeth 00: de 10 b0 0a 07 00 b0 00 b1 00 00 02 00 00 00 00 10: 00 d0 e7 fa 81 d0 00 00 00 e8 e7 fa 00 e4 e7 fa 20: 00 00 00 00 00 00 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 01 14 00:0b.0 SATA controller [0106]: nVidia Corporation MCP79 AHCI Controller [10de:0ab9] (rev b1) (prog-if 01) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 29 Region 0: I/O ports at d000 [size=8] Region 1: I/O ports at cc00 [size=4] Region 2: I/O ports at c880 [size=8] Region 3: I/O ports at c800 [size=4] Region 4: I/O ports at c480 [size=16] Region 5: Memory at fae76000 (32-bit, non-prefetchable) [size=8K] Capabilities: <access denied> Kernel driver in use: ahci 00: de 10 b9 0a 07 04 b0 00 b1 01 06 01 00 00 00 00 10: 01 d0 00 00 01 cc 00 00 81 c8 00 00 01 c8 00 00 20: 81 c4 00 00 00 60 e7 fa 00 00 00 00 25 10 22 02 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01 00:0c.0 PCI bridge [0604]: nVidia Corporation MCP79 PCI Express Bridge [10de:0ac4] (rev b1) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: de 10 c4 0a 04 04 10 00 b1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 02 00 00:10.0 PCI bridge [0604]: nVidia Corporation MCP79 PCI Express Bridge [10de:0aa0] (rev b1) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: faf00000-fbffffff Prefetchable memory behind bridge: 00000000e0000000-00000000f9ffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel modules: shpchp 00: de 10 a0 0a 07 00 10 00 b1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 e1 e1 00 00 20: f0 fa f0 fb 01 e0 f1 f9 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 1a 00 00:15.0 PCI bridge [0604]: nVidia Corporation MCP79 PCI Express Bridge [10de:0ac6] (rev b1) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: de 10 c6 0a 04 04 10 00 b1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 02 00 00:16.0 PCI bridge [0604]: nVidia Corporation MCP79 PCI Express Bridge [10de:0ac7] (rev b1) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=05, subordinate=05, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: feb00000-febfffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: de 10 c7 0a 06 04 10 00 b1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 05 05 00 f1 01 00 20 20: b0 fe b0 fe f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 09 01 02 00 00:17.0 PCI bridge [0604]: nVidia Corporation MCP79 PCI Express Bridge [10de:0ac7] (rev b1) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=06, subordinate=06, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: de 10 c7 0a 04 04 10 00 b1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 06 06 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0f 01 02 00 00:18.0 PCI bridge [0604]: nVidia Corporation MCP79 PCI Express Bridge [10de:0ac7] (rev b1) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=07, subordinate=07, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport-driver Kernel modules: shpchp 00: de 10 c7 0a 04 04 10 00 b1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 07 07 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0e 01 02 00 03:00.0 VGA compatible controller [0300]: nVidia Corporation ION VGA [10de:087d] (rev b1) Subsystem: Acer Incorporated [ALI] Device [1025:0222] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 22 Region 0: Memory at fb000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at e0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at f8000000 (64-bit, prefetchable) [size=32M] Region 5: I/O ports at ec00 [size=128] [virtual] Expansion ROM at fafe0000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: nvidia Kernel modules: nvidia, nvidiafb 00: de 10 7d 08 07 00 10 00 b1 00 00 03 00 00 00 00 10: 00 00 00 fb 0c 00 00 e0 00 00 00 00 0c 00 00 f8 20: 00 00 00 00 01 ec 00 00 00 00 00 00 25 10 22 02 30: 00 00 00 00 60 00 00 00 00 00 00 00 07 01 00 00 05:00.0 Ethernet controller [0200]: Atheros Communications Inc. AR5001 Wireless Network Adapter [168c:001c] (rev 01) Subsystem: Foxconn International, Inc. Device [105b:e008] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 19 Region 0: Memory at febf0000 (64-bit, non-prefetchable) [size=64K] Capabilities: <access denied> Kernel driver in use: ath5k Kernel modules: ath5k 00: 8c 16 1c 00 07 00 10 00 01 00 00 02 10 00 00 00 10: 04 00 bf fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 01 50 00 00 5b 10 08 e0 30: 00 00 00 00 40 00 00 00 00 00 00 00 09 01 00 00 superiotool r5050 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found. No Super I/O found

9 years, 11 months

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How hard to get this going?

by Robert Moonen

Hi, I am Robert(linux4all) Moonen and have supplied the attached file for a motherboard I would like to convert to coreboot. regards Robert

9 years, 11 months

1
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0 0

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flashrom January 2010