flashrom July 2009

flashrom@flashrom.org

23 participants
93 discussions

Re: [flashrom] FW: Asus A7V8X needs a board enable.
by Luc Verhaegen 15 Jul '09

15 Jul '09

On Wed, Jul 15, 2009 at 02:02:17AM +0000, Glenn Mueller wrote: > > Sure I can try but is my board or chipset supported at all by your program? Chipset; should be ok. Board; try and find out, but in general, very little boards actually need a board enable. And the board enable usually is the more tangible of issues we can fix :) Our big question here is, can we really support the flash part. And if we can, why didn't it work in the asus a7v8x? Luc Verhaegen.

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Asus A7V8X needs a board enable.
by Luc Verhaegen 14 Jul '09

14 Jul '09

Output from flashrom (from the .rar Glenn provided in a previous mail): Calibrating delay loop... OK. No coreboot table found. Found chipset "VIA VT8235", enabling flash write... OK. Found chip "SST SST49LF040B" (512 KB) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. ERASE FAILED! Verifying flash... FAILED at 0x00000000! Expected=0x95, Read=0x49 Output from lspci -vnnxxx attached. Suggested ids: Host Bridge KT400: 0x1106, 0x3189, 0x1043, 0x807F ISA Bridge VT8235: 0x1106, 0x3177, 0x1043, 0x808C Board enable requires two things: io(0x370) &= ~0x02; io(PM_IO_Base + 0x2C) |= 0x01; The second scarily translates to: "Enable SMI generation". The first is (according to carldani) most likely an io range for the super io. The superio is probably an it8712, but we do not know for sure, but there is a good chance that this is about dropping a gpio line. We might then get lucky and might not need SMI at all. Glenn, please attach the output of superio -Vd, we cannot proceed without that. Luc Verhaegen.

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[PATCH] Use a distinct return code for invalid SPI command length
by Carl-Daniel Hailfinger 14 Jul '09

14 Jul '09

Use a distinct return code for SPI commands with unsupported/invalid length. Some drivers support only a few combinations of read/write length and return error otherwise. Having a distinct return code for this error means we can handle it in upper layers. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_commandlength/it87spi.c =================================================================== --- flashrom-spi_commandlength/it87spi.c (Revision 652) +++ flashrom-spi_commandlength/it87spi.c (Arbeitskopie) @@ -170,7 +170,7 @@ if (readcnt > 3) { printf("%s called with unsupported readcnt %i.\n", __FUNCTION__, readcnt); - return 1; + return SPI_INVALID_LENGTH; } switch (writecnt) { case 1: @@ -200,7 +200,7 @@ default: printf("%s called with unsupported writecnt %i.\n", __FUNCTION__, writecnt); - return 1; + return SPI_INVALID_LENGTH; } /* * Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes. Index: flashrom-spi_commandlength/ft2232_spi.c =================================================================== --- flashrom-spi_commandlength/ft2232_spi.c (Revision 652) +++ flashrom-spi_commandlength/ft2232_spi.c (Arbeitskopie) @@ -201,6 +201,9 @@ unsigned char port_val = 0; int i, ret = 0; + if (writecnt > 65536 || readcnt > 65536) + return SPI_INVALID_LENGTH; + buf = realloc(buf, writecnt + readcnt + 100); if (!buf) { fprintf(stderr, "Out of memory!\n"); Index: flashrom-spi_commandlength/wbsio_spi.c =================================================================== --- flashrom-spi_commandlength/wbsio_spi.c (Revision 652) +++ flashrom-spi_commandlength/wbsio_spi.c (Arbeitskopie) @@ -154,7 +154,8 @@ if (!mode) { fprintf(stderr, "%s: unsupported command type wr=%d rd=%d\n", __func__, writecnt, readcnt); - return 1; + /* Command type refers to the number of bytes read/written. */ + return SPI_INVALID_LENGTH; } OUTB(writearr[0], wbsio_spibase); Index: flashrom-spi_commandlength/spi.h =================================================================== --- flashrom-spi_commandlength/spi.h (Revision 652) +++ flashrom-spi_commandlength/spi.h (Arbeitskopie) @@ -108,5 +108,6 @@ /* Error codes */ #define SPI_INVALID_OPCODE -2 #define SPI_INVALID_ADDRESS -3 +#define SPI_INVALID_LENGTH -4 #endif /* !__SPI_H__ */ Index: flashrom-spi_commandlength/sb600spi.c =================================================================== --- flashrom-spi_commandlength/sb600spi.c (Revision 652) +++ flashrom-spi_commandlength/sb600spi.c (Arbeitskopie) @@ -114,14 +114,14 @@ if (readcnt > 8) { printf("%s, SB600 SPI controller can not receive %d bytes, " - "which is limited with 8 bytes\n", __func__, readcnt); - return 1; + "it is limited to 8 bytes\n", __func__, readcnt); + return SPI_INVALID_LENGTH; } if (writecnt > 8) { - printf("%s, SB600 SPI controller can not sent %d bytes, " - "which is limited with 8 bytes\n", __func__, writecnt); - return 1; + printf("%s, SB600 SPI controller can not send %d bytes, " + "it is limited to 8 bytes\n", __func__, writecnt); + return SPI_INVALID_LENGTH; } mmio_writeb(cmd, sb600_spibar + 0); Index: flashrom-spi_commandlength/ichspi.c =================================================================== --- flashrom-spi_commandlength/ichspi.c (Revision 652) +++ flashrom-spi_commandlength/ichspi.c (Arbeitskopie) @@ -599,10 +599,16 @@ { switch (spi_controller) { case SPI_CONTROLLER_VIA: + if (datalength > 16) + return SPI_INVALID_LENGTH; return ich7_run_opcode(op, offset, datalength, data, 16); case SPI_CONTROLLER_ICH7: + if (datalength > 64) + return SPI_INVALID_LENGTH; return ich7_run_opcode(op, offset, datalength, data, 64); case SPI_CONTROLLER_ICH9: + if (datalength > 64) + return SPI_INVALID_LENGTH; return ich9_run_opcode(op, offset, datalength, data); default: printf_debug("%s: unsupported chipset\n", __FUNCTION__); @@ -686,6 +692,7 @@ const unsigned char *writearr, unsigned char *readarr) { int a; + int result; int opcode_index = -1; const unsigned char cmd = *writearr; OPCODE *opcode; @@ -728,10 +735,10 @@ count = readcnt; } - if (run_opcode(*opcode, addr, count, data) != 0) { + result = run_opcode(*opcode, addr, count, data); + if (result) { printf_debug("run OPCODE 0x%02x failed\n", opcode->opcode); - return 1; } - return 0; + return result; } -- http://www.hailfinger.org/

2 2

[commit] r653 - trunk
by svn＠flashrom.org 14 Jul '09

14 Jul '09

Author: hailfinger Date: 2009-07-14 12:26:56 +0200 (Tue, 14 Jul 2009) New Revision: 653 Modified: trunk/ft2232_spi.c trunk/ichspi.c trunk/it87spi.c trunk/sb600spi.c trunk/spi.h trunk/wbsio_spi.c Log: Use a distinct return code for SPI commands with unsupported/invalid length. Some drivers support only a few combinations of read/write length and return error otherwise. Having a distinct return code for this error means we can handle it in upper layers. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/ft2232_spi.c =================================================================== --- trunk/ft2232_spi.c 2009-07-13 12:40:17 UTC (rev 652) +++ trunk/ft2232_spi.c 2009-07-14 10:26:56 UTC (rev 653) @@ -201,6 +201,9 @@ unsigned char port_val = 0; int i, ret = 0; + if (writecnt > 65536 || readcnt > 65536) + return SPI_INVALID_LENGTH; + buf = realloc(buf, writecnt + readcnt + 100); if (!buf) { fprintf(stderr, "Out of memory!\n"); Modified: trunk/ichspi.c =================================================================== --- trunk/ichspi.c 2009-07-13 12:40:17 UTC (rev 652) +++ trunk/ichspi.c 2009-07-14 10:26:56 UTC (rev 653) @@ -599,10 +599,16 @@ { switch (spi_controller) { case SPI_CONTROLLER_VIA: + if (datalength > 16) + return SPI_INVALID_LENGTH; return ich7_run_opcode(op, offset, datalength, data, 16); case SPI_CONTROLLER_ICH7: + if (datalength > 64) + return SPI_INVALID_LENGTH; return ich7_run_opcode(op, offset, datalength, data, 64); case SPI_CONTROLLER_ICH9: + if (datalength > 64) + return SPI_INVALID_LENGTH; return ich9_run_opcode(op, offset, datalength, data); default: printf_debug("%s: unsupported chipset\n", __FUNCTION__); @@ -686,6 +692,7 @@ const unsigned char *writearr, unsigned char *readarr) { int a; + int result; int opcode_index = -1; const unsigned char cmd = *writearr; OPCODE *opcode; @@ -728,10 +735,10 @@ count = readcnt; } - if (run_opcode(*opcode, addr, count, data) != 0) { + result = run_opcode(*opcode, addr, count, data); + if (result) { printf_debug("run OPCODE 0x%02x failed\n", opcode->opcode); - return 1; } - return 0; + return result; } Modified: trunk/it87spi.c =================================================================== --- trunk/it87spi.c 2009-07-13 12:40:17 UTC (rev 652) +++ trunk/it87spi.c 2009-07-14 10:26:56 UTC (rev 653) @@ -170,7 +170,7 @@ if (readcnt > 3) { printf("%s called with unsupported readcnt %i.\n", __FUNCTION__, readcnt); - return 1; + return SPI_INVALID_LENGTH; } switch (writecnt) { case 1: @@ -200,7 +200,7 @@ default: printf("%s called with unsupported writecnt %i.\n", __FUNCTION__, writecnt); - return 1; + return SPI_INVALID_LENGTH; } /* * Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes. Modified: trunk/sb600spi.c =================================================================== --- trunk/sb600spi.c 2009-07-13 12:40:17 UTC (rev 652) +++ trunk/sb600spi.c 2009-07-14 10:26:56 UTC (rev 653) @@ -114,14 +114,14 @@ if (readcnt > 8) { printf("%s, SB600 SPI controller can not receive %d bytes, " - "which is limited with 8 bytes\n", __func__, readcnt); - return 1; + "it is limited to 8 bytes\n", __func__, readcnt); + return SPI_INVALID_LENGTH; } if (writecnt > 8) { - printf("%s, SB600 SPI controller can not sent %d bytes, " - "which is limited with 8 bytes\n", __func__, writecnt); - return 1; + printf("%s, SB600 SPI controller can not send %d bytes, " + "it is limited to 8 bytes\n", __func__, writecnt); + return SPI_INVALID_LENGTH; } mmio_writeb(cmd, sb600_spibar + 0); Modified: trunk/spi.h =================================================================== --- trunk/spi.h 2009-07-13 12:40:17 UTC (rev 652) +++ trunk/spi.h 2009-07-14 10:26:56 UTC (rev 653) @@ -108,5 +108,6 @@ /* Error codes */ #define SPI_INVALID_OPCODE -2 #define SPI_INVALID_ADDRESS -3 +#define SPI_INVALID_LENGTH -4 #endif /* !__SPI_H__ */ Modified: trunk/wbsio_spi.c =================================================================== --- trunk/wbsio_spi.c 2009-07-13 12:40:17 UTC (rev 652) +++ trunk/wbsio_spi.c 2009-07-14 10:26:56 UTC (rev 653) @@ -154,7 +154,8 @@ if (!mode) { fprintf(stderr, "%s: unsupported command type wr=%d rd=%d\n", __func__, writecnt, readcnt); - return 1; + /* Command type refers to the number of bytes read/written. */ + return SPI_INVALID_LENGTH; } OUTB(writearr[0], wbsio_spibase);

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[commit] r652 - trunk
by svn＠flashrom.org 13 Jul '09

13 Jul '09

Author: libv Date: 2009-07-13 14:40:17 +0200 (Mon, 13 Jul 2009) New Revision: 652 Modified: trunk/board_enable.c Log: Board enable for Asus A7V8X. GP51 is attached to both WP# and TBL#. Made possible by the quick response of ITE when asked for information, and the tenacious testing of Glenn Mueller. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Glenn Mueller <mechwarrior5(a)hotmail.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-07-12 12:06:18 UTC (rev 651) +++ trunk/board_enable.c 2009-07-13 12:40:17 UTC (rev 652) @@ -832,6 +832,44 @@ } /** + * Suited for Asus A7V8X: VIA KT400 + VT8235 + IT8703F-A + */ +static int board_asus_a7v8x(const char *name) +{ + uint16_t id, base; + uint8_t tmp; + + /* find the IT8703F */ + w836xx_ext_enter(0x2E); + id = (sio_read(0x2E, 0x20) << 8) | sio_read(0x2E, 0x21); + w836xx_ext_leave(0x2E); + + if (id != 0x8701) { + fprintf(stderr, "\nERROR: IT8703F SuperIO not found.\n"); + return -1; + } + + /* Get the GP567 IO base */ + w836xx_ext_enter(0x2E); + sio_write(0x2E, 0x07, 0x0C); + base = (sio_read(0x2E, 0x60) << 8) | sio_read(0x2E, 0x61); + w836xx_ext_leave(0x2E); + + if (!base) { + fprintf(stderr, "\nERROR: Failed to read IT8703F SuperIO GPIO" + " Base.\n"); + return -1; + } + + /* Raise GP51. */ + tmp = INB(base); + tmp |= 0x02; + OUTB(tmp, base); + + return 0; +} + +/** * We use 2 sets of IDs here, you're free to choose which is which. This * is to provide a very high degree of certainty when matching a board on * the basis of subsystem/card IDs. As not every vendor handles @@ -860,6 +898,7 @@ {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A*", board_epox_ep_8k5a2}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", board_asus_a7v8x_mx}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", ich2_gpio22_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a},

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[PATCH] Convert SPI byte program to multicommand
by Carl-Daniel Hailfinger 12 Jul '09

12 Jul '09

Convert SPI byte program to use the multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_multicommand_byteprogram/flash.h =================================================================== --- flashrom-spi_multicommand_byteprogram/flash.h (Revision 650) +++ flashrom-spi_multicommand_byteprogram/flash.h (Arbeitskopie) @@ -446,9 +446,9 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); int spi_disable_blockprotect(void); -void spi_byte_program(int address, uint8_t byte); -int spi_nbyte_program(int address, uint8_t *bytes, int len); -int spi_nbyte_read(int address, uint8_t *bytes, int len); +int spi_byte_program(int addr, uint8_t byte); +int spi_nbyte_program(int addr, uint8_t *bytes, int len); +int spi_nbyte_read(int addr, uint8_t *bytes, int len); int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf); uint32_t spi_get_valid_read_addr(void); Index: flashrom-spi_multicommand_byteprogram/it87spi.c =================================================================== --- flashrom-spi_multicommand_byteprogram/it87spi.c (Revision 650) +++ flashrom-spi_multicommand_byteprogram/it87spi.c (Arbeitskopie) @@ -232,6 +232,7 @@ result = spi_write_enable(); if (result) return result; + /* FIXME: The command below seems to be redundant or wrong. */ OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); for (i = 0; i < 256; i++) { @@ -262,10 +263,7 @@ spi_disable_blockprotect(); for (i = 0; i < total_size; i++) { - result = spi_write_enable(); - if (result) - return result; - spi_byte_program(i, buf[i]); + result = spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } Index: flashrom-spi_multicommand_byteprogram/spi.c =================================================================== --- flashrom-spi_multicommand_byteprogram/spi.c (Revision 650) +++ flashrom-spi_multicommand_byteprogram/spi.c (Arbeitskopie) @@ -154,21 +154,7 @@ result = spi_send_command(sizeof(cmd), 0, cmd, NULL); if (result) - printf_debug("%s failed", __func__); - if (result == SPI_INVALID_OPCODE) { - switch (spi_controller) { - case SPI_CONTROLLER_ICH7: - case SPI_CONTROLLER_ICH9: - case SPI_CONTROLLER_VIA: - printf_debug(" due to SPI master limitation, ignoring" - " and hoping it will be run as PREOP\n"); - return 0; - default: - break; - } - } - if (result) - printf_debug("\n"); + printf_debug("%s failed\n", __func__); return result; } @@ -736,39 +722,80 @@ return spi_send_command(sizeof(cmd), 0, cmd, NULL); } -void spi_byte_program(int address, uint8_t byte) +int spi_byte_program(int addr, uint8_t byte) { - const unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE] = { - JEDEC_BYTE_PROGRAM, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, - byte - }; + int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BYTE_PROGRAM, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff), byte }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - /* Send Byte-Program */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + return result; + } + return result; } int spi_nbyte_program(int address, uint8_t *bytes, int len) { + int result; + /* FIXME: Switch to malloc based on len unless that kills speed. */ unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { JEDEC_BYTE_PROGRAM, (address >> 16) & 0xff, (address >> 8) & 0xff, (address >> 0) & 0xff, }; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, + .writearr = cmd, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + if (!len) { + printf_debug ("%s called for zero-length write\n", __func__); + return 1; + } if (len > 256) { - printf_debug ("%s called for too long a write\n", - __FUNCTION__); + printf_debug ("%s called for too long a write\n", __func__); return 1; } memcpy(&cmd[4], bytes, len); - /* Send Byte-Program */ - return spi_send_command(4 + len, 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + return result; + } + return result; } int spi_disable_blockprotect(void) @@ -883,7 +910,6 @@ spi_disable_blockprotect(); for (i = 0; i < total_size; i++) { - spi_write_enable(); spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); Index: flashrom-spi_multicommand_byteprogram/ft2232_spi.c =================================================================== --- flashrom-spi_multicommand_byteprogram/ft2232_spi.c (Revision 650) +++ flashrom-spi_multicommand_byteprogram/ft2232_spi.c (Arbeitskopie) @@ -276,7 +276,6 @@ else l = total_size - i; - spi_write_enable(); if ((r = spi_nbyte_program(i, &buf[i], l))) { fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r); // spi_write_disable(); chip does this for us Index: flashrom-spi_multicommand_byteprogram/wbsio_spi.c =================================================================== --- flashrom-spi_multicommand_byteprogram/wbsio_spi.c (Revision 650) +++ flashrom-spi_multicommand_byteprogram/wbsio_spi.c (Arbeitskopie) @@ -200,11 +200,8 @@ fprintf(stderr, "ERASE FAILED!\n"); return -1; } - result = spi_write_enable(); - if (result) - return result; for (pos = 0; pos < size; pos++) { - spi_byte_program(pos, buf[pos]); + result = spi_byte_program(pos, buf[pos]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } Index: flashrom-spi_multicommand_byteprogram/sb600spi.c =================================================================== --- flashrom-spi_multicommand_byteprogram/sb600spi.c (Revision 650) +++ flashrom-spi_multicommand_byteprogram/sb600spi.c (Arbeitskopie) @@ -73,10 +73,7 @@ printf("Programming flash"); for (i = 0; i < total_size; i++, buf++) { spi_disable_blockprotect(); - result = spi_write_enable(); - if (result) - return result; - spi_byte_program(i, *buf); + result = spi_byte_program(i, *buf); /* wait program complete. */ if (i % 0x8000 == 0) printf("."); -- http://www.hailfinger.org/

2 3

[commit] r651 - trunk
by svn＠flashrom.org 12 Jul '09

12 Jul '09

Author: hailfinger Date: 2009-07-12 14:06:18 +0200 (Sun, 12 Jul 2009) New Revision: 651 Modified: trunk/flash.h trunk/ft2232_spi.c trunk/it87spi.c trunk/sb600spi.c trunk/spi.c trunk/wbsio_spi.c Log: Convert SPI byte program to use the multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Tested it on Epia-m700 worked okay. Acked-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Tested-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/flash.h 2009-07-12 12:06:18 UTC (rev 651) @@ -446,9 +446,9 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); int spi_disable_blockprotect(void); -void spi_byte_program(int address, uint8_t byte); -int spi_nbyte_program(int address, uint8_t *bytes, int len); -int spi_nbyte_read(int address, uint8_t *bytes, int len); +int spi_byte_program(int addr, uint8_t byte); +int spi_nbyte_program(int addr, uint8_t *bytes, int len); +int spi_nbyte_read(int addr, uint8_t *bytes, int len); int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf); uint32_t spi_get_valid_read_addr(void); Modified: trunk/ft2232_spi.c =================================================================== --- trunk/ft2232_spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/ft2232_spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -276,7 +276,6 @@ else l = total_size - i; - spi_write_enable(); if ((r = spi_nbyte_program(i, &buf[i], l))) { fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r); // spi_write_disable(); chip does this for us Modified: trunk/it87spi.c =================================================================== --- trunk/it87spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/it87spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -232,6 +232,7 @@ result = spi_write_enable(); if (result) return result; + /* FIXME: The command below seems to be redundant or wrong. */ OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); for (i = 0; i < 256; i++) { @@ -262,10 +263,7 @@ spi_disable_blockprotect(); for (i = 0; i < total_size; i++) { - result = spi_write_enable(); - if (result) - return result; - spi_byte_program(i, buf[i]); + result = spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } Modified: trunk/sb600spi.c =================================================================== --- trunk/sb600spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/sb600spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -73,10 +73,7 @@ printf("Programming flash"); for (i = 0; i < total_size; i++, buf++) { spi_disable_blockprotect(); - result = spi_write_enable(); - if (result) - return result; - spi_byte_program(i, *buf); + result = spi_byte_program(i, *buf); /* wait program complete. */ if (i % 0x8000 == 0) printf("."); Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -154,21 +154,7 @@ result = spi_send_command(sizeof(cmd), 0, cmd, NULL); if (result) - printf_debug("%s failed", __func__); - if (result == SPI_INVALID_OPCODE) { - switch (spi_controller) { - case SPI_CONTROLLER_ICH7: - case SPI_CONTROLLER_ICH9: - case SPI_CONTROLLER_VIA: - printf_debug(" due to SPI master limitation, ignoring" - " and hoping it will be run as PREOP\n"); - return 0; - default: - break; - } - } - if (result) - printf_debug("\n"); + printf_debug("%s failed\n", __func__); return result; } @@ -736,39 +722,80 @@ return spi_send_command(sizeof(cmd), 0, cmd, NULL); } -void spi_byte_program(int address, uint8_t byte) +int spi_byte_program(int addr, uint8_t byte) { - const unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE] = { - JEDEC_BYTE_PROGRAM, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, - byte - }; + int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BYTE_PROGRAM, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff), byte }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - /* Send Byte-Program */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + return result; + } + return result; } int spi_nbyte_program(int address, uint8_t *bytes, int len) { + int result; + /* FIXME: Switch to malloc based on len unless that kills speed. */ unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { JEDEC_BYTE_PROGRAM, (address >> 16) & 0xff, (address >> 8) & 0xff, (address >> 0) & 0xff, }; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + len, + .writearr = cmd, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + if (!len) { + printf_debug ("%s called for zero-length write\n", __func__); + return 1; + } if (len > 256) { - printf_debug ("%s called for too long a write\n", - __FUNCTION__); + printf_debug ("%s called for too long a write\n", __func__); return 1; } memcpy(&cmd[4], bytes, len); - /* Send Byte-Program */ - return spi_send_command(4 + len, 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + return result; + } + return result; } int spi_disable_blockprotect(void) @@ -883,7 +910,6 @@ spi_disable_blockprotect(); for (i = 0; i < total_size; i++) { - spi_write_enable(); spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); Modified: trunk/wbsio_spi.c =================================================================== --- trunk/wbsio_spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/wbsio_spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -200,11 +200,8 @@ fprintf(stderr, "ERASE FAILED!\n"); return -1; } - result = spi_write_enable(); - if (result) - return result; for (pos = 0; pos < size; pos++) { - spi_byte_program(pos, buf[pos]); + result = spi_byte_program(pos, buf[pos]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); }

1 0

[PATCH] Convert SPI block erase to multicommand
by Carl-Daniel Hailfinger 11 Jul '09

11 Jul '09

Convert SPI block erase to use the multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_multicommand_blockerase/spi.c =================================================================== --- flashrom-spi_multicommand_blockerase/spi.c (Revision 648) +++ flashrom-spi_multicommand_blockerase/spi.c (Arbeitskopie) @@ -536,17 +536,30 @@ int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_52_OUTSIZE] = {JEDEC_BE_52, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_52_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_52, (addr & 0x00ff0000) >> 16, (addr & 0x0000ff00) >> 8, (addr & 0x000000ff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -566,17 +579,30 @@ */ int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_D8_OUTSIZE] = { JEDEC_BE_D8, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_D8_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_D8, (addr & 0x00ff0000) >> 16, (addr & 0x0000ff00) >> 8, (addr & 0x000000ff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -615,18 +641,30 @@ /* Sector size is usually 4k, though Macronix eliteflash has 64k */ int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_SE_OUTSIZE] = { JEDEC_SE, }; int result; - - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_SE_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_SE, (addr & 0x00ff0000) >> 16, (addr & 0x0000ff00) >> 8, (addr & 0x000000ff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send SE (Sector Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 15-800 ms, so wait in 10 ms steps. */ -- http://www.hailfinger.org/

2 3

[commit] r650 - trunk
by svn＠flashrom.org 11 Jul '09

11 Jul '09

Author: hailfinger Date: 2009-07-12 00:26:52 +0200 (Sun, 12 Jul 2009) New Revision: 650 Modified: trunk/spi.c Log: Convert SPI block erase to use the multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Jakob writes: Tested it on my EPIA-m700 and it worked nice. Also double checked that one of the changed functions actually ran. Acked-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Tested-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-11 22:17:28 UTC (rev 649) +++ trunk/spi.c 2009-07-11 22:26:52 UTC (rev 650) @@ -536,17 +536,30 @@ int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_52_OUTSIZE] = {JEDEC_BE_52, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_52_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_52, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -566,17 +579,30 @@ */ int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_D8_OUTSIZE] = { JEDEC_BE_D8, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_D8_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_D8, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -615,18 +641,30 @@ /* Sector size is usually 4k, though Macronix eliteflash has 64k */ int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_SE_OUTSIZE] = { JEDEC_SE, }; int result; - - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_SE_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_SE, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send SE (Sector Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 15-800 ms, so wait in 10 ms steps. */

1 0

[commit] r649 - trunk
by svn＠flashrom.org 11 Jul '09

11 Jul '09

Author: uwe Date: 2009-07-12 00:17:28 +0200 (Sun, 12 Jul 2009) New Revision: 649 Modified: trunk/flashrom.8 Log: Fix incorrect manpage (trivial). The flashrom manpage currently says "-w, --write: Write file into flash ROM (default when <file> is specified)". This is no longer true for recent flashrom versions, which only write if you explicitly use the -w option. Proof: $ flashrom coreboot.rom flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found board "Kontron 986LCD-M", enabling flash write... OK. Calibrating delay loop... OK. Found chip "PMC Pm49FL004" (512 KB) at physical address 0xfff80000. No operations were specified. Thus, fix manpage accordingly. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-07-11 19:39:11 UTC (rev 648) +++ trunk/flashrom.8 2009-07-11 22:17:28 UTC (rev 649) @@ -33,9 +33,7 @@ .BR <file> . .TP .B "\-w, \-\-write <file>" -Write file into flash ROM (default when -.B <file> -is specified). +Write file into flash ROM. .TP .B "\-n, \-\-noverify" Do

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flashrom July 2009