Author: mcayland Date: Mon May 12 17:43:18 2014 New Revision: 1287 URL: http://tracker.coreboot.org/trac/openbios/changeset/1287
Log: SPARC64: fixup 100Hz timer interval
As we are attempting to emulate a 100MHz CPU, then in order to get a 100Hz timer interrupt the cycle interval needs to be 1MHz and not 10MHz.
Signed-off-by: Mark Cave-Ayland mark.cave-ayland@ilande.co.uk
Modified: trunk/openbios-devel/arch/sparc64/entry.S trunk/openbios-devel/arch/sparc64/vectors.S
Modified: trunk/openbios-devel/arch/sparc64/entry.S ============================================================================== --- trunk/openbios-devel/arch/sparc64/entry.S Fri Apr 4 11:46:24 2014 (r1286) +++ trunk/openbios-devel/arch/sparc64/entry.S Mon May 12 17:43:18 2014 (r1287) @@ -17,7 +17,7 @@
#define PROM_ADDR 0x1fff0000000 #define CFG_ADDR 0x1fe02000510 -#define HZ 10 * 1000 * 1000 +#define HZ 1 * 1000 * 1000 #define TICK_INT_DIS 0x8000000000000000
.globl entry, _entry
Modified: trunk/openbios-devel/arch/sparc64/vectors.S ============================================================================== --- trunk/openbios-devel/arch/sparc64/vectors.S Fri Apr 4 11:46:24 2014 (r1286) +++ trunk/openbios-devel/arch/sparc64/vectors.S Mon May 12 17:43:18 2014 (r1287) @@ -30,7 +30,7 @@ #define PROM_ADDR 0x1fff0000000 #define SER_ADDR 0x1fe020003f8 #define TICK_INT_DIS 0x8000000000000000 -#define TICK_INTERVAL 10*1000*1000 +#define TICK_INTERVAL 1*1000*1000
.section ".text.vectors", "ax" .align 16384