OpenBIOS January 2019

openbios@openbios.org

1 participants
3 discussions

Re: [OpenBIOS] Back at it again( PCI Passthrough )

by Jd Lyons

Ok, I made those changes to openbios, here is the output. > On May 8, 2018, at 6:50 AM, Joe van Tunen <joevt(a)shaw.ca> wrote: > > : (debug-feval) ( fcode# -- fcode# ) > \ Address > fcode-stream 1 - . here u. ." : " > > \ Indicate if word is compiled > state @ 0<> if > ." (compile) " > then > dup fcode>xt cell - lfa2name type > dup ." [ 0x" . ." ]" cr > ;

1 year

[PATCH] SPARC32: divide physical memory reg property into physical SIMM sized ranges

by Mark Cave-Ayland

Currently the /memory node reg property is set to a single range encompassing the entire physical RAM of the machine. This seems to cause issues with Solaris when booting on QEMU SS-10 and SS-20 machines whereby having just a single entry causes the top of physical memory to be calculated incorrectly and triggers a panic on boot. Instead copy the behaviour of OBP which is to divide the reg property into a set of ranges representing the physical SIMM arrangement in the machine, which fixes the error and allows Solaris to boot under the QEMU SS-10 and SS-20 machines. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> --- arch/sparc32/boot.h | 2 +- arch/sparc32/lib.c | 14 +++++++++----- arch/sparc32/openbios.c | 6 +++++- 3 files changed, 15 insertions(+), 7 deletions(-) diff --git a/arch/sparc32/boot.h b/arch/sparc32/boot.h index e372acc..366e0f6 100644 --- a/arch/sparc32/boot.h +++ b/arch/sparc32/boot.h @@ -33,5 +33,5 @@ extern struct linux_mlist_v0 *ptphys; extern struct linux_mlist_v0 *ptmap; extern struct linux_mlist_v0 *ptavail; -void ob_init_mmu(void); +void ob_init_mmu(uint32_t simm_size); void init_mmu_swift(void); diff --git a/arch/sparc32/lib.c b/arch/sparc32/lib.c index e88c0bf..727929c 100644 --- a/arch/sparc32/lib.c +++ b/arch/sparc32/lib.c @@ -294,12 +294,13 @@ static void ignore_dfault_addr(void) } void -ob_init_mmu(void) +ob_init_mmu(uint32_t simm_size) { ucell *memreg; ucell *virtreg; phys_addr_t virtregsize; ofmem_t *ofmem = ofmem_arch_get_private(); + int i, c; /* Find the phandles for the /memory and /virtual-memory nodes */ push_str("/memory"); @@ -315,14 +316,17 @@ ob_init_mmu(void) ofmem_register(s_phandle_memory, s_phandle_mmu); /* Setup /memory:reg (totphys) property */ - memreg = malloc(3 * sizeof(ucell)); - ofmem_arch_encode_physaddr(memreg, 0); /* physical base */ - memreg[2] = (ucell)ofmem->ramsize; /* size */ + c = ofmem->ramsize / simm_size; + memreg = malloc(3 * c * sizeof(ucell)); + for (i = 0; i < c; i++) { + ofmem_arch_encode_physaddr(&memreg[i * 3], simm_size * i); /* physical base */ + memreg[i * 3 + 2] = simm_size; /* size */ + } push_str("/memory"); fword("find-device"); PUSH(pointer2cell(memreg)); - PUSH(3 * sizeof(ucell)); + PUSH(3 * c * sizeof(ucell)); push_str("reg"); PUSH_ph(s_phandle_memory); fword("encode-property"); diff --git a/arch/sparc32/openbios.c b/arch/sparc32/openbios.c index 3ec8fd7..17a6550 100644 --- a/arch/sparc32/openbios.c +++ b/arch/sparc32/openbios.c @@ -42,6 +42,7 @@ struct hwdef { unsigned long aux1_offset, aux2_offset; uint64_t dma_base, esp_base, le_base; uint64_t tcx_base; + uint32_t simm_size; int intr_ncpu; int mid_offset; int machine_id_low, machine_id_high; @@ -65,6 +66,7 @@ static const struct hwdef hwdefs[] = { .dma_base = 0x78400000, .esp_base = 0x78800000, .le_base = 0x78c00000, + .simm_size = 0x2000000, .mid_offset = 0, .machine_id_low = 32, .machine_id_high = 63, @@ -86,6 +88,7 @@ static const struct hwdef hwdefs[] = { .dma_base = 0xef0400000ULL, .esp_base = 0xef0800000ULL, .le_base = 0xef0c00000ULL, + .simm_size = 0x4000000, .mid_offset = 8, .machine_id_low = 64, .machine_id_high = 65, @@ -107,6 +110,7 @@ static const struct hwdef hwdefs[] = { .dma_base = 0xef0081000ULL, .esp_base = 0xef0080000ULL, .le_base = 0xef0060000ULL, + .simm_size = 0x4000000, .mid_offset = 8, .machine_id_low = 66, .machine_id_high = 66, @@ -874,7 +878,7 @@ arch_init( void ) openbios_init(); modules_init(); - ob_init_mmu(); + ob_init_mmu(hwdef->simm_size); ob_init_iommu(hwdef->iommu_base); bind_func("(sparc32-dma-alloc)", dma_alloc); -- 2.11.0

1 year, 6 months

Qemu 3.1.0 Sparc still does'nt boot Solaris 8 for SS-20

by Ulrich Gräpel

Just gave the latest Qemu a try to boot an emulated SparcStation 20 from the original Solaris install CD: /opt/qemu-3.1.0/sparc-softmmu/qemu-system-sparc \ -M SS-20 -m 256 \ -nographic \ -monitor telnet::3001,server,nowait \ -cdrom /mnt/iso/sol-8-hw4-install-sparc32.iso \ -boot d The resulting output: Configuration device id QEMU version 1 machine id 65 Probing SBus slot 0 offset 0 Probing SBus slot 1 offset 0 Probing SBus slot 2 offset 0 Probing SBus slot 3 offset 0 Probing SBus slot 15 offset 0 Invalid FCode start byte CPUs: 1 x TI,TMS390Z55 UUID: 00000000-0000-0000-0000-000000000000 Welcome to OpenBIOS v1.1 built on Oct 5 2018 08:20 Type 'help' for detailed information Trying cdrom:d... Not a bootable ELF image Loading a.out image... Loaded 7680 bytes entry point is 0x4000 bootpath: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f ,800000/sd@2,0:d switching to new context: SunOS Release 5.8 Version Generic_108528-29 32-bit Copyright 1983-2003 Sun Microsystems, Inc. All rights reserved. \ panic[cpu0]/thread=f0244020: BAD TRAP: type=9 (Data fault) rp=f0243624 addr=0 mmu_fsr=126 rw=1 occurred in module "unix" due to a NULL pointer dereference qemu: fatal: Trap 0x29 while interrupts disabled, Error state pc: f0163298 npc: f016329c %g0-7: 00000000 f00c220c 3024a52c f024fe14 4000020d f0243b88 00000000 f0244020 %o0-7: 00001fff 00001000 00001000 f5c89000 00000000 f5918240 f02500a0 f0074d94 %l0-7: fbcf4834 f013cc18 00000001 f026eb30 f5917c60 f02727e0 f5917c40 00001010 %i0-7: f5c89000 00001000 00000001 00000000 00000000 f5917c68 f0250100 f013d4a4 %f00: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 %f08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 %f16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 %f24: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 psr: 40000fc5 (icc: ---- SPE: SP-) wim: 00000020fsr: 00000000 y: 00000000 Everything works fine though, if configured for the default SparcStation 5 (SS-5). I also tried other machine types: The only working configuration is the SS-5. I guess there is some issue with the device tree.

1 year, 7 months