OpenBIOS May 2014

openbios@openbios.org

10 participants
35 discussions

[commit] r1306 - in trunk/openbios-devel: arch/ppc/qemu drivers
by repository service 30 May '14

30 May '14

Author: agraf Date: Fri May 30 14:11:44 2014 New Revision: 1306 URL: http://tracker.coreboot.org/trac/openbios/changeset/1306 Log: PPC: Pass real tbfreq to udelay The IDE code waits for some operations to finish within a certain amount of time. That waiting code delays based on the timebase, but doesn't know about the frequency of the timebase. In cases where we know the frequency - like via QEMU's fwcfg interface - base the calculation on that frequency value. This fixes issues where OpenBIOS thought it ran into IDE timeouts. Signed-off-by: Alexander Graf <agraf(a)suse.de> Modified: trunk/openbios-devel/arch/ppc/qemu/init.c trunk/openbios-devel/drivers/timer.c Modified: trunk/openbios-devel/arch/ppc/qemu/init.c ============================================================================== --- trunk/openbios-devel/arch/ppc/qemu/init.c Thu May 29 00:15:33 2014 (r1305) +++ trunk/openbios-devel/arch/ppc/qemu/init.c Fri May 30 14:11:44 2014 (r1306) @@ -220,6 +220,9 @@ #endif } +/* From drivers/timer.c */ +extern unsigned long timer_freq; + static void cpu_generic_init(const struct cpudef *cpu) { @@ -279,7 +282,8 @@ push_str("tlb-size"); fword("property"); - PUSH(fw_cfg_read_i32(FW_CFG_PPC_TBFREQ)); + timer_freq = fw_cfg_read_i32(FW_CFG_PPC_TBFREQ); + PUSH(timer_freq); fword("encode-int"); push_str("timebase-frequency"); fword("property"); Modified: trunk/openbios-devel/drivers/timer.c ============================================================================== --- trunk/openbios-devel/drivers/timer.c Thu May 29 00:15:33 2014 (r1305) +++ trunk/openbios-devel/drivers/timer.c Fri May 30 14:11:44 2014 (r1306) @@ -79,15 +79,11 @@ /* * TODO: pass via lb table */ - -unsigned long get_timer_freq(void) -{ - return 10000000 / 4; -} +unsigned long timer_freq = 10000000 / 4; void udelay(unsigned int usecs) { - unsigned long ticksperusec = get_timer_freq() / 1000000; + unsigned long ticksperusec = timer_freq / 1000000; _wait_ticks(ticksperusec * usecs); }

1 0

[PATCH] arch/ppc/qemu: Moved exception handlers from beginning of RAM
by BALATON Zoltan 29 May '14

29 May '14

Do not put exception handler routines between 0x00-0xff as some OSes use this area for their own purposes and can corrupt them. (In particular MorphOS writes to 0x80 during boot). This patch frees up this area by moving the routines that were there higher. Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> --- This replaces my previous attempt (Use exception vectors from ROM instead of copying them to page zero) as that relied on the MSR[IP] bit that was found not to be generally available. Index: openbios-devel/arch/ppc/qemu/start.S =================================================================== --- openbios-devel/arch/ppc/qemu/start.S (revision 1304) +++ openbios-devel/arch/ppc/qemu/start.S (working copy) @@ -280,21 +280,9 @@ GLOBL(__vectors): 1: nop // b 1b -call_dsi_exception: - LOAD_REG_FUNC(r3, dsi_exception) - mtctr r3 - bctrl - b exception_return +VECTOR( 0x100, "SRE" ): + b _entry -call_isi_exception: - LOAD_REG_FUNC(r3, isi_exception) - mtctr r3 - bctrl - b exception_return - -exception_return: - EXCEPTION_EPILOGUE - trap_error: lis r1, 0x8000 /* r1=0x80000000 */ add. r1,r1,r1 /* r1=r1+r1 (high 32bit !0) */ @@ -309,9 +297,6 @@ trap_error: mtctr r4 bctr -VECTOR( 0x100, "SRE" ): - b _entry - ILLEGAL_VECTOR( 0x200 ) VECTOR( 0x300, "DSI" ): @@ -373,11 +358,16 @@ VECTOR( 0x2200, "ISI_64" ): real_dsi: EXCEPTION_PREAMBLE - b call_dsi_exception + LOAD_REG_FUNC(r3, dsi_exception) + b call_exception_handler real_isi: EXCEPTION_PREAMBLE - b call_isi_exception + LOAD_REG_FUNC(r3, isi_exception) +call_exception_handler: + mtctr r3 + bctrl + EXCEPTION_EPILOGUE GLOBL(__vectors_end):

5 6

Re: [OpenBIOS] [PATCH] Use exception vectors from ROM instead of copying them to page zero
by BALATON Zoltan 29 May '14

29 May '14

On Mon, 26 May 2014, Mark Cave-Ayland wrote: > Just as a general comment: I know that some OSs using Sun's PROM expect > to be able to write to the trap table (which is why it is copied to RAM) > so you'd need to check this thoroughly. Or, if MSR_IP uses virtual > addresses you could do some MMU twiddling so that the virtual address > actually points into a safe area of RAM rather than ROM. As far as I understand MSR_IP just selects between exception vectors at 0x0 or 0xfff00000. Clients normaly use the vectors at page zero while the latter is typically used for ROM based boot code. Also I think the ROM is already copied to RAM anyway so it can be overwritten by the clients (MorophOS does this later after finished calling OF client interface functions or maybe it maps some RAM over it I'm not sure). In any case, clients should not modify the firmware code and I think they use vectors at 0x0. > As a starting point, have you tried booting any other OS with this > change? Yes but not very throughly. The Darwin images boot as far as before and Finnix has a different issue due to the change in cuda to via pmu where the IRQ is handled differently. I intend to fix that later by adding a USB driver to OpenBIOS and use that as the real hardware has USB instead of ADB anyway. This would also fix qemu-system-ppc64 with -M mac99. I already have a version here: http://www.openfirmware.info/pipermail/openbios/2014-May/008244.html but I'll need to fix it to work on big endian systems. > For my OpenBIOS tests I have a collection of various NetBSD, > FreeBSD, Linux, Darwin and HelenOS that I use to check for regressions. It would be appreciated if you could do some tests with these. Regards, BALATON Zoltan

3 7

Re: [OpenBIOS] [PATCH 2/2] arch/ppc/qemu: simplify MMU exception handlers
by Alexander Graf 29 May '14

29 May '14

On 28.05.14 21:07, BALATON Zoltan wrote: > Remove duplicated code from the handlers for DSI and ISI exceptions. > > Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> I can't say I'm a big fan of this patch. Jumping from one handler into another is a big red flag to me. If you really think it's worth to consolidate these 3 instructions, please create a separate call_exception_handler function that you call from the DSI and ISI handler. Alex > --- > openbios-devel/arch/ppc/qemu/start.S | 8 ++------ > 1 file changed, 2 insertions(+), 6 deletions(-) > > diff --git a/openbios-devel/arch/ppc/qemu/start.S b/openbios-devel/arch/ppc/qemu/start.S > index ae2fd53..5aa8c62 100644 > --- a/openbios-devel/arch/ppc/qemu/start.S > +++ b/openbios-devel/arch/ppc/qemu/start.S > @@ -359,18 +359,14 @@ VECTOR( 0x2200, "ISI_64" ): > real_dsi: > EXCEPTION_PREAMBLE > LOAD_REG_FUNC(r3, dsi_exception) > - mtctr r3 > - bctrl > - b exception_return > + b call_exception_handler > > real_isi: > EXCEPTION_PREAMBLE > LOAD_REG_FUNC(r3, isi_exception) > +call_exception_handler: > mtctr r3 > bctrl > - b exception_return > - > -exception_return: > EXCEPTION_EPILOGUE > > GLOBL(__vectors_end):

2 3

[commit] r1305 - trunk/openbios-devel/arch/ppc/qemu
by repository service 29 May '14

29 May '14

Author: agraf Date: Thu May 29 00:15:33 2014 New Revision: 1305 URL: http://tracker.coreboot.org/trac/openbios/changeset/1305 Log: arch/ppc/qemu: Moved exception handlers from beginning of RAM Do not put exception handler routines between 0x00-0xff as some OSes use this area for their own purposes and can corrupt them. (In particular MorphOS writes to 0x80 during boot). This patch frees up this area by moving the routines that were there higher. Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> Signed-off-by: Alexander Graf <agraf(a)suse.de> Modified: trunk/openbios-devel/arch/ppc/qemu/start.S Modified: trunk/openbios-devel/arch/ppc/qemu/start.S ============================================================================== --- trunk/openbios-devel/arch/ppc/qemu/start.S Sun May 25 11:50:05 2014 (r1304) +++ trunk/openbios-devel/arch/ppc/qemu/start.S Thu May 29 00:15:33 2014 (r1305) @@ -280,20 +280,8 @@ 1: nop // b 1b -call_dsi_exception: - LOAD_REG_FUNC(r3, dsi_exception) - mtctr r3 - bctrl - b exception_return - -call_isi_exception: - LOAD_REG_FUNC(r3, isi_exception) - mtctr r3 - bctrl - b exception_return - -exception_return: - EXCEPTION_EPILOGUE +VECTOR( 0x100, "SRE" ): + b _entry trap_error: lis r1, 0x8000 /* r1=0x80000000 */ @@ -309,9 +297,6 @@ mtctr r4 bctr -VECTOR( 0x100, "SRE" ): - b _entry - ILLEGAL_VECTOR( 0x200 ) VECTOR( 0x300, "DSI" ): @@ -373,11 +358,20 @@ real_dsi: EXCEPTION_PREAMBLE - b call_dsi_exception + LOAD_REG_FUNC(r3, dsi_exception) + mtctr r3 + bctrl + b exception_return real_isi: EXCEPTION_PREAMBLE - b call_isi_exception + LOAD_REG_FUNC(r3, isi_exception) + mtctr r3 + bctrl + b exception_return + +exception_return: + EXCEPTION_EPILOGUE GLOBL(__vectors_end):

1 0

Re: [OpenBIOS] [PATCH 1/2] arch/ppc/qemu: Moved exception handlers from beginning of RAM
by Alexander Graf 29 May '14

29 May '14

On 28.05.14 21:03, BALATON Zoltan wrote: > Do not put exception handler routines between 0x00-0xff as some OSes > use this area for their own purposes and can corrupt them. (In > particular MorphOS writes to 0x80 during boot). This patch frees up > this area by moving the routines that were there higher. > > Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> Thanks, applied to OpenBIOS. Alex

1 0

[PATCH] Use exception vectors from ROM instead of copying them to page zero
by BALATON Zoltan 28 May '14

28 May '14

Instead of copying the exception vectors from ROM to page zero use the Interrupt Prefix bit of the CPU to use the vectors at the ROM address. This simplifies the startup routine a little bit and avoids using addresses that can be overwritten by clients. In particular MorphOS writes to address 0x80 during boot which corrupted the exception return code causing a crash. Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> --- Index: openbios-devel/arch/ppc/qemu/start.S =================================================================== --- openbios-devel/arch/ppc/qemu/start.S (revision 1304) +++ openbios-devel/arch/ppc/qemu/start.S (working copy) @@ -388,7 +388,7 @@ GLOBL(__vectors_end): GLOBL(_entry): #ifdef CONFIG_PPC_64BITSUPPORT - li r0,0 + li r0, MSR_IP lis r3, 0x8000 /* r1=0x80000000 */ add. r3,r3,r3 /* r1=r1+r1 (high 32bit !0) */ @@ -404,32 +404,6 @@ no_64bit: real_entry: #endif - - /* copy exception vectors */ - - LOAD_REG_IMMEDIATE(r3, __vectors) - li r4,0 - li r5,__vectors_end - __vectors + 16 - rlwinm r5,r5,0,0,28 -1: lwz r6,0(r3) - lwz r7,4(r3) - lwz r8,8(r3) - lwz r9,12(r3) - stw r6,0(r4) - stw r7,4(r4) - stw r8,8(r4) - stw r9,12(r4) - dcbst 0,r4 - sync - icbi 0,r4 - sync - addi r5,r5,-16 - addi r3,r3,16 - addi r4,r4,16 - cmpwi r5,0 - bgt 1b - isync - bl compute_ramsize /* Memory map: @@ -521,13 +495,13 @@ _GLOBAL(call_elf): LOAD_REG_IMMEDIATE(r5, of_client_callback) // r5 = callback li r6,0 // r6 = address of client program arguments (unused) li r7,0 // r7 = length of client program arguments (unused) - li r0,MSR_FP | MSR_ME | MSR_DR | MSR_IR + li r0,MSR_FP | MSR_ME | MSR_IP | MSR_DR | MSR_IR MTMSRD(r0) blrl #ifdef CONFIG_PPC64 /* Restore SF bit */ - LOAD_REG_IMMEDIATE(r0, MSR_SF | MSR_FP | MSR_ME | MSR_DR | MSR_IR) + LOAD_REG_IMMEDIATE(r0, MSR_SF | MSR_FP | MSR_ME | MSR_IP | MSR_DR | MSR_IR) MTMSRD(r0) #endif LOAD_REG_IMMEDIATE(r8, saved_stack) // restore stack pointer

3 5

[PATCH 2/2] arch/ppc/qemu: simplify MMU exception handlers
by BALATON Zoltan 28 May '14

28 May '14

Remove duplicated code from the handlers for DSI and ISI exceptions. Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> --- openbios-devel/arch/ppc/qemu/start.S | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/openbios-devel/arch/ppc/qemu/start.S b/openbios-devel/arch/ppc/qemu/start.S index ae2fd53..5aa8c62 100644 --- a/openbios-devel/arch/ppc/qemu/start.S +++ b/openbios-devel/arch/ppc/qemu/start.S @@ -359,18 +359,14 @@ VECTOR( 0x2200, "ISI_64" ): real_dsi: EXCEPTION_PREAMBLE LOAD_REG_FUNC(r3, dsi_exception) - mtctr r3 - bctrl - b exception_return + b call_exception_handler real_isi: EXCEPTION_PREAMBLE LOAD_REG_FUNC(r3, isi_exception) +call_exception_handler: mtctr r3 bctrl - b exception_return - -exception_return: EXCEPTION_EPILOGUE GLOBL(__vectors_end): -- 1.8.1.5

1 0

[PATCH 1/2] arch/ppc/qemu: Moved exception handlers from beginning of RAM
by BALATON Zoltan 28 May '14

28 May '14

Do not put exception handler routines between 0x00-0xff as some OSes use this area for their own purposes and can corrupt them. (In particular MorphOS writes to 0x80 during boot). This patch frees up this area by moving the routines that were there higher. Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> --- openbios-devel/arch/ppc/qemu/start.S | 32 +++++++++++++------------------- 1 file changed, 13 insertions(+), 19 deletions(-) diff --git a/openbios-devel/arch/ppc/qemu/start.S b/openbios-devel/arch/ppc/qemu/start.S index db8e860..ae2fd53 100644 --- a/openbios-devel/arch/ppc/qemu/start.S +++ b/openbios-devel/arch/ppc/qemu/start.S @@ -280,20 +280,8 @@ GLOBL(__vectors): 1: nop // b 1b -call_dsi_exception: - LOAD_REG_FUNC(r3, dsi_exception) - mtctr r3 - bctrl - b exception_return - -call_isi_exception: - LOAD_REG_FUNC(r3, isi_exception) - mtctr r3 - bctrl - b exception_return - -exception_return: - EXCEPTION_EPILOGUE +VECTOR( 0x100, "SRE" ): + b _entry trap_error: lis r1, 0x8000 /* r1=0x80000000 */ @@ -309,9 +297,6 @@ trap_error: mtctr r4 bctr -VECTOR( 0x100, "SRE" ): - b _entry - ILLEGAL_VECTOR( 0x200 ) VECTOR( 0x300, "DSI" ): @@ -373,11 +358,20 @@ VECTOR( 0x2200, "ISI_64" ): real_dsi: EXCEPTION_PREAMBLE - b call_dsi_exception + LOAD_REG_FUNC(r3, dsi_exception) + mtctr r3 + bctrl + b exception_return real_isi: EXCEPTION_PREAMBLE - b call_isi_exception + LOAD_REG_FUNC(r3, isi_exception) + mtctr r3 + bctrl + b exception_return + +exception_return: + EXCEPTION_EPILOGUE GLOBL(__vectors_end): -- 1.8.1.5

1 0

[PATCH v2] arch/ppc/qemu: Clean up and add more cpu infos
by BALATON Zoltan 25 May '14

25 May '14

Removed unused clock_frequency member from struct cpudef which is get from FW_CFG and added bus-frequency property to complete the frequency properties. Also added tlb infos to cpudef (with values only for G4 currently as I have no data for other CPUs). Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> --- v2: Get bus-frequency from FW_CFG similarly to clock-frequency and tb-frequency (corresponding patch submitted to QEMU) --- Index: openbios-devel/arch/ppc/qemu/init.c =================================================================== --- openbios-devel/arch/ppc/qemu/init.c (revision 1286) +++ openbios-devel/arch/ppc/qemu/init.c (working copy) @@ -44,7 +44,7 @@ int icache_size, dcache_size; int icache_sets, dcache_sets; int icache_block_size, dcache_block_size; - int clock_frequency; + int tlb_sets, tlb_size; void (*initfn)(const struct cpudef *cpu); }; @@ -269,6 +269,18 @@ push_str("i-cache-block-size"); fword("property"); + if(cpu->tlb_size) { + PUSH(cpu->tlb_sets); + fword("encode-int"); + push_str("tlb-sets"); + fword("property"); + + PUSH(cpu->tlb_size); + fword("encode-int"); + push_str("tlb-size"); + fword("property"); + } + PUSH(fw_cfg_read_i32(FW_CFG_PPC_TBFREQ)); fword("encode-int"); push_str("timebase-frequency"); @@ -279,6 +291,11 @@ push_str("clock-frequency"); fword("property"); + PUSH(fw_cfg_read_i32(FW_CFG_PPC_BUSFREQ)); + fword("encode-int"); + push_str("bus-frequency"); + fword("property"); + push_str("running"); fword("encode-string"); push_str("state"); @@ -391,7 +408,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x07de2900, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_604_init, }, { // XXX find out real values @@ -403,7 +421,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x07de2900, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_604_init, }, { // XXX find out real values @@ -415,7 +434,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x07de2900, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_604_init, }, { // XXX find out real values @@ -427,7 +447,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x14dc9380, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_750_init, }, { @@ -439,7 +460,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x14dc9380, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_750_init, }, { // XXX find out real values @@ -451,7 +473,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x14dc9380, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_750_init, }, { // XXX find out real values @@ -463,7 +486,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x14dc9380, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_750_init, }, { // XXX find out real values @@ -475,7 +499,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x14dc9380, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_750_init, }, { // XXX find out real values @@ -487,7 +512,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x14dc9380, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_750_init, }, { @@ -499,7 +525,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x20, .dcache_block_size = 0x20, - .clock_frequency = 0x1dcd6500, + .tlb_sets = 0x40, + .tlb_size = 0x80, .initfn = cpu_g4_init, }, { @@ -511,7 +538,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x80, .dcache_block_size = 0x80, - .clock_frequency = 0x5f5e1000, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_970_init, }, { // XXX find out real values @@ -523,7 +551,8 @@ .dcache_sets = 0x80, .icache_block_size = 0x80, .dcache_block_size = 0x80, - .clock_frequency = 0x1dcd6500, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_970_init, }, { @@ -535,7 +564,8 @@ .dcache_sets = 0x40, .icache_block_size = 0x80, .dcache_block_size = 0x80, - .clock_frequency = 0x629b4940, + .tlb_sets = 0x00, + .tlb_size = 0x00, .initfn = cpu_970_init, }, };

4 16