RE: [OpenBIOS] Status
by Mark Jackson
I would be grateful if you could send me a copy of your source-code.
Thanks
Mark
---
Mark Jackson ... Daniel Industries ... (713) 827 3302
Work .. mjackson(a)danielind.com
Home .. mpfj(a)bigfoot.com
-----Original Message-----
From: Stephan Müller [mailto:stephan_mueller@gmx.net]
Sent: Wednesday, May 26, 1999 6:21 AM
To: openbios(a)elvis.informatik.uni-freiburg.de
Subject: AW: [OpenBIOS] Status
Hi.
> it. Also do you have a up to date cmos memory layout. I have gotten a
> couple off the internet but they are the old ones. They are good but
> they only cover very little of the memory layout. Again any information
> on these subjects would be helpful. I would also like to help you guys
> with your project. Im not to fimilair with what you are doing but i am
> interested in learning..
I've got a c-sourcecode for direct access to the IDE-controller.
I can try to send it to you, just give me your email-add and i'll send it to
you.
Ciao,
Stephan
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20 years, 1 month
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OpenBIOS status
by Kevin P. Lawton
Hey OpenBIOS team,
Can you folks me a quick snapshot of how things
are working out with OpenBIOS?
You probably have at least heard of my project "bochs".
A long time ago someone from the OpenBIOS project contacted
me, and wanted to know if they could use my BIOS
as a starting point or reference for OpenBIOS.
Anyhow, I've started another project, more or less an
open source clone of the commercial program "VMWare".
You can check it out at:
news://news.redhat.com/redhat.projects.freemware
http://www.freemware.org
We're going to be needing an open source BIOS for
that project. I have no problem with using the BIOS
from bochs as a starting point, but I thought I'd
contact you folks and see if it makes sense to sync
up with your efforts.
Freemware has potential to be a *really* big Linux
project, and thus receive a ton of support. So this
may very well help out your project.
Thanks,
-Kevin Lawton
http://www.bochs.com
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20 years, 1 month
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Re: AW: AW: [OpenBIOS] OT: Bios access speeds
by James Oakley
Stephan Müller wrote:
>
> > >Ah! Very much like video memory or adapter RAM... **NOW** I
> > understand the
> > >ISA bus speeed question and why it was important!!
> >
> > I was looking through my motherboard manual today, and I happened to see a
> > block diagram of the Intel GX chipset. According to the block
> > diagram, the
> > BIOS uses the same interface into the chipset as the ISA bus. While the
> > BIOS may not actually be attached to the ISA bus, it is accessed
> > in the same
> > way by the chipset (and, therefore, the CPU).
> >
> > Of course, this was a rough block diagram and, besides, what do I know?
> The BIOS is normally connected directly to the ISA bus. That is why, if the
> ISA-Bridge is damaged, your Board can't even boot with PCI-Cards.
Wow, didn't expect OB traffic to increase this much, considering the
recent lull.
Yes, the BIOS is connected to the ISA bus, I verified that with a
multimeter.
All of the flash pins can be connected on the card to the ISA bus except
for /ce. It's easiest to hijack it from the original flash socket.
I have that part of the schematic completed, not that there's any design
involved, just drawing it takes up time. Glue is not required for the
flashes.
Glue is, however, required for POST and GPIO. There are two ways to go
with this, and this has been discussed to some degree. Using a GAL is
definitely the cleanest solution. However, is there anybody who wants
one of these who doesn't have access to a programmer? Traditional logic
chips are more accessible to these people. It's still really cheap even
though chip count will increase.
Who agrees/disagrees?
james oakley
jfunk(a)roadrunner.nf.net
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20 years, 2 months
- 3
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Re: AW: AW: [OpenBIOS] OT: Bios access speeds
by alex dinovitser
> Glue is, however, required for POST and GPIO. There are two ways to go
> with this, and this has been discussed to some degree. Using a GAL is
> definitely the cleanest solution. However, is there anybody who wants
> one of these who doesn't have access to a programmer? Traditional logic
> chips are more accessible to these people. It's still really cheap even
> though chip count will increase.
>
> Who agrees/disagrees?
Please run me through the logic required for the POST and GPIO.
I would have seriously thought that standard logic chips and buffers would be
all that's required. Furthermore, these are easier to troubleshoot, need no
programmer, available anywhere and are cheap. Using GALs will exclude all the
people who don't have a programmer (myself included), and GALs aren't as
commonly available (here in Australia anyway).
I would be happy to design the most compact logic circuit for the given
application, and I would be surprised if it requires an excessive number of
chips. Maybe we should do that first, and then decide if it its worthwhile
using GALs.
For 32 bit address decoding alone, it should be possible with around 6 chips (I
better check whats available now days, but please don't use only 74138 or 74139
!! that is wrong for our sort of address decoding)
Can someone please tell me exactly what is required here?
Do you need these functions to be accessible from a single address or a range
of addresses??
If it's a range of addresses, What is the range(s)
If it's is a single address, How easily do you want that address to be
changeable??
cheers,
===
------------------------------------------------------------------
Alex Dinovitser
PhD Student ph: +61 8 8302 1775
Transport Systems Centre fax: +61 8 8302 1880
City East Campus
University of South Australia
Adelaide 5000
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20 years, 2 months
- 1
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Re: AW: [OpenBIOS] OT: Bios access speeds
by Timothy J. Massey
On Fri, 30 Apr 1999 16:50:39 -0400, Timothy J. Massey wrote:
>On Fri, 30 Apr 1999 12:22:17 +0200, Stephan M�ller wrote:
>
>>With these 2 things you can connect a flash/eprom/prom/whatever to a
>>specific
>>location in the system-memory (first 16meg, i think on isa-bus)
>
>
>Ah! Very much like video memory or adapter RAM... **NOW** I understand the
>ISA bus speeed question and why it was important!!
I was looking through my motherboard manual today, and I happened to see a
block diagram of the Intel GX chipset. According to the block diagram, the
BIOS uses the same interface into the chipset as the ISA bus. While the
BIOS may not actually be attached to the ISA bus, it is accessed in the same
way by the chipset (and, therefore, the CPU).
Of course, this was a rough block diagram and, besides, what do I know?
Tim Massey
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