OT: linux kernel problem
by Edwin Rhodes
when compiling my linux kernel i keep on recieving this message:
Warning: Clock Skew Detected Build May Be Incomplete
It seams to compile ok.
What does this error message mean?? and how can i fix it.
thanks
edwin
ps. I have only been getting this message since i upgraded to an AMD K6-2 500Mhz.
19 years, 11 months
- 4
- 3
Current States of LinuxBios on SiS 630
by Ollie Lho
Ron,
We can boot the kernel from power-on now. With the romimage which will
be sent to you seperately, we can reach the point of kernel_thread(init,...);
in arch/i386/kernel/setup.c which means that everything is ready and we are
going to load/execute scripts in rc.d. We are using kernel-2.3.99pre5 with
the patch in export.tgz. If you can monitor port 0x80 with debug card you
can get 0xed at the end.
We don't experience the keyboard problem you described, does that
happen after the kernel_thread() ?? After initrc are executed ??
The frame buffer device driver is included in 2.4.0-test1 and later
kernel. There is some bug in Config.in which makes the option absent when
make config, but it is really easy to fix. I think we should move to 2.4.0
now since we are going to need fbdev real soon.
Finally, could you please put your source to the FreeBIOS CVS ??
Usually we are unsure if our version matches yours, you know, things like
this make a lot of trouble.
BTW, we are asking VGA BIOS group to release more information/source code.
I hope we can turn on the monitor ASAP, using ICE and debug card is really a
pain in the ass.
P.S. Jeff, could you review the sisfb for us ?? What are we missing from the
driver for this special purpose ??
Ollie
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20 years, 1 month
- 6
- 19
SiS 630 booting Linux from power on.
by Ronald G Minnich
We're not up to multiuser, because we have a keyboard hang problem. But we
think we'll get that soon. Getting there!
ron
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20 years, 1 month
- 1
- 0
question for the experts on PII vs. Celeron startup
by Ronald G Minnich
I have been having trouble getting PII to work with memory from powerup. I
just now realized that I'm seeing basically the same problem on the Intel
and SiS motherboards. Engineers at SiS, using the same linuxbios romimage
as I am using, has no troubles on the motherboard BUT: they are using
Celeron. (see the linuxbios web page: I can still get the intel
motherboard up with linuxbios, but I have to let the flash recovery code
run first by twiddling the jumper).
The symptom is that during memory init, at some point the processor seems
to take a trap during a memory write. It is as though some piece of
hardware between the processor and memory is unhappy :-)
I'm working with SiS to try a different motherboard. But: I'm now
wondering if I'm encountering some kind of PII L2 Cache init problem on
the Slot 1 cards I'm using here. I'm very suspicious that I'm seeing a
particular kind of problem on my Slot 1 PII systems that SiS is not seeing
using a Celeron, and that I'm seeing the same kind of problem on both
Intel and SiS mainboards.
Any comments on this? Any thoughts? Anyone know if anything special
happens for L2 cache on a Slot 1 card at powerup? It would probably look
like an IN or OUT to an undocumented address (undocumented since this is
Intel we're talking about here).
ron
p.s. linuxbios: http://www.acl.lanl.gov/linuxbios
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20 years, 1 month
- 3
- 5
Programming ROMS
by Edwin Rhodes
Hi, I've managed to obtain some 486 and 386 ROM's that I would like to program. I would like to replace the current ROM code with that of the linux bios code. unfortunately I don't think that the boards support flash update?? how do I go about re-programming them??? what hardware and software is required to re-write the bios?? would I be able to get away with a hot-swap??? or do i need a proper rom programmer, if so which one would you recommend.
thanks,
Edwin
ps. well done for getting so far with linux bios. if there is anything I can do to help let me know. :)
20 years, 1 month
- 2
- 1
RE: [OpenBIOS] Programming ROMS
by Jessen, Per
> -----Original Message-----
> From: Edwin Rhodes [mailto:edwin_rhodes@hotmail.com]
> Sent: 24 May 2000 15:18
> To: openbios(a)elvis.informatik.uni-freiburg.de
> Subject: [OpenBIOS] Programming ROMS
>
>
> Hi, I've managed to obtain some 486 and 386 ROM's that I
> would like to program. I would like to replace the current
> ROM code with that of the linux bios code. unfortunately I
> don't think that the boards support flash update?? how do I
> go about re-programming them??? what hardware and software is
Assuming they are indeed EPROMs, you need to determine the type
of EPROM (make, code - e.g. AMD27Cxxxx and so on).
Retrieve the datasheet from the manufacturers website, then determine
how to program them.
> required to re-write the bios?? would I be able to get away
> with a hot-swap??? or do i need a proper rom programmer, if
> so which one would you recommend.
If the EPROMs are not flashable, simply go for a burner that supports
the type of chip(s) you have.
I'm not sure what you mean by 'hot-swap' ?
regards,
Per Jessen
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20 years, 1 month
- 1
- 0
Programming ROMS
by Edwin Rhodes
Hi, I've managed to obtain some 486 and 386 ROM's that I would like to program. I would like to replace the current ROM code with that of the linux bios code. unfortunately I don't think that the boards support flash update?? how do I go about re-programming them??? what hardware and software is required to re-write the bios?? would I be able to get away with a hot-swap??? or do i need a proper rom programmer, if so which one would you recommend.
thanks,
Edwin
ps. well done for getting so far with linux bios. if there is anything I can do to help let me know. :)
20 years, 1 month
- 1
- 0
Mixing 16 and 32 bits code
by Ollie Lho
Ronald,
It seems that you made some mistake in mixing 16
and 32 bits code in the intel_start32.S:
_realstart:
cli
movw %cs, %eax
movw %eax, %es
xor %eax, %eax
mov %eax, %cr3 /* Invalidate TLB*/
.byte 0x66 /* prefix */
.byte 0x26
.byte 0x0f, 0x01, 0x16 /* lgdt [es:offset]*/
.word 0x02 /* offset in segment */
movl %cr0, %eax
andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0*/
orl $1, %eax
movl %eax, %cr0
data32
ljmp $0x10, $.Lprotected
Before _realstart there was a .code16 directive, so it should be in 16
bits mode, so how could those 32 bits (long) operation works ??
This bugs seems breaks gas 2.9.5 also.
Ollie
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20 years, 1 month
- 5
- 7
latest snapshot
by Ronald G Minnich
The latest snapshot of the linuxbios is at
http://www.acl.lanl.gov/linuxbios. This is the one that boots multiuser.
I included a linux/.config so you have our config.
It also includes romimages (I didn't do a make clean, in other words ...)
problems to me.
We're starting an alpha port next week sometime.
ron
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20 years, 2 months
- 1
- 0
linuxbios: I can now login
by Ronald G Minnich
Just got the keyboard working, thanks to a few hints from the openbios
guys. So I can now log in.
You can hit reset on the box, and before you know it you're seeing linux
boot messages ...
still lots to do, but this is a big step. Logging in is always a good idea
:-)
One cool thing: I still have not had to reproduce the "steenking
bios" code from boot/setup.S. Linux is handling most hardware init tasks
just fine.
ron
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20 years, 2 months
- 1
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