November 2016 - OpenBIOS - mail.coreboot.org

[PATCH] libopenbios/bootinfo_load.c: Implement Mac OS 9.2 boot script support
by Programmingkid Dec. 25, 2017

Dec. 25, 2017

This patch makes booting Mac OS 9.2 possible. It replaces all occurrences of >r and r> with sub_>r and sub_r>. This allows for the return stack to be left alone. This patch also makes it so that the boot script is executed one line at a time. Signed-off-by: John Arbuckle <programmingkidx(a)gmail.com> Note: this patch depends on the strstr() and return stack substitution patches. Index: libopenbios/bootinfo_load.c =================================================================== --- libopenbios/bootinfo_load.c (revision 1395) +++ libopenbios/bootinfo_load.c (working copy) @@ -19,6 +19,7 @@ #include "libopenbios/bootinfo_load.h" #include "libopenbios/ofmem.h" #include "libc/vsprintf.h" +#include "libc/string.h" //#define DEBUG_BOOTINFO @@ -116,6 +117,75 @@ return LOADER_NOT_SUPPORT; } +// Replace all occurrences of orig_str in buffer with replace_str +static void replace_string(char *buffer, const char *orig_str, const char *replace_str) +{ + char *ptr; + int index, new_buf_index = 0; + const int max_size = 5000; + char *new_buffer = malloc(max_size * sizeof(char)); + + for (index = 0; index < strlen(buffer); index++) { + if (buffer[index] == orig_str[0]) { + ptr = strstr(buffer + index, orig_str); + + // if we encountered an orig_str in the buffer + if (index == (ptr - buffer)) { + sprintf(new_buffer + new_buf_index, "%s ", replace_str); + new_buf_index += strlen(replace_str) + 1; + index += strlen(orig_str); + continue; + } + } + new_buffer[new_buf_index++] = buffer[index]; + } + + // copy new_buffer into buffer + for (index = 0; index < strlen(new_buffer); index++) { + buffer[index] = new_buffer[index]; + } + buffer[index+1] = '\0'; +} + +/* Replace >r and r> with sub_>r and sub_r> */ +static void replace_return_stack_words(char *bootscript) +{ + const char *find_str1 = ">r"; + const char *replace_str1 = "sub_>r"; + const char *find_str2 = "r>"; + const char *replace_str2 = "sub_r>"; + + replace_string(bootscript, find_str1, replace_str1); + replace_string(bootscript, find_str2, replace_str2); +} + +/* Runs the bootscript one line at a time */ +void run_script(char *bootscript) +{ + int index = 0, buf_index = 0; + char c; + char *buffer = malloc(1000 * sizeof(char)); + + while (1) { + c = bootscript[index]; + + // fill up buffer + while (c != '\n' && c != '\r' && c != '\0') { + buffer[buf_index++] = c; + c = bootscript[++index]; + } + buffer[buf_index] = '\0'; + buf_index = 0; + index++; + DPRINTF("%s\n", buffer); + feval(buffer); + if (c == '\0') { + break; + } + } + free(buffer); +} + /* Parse SGML structure like: <chrp-boot> @@ -209,9 +279,6 @@ script = 0; bootscript[scriptlen] = '\0'; - DPRINTF("got bootscript %s\n", - bootscript); - scriptvalid = -1; break; @@ -261,8 +328,8 @@ /* If the payload is bootinfo then we execute it immediately */ if (scriptvalid) { - DPRINTF("bootscript: %s\n", bootscript); - feval(bootscript); + replace_return_stack_words(bootscript); + run_script(bootscript); } else DPRINTF("Unable to parse bootinfo bootscript\n");

4 9

Re: [OpenBIOS] Beginners How-To for DTS and OpenFirmware?
by Michael Feb. 13, 2017

Feb. 13, 2017

Hello Zoltan, hey list, On Mon, Nov 21, 2016 at 07:15:21PM +0100, BALATON Zoltan wrote: > ... > For forth commands I've found this page useful (not sure if this is linked > from somewhere): > http://www.firmworks.com/QuickRef.html Thank you, I found this (and more) last week. The OLPC sites are the best for me: 1: http://wiki.laptop.org/go/Open_Firmware 2: http://wiki.laptop.org/go/Forth_Lessons 3: http://wiki.laptop.org/go/Cross_Compiling_Open_Firmware > ... > This is a bit confusing. There are multiple implementations of the IEEE > standard (commonly referred to as Open Firmware) and one of these is also > called Open Firmware. These are listed under Implementations on the left of > the page at www.openfirmware.info. Another implementation used by QEMU for Yes and I looked at them. But they are either very old or not usable for ppc (too much work to implement a new arch). > ... > talking about Open Firmware: the standard or the implementation with the > same name. One thing is left which confuses me: In wikipedia and you say, that you use the name "Open Firmware" (also, besides as name for a standard) for an implementation. OK. But the website gives the impression (and G 3 says), that the implementation has the name "OpenBIOS"... So I have two statements which don't fit well. Please remember that I am new to this and did not live through the history. > ... > Actually running OpenBIOS on real hardware is not something that is well > tested (I'm not sure if it was ever tried but I think it wasn't done > recently) so if you try to do that be prepared for likely needing some The OLPC project did it, e.g. > fixing. This is true for any implementation that does not support the > hardware you want to run it on, then you likely need to port it. That there will be the need for porting was clear. > ... > it's enough to have the basics in there. Not sure how much up to date is > this but this is discussed in the kernel documentation here: > https://www.kernel.org/doc/Documentation/devicetree/booting-without-of.txt > Thank you, I missed this source. > As for giving the device tree to OpenBIOS I think it should just know it or > construct it from discovering the hardware as the point of the device tree > is to describe the hardware for the operating system so the firmware should > know the hardware and provide the device tree. It does not get it from The "firmware" is our handmade init-assemblercode. It has to enable the machine (beginning from Adam...) to run C-code in its RAM. If there is no software-interface, then we provide the device-tree maybe in forth or in a blob. Just thinking loudly. > ... > In fact OpenBIOS does not have that many drivers but maybe the basics are > there, only the platform specific init code might need to be adapted for a That would be very nice. We give it a try. Maybe with help from you / the list. > new board. For ppc these would be in arch/ppc. Running on QEMU is quite a > bit simpler as we can skip a lot of init code (such as memory controller or > other hardware) so maybe these are not well implemented or buggy as they > were not tested with real hardware for a while. > ... Did you use OpenBIOS in a recent qemu and have you been able to remote-debug it there? I was able to load and run the old OpenBIOS code (from svn repo) on "qemu-system-ppc". Thank you for your time and suggestions, greetings, Michael

7 10

[PATCH 3/4] arch/ppc/qemu: Add a node for the other (empty) PCI bus to the device tree
by BALATON Zoltan Jan. 2, 2017

Jan. 2, 2017

QEMU emulates two of the three PCI buses found on real hardware because some clients seem to need both and fail with only one present, but OpenBIOS only handles a single PCI bus and initialises and puts in the device tree only one of these: the second one which is where devices are connected and also marks it bus 0. However, clients getting info from the device tree may not know about this and thinking there is only one PCI bus they erroneously use the address of the first bus to access PCI config registers for devices on the second bus which silently fails as these requests will go to the other empty bus emulated and return invalid values. Devices mapped via MMIO still appear to work but they may not be correctly initialised and some cards are not detected because of this. Until support for multiple PCI buses is implemented add an empty node in the device tree for the uninitialised bus to let clients know about it. This is still not entirely correct as bus-range property does not match real hardware but this fixes detecting PCI devices (such as USB) under MorphOS and may also fix enabling the bus master bit needed with some network cards and allow the workarund for this to be reverted. Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> --- arch/ppc/qemu/tree.fs | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/ppc/qemu/tree.fs b/arch/ppc/qemu/tree.fs index 5b6bbc6..e1708de 100644 --- a/arch/ppc/qemu/tree.fs +++ b/arch/ppc/qemu/tree.fs @@ -50,6 +50,18 @@ new-device h# ff800000 encode-int encode+ " ranges" property finish-device +\ Add empty node for first pci bus +\ Remove this when pci driver is fixed to handle multiple buses +new-device + " pci" device-name + " pci" device-type + h# f0000000 encode-int 02000000 encode-int encode+ " reg" property + 3 encode-int " #address-cells" property + 2 encode-int " #size-cells" property + 1 encode-int " #interrupt-cells" property + 0 encode-int 0 encode-int encode+ " bus-range" property +finish-device + \ ------------------------------------------------------------- \ /packages \ ------------------------------------------------------------- -- 2.7.4

2 4

SPARC32 : Fix SMP Boot
by Olivier Danet Dec. 31, 2016

Dec. 31, 2016

Only the first CPU should clear the RAM Signed-off-by: Olivier Danet <odanet(a)caramail.com> -------------------- diff --git a/arch/sparc32/entry.S b/arch/sparc32/entry.S index 82aa88e..0374f0c 100644 --- a/arch/sparc32/entry.S +++ b/arch/sparc32/entry.S @@ -125,6 +125,17 @@ entry: sll %g3, 24, %g3 or %g3, %g4, %g1 ! %g1 contains end of memory + + ! Get CPU number + ! XXX: not all CPUs should have MXCC + set 0x1c00f00, %g2 + ldda [%g2] ASI_CONTROL, %g2 + srl %g3, 24, %g7 + subcc %g7, 8, %g7 + + ! Only the first CPU clears memory + bnz clear_done + nop ! Get kernel address from configuration device ! NB: little endian format @@ -146,6 +157,9 @@ entry: sll %g3, 24, %g3 or %g3, %g4, %g4 + mov 0,%l0 + mov 0,%l1 + ! If kernel address is set, don't clear from base of RAM in order to ! leave the kernel image intact mov 0, %g6 @@ -157,8 +171,8 @@ entry: set 0x1000000, %g6 clear_mem: - sta %g0, [%g6] ASI_M_BYPASS - add %g6, 0x4, %g6 + stda %l0, [%g6] ASI_M_BYPASS + add %g6, 0x8, %g6 cmp %g6, %g1 bl clear_mem nop @@ -168,23 +182,6 @@ clear_done: set 0x2000, %g3 sub %g1, %g3, %g6 - ! Check if this is the boot CPU and skip SMP table check if yes - ! XXX: not all CPUs should have MXCC - set 0x1c00f00, %g2 - ldda [%g2] ASI_CONTROL, %g2 - srl %g3, 24, %g7 - sub %g7, 8, %g7 - tst %g7 - bz skip_table - nop - - ! Calculate SMP table location - set 0x1f0c, %g2 - add %g6, %g2, %g2 ! valid? - lda [%g2] ASI_M_BYPASS, %g7 - sta %g0, [%g2] ASI_M_BYPASS - -skip_table: ! Get machine ID from configuration device mov FW_CFG_MACHINE_ID, %g2 sub %g5, 2, %g5 @@ -205,36 +202,39 @@ skip_table: blu ss2 nop - ! Ok, this is SS-5 + ! Ok, this is SS-5, uniprocessor + ba first_cpu + nop +ss10: + ! Ok, this is SS-10/20 or SS-600MP tst %g7 bz first_cpu nop - ! Clear softints used for SMP CPU startup - set PHYS_JJ_INTR0 + 0x04, %g1 - sll %g2, 12, %g2 + ! SMP init, clear softints, which are used for starting non-boot CPUs + set PHYS_SS10_INTR0 + 0x04, %g1 + sll %g7, 12, %g2 add %g1, %g2, %g2 set 0xffffffff, %g1 - sta %g1, [%g2] ASI_M_BYPASS ! clear softints + sta %g1, [%g2] ASI_M_CTL ! clear softints add %g2, 4, %g2 - sta %g0, [%g2] ASI_M_BYPASS ! clear softints + sta %g0, [%g2] ASI_M_CTL ! clear softints -load_ctx: ! SMP init, jump to user specified address - set 0x1f04, %g5 + set 0x1f04, %g5 add %g6, %g5, %g5 ! ctxtbl lda [%g5] ASI_M_BYPASS, %g2 sta %g0, [%g5] ASI_M_BYPASS set AC_M_CTPR, %g1 sta %g2, [%g1] ASI_M_MMUREGS ! set ctx table ptr - set 0x1f00, %g5 + set 0x1f00, %g5 add %g6, %g5, %g5 ! ctx lda [%g5] ASI_M_BYPASS, %g2 sta %g0, [%g5] ASI_M_BYPASS set AC_M_CXR, %g1 sta %g2, [%g1] ASI_M_MMUREGS ! set context - set 0x1f08, %g5 + set 0x1f08, %g5 add %g6, %g5, %g5 ! entry lda [%g5] ASI_M_BYPASS, %g2 sta %g0, [%g5] ASI_M_BYPASS @@ -242,22 +242,6 @@ load_ctx: jmp %g2 ! jump to kernel sta %g1, [%g0] ASI_M_MMUREGS ! enable mmu -ss10: - ! Ok, this is SS-10 or SS-600MP - tst %g7 - bz first_cpu - nop - - ! Clear softints used for SMP CPU startup - set PHYS_SS10_INTR0 + 0x04, %g1 - sll %g2, 12, %g2 - add %g1, %g2, %g2 - set 0xffffffff, %g1 - sta %g1, [%g2] ASI_M_CTL ! clear softints - add %g2, 4, %g2 - b load_ctx - sta %g0, [%g2] ASI_M_CTL ! clear softints - ss2: ! Ok, this is SS-2 set ss2_error, %o2

2 1

[PATCH 4/4] ppc: Fix PCI interrupt routing to match what qemu does
by BALATON Zoltan Nov. 24, 2016

Nov. 24, 2016

From: Benjamin Herrenschmidt <benh(a)kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh(a)kernel.crashing.org> --- drivers/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) This should be commited after this change in QEMU: http://lists.nongnu.org/archive/html/qemu-devel/2016-11/msg03740.html diff --git a/drivers/pci.c b/drivers/pci.c index 7ad5202..c998280 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -1565,7 +1565,7 @@ static void ob_pci_host_set_interrupt_map(phandle_t host) ncells += pci_encode_phys_addr(props + ncells, 0, 0, addr, 0, 0); props[ncells++] = intno; props[ncells++] = dnode; - props[ncells++] = arch->irqs[intno - 1]; + props[ncells++] = arch->irqs[((intno - 1) + (addr >> 11)) & 3]; props[ncells++] = 1; #else /* Keep compiler quiet */ -- 2.7.4

2 3

Re: [OpenBIOS] Beginners How-To for DTS and OpenFirmware?
by Tarl Neustaedter Nov. 23, 2016

Nov. 23, 2016

On 2016-Nov-22 09:22 , Artyom Tarasenko wrote: > That's a very interesting point. Does EFI actually have any advantages > over IEEE 1275? * It's supported by Intel and many hardware vendors (drivers for their chips) * It has huge libraries to do many interesting things (from IPv6 to debuggers), so system builders have many options that don't require writing things from scratch. * It's written in C. At one point, I was informed that the biggest advantage was that it didn't require Forth programmers. From a management viewpoint, that is significant, finding good Forth programmers is a pain in the tush. Growing your own forth programmers isn't easy, it takes a long time for someone to learn how to write clean and maintainable Forth. And with today's larger PROMs, Forth's compactness is no longer as important. > For instance, Apple moved to EFI, but was their real motivation? > Did they just wanted to ditch Forth? I have no actual visibility into Apple's motivations, but my assumption would be that with the move to x86, the change to EFI made sense to them.

1 0

Re: [OpenBIOS] [Qemu-ppc] Debug logs for USB on MorphOS
by BALATON Zoltan Nov. 21, 2016

Nov. 21, 2016

On Fri, 11 Nov 2016, BALATON Zoltan wrote: > For those interested in more details it seems that the pciusb.device driver > finds the OHCI chip in QEMU but does not like it and does not claim or try to > initialise it for some reason. It wasn't too easy to find it but it turned out to be caused by a mismatch between what's emulated in QEMU and what OpenBIOS put in the device tree so when trying to access the config registers of PCI bus 1 MorphOS ended up using PCI bus 0 which of course returned an error. After this was fixed the USB controller is found but patches from BenH to fix the interrupt was also needed for it to work. Patches submitted to OpenBIOS and QEMU. > The usefulness of this activity may not be direct as MorphOS may not ever run [...] > on) but the bugs found and fixed during this do help making the device models > in QEMU more accurate and help running other OSes. I think some of the bugs > fixed this way in OpenBIOS and QEMU also helped to get MacOS running so I > like to believe there are at least some indirect usefulness of this. MorphOS now has input but still lacks some way to output video (this still needs some work). But if other OSes had the same problem fixed here then this may fix the enabling of the bus master bit for some network cards so the patch added for that in OpenBIOS may not be needed now and fixing the interrupt may improve mouse or sound behaviour on MacOS. I haven't tested these, just verified that MacOS 9 and Linux still boots with these patches. Regards, BALATON Zoltan

2 1

Beginners How-To for DTS and OpenFirmware?
by Michael Nov. 21, 2016

Nov. 21, 2016

Dear list, thank you for the help with cross-compiling for ppc64 so far! It is important but I overjumped enthusiastically the OF basics :-) I read many webpages, hints and maybe old sites etc and solved many things. But is there a "beginners how-to" somewhere? What I would find most usefull: 1) Best source-code to use? There is a version-1.1.zip, a svn repo and a git repo. 2) The names are also a bit confusing when you see it first. I know about the IEEE standard and a few things about the history (from wikipedia), but if you for example visit the website and click on the "openfirmware" link, the you see a page with "OpenBIOS" heading. So even if one knows about history, there is confusion about actual used names. 3) How is the device-tree given to OF? And how does OF handle it over to a linux kernel? 4) Minimal prerequisites on a new hardware, so that OF is able to run? E.g. which type of RAM does it need? Does it need a stack or .text segment or other things to run (like c-code)? ... If these points would be clarified, the it would be much easier for new people to help with e.g. additional targets or maybe new architectures. Thanks for your time! Greetings, Michael

4 4

Error when crosscompiling for qemu-ppc64
by Michael Nov. 21, 2016

Nov. 21, 2016

Hello list! A few days ago I found this openfirmware and the forth in it and wanted to try it out in a project for powerpc (64 bit). My openbios version is latest from git (master), last patch from 2016-10-09 (1dc4f162efc0f00a36126cab8e7b906335f6b706). I used this because the version 1.1 has two bugs I stumbled upon. I am cross-compiling on amd64 (host with debian) for ppc64 target and therefore call the script "switch-arch qemu-ppc64". The settings in the generated files under obj-ppc64 look OK to me. But (there is allways this "but") I have a compile error: moew@debhost:~/OpenFirmware/openbios# make GEN bootstrap.dict panic: segmentation violation at 0xdf1ec62c dict=0x7f0edf1ec010 here=0x7f0edf1ec638(dict+0x628) pc=0x0(dict+0x20e13ff0) dstackcnt=0 rstackcnt=0 instruction=deadbeef dstack: 0x0 rstack: 0x0 Writing dictionary core file rules.mak:68: recipe for target 'bootstrap.dict' failed make: *** [bootstrap.dict] Error 1 It seems that the generating of the forth dictionary fails? Where can I get more information? The logs contain not much more info. When I compile the same sources for target amd64, then it builds and works. Thank you for reading (and maybe for helping)! Michael

4 14

[PATCH 2/4] pci: Do not use hard coded name for pci bus, get it from phandle instead
by BALATON Zoltan Nov. 20, 2016

Nov. 20, 2016

Signed-off-by: BALATON Zoltan <balaton(a)eik.bme.hu> --- drivers/pci.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/pci.c b/drivers/pci.c index b75ca0f..7ad5202 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -1481,27 +1481,35 @@ static void ob_pci_host_set_interrupt_map(phandle_t host) #if defined(CONFIG_PPC) phandle_t target_node; + char *path, buf[256]; /* Oldworld macs do interrupt maps differently */ if (!is_newworld()) return; + PCI_DPRINTF("setting up interrupt map for host %x\n", host); dnode = dt_iterate_type(0, "open-pic"); - if (dnode) { + path = get_path_from_ph(host); + if (dnode && path) { /* patch in openpic interrupt-parent properties */ - target_node = find_dev("/pci/mac-io"); + snprintf(buf, sizeof(buf), "%s/mac-io", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); - target_node = find_dev("/pci/mac-io/escc/ch-a"); + snprintf(buf, sizeof(buf), "%s/mac-io/escc/ch-a", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); - target_node = find_dev("/pci/mac-io/escc/ch-b"); + snprintf(buf, sizeof(buf), "%s/mac-io/escc/ch-b", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); - target_node = find_dev("/pci/mac-io/escc-legacy/ch-a"); + snprintf(buf, sizeof(buf), "%s/mac-io/escc-legacy/ch-a", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); - target_node = find_dev("/pci/mac-io/escc-legacy/ch-b"); + snprintf(buf, sizeof(buf), "%s/mac-io/escc-legacy/ch-b", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); /* QEMU only emulates 2 of the 3 ata buses currently */ @@ -1510,16 +1518,19 @@ static void ob_pci_host_set_interrupt_map(phandle_t host) * On g3beige they all called just ide. * We take 2 x ata-3 buses which seems to work for * at least the clients we care about */ - target_node = find_dev("/pci/mac-io/ata-3@20000"); + snprintf(buf, sizeof(buf), "%s/mac-io/ata-3@20000", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); - target_node = find_dev("/pci/mac-io/ata-3@21000"); + snprintf(buf, sizeof(buf), "%s/mac-io/ata-3@21000", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); - target_node = find_dev("/pci/mac-io/via-cuda"); + snprintf(buf, sizeof(buf), "%s/mac-io/via-cuda", path); + target_node = find_dev(buf); set_int_property(target_node, "interrupt-parent", dnode); - target_node = find_dev("/pci"); + target_node = find_dev(path); set_int_property(target_node, "interrupt-parent", dnode); } #else -- 2.7.4

1 0