September 2013 - OpenBIOS - mail.coreboot.org

[commit] r1209 - trunk/openbios-devel/arch/sparc32
by repository service Dec. 8, 2013

Dec. 8, 2013

Author: mcayland Date: Mon Aug 19 09:40:12 2013 New Revision: 1209 URL: http://tracker.coreboot.org/trac/openbios/changeset/1209 Log: SPARC32: fix romvec stdin/stdout field initialisation Previously the romvec stdin/stdout ihandles were configured so that they were set to the current stdin and stdout paths at initialisation time. Unfortunately as stdin/stdout can be changed with the input and output words, they can end up pointing to invalid ihandles causing a crash when trying to output to the console. Fix this by pointing the romvec structure to the address of the stdin/stdout variables so that they are always in sync. Similarly we also resolve the text path stdin/stdout variables at boot time to ensure that they will never be stale. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> Modified: trunk/openbios-devel/arch/sparc32/boot.c trunk/openbios-devel/arch/sparc32/romvec.c Modified: trunk/openbios-devel/arch/sparc32/boot.c ============================================================================== --- trunk/openbios-devel/arch/sparc32/boot.c Mon Aug 19 09:40:10 2013 (r1208) +++ trunk/openbios-devel/arch/sparc32/boot.c Mon Aug 19 09:40:12 2013 (r1209) @@ -23,7 +23,7 @@ void go(void) { ucell address, type, size; - int image_retval = 0, proplen, target, device; + int image_retval = 0, intprop, proplen, target, device; phandle_t chosen; char *prop, *id, *name; static char bootpathbuf[128], bootargsbuf[128], buf[128]; @@ -40,8 +40,19 @@ needs to be set up to pass certain parameters using a C struct. Hence this section extracts the relevant boot information and places it in obp_arg. */ - /* Get the name of the selected boot device, along with the device and unit number */ + /* Get the stdin and stdout paths */ chosen = find_dev("/chosen"); + intprop = get_int_property(chosen, "stdin", &proplen); + PUSH(intprop); + fword("get-instance-path"); + ((struct linux_romvec *)romvec)->pv_stdin = pop_fstr_copy(); + + intprop = get_int_property(chosen, "stdout", &proplen); + PUSH(intprop); + fword("get-instance-path"); + ((struct linux_romvec *)romvec)->pv_stdout = pop_fstr_copy(); + + /* Get the name of the selected boot device, along with the device and unit number */ prop = get_property(chosen, "bootpath", &proplen); strncpy(bootpathbuf, prop, proplen); prop = get_property(chosen, "bootargs", &proplen); Modified: trunk/openbios-devel/arch/sparc32/romvec.c ============================================================================== --- trunk/openbios-devel/arch/sparc32/romvec.c Mon Aug 19 09:40:10 2013 (r1208) +++ trunk/openbios-devel/arch/sparc32/romvec.c Mon Aug 19 09:40:12 2013 (r1209) @@ -25,7 +25,6 @@ #endif char obp_stdin, obp_stdout; -static int obp_fd_stdin, obp_fd_stdout; const char *obp_stdin_path, *obp_stdout_path; struct linux_arguments_v0 obp_arg; @@ -498,15 +497,12 @@ romvec0.pv_v2bootargs.bootpath = &bootpath; romvec0.pv_v2bootargs.bootargs = &obp_arg.argv[1]; - romvec0.pv_v2bootargs.fd_stdin = &obp_fd_stdin; - romvec0.pv_v2bootargs.fd_stdout = &obp_fd_stdout; - push_str(obp_stdin_path); - fword("open-dev"); - obp_fd_stdin = POP(); - push_str(obp_stdout_path); - fword("open-dev"); - obp_fd_stdout = POP(); + /* Point fd_stdin/fd_stdout to the Forth stdin/stdout variables */ + fword("stdin"); + romvec0.pv_v2bootargs.fd_stdin = cell2pointer(POP()); + fword("stdout"); + romvec0.pv_v2bootargs.fd_stdout = cell2pointer(POP()); romvec0.v3_memalloc = obp_memalloc_handler;

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[commit] r1229 - trunk/openbios-devel/arch/ppc/qemu
by repository service Sept. 13, 2013

Sept. 13, 2013

Author: afaerber Date: Fri Sep 13 16:16:01 2013 New Revision: 1229 URL: http://tracker.coreboot.org/trac/openbios/changeset/1229 Log: prep: fix start address of PCI memory region PCI devices having memory BARs are now accessed at the right address. This at least fixes the QEMU video card, which is now able to display the OpenBIOS prompt. Signed-off-by: Hervé Poussineau <hpoussin(a)reactos.org> Acked-off-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> Signed-off-by: Andreas Färber <andreas.faerber(a)web.de> Modified: trunk/openbios-devel/arch/ppc/qemu/init.c Modified: trunk/openbios-devel/arch/ppc/qemu/init.c ============================================================================== --- trunk/openbios-devel/arch/ppc/qemu/init.c Tue Sep 3 01:36:45 2013 (r1228) +++ trunk/openbios-devel/arch/ppc/qemu/init.c Fri Sep 13 16:16:01 2013 (r1229) @@ -99,8 +99,8 @@ .cfg_data = 0x80000cfc, .cfg_base = 0x80000000, .cfg_len = 0x00100000, - .host_pci_base = 0x0, - .pci_mem_base = 0xf0000000, + .host_pci_base = 0xc0000000, + .pci_mem_base = 0x100000, /* avoid VGA at 0xa0000 */ .mem_len = 0x10000000, .io_base = 0x80000000, .io_len = 0x00010000,

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[PATCH v2] prep: fix start address of PCI memory region
by Hervé Poussineau Sept. 13, 2013

Sept. 13, 2013

PCI devices having memory BARs are now accessed at the right address. This at least fixes the QEMU video card, which is now able to display the OpenBIOS prompt. Signed-off-by: Hervé Poussineau <hpoussin(a)reactos.org> --- Changes v1->v2: - rebased on r1228 arch/ppc/qemu/init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index f370514..1124c6f 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -99,8 +99,8 @@ static const pci_arch_t known_arch[] = { .cfg_data = 0x80000cfc, .cfg_base = 0x80000000, .cfg_len = 0x00100000, - .host_pci_base = 0x0, - .pci_mem_base = 0xf0000000, + .host_pci_base = 0xc0000000, + .pci_mem_base = 0x100000, /* avoid VGA at 0xa0000 */ .mem_len = 0x10000000, .io_base = 0x80000000, .io_len = 0x00010000, -- 1.7.10.4

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[PATCH] prep: fix start address of PCI memory region
by Hervé Poussineau Sept. 13, 2013

Sept. 13, 2013

PCI devices having memory BARs are now accessed at the right address. This at least fixes the QEMU video card, which is now able to display the OpenBIOS prompt. Signed-off-by: Hervé Poussineau <hpoussin(a)reactos.org> --- arch/ppc/qemu/init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index f370514..cbed740 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -99,8 +99,8 @@ static const pci_arch_t known_arch[] = { .cfg_data = 0x80000cfc, .cfg_base = 0x80000000, .cfg_len = 0x00100000, - .host_pci_base = 0x0, - .pci_mem_base = 0xf0000000, + .host_mem_base = 0xc0000000, + .pci_mem_base = 0x100000, /* avoid VGA at 0xa0000 */ .mem_len = 0x10000000, .io_base = 0x80000000, .io_len = 0x00010000, -- 1.7.10.4

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[commit] r1228 - in trunk/openbios-devel: arch/ppc/qemu drivers
by repository service Sept. 2, 2013

Sept. 2, 2013

Author: afaerber Date: Tue Sep 3 01:36:45 2013 New Revision: 1228 URL: http://tracker.coreboot.org/trac/openbios/changeset/1228 Log: PPC: fix PReP PCI bus enumeration This patch corrects the PCI configuration and data IO port addresses, along with detection of the Raven PCI bridge. With this in place, we can now enumerate a PReP PCI bus. Reported-by: Hervé Poussineau <hpoussin(a)reactos.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> Tested-by: Hervé Poussineau <hpoussin(a)reactos.org> Signed-off-by: Andreas Färber <andreas.faerber(a)web.de> Modified: trunk/openbios-devel/arch/ppc/qemu/init.c trunk/openbios-devel/drivers/pci_database.c Modified: trunk/openbios-devel/arch/ppc/qemu/init.c ============================================================================== --- trunk/openbios-devel/arch/ppc/qemu/init.c Tue Sep 3 01:24:56 2013 (r1227) +++ trunk/openbios-devel/arch/ppc/qemu/init.c Tue Sep 3 01:36:45 2013 (r1228) @@ -95,8 +95,8 @@ .name = "PREP", .vendor_id = PCI_VENDOR_ID_MOTOROLA, .device_id = PCI_DEVICE_ID_MOTOROLA_RAVEN, - .cfg_addr = 0x80800000, - .cfg_data = 0x800c0000, + .cfg_addr = 0x80000cf8, + .cfg_data = 0x80000cfc, .cfg_base = 0x80000000, .cfg_len = 0x00100000, .host_pci_base = 0x0, Modified: trunk/openbios-devel/drivers/pci_database.c ============================================================================== --- trunk/openbios-devel/drivers/pci_database.c Tue Sep 3 01:24:56 2013 (r1227) +++ trunk/openbios-devel/drivers/pci_database.c Tue Sep 3 01:36:45 2013 (r1228) @@ -336,7 +336,7 @@ }, { PCI_VENDOR_ID_MOTOROLA, PCI_DEVICE_ID_MOTOROLA_RAVEN, NULL, - "pci-bridge", "PREP Host PCI Bridge - Motorola Raven", NULL, + "pci", "PREP Host PCI Bridge - Motorola Raven", NULL, 3, 2, 1, host_config_cb, NULL, },

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[commit] r1227 - trunk/openbios-devel/drivers
by repository service Sept. 2, 2013

Sept. 2, 2013

Author: afaerber Date: Tue Sep 3 01:24:56 2013 New Revision: 1227 URL: http://tracker.coreboot.org/trac/openbios/changeset/1227 Log: pci: Set config hook for Raven PCI host bridge Acked-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> Tested-by: Hervé Poussineau <hpoussin(a)reactos.org> Signed-off-by: Andreas Färber <andreas.faerber(a)web.de> Modified: trunk/openbios-devel/drivers/pci_database.c Modified: trunk/openbios-devel/drivers/pci_database.c ============================================================================== --- trunk/openbios-devel/drivers/pci_database.c Mon Sep 2 15:46:01 2013 (r1226) +++ trunk/openbios-devel/drivers/pci_database.c Tue Sep 3 01:24:56 2013 (r1227) @@ -338,7 +338,7 @@ PCI_VENDOR_ID_MOTOROLA, PCI_DEVICE_ID_MOTOROLA_RAVEN, NULL, "pci-bridge", "PREP Host PCI Bridge - Motorola Raven", NULL, 3, 2, 1, - NULL, NULL, + host_config_cb, NULL, }, { PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SABRE, NULL,

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[PATCH 1/2] PPC: Fix PCI configuration space address access
by Mark Cave-Ayland Sept. 2, 2013

Sept. 2, 2013

This patch corrects two long-standing bugs with PPC PCI configuration space access. Firstly fix the calculation of PCI configuration space addresses by the PCI_ADDR macro; this was incorrectly using arch->cfg_base which is the mapped address and has nothing to do with the PCI configuration space address. Instead just set bit 31 to initiate a configuration cycle as per the PCI specification. Secondly, fix pci_config_read32() and pci_config_write16() which were incorrectly adding the register offset to the PCI IO dataport address causing them to write into unknown address space for registers > 0. It appears that this only worked purely by coincidence with QEMU due to the way in which the configuration address was calculated for an oversized PCI configuration IO dataport MemoryRegion. Reported-by: Hervé Poussineau <hpoussin(a)reactos.org> CC: Hervé Poussineau <hpoussin(a)reactos.org> CC: Andreas Färber <afaerber(a)suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> --- openbios-devel/include/arch/ppc/pci.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/openbios-devel/include/arch/ppc/pci.h b/openbios-devel/include/arch/ppc/pci.h index cccefb1..d96bd7e 100644 --- a/openbios-devel/include/arch/ppc/pci.h +++ b/openbios-devel/include/arch/ppc/pci.h @@ -12,7 +12,7 @@ /* PCI Configuration Mechanism #1 */ #define PCI_ADDR(bus, dev, fn) \ - ((pci_addr) (arch->cfg_base \ + ((pci_addr) (0x80000000u \ | (uint32_t) (bus) << 16 \ | (uint32_t) (dev) << 11 \ | (uint32_t) (fn) << 8)) @@ -41,7 +41,7 @@ static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg) { uint32_t res; out_le32((unsigned *)arch->cfg_addr, dev | reg); - res = in_le32((unsigned *)(arch->cfg_data + reg)); + res = in_le32((unsigned *)(arch->cfg_data)); return res; } @@ -60,7 +60,7 @@ static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val) static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val) { out_le32((unsigned *)arch->cfg_addr, dev | reg); - out_le32((unsigned *)(arch->cfg_data + reg), val); + out_le32((unsigned *)(arch->cfg_data), val); } #else /* !PCI_CONFIG_1 */ #error PCI Configuration Mechanism is not specified or implemented -- 1.7.10.4

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[commit] r1226 - in trunk/openbios-devel: arch/ppc/qemu arch/sparc64 drivers include/drivers
by repository service Sept. 2, 2013

Sept. 2, 2013

Author: mcayland Date: Mon Sep 2 15:46:01 2013 New Revision: 1226 URL: http://tracker.coreboot.org/trac/openbios/changeset/1226 Log: PCI: switch calculation of host PCI memory base to use an offset Instead of using two different variables to track the absolute values of the PCI memory base and the host memory base, change the host memory base to be an offset which is added to the PCI memory base during conversion. As a consequence of this, the code in pci_bus_addr_to_host_addr() can be unified to be consistent across all architectures. Note that this commit also renames arch->host_mem_base to arch->host_pci_base in order to better describe its function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> Modified: trunk/openbios-devel/arch/ppc/qemu/init.c trunk/openbios-devel/arch/sparc64/openbios.c trunk/openbios-devel/drivers/pci.c trunk/openbios-devel/include/drivers/pci.h Modified: trunk/openbios-devel/arch/ppc/qemu/init.c ============================================================================== --- trunk/openbios-devel/arch/ppc/qemu/init.c Mon Sep 2 15:45:56 2013 (r1225) +++ trunk/openbios-devel/arch/ppc/qemu/init.c Mon Sep 2 15:46:01 2013 (r1226) @@ -99,7 +99,7 @@ .cfg_data = 0x800c0000, .cfg_base = 0x80000000, .cfg_len = 0x00100000, - .host_mem_base = 0xf0000000, + .host_pci_base = 0x0, .pci_mem_base = 0xf0000000, .mem_len = 0x10000000, .io_base = 0x80000000, @@ -116,7 +116,7 @@ .cfg_data = 0xf2c00000, .cfg_base = 0xf2000000, .cfg_len = 0x02000000, - .host_mem_base = 0x80000000, + .host_pci_base = 0x0, .pci_mem_base = 0x80000000, .mem_len = 0x10000000, .io_base = 0xf2000000, @@ -133,7 +133,7 @@ .cfg_data = 0xf0c00000, .cfg_base = 0xf0000000, .cfg_len = 0x02000000, - .host_mem_base = 0x80000000, + .host_pci_base = 0x0, .pci_mem_base = 0x80000000, .mem_len = 0x10000000, .io_base = 0xf2000000, @@ -150,7 +150,7 @@ .cfg_data = 0xfee00000, .cfg_base = 0x80000000, .cfg_len = 0x7f000000, - .host_mem_base = 0x80000000, + .host_pci_base = 0x0, .pci_mem_base = 0x80000000, .mem_len = 0x10000000, .io_base = 0xfe000000, Modified: trunk/openbios-devel/arch/sparc64/openbios.c ============================================================================== --- trunk/openbios-devel/arch/sparc64/openbios.c Mon Sep 2 15:45:56 2013 (r1225) +++ trunk/openbios-devel/arch/sparc64/openbios.c Mon Sep 2 15:46:01 2013 (r1226) @@ -59,7 +59,7 @@ .cfg_data = APB_MEM_BASE, // PCI bus memory space .cfg_base = APB_SPECIAL_BASE, .cfg_len = 0x2000000, - .host_mem_base = APB_MEM_BASE, + .host_pci_base = APB_MEM_BASE, .pci_mem_base = 0x100000, /* avoid VGA at 0xa0000 */ .mem_len = 0x10000000, .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space Modified: trunk/openbios-devel/drivers/pci.c ============================================================================== --- trunk/openbios-devel/drivers/pci.c Mon Sep 2 15:45:56 2013 (r1225) +++ trunk/openbios-devel/drivers/pci.c Mon Sep 2 15:46:01 2013 (r1226) @@ -143,11 +143,7 @@ static unsigned long pci_bus_addr_to_host_addr(uint32_t ba) { -#ifdef CONFIG_SPARC64 - return arch->cfg_data + (unsigned long)ba; -#else - return (unsigned long)ba; -#endif + return arch->host_pci_base + (unsigned long)ba; } static void @@ -525,11 +521,12 @@ ncells += host_encode_phys_addr(props + ncells, arch->rbase); ncells += pci_encode_size(props + ncells, arch->rlen); } - if (arch->host_mem_base) { + if (arch->pci_mem_base) { ncells += pci_encode_phys_addr(props + ncells, 0, MEMORY_SPACE_32, config->dev, 0, arch->pci_mem_base); - ncells += host_encode_phys_addr(props + ncells, arch->host_mem_base); - ncells += pci_encode_size(props + ncells, arch->mem_len); + ncells += host_encode_phys_addr(props + ncells, arch->host_pci_base + + arch->pci_mem_base); + ncells += pci_encode_size(props + ncells, arch->mem_len); } set_property(dev, "ranges", (char *)props, ncells * sizeof(props[0])); } Modified: trunk/openbios-devel/include/drivers/pci.h ============================================================================== --- trunk/openbios-devel/include/drivers/pci.h Mon Sep 2 15:45:56 2013 (r1225) +++ trunk/openbios-devel/include/drivers/pci.h Mon Sep 2 15:46:01 2013 (r1226) @@ -13,7 +13,7 @@ unsigned long cfg_data; unsigned long cfg_base; unsigned long cfg_len; - unsigned long host_mem_base; /* in host memory space */ + unsigned long host_pci_base; /* offset of PCI memory space within host memory space */ unsigned long pci_mem_base; /* in PCI memory space */ unsigned long mem_len; unsigned long io_base;

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[commit] r1225 - trunk/openbios-devel/include/arch/ppc
by repository service Sept. 2, 2013

Sept. 2, 2013

Author: mcayland Date: Mon Sep 2 15:45:56 2013 New Revision: 1225 URL: http://tracker.coreboot.org/trac/openbios/changeset/1225 Log: PPC: Fix PCI configuration space address access This patch corrects two long-standing bugs with PPC PCI configuration space access. Firstly fix the calculation of PCI configuration space addresses by the PCI_ADDR macro; this was incorrectly using arch->cfg_base which is the mapped address and has nothing to do with the PCI configuration space address. Instead just set bit 31 to initiate a configuration cycle as per the PCI specification. Secondly, fix pci_config_read32() and pci_config_write32() which were incorrectly adding the register offset to the PCI IO dataport address causing them to write into unknown address space for registers > 0. It appears that this only worked purely by coincidence with QEMU due to the way in which the configuration address was calculated for an oversized PCI configuration IO dataport MemoryRegion. Reported-by: Hervé Poussineau <hpoussin(a)reactos.org> CC: Hervé Poussineau <hpoussin(a)reactos.org> CC: Andreas Färber <afaerber(a)suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland(a)ilande.co.uk> Modified: trunk/openbios-devel/include/arch/ppc/pci.h Modified: trunk/openbios-devel/include/arch/ppc/pci.h ============================================================================== --- trunk/openbios-devel/include/arch/ppc/pci.h Sat Aug 24 22:00:36 2013 (r1224) +++ trunk/openbios-devel/include/arch/ppc/pci.h Mon Sep 2 15:45:56 2013 (r1225) @@ -12,7 +12,7 @@ /* PCI Configuration Mechanism #1 */ #define PCI_ADDR(bus, dev, fn) \ - ((pci_addr) (arch->cfg_base \ + ((pci_addr) (0x80000000u \ | (uint32_t) (bus) << 16 \ | (uint32_t) (dev) << 11 \ | (uint32_t) (fn) << 8)) @@ -41,7 +41,7 @@ { uint32_t res; out_le32((unsigned *)arch->cfg_addr, dev | reg); - res = in_le32((unsigned *)(arch->cfg_data + reg)); + res = in_le32((unsigned *)(arch->cfg_data)); return res; } @@ -60,7 +60,7 @@ static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val) { out_le32((unsigned *)arch->cfg_addr, dev | reg); - out_le32((unsigned *)(arch->cfg_data + reg), val); + out_le32((unsigned *)(arch->cfg_data), val); } #else /* !PCI_CONFIG_1 */ #error PCI Configuration Mechanism is not specified or implemented

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