OpenBIOS April 2007

openbios@openbios.org

9 participants
56 discussions

r326 - cpu/x86/pc/olpc
by svn＠openbios.org 26 Apr '07

26 Apr '07

Author: wmb Date: 2007-04-26 04:59:13 +0200 (Thu, 26 Apr 2007) New Revision: 326 Modified: cpu/x86/pc/olpc/versions.fth Log: Q2C08j Modified: cpu/x86/pc/olpc/versions.fth =================================================================== --- cpu/x86/pc/olpc/versions.fth 2007-04-26 02:58:50 UTC (rev 325) +++ cpu/x86/pc/olpc/versions.fth 2007-04-26 02:59:13 UTC (rev 326) @@ -2,7 +2,7 @@ \ The overall firmware revision macro: FW_MAJOR C -macro: FW_MINOR 08i +macro: FW_MINOR 08j \ The EC microcode macro: EC_VERSION c03

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r325 - dev/geode/display
by svn＠openbios.org 26 Apr '07

26 Apr '07

Author: wmb Date: 2007-04-26 04:58:50 +0200 (Thu, 26 Apr 2007) New Revision: 325 Modified: dev/geode/display/gxfb.fth Log: OLPC suspend - Wait a frame time after disabling the display controller to ensure that it is quiet before suspending. Modified: dev/geode/display/gxfb.fth =================================================================== --- dev/geode/display/gxfb.fth 2007-04-26 02:58:02 UTC (rev 324) +++ dev/geode/display/gxfb.fth 2007-04-26 02:58:50 UTC (rev 325) @@ -345,6 +345,7 @@ unlock 0 4 dc! \ Turn off video memory access + d# 25 ms \ Wait for a frame time to make sure the display is quiet ; : video-restore

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r324 - cpu/x86/pc/olpc
by svn＠openbios.org 26 Apr '07

26 Apr '07

Author: wmb Date: 2007-04-26 04:58:02 +0200 (Thu, 26 Apr 2007) New Revision: 324 Modified: cpu/x86/pc/olpc/gpioinit.fth cpu/x86/pc/olpc/resume.bth Log: OLPC - Turn of internal pullup on THRM_ALARM# to prevent leakage during suspend. Modified: cpu/x86/pc/olpc/gpioinit.fth =================================================================== --- cpu/x86/pc/olpc/gpioinit.fth 2007-04-25 07:27:37 UTC (rev 323) +++ cpu/x86/pc/olpc/gpioinit.fth 2007-04-26 02:58:02 UTC (rev 324) @@ -7,11 +7,11 @@ h# c100 h# 1010 pl! \ GPIOL_OUT_AUX1_SELECT - SMBDAT, SMBCLK, UART1TX \ h# ffff0000 h# 1014 pl! \ GPIOL_OUT_AUX2_SELECT - default \ h# 1001effe h# 1018 pl! \ GPIOL_PULLUP_ENABLE - I don't think we need pullups - h# 397a0000 h# 1018 pl! \ GPIOL_PULLUP_ENABLE - Disable pullups on SMI#, DCONBLNK/LOAD/STAT UART1TX, VGA, MICDC + h# 3d7a0000 h# 1018 pl! \ GPIOL_PULLUP_ENABLE - Disable pullups on SMI#, DCONBLNK/LOAD/STAT, THRM_ALARM, UART1TX, VGA, MICDC \ h# efff1000 h# 101c pl! \ GPIOL_PULLDOWN_ENABLE - default h# ffff0000 h# 101c pl! \ GPIOL_PULLDOWN_ENABLE - Disable all pull-downs - h# d6e5 h# 1020 pl! \ GPIOL_INPUT_ENABLE - DCONBLNK, DCONLOAD, THERM_ALRM, DCONIRQ, DCONSTAT1/0, MEMSIZE, PCI_INTA - h# 0081 h# 1024 pl! \ GPIOL_INPUT_INVERT_ENABLE - Invert DCONIRQ and PCI_INTA# + h# d6e5 h# 1020 pl! \ GPIOL_INPUT_ENABLE - DCONBLNK, DCONLOAD, THRM_ALARM, DCONIRQ, DCONSTAT1/0, MEMSIZE, PCI_INTA + h# 0481 h# 1024 pl! \ GPIOL_INPUT_INVERT_ENABLE - Invert THRM_ALARM, DCONIRQ and PCI_INTA# \ h# ffff0000 h# 1028 pl! \ GPIOL_IN_FILTER_ENABLE - default \ h# ffff0000 h# 102c pl! \ GPIOL_IN_EVENTCOUNT_ENABLE - default \ h# 2d9bd264 h# 1030 pl! \ GPIOL_READ_BACK Modified: cpu/x86/pc/olpc/resume.bth =================================================================== --- cpu/x86/pc/olpc/resume.bth 2007-04-25 07:27:37 UTC (rev 323) +++ cpu/x86/pc/olpc/resume.bth 2007-04-26 02:58:02 UTC (rev 324) @@ -141,6 +141,10 @@ gpio-port h# c4 + # dx mov dx ax in ax stos \ Neg edge enable gpio-port h# bc + # dx mov dx ax in ax stos \ High bank lock + \ Switch the THRM_ALARM# pin to GPIO during suspend, so it doesn't trigger falsely. + \ THRM_ALARM# is in the standby power well + h# 0400.0000 # ax mov gpio-port h# 34 + # dx mov ax dx out \ GPIO, not THRM_ALARM# + [ifdef] save-display \ \ h# 3c 0 do i gp@ l!+ 4 +loop h# 4c gp@ l!+ \ h# f # cx mov gp-pa set-base begin 0 [bx] ax mov ax stos 4 # bx add loopa

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r130 - openbios-devel/drivers
by svn＠openbios.org 25 Apr '07

25 Apr '07

Author: blueswirl Date: 2007-04-25 21:57:23 +0200 (Wed, 25 Apr 2007) New Revision: 130 Modified: openbios-devel/drivers/obio.c Log: CPU specific properties Modified: openbios-devel/drivers/obio.c =================================================================== --- openbios-devel/drivers/obio.c 2007-04-24 20:00:02 UTC (rev 129) +++ openbios-devel/drivers/obio.c 2007-04-25 19:57:23 UTC (rev 130) @@ -306,23 +306,141 @@ return NVRAM_SIZE; } +static void mb86904_init(void) +{ + PUSH(32); + fword("encode-int"); + push_str("cache-line-size"); + fword("property"); + + PUSH(512); + fword("encode-int"); + push_str("cache-nlines"); + fword("property"); + + PUSH(0x23); + fword("encode-int"); + push_str("mask_rev"); + fword("property"); +} + +static void tms390z55_init(void) +{ + push_str(""); + fword("encode-string"); + push_str("ecache-parity?"); + fword("property"); + + push_str(""); + fword("encode-string"); + push_str("bfill?"); + fword("property"); + + push_str(""); + fword("encode-string"); + push_str("bcopy?"); + fword("property"); + + push_str(""); + fword("encode-string"); + push_str("cache-physical?"); + fword("property"); + + PUSH(0xf); + fword("encode-int"); + PUSH(0xf8fffffc); + fword("encode-int"); + fword("encode+"); + PUSH(4); + fword("encode-int"); + fword("encode+"); + + PUSH(0xf); + fword("encode-int"); + fword("encode+"); + PUSH(0xf8c00000); + fword("encode-int"); + fword("encode+"); + PUSH(0x1000); + fword("encode-int"); + fword("encode+"); + + PUSH(0xf); + fword("encode-int"); + fword("encode+"); + PUSH(0xf8000000); + fword("encode-int"); + fword("encode+"); + PUSH(0x1000); + fword("encode-int"); + fword("encode+"); + + PUSH(0xf); + fword("encode-int"); + fword("encode+"); + PUSH(0xf8800000); + fword("encode-int"); + fword("encode+"); + PUSH(0x1000); + fword("encode-int"); + fword("encode+"); + push_str("reg"); + fword("property"); +} + struct cpudef { - const unsigned char *name; unsigned long iu_version; + const char *name; + int psr_impl, psr_vers, impl, vers; + int dcache_line_size, dcache_lines, dcache_assoc; + int icache_line_size, icache_lines, icache_assoc; + int ecache_line_size, ecache_lines, ecache_assoc; + int mmu_nctx; + void (*initfn)(void); }; static const struct cpudef sparc_defs[] = { { + .iu_version = 0x04 << 24, /* Impl 0, ver 4 */ .name = "FMI,MB86904", - .iu_version = 0x04 << 24, /* Impl 0, ver 4 */ + .psr_impl = 0, + .psr_vers = 5, + .impl = 0, + .vers = 5, + .dcache_line_size = 0x20, + .dcache_lines = 0x200, + .dcache_assoc = 1, + .icache_line_size = 0x20, + .icache_lines = 0x200, + .icache_assoc = 1, + .ecache_line_size = 0x20, + .ecache_lines = 0x4000, + .ecache_assoc = 1, + .mmu_nctx = 0x100, + .initfn = mb86904_init, }, { + .iu_version = 0x40000000, .name = "TI,TMS390Z55", - .iu_version = 0x40000000, + .psr_impl = 4, + .psr_vers = 0, + .impl = 0, + .vers = 4, + .dcache_line_size = 0x20, + .dcache_lines = 0x80, + .dcache_assoc = 4, + .icache_line_size = 0x40, + .icache_lines = 0x40, + .icache_assoc = 5, + .ecache_line_size = 0x20, + .ecache_lines = 0x8000, + .ecache_assoc = 1, + .mmu_nctx = 0x10000, + .initfn = tms390z55_init, }, }; -static const char * +static const struct cpudef * id_cpu(void) { unsigned long iu_version; @@ -334,9 +452,10 @@ for (i = 0; i < sizeof(sparc_defs)/sizeof(struct cpudef); i++) { if (iu_version == sparc_defs[i].iu_version) - return sparc_defs[i].name; + return &sparc_defs[i]; } - return "CPU,Unknown"; + printk("Unknown cpu (psr %lx), freezing!\n", iu_version); + for (;;); } static void @@ -351,11 +470,12 @@ extern const char *obp_stdin_path, *obp_stdout_path; extern uint16_t graphic_depth; - const char *stdin, *stdout, *cpuname; + const char *stdin, *stdout; unsigned int i; char nographic; uint32_t size; unsigned int machine_id; + struct cpudef *cpu; ob_new_obio_device("eeprom", NULL); @@ -445,36 +565,31 @@ fword("new-device"); - cpuname = id_cpu(); - push_str(cpuname); + cpu = id_cpu(); + push_str(cpu->name); fword("device-name"); push_str("cpu"); fword("device-type"); - PUSH(0); + PUSH(cpu->psr_impl); fword("encode-int"); - push_str("implementation"); + push_str("psr-implementation"); fword("property"); - PUSH(4); + PUSH(cpu->psr_vers); fword("encode-int"); - push_str("version"); + push_str("psr-version"); fword("property"); - push_str(""); - fword("encode-string"); - push_str("cache-physical?"); - fword("property"); - - PUSH(32); + PUSH(cpu->impl); fword("encode-int"); - push_str("cache-line-size"); + push_str("implementation"); fword("property"); - PUSH(512); + PUSH(cpu->vers); fword("encode-int"); - push_str("cache-nlines"); + push_str("version"); fword("property"); PUSH(4096); @@ -482,48 +597,47 @@ push_str("page-size"); fword("property"); - PUSH(16); + PUSH(cpu->dcache_line_size); fword("encode-int"); push_str("dcache-line-size"); fword("property"); - PUSH(512); + PUSH(cpu->dcache_lines); fword("encode-int"); push_str("dcache-nlines"); fword("property"); - PUSH(1); + PUSH(cpu->dcache_assoc); fword("encode-int"); push_str("dcache-associativity"); fword("property"); - PUSH(16); + PUSH(cpu->icache_line_size); fword("encode-int"); push_str("icache-line-size"); fword("property"); - PUSH(512); + PUSH(cpu->icache_lines); fword("encode-int"); push_str("icache-nlines"); fword("property"); - PUSH(1); + PUSH(cpu->icache_assoc); fword("encode-int"); push_str("icache-associativity"); fword("property"); - - PUSH(0x20); + PUSH(cpu->ecache_line_size); fword("encode-int"); push_str("ecache-line-size"); fword("property"); - PUSH(0x4000); + PUSH(cpu->ecache_lines); fword("encode-int"); push_str("ecache-nlines"); fword("property"); - PUSH(1); + PUSH(cpu->ecache_assoc); fword("encode-int"); push_str("ecache-associativity"); fword("property"); @@ -533,7 +647,7 @@ push_str("ncaches"); fword("property"); - PUSH(4096); + PUSH(cpu->mmu_nctx); fword("encode-int"); push_str("mmu-nctx"); fword("property"); @@ -543,18 +657,18 @@ push_str("sparc-version"); fword("property"); - PUSH(37); - fword("encode-int"); - push_str("mask_rev"); + push_str(""); + fword("encode-string"); + push_str("cache-coherence?"); fword("property"); PUSH(i); fword("encode-int"); push_str("mid"); fword("property"); + + cpu->initfn(); - - fword("finish-device"); }

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pgmap
by Blue Swirl 25 Apr '07

25 Apr '07

Hi, This patch adds pgmap@ and pgmap! functions that NetBSD loader needs. But the functions are only available at /iommu node. How can I make them global? 0 > 0 pgmap@ pgmap@: undefined word. 0 > cd /iommu ok 0 > words pgmap! pgmap@ decode-unit encode-unit close open ok 0 > .properties name "iommu" #address-cells 2 #size-cells 1 page-size 1000 cache-coherence? 0 address ffdae000 reg -- c : 0 0 0 0 10 0 0 0 0 0 3 0 ok 0 > ffdae000 pgmap@ . 100007e ok

1 0

Fixing interpose
by Blue Swirl 25 Apr '07

25 Apr '07

On 4/24/07, Stefan Reinauer <stepan(a)coresystems.de> wrote: > Copying list again... > > * Blue Swirl <blauwirbel(a)gmail.com> [070424 20:49]: > > Copyright (c) 1982, 1986, 1989, 1991, 1993 > > The Regents of the University of California. All rights reserved. > > Copyright (c) 1995-2006 OpenBSD. All rights reserved. http://www.OpenBSD.org > > > > OpenBSD 4.0 (RAMDISK) #297: Sun Sep 17 22:27:36 MDT 2006 > > deraadt@sparc.openbsd.org:/usr/src/sys/arch/sparc/compile/RAMDISK > > real mem = 133505024 > > avail mem = 117956608 > [..] > > zs0 at obio0 addr 0x71100000 pri 12, softpri 6 > > zstty0 at zs0 channel 0 (console i/o) > > zstty1 at zs0 channel 1 > > Is openbsd hanging here? Yes, nothing happens after that. > NetBSD: > > > obp_fortheval_v2(384000 pgmap@ 387d8c L!) > > : pgmap@ ( virt -- pmentry ) > \ Return the page map entry for the virtual address. > ; > > Not sure - can we just use an empty word here, as we use a 1:1 mapping? > > > : pgmap! ( pmentry virt -- ) > \ Store a new page map entry for the virtual address. > 2drop > ; > > Those words are defined in > http://openbios.org/viewvc/obp/cpu/sparc/ultra/mmu.fth?view=markup&revision… > > My sparc know how is pretty limited though ;-) > > > > pgmap@:obp_devclose(0xffd87f0c) = -19 > > Cannot load netbsd: error=27 Nice, assembler with Forth order. Looks like the returned value is a page table entry, not an address. This needs a real implementation.

2 2

r323 - cpu/x86/pc/olpc
by svn＠openbios.org 25 Apr '07

25 Apr '07

Author: wmb Date: 2007-04-25 09:27:37 +0200 (Wed, 25 Apr 2007) New Revision: 323 Modified: cpu/x86/pc/olpc/versions.fth Log: Test version q2c08i Modified: cpu/x86/pc/olpc/versions.fth =================================================================== --- cpu/x86/pc/olpc/versions.fth 2007-04-25 07:26:54 UTC (rev 322) +++ cpu/x86/pc/olpc/versions.fth 2007-04-25 07:27:37 UTC (rev 323) @@ -2,7 +2,7 @@ \ The overall firmware revision macro: FW_MAJOR C -macro: FW_MINOR 08 +macro: FW_MINOR 08i \ The EC microcode macro: EC_VERSION c03

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r322 - dev/olpc/cafecamera
by svn＠openbios.org 25 Apr '07

25 Apr '07

Author: wmb Date: 2007-04-25 09:26:54 +0200 (Wed, 25 Apr 2007) New Revision: 322 Modified: dev/olpc/cafecamera/cafecamera.fth Log: OLPC CaFe camera driver - added workaround for trac ticket #1360, and some diagnostics to help catch the problem. Modified: dev/olpc/cafecamera/cafecamera.fth =================================================================== --- dev/olpc/cafecamera/cafecamera.fth 2007-04-25 07:18:07 UTC (rev 321) +++ dev/olpc/cafecamera/cafecamera.fth 2007-04-25 07:26:54 UTC (rev 322) @@ -27,10 +27,6 @@ : cl! ( l adr -- ) chip + rl! ; : cl@ ( adr -- l ) chip + rl@ ; -: cw! ( w adr -- ) chip + rw! ; -: cw@ ( adr -- w ) chip + rw@ ; -: cb! ( b adr -- ) chip + rb! ; -: cb@ ( adr -- b ) chip + rb@ ; : map-regs ( -- ) 0 0 h# 0200.0010 my-space + /regs " map-in" $call-parent to chip @@ -73,12 +69,22 @@ bc cl@ drop ; +: ovc ( val adr -- ) + 2dup ov@ ( val reg# val actual ) + tuck <> if ( val reg# actual ) + ." Bad camera I2C value at " swap 2 u.r ( val actual ) + ." expected " swap 2 u.r ." got " 2 u.r cr ( ) + else ( val reg# actual ) + 3drop ( ) + then ( ) +; + \ ============================= camera operations ============================= false value ov7670-detected? : ((camera-init) ( -- ) - 80 12 ov! \ reset + 80 12 ov! \ reset (reads back different) 01 11 ov! \ 30 fps 04 3a ov! \ UYVY or VYUY 00 12 ov! \ VGA @@ -89,7 +95,7 @@ b6 32 ov! \ HREF pieces 0a 19 ov! \ Vert start high bits 7a 1a ov! \ Vert stop high bits - 0a 0a ov! \ GAIN, VSTART, VSTOP pieces + 0a 03 ov! \ GAIN, VSTART, VSTOP pieces \ Mystery scaling numbers 00 0c ov! \ Control 3 @@ -153,7 +159,7 @@ 00 3f ov! \ Edge enhancement factor 05 75 ov! e1 76 ov! 00 4c ov! 01 77 ov! c3 3d ov! \ Control 13 - 09 4b ov! 60 c9 ov! + 09 4b ov! 60 c9 ov! \ Reads back differently 38 41 ov! \ Control 16 40 56 ov! @@ -176,8 +182,99 @@ 03 79 ov! 40 c8 ov! 05 79 ov! 30 c8 ov! 26 79 ov! + + \ OVT says that rewrite this works around a bug in 565 mode. + \ The symptom of the bug is red and green speckles in the image. + 01 11 ov! \ 30 fps def 80 ; +: config-check ( -- ) + 01 11 ovc \ 30 fps + 04 3a ovc \ UYVY or VYUY + ( 00 12 ovc ) \ VGA + + \ Hardware window + 13 17 ovc \ Horiz start high bits + 01 18 ovc \ Horiz stop high bits + b6 32 ovc \ HREF pieces + ( 0a 19 ovc ) \ Vert start high bits + 7a 1a ovc \ Vert stop high bits + 0a 03 ovc \ GAIN, VSTART, VSTOP pieces + + \ Mystery scaling numbers + 00 0c ovc \ Control 3 + 00 3e ovc \ Control 14 + 3a 70 ovc 35 71 ovc 11 72 ovc f0 73 ovc + 02 a2 ovc + 00 15 ovc \ Control 10 + + \ Gamma curve values + 20 7a ovc 10 7b ovc 1e 7c ovc 35 7d ovc + 5a 7e ovc 69 7f ovc 76 80 ovc 80 81 ovc + 88 82 ovc 8f 83 ovc 96 84 ovc a3 85 ovc + af 86 ovc c4 87 ovc d7 88 ovc e8 89 ovc + + \ AGC and AEC parameters + ( e0 13 ovc ) \ Control 8 + ( 00 00 ovc ) \ Gain lower 8 bits + 40 0d ovc \ Control 4 magic reserved bit + ( 18 14 ovc ) \ Control 9: 4x gain + magic reserved bit + 05 a5 ovc \ 50hz banding step limit + 07 ab ovc \ 60hz banding step limit + ( 95 24 ovc ) \ AGC upper limit + 33 25 ovc \ AGC lower limit + e3 24 ovc \ AGC/AEC fast mode op region + 78 9f ovc \ Hist AEC/AGC control 1 + 68 a0 ovc \ Hist AEC/AGC control 2 + 03 a1 ovc \ Magic + d8 a6 ovc \ Hist AEC/AGC control 3 + d8 a7 ovc \ Hist AEC/AGC control 4 + f0 a8 ovc \ Hist AEC/AGC control 5 + 90 a9 ovc \ Hist AEC/AGC control 6 + 94 aa ovc \ Hist AEC/AGC control 7 + ( e5 13 ovc ) \ Control 8 + + \ Mostly magic + 61 0e ovc 4b 0f ovc 02 16 ovc 07 1e ovc + 02 21 ovc 91 22 ovc 07 29 ovc 0b 33 ovc + 0b 35 ovc 1d 37 ovc 71 38 ovc 2a 39 ovc + 78 3c ovc 40 4d ovc 20 4e ovc 00 69 ovc + 4a 6b ovc 10 74 ovc 4f 8d ovc 00 8e ovc + 00 8f ovc 00 90 ovc 00 91 ovc 00 96 ovc + ( 00 9a ovc ) 84 b0 ovc 0c b1 ovc 0e b2 ovc + 82 b3 ovc 0a b8 ovc + + \ More magic, some of which tweaks white balance + 0a 43 ovc f0 44 ovc 34 45 ovc 58 46 ovc + 28 47 ovc 3a 48 ovc 88 59 ovc 88 5a ovc + 44 5b ovc 67 5c ovc 49 5d ovc 0e 5e ovc + 0a 6c ovc 55 6d ovc 11 6e ovc + 9f 6f ovc \ 9e for advance AWB + ( 40 6a ovc ) + ( 40 01 ovc ) \ Blue gain + ( 60 02 ovc ) \ Red gain + e7 13 ovc \ Control 8 + + \ Matrix coefficients + b3 4f ovc b3 50 ovc 00 51 ovc 3d 52 ovc + a7 53 ovc e4 54 ovc 9e 58 ovc + + \ 08 41 ovc \ AWB gain enable + ( 00 3f ovc ) \ Edge enhancement factor + 05 75 ovc e1 76 ovc ( 00 4c ovc ) 01 77 ovc + c0 3d ovc \ Control 13 + 09 4b ovc ( 60 c9 ovc ) + 38 41 ovc \ Control 16 + 40 56 ovc + + 11 34 ovc + 12 3b ovc \ Control 11 + 88 a4 ovc 00 96 ovc 30 97 ovc 20 98 ovc + 30 99 ovc 84 9a ovc 29 9b ovc 03 9c ovc + 5c 9d ovc 3f 9e ovc 04 78 ovc + +; + : camera-init ( -- ) false to ov7670-detected? ((camera-init) @@ -424,6 +521,32 @@ close ( error? ) ; +: dump-regs ( run# -- ) + 0 d# 16 " at-xy" eval + ." Pass " .d + key upc h# 47 = if ." Good" else ." Bad" then cr \ 47 is G + + ." 0 1 2 3 4 5 6 7 8 9 a b c d e f" cr + ." -----------------------------------------------" cr + h# ca 0 do + i 2 u.r ." : " + i h# 10 bounds do + i h# ca < if i ov@ 3 u.r then + loop + cr + h# 10 +loop +; + +: xselftest ( -- error? ) + open 0= if true exit then + h# 10 0 do + shoot-still drop d# 500 ms camera-config config-check + i dump-regs + loop + 0 close ( error? ) +; + + \ LICENSE_BEGIN \ Copyright (c) 2006 FirmWorks \

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r321 - cpu/x86/pc/olpc
by svn＠openbios.org 25 Apr '07

25 Apr '07

Author: wmb Date: 2007-04-25 09:18:07 +0200 (Wed, 25 Apr 2007) New Revision: 321 Modified: cpu/x86/pc/olpc/fw.bth cpu/x86/pc/olpc/rmstart.fth cpu/x86/pc/olpc/romreset.bth Log: OLPC memory init: a) Added workaround for LX errata 34 b) Changed LX memory timings according to calculations by John Watlington and Tom Sylla c) Added a facility to temporarily test new timings by setting values in CMOS RAM. Modified: cpu/x86/pc/olpc/fw.bth =================================================================== --- cpu/x86/pc/olpc/fw.bth 2007-04-25 07:07:59 UTC (rev 320) +++ cpu/x86/pc/olpc/fw.bth 2007-04-25 07:18:07 UTC (rev 321) @@ -453,6 +453,12 @@ [then] ; +: set-mc ( 19-val 1a-val -- ) + lbsplit h# 66 h# 69 do i cmos! -1 +loop + lbsplit h# 62 h# 65 do i cmos! -1 +loop + 1 h# 61 cmos! 1 h# 60 cmos! +; + : interpreter-init ( -- ) hex warning on Modified: cpu/x86/pc/olpc/rmstart.fth =================================================================== --- cpu/x86/pc/olpc/rmstart.fth 2007-04-25 07:07:59 UTC (rev 320) +++ cpu/x86/pc/olpc/rmstart.fth 2007-04-25 07:18:07 UTC (rev 321) @@ -139,12 +139,20 @@ h# 0017 # cx mov rdmsr \ Read CHIP_REVID h# 0014 # cx mov \ Restore RSTPLL MSR number h# 30 # al cmp >= if \ LX CPU - rdmsr \ Get base MSR value with divisors - op: h# 04de.0000 # ax or \ Set the startup time (de) and breadcrumb (4) - op: h# 0000.03d9 # dx mov \ PLL value for 133 MB clk, 433 CPU -\ op: h# 0000.04d9 # dx mov \ PLL value for 167 MB clk, 433 CPU + h# 60 # al mov al h# 70 # out h# 71 # al in \ Read CMOS 0x60 + al al test 0= if + rdmsr \ Get base MSR value with divisors + op: h# 04de.0000 # ax or \ Set the startup time (de) and breadcrumb (4) + op: h# 0000.04d9 # dx mov \ PLL value for 133 MB clk, 433 CPU + else + al dec al h# 71 # out \ Decrement safety counter + rdmsr \ Get base MSR value with divisors + op: h# 04de.0000 # ax or \ Set the startup time (de) and breadcrumb (4) + op: h# 0000.04d9 # dx mov \ PLL value for 167 MB clk, 433 CPU + then wrmsr \ Put in the base value op: h# 0000.1800 invert # ax and \ Turn off the BYPASS bits + else \ GX CPU op: dx dx xor \ Clear high bits op: h# 04de.0000 # ax mov \ Low MSR bits Modified: cpu/x86/pc/olpc/romreset.bth =================================================================== --- cpu/x86/pc/olpc/romreset.bth 2007-04-25 07:07:59 UTC (rev 320) +++ cpu/x86/pc/olpc/romreset.bth 2007-04-25 07:18:07 UTC (rev 321) @@ -137,20 +137,53 @@ 00000106.83104104. 00001983 set-msr \ Memory delay values 00000000.00000001. 00001980 set-msr \ Enable memory delays - 18000100.3b8332a3. 20000019 set-msr + h# 61 # al mov al h# 70 # out h# 71 # al in \ Read CMOS 0x61 + al al test 0= if + 18000100.6a7332a0. 20000019 set-msr - \ The RAM controller is now set up + \ The RAM controller is now set up - \ Init the SDRAMs - \ sdram_enable,src/northbridge/amd/gx2/raminit.c + \ Init the SDRAMs + \ sdram_enable,src/northbridge/amd/gx2/raminit.c - \ Clock gating for PMode - \ Clocks always on in mode 1, hardware gating in mode 0 -\ 20002004 rmsr 4 bitclr 1 bitset 20002004 wmsr \ GX p 199 - 1. 20002004 set-msr \ GX p 199 + \ Clock gating for PMode + \ Clocks always on in mode 1, hardware gating in mode 0 + \ 20002004 rmsr 4 bitclr 1 bitset 20002004 wmsr \ GX p 199 + 1. 20002004 set-msr \ GX p 199 - \ Delay on exit from power mode 1, use unbuffered RAM - 140dd101. 2000001a set-msr \ MC_CF1017_DATA LX p 231 + \ Delay on exit from power mode 1, use unbuffered RAM + 130cd801. 2000001a set-msr \ MC_CF1017_DATA LX p 231 + else + al dec al h# 71 # out \ Decrement safety counter + + h# 64 # al mov al h# 70 # out h# 71 # al in al bl mov + h# 65 # al mov al h# 70 # out h# 71 # al in al bh mov + d# 16 # bx shl + h# 62 # al mov al h# 70 # out h# 71 # al in al bl mov + h# 63 # al mov al h# 70 # out h# 71 # al in al bh mov + + h# 18000100 # dx mov bx ax mov h# 20000019 wmsr + + \ The RAM controller is now set up + + \ Init the SDRAMs + \ sdram_enable,src/northbridge/amd/gx2/raminit.c + + \ Clock gating for PMode + \ Clocks always on in mode 1, hardware gating in mode 0 + \ 20002004 rmsr 4 bitclr 1 bitset 20002004 wmsr \ GX p 199 + 1. 20002004 set-msr \ GX p 199 + + \ Delay on exit from power mode 1, use unbuffered RAM + h# 68 # al mov al h# 70 # out h# 71 # al in al bl mov + h# 69 # al mov al h# 70 # out h# 71 # al in al bh mov + d# 16 # bx shl + h# 66 # al mov al h# 70 # out h# 71 # al in al bl mov + h# 67 # al mov al h# 70 # out h# 71 # al in al bh mov + + dx dx xor bx ax mov 2000001a wmsr \ MC_CF1017_DATA LX p 231 + then + 00000200.00000000. 20000020 set-msr \ Power mode entry and exit delays \ Unmask CKE1 and CKE0 @@ -292,6 +325,15 @@ fload ${BP}/cpu/x86/pc/olpc/draminit.fth + \ Last-minute check for LX erratum 34 - reset if the DLL didn't start correctly + h# 4c000017 rmsr h# 10 bitand 0<> if \ LX branch + h# 4c00000f rmsr h# 7ff bitclr h# 4 bitset h# 4c00000f wmsr \ Set DLL_OV + h# 4c00000f rmsr h# 7ff # ax and h# 104 # ax cmp = if \ Check the result + \ The value 104 indicates that the DLL did not start, so we must reset + 1. 5140.0017 set-msr + then + then + \ Now we can use the stack and do conventional subroutine calls h# 1f # al mov al h# 80 # out

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r320 - cpu/x86/pc/olpc
by svn＠openbios.org 25 Apr '07

25 Apr '07

Author: wmb Date: 2007-04-25 09:07:59 +0200 (Wed, 25 Apr 2007) New Revision: 320 Modified: cpu/x86/pc/olpc/draminit.fth cpu/x86/pc/olpc/resume.bth Log: OLPC suspend/resume - use PM register 0x30 as a breadcrumb register for resume, instead of looking at bit one of PM+0x54. This is needed because of LX errata 34, which sometimes requires an extra reset to init the memory DLL. Modified: cpu/x86/pc/olpc/draminit.fth =================================================================== --- cpu/x86/pc/olpc/draminit.fth 2007-04-25 07:01:05 UTC (rev 319) +++ cpu/x86/pc/olpc/draminit.fth 2007-04-25 07:07:59 UTC (rev 320) @@ -51,8 +51,12 @@ 0000f001.00001400. 5140000f set-msr \ PMS BAR \ It is tempting to test bit 0 of PM register 5c, but a 5536 erratum - \ prevents that bit from working. - 1454 port-rl 2 bitand 0<> if \ Wakeup event flag + \ prevents that bit from working. Bit 1 works, but LX errata 34 + \ sometimes requires that we reset the system to fix the memory DLL, + \ which destroys all the bits of PM register 5c. So we put a breadcrumb + \ in a PM register that we don't otherwise use. + 1430 port-rl h# 9999 # ax cmp = if \ Wakeup event flag + 0 1430 port-wl h# 1b # al mov al h# 80 # out char r 3f8 port-wb begin 3fd port-rb 40 bitand 0<> until resume-entry # sp mov sp jmp Modified: cpu/x86/pc/olpc/resume.bth =================================================================== --- cpu/x86/pc/olpc/resume.bth 2007-04-25 07:01:05 UTC (rev 319) +++ cpu/x86/pc/olpc/resume.bth 2007-04-25 07:07:59 UTC (rev 320) @@ -258,6 +258,7 @@ \ This is pointless because register 14 is in the working power domain \ and does not retain the value across the suspend \ h# 4000.4601 h# 1414 port-wl \ Release SUSP# 5 mS after wakeup + h# 0000.9999 h# 1430 port-wl \ Breadcrumb indicating sleep h# 4000.0001 h# 1434 port-wl \ Turn on WORK_AUX (== MAIN_ON) at 32 uS h# 4000.0080 h# 1438 port-wl \ RESET_OUT# deassert at 4 mS h# 0002.ffff h# 1454 port-wl \ Clear wakeup type bits

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