SerialICE November 2012

serialice@serialice.com

2 participants
41 discussions

Patch merged into serialice/master: 6ce0bc3 Read memory from target by default
by gerrit＠coreboot.org 19 Nov '12

19 Nov '12

the following patch was just integrated into master: commit 6ce0bc3f4058ad38a5192940a448b4b900088e69 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Nov 14 10:45:05 2012 +0200 Read memory from target by default Reads from unknown memory regions did not come from the target. This fixes runs done without proper chipset filters. Change-Id: If9c7ab2fd18e2719346fd54610fcb7a73eb31a73 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/1857 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Wed Nov 14 16:30:16 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Nov 19 19:14:38 2012, giving +2 See http://review.coreboot.org/1857 for details. -gerrit

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Patch merged into serialice/master: a4a58bb Fix display of offset
by gerrit＠coreboot.org 19 Nov '12

19 Nov '12

the following patch was just integrated into master: commit a4a58bbfa7c72aeca76ab2663514afd5b4038b50 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Nov 14 10:27:21 2012 +0200 Fix display of offset If the size of a region was not power of two, the offset was incorrectly displayed. Change-Id: Ib8751fe1165917477f827c9032ef12ac58b1fab0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/1856 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Wed Nov 14 16:19:13 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Nov 19 19:14:15 2012, giving +2 See http://review.coreboot.org/1856 for details. -gerrit

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Patch merged into serialice/master: 613ffdb Add the Asus F2A85-M
by gerrit＠coreboot.org 19 Nov '12

19 Nov '12

the following patch was just integrated into master: commit 613ffdb4528d189a35bea96e4d2ee1e4372bc729 Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sun Nov 11 15:57:15 2012 +0100 Add the Asus F2A85-M This commit adds support for the http://www.asus.com/Motherboards/AMD_Socket_FM2/F2A85M It sets the clocks to 48MHz fed from SB, disables watchdog and setup serial port on SIO. Change-Id: Ia981f30e7444165570b3ebfbd4082173ef6c4205 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Reviewed-on: http://review.coreboot.org/1815 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Thu Nov 15 22:52:41 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Nov 19 19:13:27 2012, giving +2 See http://review.coreboot.org/1815 for details. -gerrit

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Patch merged into serialice/master: 5640107 Require lua>=5.2 version for SerialICE build
by gerrit＠coreboot.org 19 Nov '12

19 Nov '12

the following patch was just integrated into master: commit 564010725e5b9cc70bd6a8f8c34768c5b7422d0c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Nov 19 09:44:10 2012 +0200 Require lua>=5.2 version for SerialICE build New simba filters require the LUA "bit32" module available beginning with lua version 5.2. Change-Id: I30026ef66bf08487eacba02d884bcd377527df18 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/1882 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Mon Nov 19 12:54:43 2012, giving +2 Build-Tested: build bot (Jenkins) at Mon Nov 19 11:25:06 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Mon Nov 19 19:12:04 2012, giving +2 See http://review.coreboot.org/1882 for details. -gerrit

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Patch set updated for serialice: b6d18e1 Require lua>=5.2 version for SerialICE build
by Kyösti Mälkki 19 Nov '12

19 Nov '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1882 -gerrit commit b6d18e196922a9c1fda72bf6076306d4ac4735fd Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Nov 19 09:44:10 2012 +0200 Require lua>=5.2 version for SerialICE build New simba filters require the LUA "bit32" module available beginning with lua version 5.2. Change-Id: I30026ef66bf08487eacba02d884bcd377527df18 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/configure | 42 +++++++++++++++++++++++++++--------------- 1 file changed, 27 insertions(+), 15 deletions(-) diff --git a/qemu-0.15.x/configure b/qemu-0.15.x/configure index 2eec0fb..29f4a1b 100755 --- a/qemu-0.15.x/configure +++ b/qemu-0.15.x/configure @@ -1725,6 +1725,7 @@ done if test "$serialice" != "no" ; then serialice=no + got_lua=no cat > $TMPC << EOF #include <stdint.h> #include <lua.h> @@ -1735,24 +1736,35 @@ static lua_State *L; int main(void) { L=luaL_newstate(); return 0; } EOF - lua_cflags="-I/usr/local/include" - lua_ldflags="-L/usr/local/lib -llua -lm" - if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then - serialice=yes - libs_softmmu="$lua_ldflags $libs_softmmu" - else - lua_cflags=`$pkg_config --cflags lua 2> /dev/null || $pkg_config --cflags lua5.2 2> /dev/null || $pkg_config --cflags lua5.1 2> /dev/null` - lua_ldflags=`$pkg_config --libs lua 2> /dev/null || $pkg_config --libs lua5.2 2> /dev/null || $pkg_config --libs lua5.1 2> /dev/null` + if test "$got_lua" != "yes" ; then + lua_cflags="-I/usr/local/include" + lua_ldflags="-L/usr/local/lib -llua -lm" if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then - serialice=yes - libs_softmmu="$lua_ldflags $libs_softmmu" - else - echo - echo "Error LUA not found, can't build with SerialICE support." - echo - exit 1 + got_lua=yes fi fi + if test "$got_lua" != "yes" && $pkg_config --atleast-version=5.2 lua ; then + lua_cflags=`$pkg_config --cflags lua 2> /dev/null` + lua_ldflags=`$pkg_config --libs lua 2> /dev/null` + if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then + got_lua=yes + fi + fi + if test "$got_lua" != "yes" && $pkg_config --exists lua5.2 ; then + lua_cflags=`$pkg_config --cflags lua5.2 2> /dev/null` + lua_ldflags=`$pkg_config --libs lua5.2 2> /dev/null` + if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then + got_lua=yes + fi + fi + if test "$got_lua" != "yes" ; then + echo + echo "Error LUA version >= 5.2 not found, can't build with SerialICE support." + echo + exit 1 + fi + serialice=yes + libs_softmmu="$lua_ldflags $libs_softmmu" fi # test "$serialice" ##########################################

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New patch to review for serialice: 1f311ff Require lua>=5.2 version for SerialICE build
by Kyösti Mälkki 19 Nov '12

19 Nov '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1882 -gerrit commit 1f311ff1e65d5f7abba2bd8a1470c8c482e1d51d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Nov 19 09:44:10 2012 +0200 Require lua>=5.2 version for SerialICE build New simba filters require the LUA "bit32" module available beginning with lua version 5.2. Change-Id: I30026ef66bf08487eacba02d884bcd377527df18 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/configure | 42 +++++++++++++++++++++++++++--------------- 1 file changed, 27 insertions(+), 15 deletions(-) diff --git a/qemu-0.15.x/configure b/qemu-0.15.x/configure index 2eec0fb..8e085f8 100755 --- a/qemu-0.15.x/configure +++ b/qemu-0.15.x/configure @@ -1725,6 +1725,7 @@ done if test "$serialice" != "no" ; then serialice=no + got_lua=no cat > $TMPC << EOF #include <stdint.h> #include <lua.h> @@ -1735,24 +1736,35 @@ static lua_State *L; int main(void) { L=luaL_newstate(); return 0; } EOF - lua_cflags="-I/usr/local/include" - lua_ldflags="-L/usr/local/lib -llua -lm" - if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then - serialice=yes - libs_softmmu="$lua_ldflags $libs_softmmu" - else - lua_cflags=`$pkg_config --cflags lua 2> /dev/null || $pkg_config --cflags lua5.2 2> /dev/null || $pkg_config --cflags lua5.1 2> /dev/null` - lua_ldflags=`$pkg_config --libs lua 2> /dev/null || $pkg_config --libs lua5.2 2> /dev/null || $pkg_config --libs lua5.1 2> /dev/null` + if test "$got_lua" != "yes" ; then + lua_cflags="-I/usr/local/include" + lua_ldflags="-L/usr/local/lib -llua -lm" if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then - serialice=yes - libs_softmmu="$lua_ldflags $libs_softmmu" - else - echo - echo "Error LUA not found, can't build with SerialICE support." - echo - exit 1 + got_lua=yes fi fi + if test "$got_lua" != "yes" && ! $pkg_config --atleast-version=5.2 lua ; then + lua_cflags=`$pkg_config --cflags lua 2> /dev/null` + lua_ldflags=`$pkg_config --libs lua 2> /dev/null` + if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then + got_lua=yes + fi + fi + if test "$got_lua" != "yes" && ! $pkg_config --exists lua5.2 ; then + lua_cflags=`$pkg_config --cflags lua5.2 2> /dev/null` + lua_ldflags=`$pkg_config --libs lua5.2 2> /dev/null` + if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then + got_lua=yes + fi + fi + if test "$got_lua" != "yes" ; then + echo + echo "Error LUA version >= 5.2 not found, can't build with SerialICE support." + echo + exit 1 + fi + serialice=yes + libs_softmmu="$lua_ldflags $libs_softmmu" fi # test "$serialice" ##########################################

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New patch to review for serialice: 02adb21 Drop lua 5.1.4 patches
by Kyösti Mälkki 19 Nov '12

19 Nov '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1881 -gerrit commit 02adb21387f64ca2b95ce4f24025fa90ac9d7b72 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Nov 19 09:45:25 2012 +0200 Drop lua 5.1.4 patches Change-Id: I63c131fafa9d816f5f52ae3309e629920bf0f1ea Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/patches/lua-5.1.4-intsize.diff | 19 ----- SerialICE/patches/lua-5.1.4-x64-fix.diff | 11 --- SerialICE/patches/serialice.lua-5.2.diff | 120 ------------------------------- 3 files changed, 150 deletions(-) diff --git a/SerialICE/patches/lua-5.1.4-intsize.diff b/SerialICE/patches/lua-5.1.4-intsize.diff deleted file mode 100644 index 628681d..0000000 --- a/SerialICE/patches/lua-5.1.4-intsize.diff +++ /dev/null @@ -1,19 +0,0 @@ ---- src/luaconf.h.orig 2009-11-20 17:57:46.000000000 +0100 -+++ src/luaconf.h 2009-11-20 18:01:21.000000000 +0100 -@@ -10,6 +10,7 @@ - - #include <limits.h> - #include <stddef.h> -+#include <stdint.h> - - - /* -@@ -140,7 +141,7 @@ - ** CHANGE that if ptrdiff_t is not adequate on your machine. (On most - ** machines, ptrdiff_t gives a good choice between int or long.) - */ --#define LUA_INTEGER ptrdiff_t -+#define LUA_INTEGER int64_t - - - /* diff --git a/SerialICE/patches/lua-5.1.4-x64-fix.diff b/SerialICE/patches/lua-5.1.4-x64-fix.diff deleted file mode 100644 index 9d115a5..0000000 --- a/SerialICE/patches/lua-5.1.4-x64-fix.diff +++ /dev/null @@ -1,11 +0,0 @@ ---- src/Makefile.orig 2010-08-27 09:49:26.557070752 +0200 -+++ src/Makefile 2010-08-27 09:49:56.197070358 +0200 -@@ -96,7 +96,7 @@ - $(MAKE) all MYCFLAGS= - - linux: -- $(MAKE) all MYCFLAGS=-DLUA_USE_LINUX MYLIBS="-Wl,-E -ldl -lreadline -lhistory -lncurses" -+ $(MAKE) all MYCFLAGS="-fPIC -DLUA_USE_LINUX" MYLIBS="-Wl,-E -ldl -lreadline -lhistory -lncurses" - - macosx: - $(MAKE) all MYCFLAGS=-DLUA_USE_LINUX MYLIBS="-lreadline" diff --git a/SerialICE/patches/serialice.lua-5.2.diff b/SerialICE/patches/serialice.lua-5.2.diff deleted file mode 100644 index 86581a7..0000000 --- a/SerialICE/patches/serialice.lua-5.2.diff +++ /dev/null @@ -1,120 +0,0 @@ -diff --git a/SerialICE/patches/serialice.lua-5.2.diff b/SerialICE/patches/serialice.lua-5.2.diff -index dd10e50..e69de29 100644 ---- a/SerialICE/patches/serialice.lua-5.2.diff -+++ b/SerialICE/patches/serialice.lua-5.2.diff -@@ -1,13 +0,0 @@ --diff --git a/SerialICE/scripts/serialice.lua b/SerialICE/scripts/serialice.lua --index 0e7e902..947f6a8 100644 ----- a/SerialICE/scripts/serialice.lua --+++ b/SerialICE/scripts/serialice.lua --@@ -26,7 +26,7 @@ io.write("SerialICE: Starting LUA script\n") -- -- -- If you get an error here, install bitlib -- -- (ie. http://luaforge.net/projects/bitlib/) ---require("bit") --+require("bit32") -- -- function printf(s,...) -- return io.write(s:format(...)) -diff --git a/SerialICE/scripts/serialice.lua b/SerialICE/scripts/serialice.lua -index 0e7e902..5af8897 100644 ---- a/SerialICE/scripts/serialice.lua -+++ b/SerialICE/scripts/serialice.lua -@@ -111,10 +111,10 @@ mem_write_log_hooks = new_list() - prepend_to_list(mem_read_log_hooks, function(addr, size, data, target) - if (PCIe_bar ~= 0) and addr >= PCIe_bar and addr <= (PCIe_bar + PCIe_size) then - printf("PCIe %x:%02x.%x R.%02x => %s\n", -- bit.band(0xff,bit.rshift(addr, 20)), -- bit.band(0x1f,bit.rshift(addr, 15)), -- bit.band(0x7,bit.rshift(addr, 12)), -- bit.band(0xfff,addr), -+ bit32.band(0xff,bit32.rshift(addr, 20)), -+ bit32.band(0x1f,bit32.rshift(addr, 15)), -+ bit32.band(0x7,bit32.rshift(addr, 12)), -+ bit32.band(0xfff,addr), - size_data(size, data)) - return true - end -@@ -123,10 +123,10 @@ end) - prepend_to_list(mem_write_log_hooks, function(addr, size, data, target) - if (PCIe_bar ~= 0) and addr >= PCIe_bar and addr <= (PCIe_bar + PCIe_size) then - printf("PCIe %x:%02x.%x R.%02x <= %s\n", -- bit.band(0xff,bit.rshift(addr, 20)), -- bit.band(0x1f,bit.rshift(addr, 15)), -- bit.band(0x7,bit.rshift(addr, 12)), -- bit.band(0xfff,addr), -+ bit32.band(0xff,bit32.rshift(addr, 20)), -+ bit32.band(0x1f,bit32.rshift(addr, 15)), -+ bit32.band(0x7,bit32.rshift(addr, 12)), -+ bit32.band(0xfff,addr), - size_data(size, data)) - return true - end -@@ -145,10 +145,10 @@ prepend_to_list(io_write_log_hooks, function(port, size, data, target) - end - if port >= 0xcfc and port <= 0xcff then - printf("PCI %x:%02x.%x R.%02x <= %s\n", -- bit.band(0xff,bit.rshift(SerialICE_pci_device, 16)), -- bit.band(0x1f,bit.rshift(SerialICE_pci_device, 11)), -- bit.band(0x7,bit.rshift(SerialICE_pci_device, 8)), -- bit.band(0xff,SerialICE_pci_device + (port - 0xcfc)), -+ bit32.band(0xff,bit32.rshift(SerialICE_pci_device, 16)), -+ bit32.band(0x1f,bit32.rshift(SerialICE_pci_device, 11)), -+ bit32.band(0x7,bit32.rshift(SerialICE_pci_device, 8)), -+ bit32.band(0xff,SerialICE_pci_device + (port - 0xcfc)), - size_data(size, data)) - return true - end -@@ -160,10 +160,10 @@ prepend_to_list(io_read_log_hooks, function(port, size, data, target) - end - if port >= 0xcfc and port <= 0xcff then - printf("PCI %x:%02x.%x R.%02x => %s\n", -- bit.band(0xff,bit.rshift(SerialICE_pci_device, 16)), -- bit.band(0x1f,bit.rshift(SerialICE_pci_device, 11)), -- bit.band(0x7,bit.rshift(SerialICE_pci_device, 8)), -- bit.band(0xff,SerialICE_pci_device + (port - 0xcfc)), -+ bit32.band(0xff,bit32.rshift(SerialICE_pci_device, 16)), -+ bit32.band(0x1f,bit32.rshift(SerialICE_pci_device, 11)), -+ bit32.band(0x7,bit32.rshift(SerialICE_pci_device, 8)), -+ bit32.band(0xff,SerialICE_pci_device + (port - 0xcfc)), - size_data(size, data)) - return true - end -@@ -182,14 +182,14 @@ function(addr, hi, lo, filtered) - elseif mt == 6 then memtype = "Write-Back" - else memtype = "Unknown" - end -- printf("CPU: Set MTRR %x base to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit.band(lo, 0xffffff00), memtype) -+ printf("CPU: Set MTRR %x base to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit32.band(lo, 0xffffff00), memtype) - else -- if bit.band(lo, 0x800) == 0x800 then -+ if bit32.band(lo, 0x800) == 0x800 then - valid = "valid" - else - valid = "disabled" - end -- printf("CPU: Set MTRR %x mask to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit.band(lo, 0xfffff000), valid) -+ printf("CPU: Set MTRR %x mask to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit32.band(lo, 0xfffff000), valid) - end - return true - end -@@ -207,7 +207,7 @@ if northbridge == "intel-i945" then - if port == 0xcfc then - -- Catch PCIe base address - if SerialICE_pci_device == pci_bdf(0,0,0,0x48) then -- PCIe_bar = bit.band(0xfc000000,data) % 0x100000000 -+ PCIe_bar = bit32.band(0xfc000000,data) % 0x100000000 - PCIe_size = 64 * 1024 -- hard coded for now. - printf("PCIe BAR set up: 0x%08x\n", PCIe_bar) - return true -@@ -651,8 +651,8 @@ function SerialICE_cpuid_filter(in_eax, in_ecx, eax, ebx, ecx, edx) - -- Set number of cores to 1 on Core Duo and Atom to trick the - -- firmware into not trying to wake up non-BSP nodes. - if in_eax == 1 then -- ebx = bit.band(0xff00ffff, ebx); -- ebx = bit.bor(0x00010000, ebx); -+ ebx = bit32.band(0xff00ffff, ebx); -+ ebx = bit32.bor(0x00010000, ebx); - return true, eax, ebx, ecx, edx - end -

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Patch set updated for serialice: 878fb98 Add the Asus F2A85-M
by Rudolf Marek 15 Nov '12

15 Nov '12

Rudolf Marek (r.marek(a)assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1815 -gerrit commit 878fb98b9c0c2480d04a9a3923572a4473808e0f Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sun Nov 11 15:57:15 2012 +0100 Add the Asus F2A85-M This commit adds support for the http://www.asus.com/Motherboards/AMD_Socket_FM2/F2A85M It sets the clocks to 48MHz fed from SB, disables watchdog and setup serial port on SIO. Change-Id: Ia981f30e7444165570b3ebfbd4082173ef6c4205 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> --- SerialICE/Kconfig | 6 +++++ SerialICE/mainboard/asus_f2a85-m.c | 50 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 72e3924..38f3e03 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -45,6 +45,10 @@ config BOARD_INTEL_D945GCLF config BOARD_DELL_S1850 bool "Dell PowerEdge S1850" +config BOARD_ASUS_F2A85_M + bool "ASUS F2A85-M" + select BUILD_XMMSTACK + config BOARD_ASUS_M2V_MX_SE bool "ASUS M2V-MX SE" select VIA_ROMSTRAP @@ -124,6 +128,7 @@ config BOARD_INIT default "roda_rk886ex.c" if BOARD_RODA_RK886EX default "intel_d945gclf.c" if BOARD_INTEL_D945GCLF default "dell_s1850.c" if BOARD_DELL_S1850 + default "asus_f2a85-m.c" if BOARD_ASUS_F2A85_M default "asus_m2v-mx_se.c" if BOARD_ASUS_M2V_MX_SE default "asus_k8v-x.c" if BOARD_ASUS_K8V_X default "msi_ms6178.c" if BOARD_MSI_MS6178 @@ -148,6 +153,7 @@ config BOARD_INIT config SOUTHBRIDGE_INIT string default "southbridge/intel-ich7.c" if BOARD_KONTRON_986LCD_M + default "southbridge/amd-sbxxx.c" if BOARD_ASUS_F2A85_M config SUPERIO_INIT string diff --git a/SerialICE/mainboard/asus_f2a85-m.c b/SerialICE/mainboard/asus_f2a85-m.c new file mode 100644 index 0000000..8eebde3 --- /dev/null +++ b/SerialICE/mainboard/asus_f2a85-m.c @@ -0,0 +1,50 @@ +/* + * SerialICE + * + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2012 Rudolf Marek <r.marek(a)assembler.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="Asus F2A85-M "; + +#define SUPERIO_CONFIG_PORT 0x2e + +static void superio_init(void) +{ + u8 byte; + pnp_enter_ext_func_mode_ite(SUPERIO_CONFIG_PORT); + + /* Disable the watchdog. */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 7); + pnp_write_register(SUPERIO_CONFIG_PORT, 0x72, 0x00); + + /* Enable the serial port. */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 1); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode_ite(SUPERIO_CONFIG_PORT); +} + + +static void chipset_init(void) +{ + southbridge_init(); + sbxxx_enable_48mhzout(); + superio_init(); +}

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Patch set updated for serialice: 5d05c96 Add config option for LPC/PCI POST card
by Rudolf Marek 15 Nov '12

15 Nov '12

Rudolf Marek (r.marek(a)assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1682 -gerrit commit 5d05c964ee40c6d5e035332092c20ef796f451de Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sun Nov 11 15:59:24 2012 +0100 Add config option for LPC/PCI POST card It turns out that first works POST card than serial port. Make it a nice Kconfig option and convert #if 0 existing code to use it. Change-Id: I38af84211d686484deabcec0002d7d261993e4d6 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> --- SerialICE/Kconfig | 15 +++++++++++++ SerialICE/mainboard/intel_d945gclf.c | 3 ++- SerialICE/mainboard/roda_rk886ex.c | 5 +++-- SerialICE/southbridge/amd-sbxxx.c | 43 +++++++++++++++++++++++++++++++++++- SerialICE/southbridge/intel-ich7.c | 4 +++- 5 files changed, 65 insertions(+), 5 deletions(-) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 38f3e03..32e2895 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -323,6 +323,21 @@ config EXPERIMENTAL We do not make any guarantees about anything that is marked as EXPERIMENTAL! You have been warned! +choice + prompt "POST card" + default POST_NONE + +config POST_NONE + boolean "None" + +config POST_PCI + boolean "PCI POST card" + +config POST_LPC + boolean "LPC POST card" + +endchoice + config EXPERT bool "Expert mode" help diff --git a/SerialICE/mainboard/intel_d945gclf.c b/SerialICE/mainboard/intel_d945gclf.c index c78f3bc..85d4d82 100644 --- a/SerialICE/mainboard/intel_d945gclf.c +++ b/SerialICE/mainboard/intel_d945gclf.c @@ -18,6 +18,7 @@ */ /* This is a chipset init file for the Intel D945GCLF mainboard */ +#include "config.h" const char boardname[33]="Intel D945GCLF "; @@ -35,7 +36,7 @@ static void southbridge_init(void) // Set up RCBA pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0xf0), RCBA | 1); -#if 0 +#if defined(CONFIG_POST_LPC) // port80 writes go to LPC: reg32 = RCBA32(GCS); reg32 = reg32 & ~0x04; diff --git a/SerialICE/mainboard/roda_rk886ex.c b/SerialICE/mainboard/roda_rk886ex.c index e3e02c1..048f30d 100644 --- a/SerialICE/mainboard/roda_rk886ex.c +++ b/SerialICE/mainboard/roda_rk886ex.c @@ -20,6 +20,8 @@ /* * This is an example chipset init file for the Roda RK886EX (Rocky 3+) */ +#include "config.h" + const char boardname[33]="Roda RK886EX (Rocky III+) "; /* Hardware specific functions */ @@ -36,12 +38,11 @@ static void southbridge_init(void) // Set up RCBA pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0xf0), RCBA | 1); -#if 0 +#if defined(CONFIG_POST_LPC) // port80 writes go to LPC: reg32 = RCBA32(GCS); reg32 = reg32 & ~0x04; RCBA32(GCS) = reg32; - outb(0x23, 0x80); #endif // Set up SuperIO LPC forwards diff --git a/SerialICE/southbridge/amd-sbxxx.c b/SerialICE/southbridge/amd-sbxxx.c index 86f1278..37dca92 100644 --- a/SerialICE/southbridge/amd-sbxxx.c +++ b/SerialICE/southbridge/amd-sbxxx.c @@ -23,6 +23,8 @@ * o enables POST card (see #if 0) */ +#include "config.h" + #define MMIO_NON_POSTED_START 0xfed00000 #define MMIO_NON_POSTED_END 0xfedfffff #define SB_MMIO 0xFED80000 @@ -44,7 +46,7 @@ static void sbxxx_enable_48mhzout(void) static void southbridge_init(void) { - u16 reg16; + u8 reg8; u32 reg32; /* route FED00000 - FEDFFFFF as non-posted to SB */ @@ -65,4 +67,43 @@ static void southbridge_init(void) /* Enable LPC decoding of 0x2e/0x2f, 0x4e/0x4f 0x3f8 */ pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x44), (1<<6)); pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x48), (1 << 1) | (1 << 0)); + +#if defined(CONFIG_POST_PCI) + /* Chip Control: Enable subtractive decoding */ + reg8 = pci_read_config8(PCI_ADDR(0, 0x14, 4, 0x40)); + reg8 |= 1 << 5; + pci_write_config8(PCI_ADDR(0, 0x14, 4, 0x40), reg8); + + /* Misc Control: Enable subtractive decoding if 0x40 bit 5 is set */ + reg8 = pci_read_config8(PCI_ADDR(0, 0x14, 4, 0x4b)); + reg8 |= 1 << 7; + pci_write_config8(PCI_ADDR(0, 0x14, 4, 0x4b), reg8); + + /* The same IO Base and IO Limit here is meaningful because we set the + * bridge to be subtractive. During early setup stage, we have to make + * sure that data can go through port 0x80. + */ + /* IO Base: 0xf000 */ + reg8 = pci_read_config8(PCI_ADDR(0, 0x14, 4, 0x1c)); + reg8 |= 0xf << 4; + pci_write_config8(PCI_ADDR(0, 0x14, 4, 0x1c), reg8); + + /* IO Limit: 0xf000 */ + reg8 = pci_read_config8(PCI_ADDR(0, 0x14, 4, 0x1d)); + reg8 |= 0xf << 4; + pci_write_config8(PCI_ADDR(0, 0x14, 4, 0x1d), reg8); + + /* PCI Command: Enable IO response */ + reg8 = pci_read_config8(PCI_ADDR(0, 0x14, 4, 0x4)); + reg8 |= 1 << 0; + pci_write_config8(PCI_ADDR(0, 0x14, 4, 0x4) , reg8); + + reg8 = pci_read_config8(PCI_ADDR(0, 0x14, 3, 0x4a)); + reg8 &= ~(1 << 5); /* disable lpc port 80 */ + pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x4a), reg8); +#elif defined(CONFIG_POST_LPC) + reg8 = pci_read_config8(PCI_ADDR(0, 0x14, 3, 0x4a)); + reg8 |= (1 << 5); /* enable lpc port 80 */ + pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x4a), reg8); +#endif } diff --git a/SerialICE/southbridge/intel-ich7.c b/SerialICE/southbridge/intel-ich7.c index 3688084..c58aca1 100644 --- a/SerialICE/southbridge/intel-ich7.c +++ b/SerialICE/southbridge/intel-ich7.c @@ -23,6 +23,8 @@ * o the watchdog is turned off */ +#include "config.h" + #define RCBA 0xfed1c000 #define GCS 0x3410 #define RCBA32(x) *((volatile u32 *)(RCBA + x)) @@ -35,7 +37,7 @@ static void southbridge_init(void) // Set up RCBA pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0xf0), RCBA | 1); -#if 0 +#if defined(CONFIG_POST_LPC) // port80 writes go to LPC: reg32 = RCBA32(GCS); reg32 = reg32 & ~0x04;

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New patch to review for serialice: 8525997 Read memory from target by default
by Kyösti Mälkki 14 Nov '12

14 Nov '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1857 -gerrit commit 85259974fd0bd95d3cf581beeefc9c14228475fa Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Nov 14 10:45:05 2012 +0200 Read memory from target by default Reads from unknown memory regions did not come from the target. This fixes runs done without proper chipset filters. Change-Id: If9c7ab2fd18e2719346fd54610fcb7a73eb31a73 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/simba/core_io.lua | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/SerialICE/simba/core_io.lua b/SerialICE/simba/core_io.lua index b89a3e2..0b823cc 100644 --- a/SerialICE/simba/core_io.lua +++ b/SerialICE/simba/core_io.lua @@ -39,13 +39,8 @@ filter_io_fallback = { -- function mem_undefined(f, action) - if (action.write) then - action.to_hw = true - action.to_qemu = false - else - action.to_hw = false - action.to_qemu = true - end + action.to_hw = true + action.to_qemu = false action.undefined = true return true end

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SerialICE November 2012